JP2017085330A - Transmitter and receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a bottleneck caused by error-correction decoding processing in an FPU (Field Pickup Unit) based system.SOLUTION: A transmitter 10 comprises:a demultiplexing part 10E for outputting each of data frames to any one of Nc pieces of coding parts 10F-10F; and a multiplexing part 10G for multiplexing Nt pieces of codes that are inputted from the Nc pieces of coding parts 10F-10F, for each of Nt pieces of transmission systems. The Nc pieces of coding parts 10F-10Finclude: first coding portions 11F-11Ffor applying convolution coding processing to the inputted data frames; and distribution portions 12F-12Ffor outputting codes that are obtained by applying the convolution coding processing by the first coding portions 11F-11F, to the Nt pieces of transmission systems. The number of bits in 1 OFDM symbol to be used for OFDM modulation processing is a multiple of Nc.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a transmitter and a receiver.

  Conventionally, an FPU (Field Pickup Unit) system has been used for transmission of program material. The FPU system is indispensable as a tool for relaying programs and sending video coverage to broadcast stations.

  In recent years, a digital FPU system using an OFDM (Orthogonal Frequency Division Multiplexing) system that is resistant to frequency selective fading has attracted attention, and such a digital FPU system has already been practically used in various frequency bands. Standards have been proposed (see Non-Patent Documents 1 to 3). In addition, the standards of Non-Patent Documents 2 and 3 show application to a MIMO (Multiple Input Multiple Output) system using a plurality of antennas, and are effective methods capable of realizing large-capacity transmission.

  In digital radio transmission, an encoding process and a decoding process using an error correction code are indispensable for correcting an error occurring in a propagation path. In Non-Patent Documents 1 to 3, stable wireless transmission is realized by using a Reed-Solomon (RS) code for the outer code and a convolutional code for the inner code.

  These encoding processing and decoding processing are often implemented in an FPGA (Field Programmable Gate Array).

Portable OFDM digital wireless transmission system standard for transmission of television broadcast program materials (ARIB STD-B33 1.2 version), Japan Radio Industry Association Portable millimeter-wave band digital radio transmission system standard for transmission of television broadcast program materials (ARIB STD-B43 1.0 version), Japan Radio Industry Association 1.2GHz / 2.3GHz band portable OFDM digital radio transmission system for broadcasting program material transmission standard (ARIB STD-B57 2.0 version), Japan Radio Industry Association

  However, when large-capacity transmission is performed, there is a problem that the maximum processing speed of the error correction code mounted on the FPGA is lower than the transmission rate. For example, when the system implemented in the half mode described in Non-Patent Documents 1 to 3 is expanded to the full mode, the transmission rate is doubled, so that the transmission rate exceeds the maximum processing speed for the error correction code. The problem of end up often occurs.

  As a specific example, FIG. 9 and FIG. 10 show a transmitter 10 and a receiver 30 in an OFDM digital FPU system that uses a 2-transmission 2-reception MIMO system compliant with the standards of Non-Patent Documents 2 and 3. An example is shown. Refer to Non-Patent Documents 1 to 3 for descriptions of the functional blocks of the transmitter 10 and the receiver 30.

  For example, in a system in which the coding rate of the inner code is 1/2, when the transmission capacity of the wireless section is 200 Mbps when in the half mode, the input of the error correction inner code coding unit (the inner code encoder) and The output is 200 Mbps, and the input and output of the error correction inner code decoding unit (inner code decoder) are also 200 Mbps.

  Here, in order to expand the transmission capacity, when the transmitter 10 and the receiver 30 are expanded from the half mode to the full mode, a transmission rate of 400 Mbps is required, as shown in FIG. Since the maximum processing speed of the error correction inner code decoding unit is 300 Mbps, the maximum processing speed of the error correction inner code decoding unit falls below the transmission rate, and the processing in the error correction inner code decoding unit (for the error correction code) There is a problem that the processing) becomes a bottleneck of mounting in the FPGA.

  Accordingly, the present invention has been made to solve the above-described problems, and in the above-described FPU system, a transmitter and a receiver that can eliminate the bottleneck caused by the above-described error correction decoding process. The purpose is to provide.

  A first feature of the present invention is a transmitter configured to transmit an OFDM signal using Nt transmission systems using a MIMO scheme, and includes Nc encoding units and an input TS packet. A synchronization unit configured to perform a synchronization process in units of data frames, and output each of the data frames to any one of the Nc encoding units A demultiplexing unit configured, a multiplexing unit configured to multiplex Nt codes input from each of the Nc encoding units for each of the Nt transmission systems, and the Nt number of encoding units. Nt modulation units corresponding to each of the Nt transmission systems configured to perform OFDM modulation processing on codes multiplexed for each transmission system, and the Nc encodings Each part of the input A first encoding unit configured to perform a convolutional encoding process on each of the data frames, and a code obtained by performing the convolutional encoding process by the first encoding unit. And an allocating unit configured to output to each of the Nt transmission systems, and configured so that the number of bits of one OFDM symbol used in the OFDM modulation processing is a multiple of Nc. It is a summary.

  A second feature of the present invention is a receiver configured to receive an OFDM signal transmitted by Nt transmission systems using the MIMO scheme by the transmitter according to the first feature described above. , Nc decoding units, a demodulating unit configured to separate bit likelihoods in each of the Nt transmission systems from the received OFDM signal, and the Nt number of inputs input by the demodulating unit A separation unit configured to separate the bit likelihood in each of the Nt transmission systems of the code to be decoded by each of the Nc decoding units from the bit likelihood in each of the transmission systems; A multiplexing unit configured to multiplex a code for each data frame input from each of the Nc decoding units, and a TS packet is re-established from the code multiplexed by the multiplexing unit. Each of the Nc decoding units generates the bit likelihood of the code from the bit likelihood in each of the Nt transmission systems of the code separated by the demultiplexing unit. A decoding result for each data frame is obtained by performing a decoding process using a reverse allocator configured to perform and a convolutional code based on the bit likelihood of the code input by the reverse allocator And a first decoding unit configured as described above.

  According to the present invention, it is possible to provide a transmitter and a receiver that can eliminate bottlenecks caused by error correction decoding processing in the above-described FPU system.

FIG. 1 is a functional block diagram of a transmitter 10 according to the first embodiment. FIG. 2 is a diagram for explaining functions of the data frame synchronization unit 10A, the energy spreading unit 10B, the error correction outer code coding unit 10C, and the outer interleaving unit 10D in the transmitter 10 according to the first embodiment. . FIG. 3 is a diagram for explaining the function of the inter-code separator 10F of the transmitter 10 according to the first embodiment. FIG. 4 is a diagram for explaining the functions of the error correction inner code encoding units 11F _{1 to} 11F _Nc of the transmitter 10 according to the first embodiment. FIG. 5 is a diagram for explaining the function of the inter-transmission-system multiplexing unit 10G of the transmitter 10 according to the first embodiment. FIG. 6 is a functional block diagram of the receiver 30 according to the first embodiment. FIG. 7 is a diagram for explaining the function of the transmission system separation unit 30B of the receiver 30 according to the first embodiment. FIG. 8 is a diagram for explaining the function of the inter-code separation unit 30D of the receiver 30 according to the first embodiment. FIG. 9 is a functional block diagram of the conventional transmitter 10. FIG. 10 is a functional block diagram of a conventional receiver 30.

(First embodiment)
Hereinafter, the transmitter 10 and the receiver 30 according to the first embodiment of the present invention will be described with reference to FIGS. In the first embodiment of the present invention, a case of the FPU transmitter 10 and the receiver 30 will be described.

  As shown in FIG. 1, the transmitter 10 according to the present embodiment is configured to transmit an OFDM signal using Nt transmission systems (transmission systems 1 to Nt) using the MIMO scheme.

As shown in FIG. 1, the transmitter 10 according to the present embodiment includes a data frame synchronization unit 10A, an energy spreading unit 10B, an error correction outer code encoding unit 10C, an outer interleaving unit 10D, A demultiplexer 10E, Nc encoders 10F _{1 to} 10F _Nc , an inter-transmission system multiplexer 10G, and Nt MIMO-OFDM modulators 10H _{1 to} 10H _Nt are provided. Here, “Nt” and “Nc” are integers of 2 or more. Note that at least some of the functions of the transmitter 10 according to the present embodiment may be implemented in the FPGA.

  The data frame synchronization unit 10A is configured to configure a data frame from the input TS packet (204 byte format) and perform synchronization processing in units of data frames.

  As shown in FIG. 2, one TS packet is composed of a 1-byte data frame synchronization byte (“synchronization” shown in FIG. 2), 187-byte data, and a 16-byte dummy. One data frame is composed of eight TS packets. Here, in the first TS packet of each data frame, the value of the data frame synchronization byte is inverted from the normal “47h” to “B8h”. Here, “h” is a symbol indicating that “47” and “B8” are hexadecimal numbers.

  As shown in FIG. 2, the energy spreading unit 10B is configured to perform an energy spreading process on each of the data frames input from the data frame synchronization unit 10A.

  As shown in FIG. 2, the error correction outer code encoding unit 10C performs error correction encoding processing (Reed Solomon (RS)) using an RS code as an outer code for each of the data frames input from the energy spreading unit 10B. RS) encoding process).

  As shown in FIG. 2, the outer interleaving unit 10D is configured to perform an outer interleaving process on each of the data frames input from the error correction outer code encoding unit 10C.

The inter-code separation unit 10E is configured to output each of the data frames input from the outer interleaving unit 10D to any one of the _Nc encoding units 10F _{1 to} 10F _Nc .

Specifically, as shown in FIG. 3, the inter-code separator 10E is configured to perform S / P (Serial to Parallel) conversion processing on the Nc system in units of data frames. That is, the inter-code separator 10E is configured to output the data frame input from the outer interleaver 10D to each of the _Nc encoders 10F _{1 to} 10F _Nc .

  As a result, the transmitter 10 can perform encoding processing (error correction encoding processing using a convolutional code as an inner code described later) at a rate of 1 / Nc of the input data (TS packet). The receiver 30 can perform decoding processing (error correction decoding processing using a convolutional code as an inner code described later) at a rate of 1 / Nc of input data (TS packet).

In addition, since the existing data frame configuration can be maintained after the output from the inter-code separator 10E, the functions of the error correction inner code encoders 11F _{1 to} 11F _{Nc in} the transmitter 10 and the transmission system modulations can be maintained. The functions of the division units 12F _{1 to} 12F _Nc, the functions of the transmission system reverse distribution units 31C _{1 to} 31C _Nc in the receiver 30, the functions of the error correction inner code decoding units 32C _{1 to} 32C _Nc , etc. It can be similar to the function.

  In the receiver 30, which will be described later, the data frame configuration is maintained as a result of the decoding process. Therefore, P / S (Parallel to Serial) from the Nc system to the 1 system in units of data frames with the data frame synchronization byte as a mark. By performing the conversion process, the original order can be easily restored.

Each of the Nc encoding units 10F _{1 to} 10F _Nc includes an intra-error correction code encoding unit 11F _{1 to} 11F _Nc and a transmission system allocation unit 12F _{1 to} 12F _Nc . Each of the Nc encoding units 10F _{1 to} 10F _Nc corresponds to each of the Nc codes _{1 to} Nt.

The error correction inner code encoders 11F _{1 to} 11F _Nc perform error correction encoding processing (convolution encoding processing) using a convolutional code as an inner code for each of the data frames input from the inter-code separator 10E. It is configured to apply. For example, as illustrated in FIG. 4, the error correction inner code encoders 11F _{1 to} 11F _Nc are configured to output bits belonging to the same codes _{1 to} Nt in two systems.

Transmission system allocating units 12F _{1 to} 12F _Nc convert Nt transmission systems into codes (two systems of inputs) obtained by performing convolutional coding processing by intra-error correction code encoding units 11F _{1 to} 11F _Nc . 1 to Nt are configured to output. That is, each of the transmission system allocating units 12F _{1 to} 12F _Nc has a bit of code _{1 to Nc} (for example, “bit 1 of transmission system 1 of code 1 shown in FIG. ”To“ bit of transmission system Nt of code 1 ”).

The inter-transmission system multiplexing unit 10G is configured to multiplex Nt codes 1 to Nt input from each of the _Nc encoding units 10F _{1 to} 10F _Nc for each of the Nt transmission systems 1 to Nt. ing.

  As shown in FIG. 5, the inter-transmission system multiplexing unit 10G is configured to perform P / S conversion processing for each bit of a code belonging to the same transmission system bit.

For example, as illustrated in FIG. 5, the inter-transmission system multiplexing unit 10 </ b> G includes a code 1 bit belonging to the transmission system 1 (a bit of the transmission system 1 of code 1) b _1,1 (n) to a code belonging to the transmission system 1. Nc bits (bits of transmission system 1 of code Nc) b _{Nc, 1} (n) are input to the P / S converter 1 in the inter-transmission system multiplexer 10G, and the bits of code 1 (code) belonging to the transmission system Nt 1 bit of transmission system Nt) b _{1, Nt} (n) to bit of code Nc belonging to transmission system Nt (bit of transmission system Nt of code Nc) b _{Nc, Nt} (n) are transmitted in transmission system multiplexing section 10G The P / S conversion unit Nt is configured to input.

Here, as illustrated in FIG. 5, the P / S conversion unit 1 is configured to input the code 1 bit (bit 1 of the code 1 transmission system 1) b _1,1 (n) to the transmission system belonging to the input transmission system 1. The bit of code Nc belonging to 1 (bit of transmission system 1 of code Nc) b _{Nc, 1} (n) is configured to perform P / S conversion processing bit by bit.

Similarly, as illustrated in FIG. 5, the P / S conversion unit Nt includes the code 1 bit (bit of the code 1 transmission system Nt) b _{1, Nt} (n) to the transmission system belonging to the input transmission system Nt. The bit of the code Nc belonging to Nt (bit of the transmission system Nt of the code Nc) b _{Nc, Nt} (n) is configured to perform P / S conversion processing bit by bit.

With such a configuration, the output of each of the _Nc encoders 10F _{1 to} 10F Nc, which has become a rate of 1 / Nc by being divided into Nc systems, is multiplied by Nc to match the rate of the radio section. it can.

  Further, according to such a configuration, even if reception of one carrier symbol fails, the influence can be distributed to a plurality of codes.

Each of the Nt MIMO-OFDM modulation units 10H _{1 to} 10H _Nt is configured to perform OFDM modulation processing on a code multiplexed for each of the Nt transmission systems 1 to Nt to which it corresponds.

  Here, the number of bits of one OFDM symbol used in the OFDM modulation processing is configured to be a multiple of Nc. According to such a configuration, when multiplexing is performed between codes 1 to Nc for each transmission system (inter-transmission system multiplexing unit 10G in the transmitter 10), since the top of the OFDM symbol becomes a bit of code 1, separation ( Separation by the transmission system separation unit 30B in the receiver 30 described later) can be easily performed.

  As shown in FIG. 6, the receiver 30 according to the present embodiment is configured to receive OFDM signals transmitted by Nt transmission systems using the MIMO method by the transmitter 10 described above.

6, the receiver 30 according to the present embodiment includes a MIMO-OFDM demodulation unit 30A, a transmission system separation unit 30B, Nc decoding units 30C _{1 to} 30C _Nc, and inter-code multiplexing. 30D, an outer deinterleaving unit 30E, an error correction outer code decoding unit 30F, an energy despreading unit 30G, and a TS packet reconstruction unit 30H. Note that at least part of the functions of the receiver 30 according to the present embodiment may be implemented in the FPGA.

  The MIMO-OFDM demodulator 30A performs a MIMO-OFDM demodulation process on the OFDM signals 1 to Nr received via the receiving antenna, whereby the bit likelihood in each of the Nt transmission systems from the OFDM signals 1 to Nr. Are configured to separate.

  In the example of FIG. 6, the number of reception antennas is “Nr”. However, since OFDM signals of Nt transmission systems are detected by the MIMO-OFDM demodulation process, the number of reception antennas is other than “Nr”. May be. Note that “Nt = 1” and “Nr = 1” are normal systems that do not use the MIMO scheme, and are also referred to as SISO (Single Input Single Output) schemes for the MIMO scheme.

The transmission system separation unit 30B is decoded by each of the _Nc decoding units 30C _{1 to} 30C Nc from the bit likelihood in each of the Nt transmission systems 1 to Nt input by the MIMO-OFDM demodulation unit 30A. The bit likelihood in each of Nt transmission systems 1 to Nt of power codes 1 to Nc is separated.

As illustrated in FIG. 7, the transmission system separation unit 30B performs processing opposite to that of the transmission system multiplexing unit 10G in the transmitter 10, that is, the bit likelihoods of codes 1 to Nc arranged in order for each transmission system 1 to Nt. S / P conversion processing is performed on the degree, and each code _{1 to Nc} is configured to output to each of the corresponding decoding units 30C _{1 to} 30C _Nc .

Here, as shown in FIG. 7, the S / P conversion unit 1 in the transmission system separation unit 30B performs the bit likelihood of the code 1 belonging to the input transmission system 1 (the bit likelihood of the transmission system 1 of the code 1). Degree) b ′ _1,1 (n) to bit likelihood of code Nc belonging to transmission system 1 (bit likelihood of transmission system 1 of code Nc) b ′ _{Nc, 1} (n) bit by bit S It is configured to perform / P conversion processing.

Similarly, as shown in FIG. 7, the S / P conversion unit Nt in the transmission system separation unit 30B performs the bit likelihood of the code 1 belonging to the input transmission system Nt (the bit likelihood of the transmission system Nt of the code 1). Degree) b ′ _{1, Nt} (n) to bit likelihood of the code Nc belonging to the transmission system Nt (bit likelihood of the transmission system Nt of the code Nc) b ′ _{Nc, Nt} (n) It is configured to perform / P conversion processing.

  Here, since the beginning of the OFDM symbol has a bit likelihood of code 1 in each transmission system 1 to Nt, it belongs to each transmission system by performing S / P conversion processing with reference to the beginning of the OFDM symbol. The bits of the code can be correctly separated.

Each of the _Nc decoding units 30C _{1 to} 30C _Nc includes transmission system reverse allocating units 31C _{1 to} 31C _Nc and error correction inner code decoding units 32C _{1 to} 32C _Nc .

Each of transmission system reverse allocating units 31C _{1 to} 31C _Nc has a bit likelihood of codes 1 to Nc from a bit likelihood of each of transmission systems _{1 to} Nt of codes _{1 to Nc} separated by transmission system separation unit 30B. Is configured to generate As shown in FIG. 6, each of the transmission system reverse allocating units 31C _{1 to} 31C _Nc is configured to output the bit likelihoods of the codes _{1 to Nc to} which it corresponds in two systems.

Each of the error correction inner code decoding units 32C _{1 to} 32C _Nc uses a convolutional code as an inner code based on the bit likelihood of the codes _{1 to Nc} input by each of the transmission system reverse allocating units 31C _{1 to} 31C _Nc . The decoding results of codes 1 to Nc are obtained by performing the error correction decoding process. At this time, the decoding result of each code maintains the data frame configuration.

The inter-code multiplexing unit 30D is configured to multiplex the decoding results of the codes _{1 to Nc} input from each of the _Nc decoding units 30C _{1 to} 30C _Nc in units of data frames. The inter-code multiplexing unit 30D is configured to detect the multiplexing timing of the decoding results of the codes 1 to Nc for each data frame using the data frame synchronization byte.

  Here, as illustrated in FIG. 8, the inter-code multiplexing unit 30D performs the reverse process of the inter-code separation unit 10E in the transmitter 10, that is, the decoding results of the codes 1 to Nc arranged in order in Nc systems. On the other hand, P / S conversion processing is performed to make one system in units of data frames.

  Outer deinterleaving unit 30E is configured to perform outer deinterleaving processing on each of the data frames input from intersymbol multiplexing unit 30D.

  The error correction outer code decoding unit 30F performs error correction decoding processing (Reed-Solomon (RS) decoding processing) using an RS code as an outer code for each of the data frames input from the outer deinterleaving unit 30E. It is configured.

  The energy despreading unit 30G is configured to perform energy despreading processing on each of the data frames input from the error correction outer code decoding unit 30F.

  The TS packet reconstruction unit 30H is configured to reconstruct a TS packet (204-byte format) from the data frame input from the energy despreading unit 30G.

  According to the transmitter 10 and the receiver 30 according to the present embodiment, it is possible to eliminate a bottleneck caused by error correction decoding processing using a convolutional code as an inner code.

(Example of change)
Hereinafter, modified examples of the present invention will be described by paying attention to differences from the transmitter 10 and the receiver 30 according to the first embodiment described above.

  The transmitter 10 according to the above-described embodiment is configured such that the data frame configuration is maintained in the section from the output of the data frame synchronization unit 10A to the output of the outer interleave unit 10D, as shown in FIG. .

Therefore, in the transmitter 10, each of the _Nc encoding units 10F _{1 to} 10F _Nc is added to the error correction inner code encoding units 11F _{1 to} 11F _Nc and the transmission system allocation units 12F _{1 to} 12F _Nc. it may be configured to include an interleaving section _10D 1 _{~10D Nc} (not shown). In such a case, the inter-code separation unit 10E is provided between each of the Nc encoding units 10F _{1 to} 10F _Nc (outer interleaving units 10D _{1 to} 10D _Nc ) and the error correction outer code encoding unit 10C.

In the receiver 30 corresponding to the transmitter 10, each of the _Nc decoding units 30C _{1 to} 30C _Nc is transferred to the transmission system reverse allocating units 31C _{1 to} 31C _Nc and the error correction inner code decoding units 32C _{1 to} 32C _Nc . in addition, it may be configured to include an outer deinterleaver _30E 1 _{~30E Nc} (not shown). In such a case, the inter-code multiplexing unit 30D is provided between each of the Nc decoding units 30C _{1 to} 30C _Nc (outer deinterleaving units 30E _{1 to} 30E _Nc ) and the error correction outer code decoding unit 30F.

Further, in the transmitter 10, each of the _Nc encoders 10F _{1 to} 10F _Nc is added to the error correction inner code encoders 11F _{1 to} 11F _Nc and the transmission system distribution units 12F _{1 to} 12F _Nc. The interleaving units 10D _{1 to} 10D _Nc (not shown) and the error correction outer code encoding units 10C _{1 to} 10C _Nc (not shown) may be provided. In such a case, the inter-code separating unit 10E is provided between each of the Nc encoding units 10F _{1 to} 10F _Nc (error correction outer code encoding units 10C _{1 to} 10C _Nc ) and the energy spreading unit 10B.

In the receiver 30 corresponding to the transmitter 10, each of the _Nc decoding units 30C _{1 to} 30C _Nc is transferred to the transmission system reverse allocating units 31C _{1 to} 31C _Nc and the error correction inner code decoding units 32C _{1 to} 32C _Nc . In addition, it may be configured to include outer deinterleave units 30E _{1 to} 30E _Nc (not shown) and error correction outer code decoding units 30F _{1 to} 30F _Nc (not shown). In such a case, the inter-code multiplexing unit 30D is provided between each of the Nc decoding units 30C _{1 to} 30C _Nc (error correction outer code decoding units 30F _{1 to} 30F _Nc ) and the energy despreading unit 30G.

Further, in the transmitter 10, each of the _Nc encoding units 10F _{1 to} 10F _Nc is added to the error correction inner code encoding units 11F _{1 to} 11F _Nc and the transmission system allocation units 12F _{1 to} 12F _Nc. Interleave sections 10D _{1 to} 10D _Nc (not shown), error correction outer code encoding sections 10C _{1 to} 10C _Nc (not shown), and energy spreading sections 10B _{1 to} 10B _Nc (not shown) are configured. May be. In this case, the inter-code separation unit 10E is provided between each of the Nc encoding units 10F _{1 to} 10F _Nc (energy spreading units 10B _{1 to} 10B _Nc ) and the data frame synchronization unit 10A.

In the receiver 30 corresponding to the transmitter 10, each of the _Nc decoding units 30C _{1 to} 30C _Nc is transferred to the transmission system reverse allocating units 31C _{1 to} 31C _Nc and the error correction inner code decoding units 32C _{1 to} 32C _Nc . In addition, outer deinterleaving units 30E _{1 to} 30E _Nc (not shown), error correcting outer code decoding units 30F _{1 to} 30F _Nc (not shown), and energy despreading units 30G _{1 to} 30G _Nc (not shown) are provided. It may be configured as follows. In such a case, the inter-code multiplexing unit 30D is provided between each of the Nc decoding units 30C _{1 to} 30C _Nc (energy despreading units 30G _{1 to} 30G _Nc ) and the TS packet reconstruction unit 30H.

  According to these configurations, in the existing FPU transmitter 10 and receiver 30, a bottleneck has occurred in the outer deinterleaver 30E, the error correction outer code decoder 30F, the energy despreader 30G, and the like. Even if it exists, this bottleneck can be eliminated.

  As described above, the present invention has been described by using the above-described embodiment. However, it should not be understood that the description and drawings constituting a part of the disclosure in the embodiment limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  Further, although not particularly mentioned in the above embodiment, a program for causing a computer to execute each process performed by the transmitter 10 and the receiver 30 may be provided. Such a program may be recorded on a computer-readable medium. If a computer readable medium is used, such a program can be installed in the computer. Here, the computer-readable medium on which such a program is recorded may be a non-transitory recording medium. The non-transitory recording medium is not particularly limited, but may be a recording medium such as a CD-ROM or a DVD-ROM.

  Or the chip | tip comprised by the processor which executes the program memorize | stored in the memory which memorize | stores the program for performing each process performed by the transmitter 10 and the receiver 30 mentioned above, and the memory may be provided.

10 ... transmitter 10A ... data frame synchronization unit 10B ... energy dispersal unit 10C ... error correcting outer code encoding section 10D ... outer interleaver unit 10E ... code separation unit _10F 1 _{~10F Nc ...} encoding unit _11F 1 _{~11F Nc} ... Error correction inner code encoders 12F _{1 to} 12F _Nc ... transmission system allocator 10G ... inter-transmission system multiplexers 10H _{1 to} 10H _Nt ... MIMO-OFDM modulator 30 ... receiver 30A ... MIMO-OFDM demodulator 30B ... transmission Inter-system separation unit 30C _{1 to} 30C _Nc ... Decoding unit 31C _{1 to} 31C _Nc ... Transmission system reverse allocating unit 32C _{1 to} 32C _Nc ... Error correction inner code decoding unit 30D ... Inter-code multiplexing unit 30E ... Outer deinterleaving unit 30F ... Error correction outer code decoding unit 30G ... energy despreading unit 30H ... TS packet reconstruction unit

Claims (8)

A transmitter configured to transmit an OFDM signal using Nt transmission systems using a MIMO scheme,
Nc encoding units;
A data frame is configured from input TS packets, and a synchronization unit configured to perform synchronization processing in units of data frames;
A separation unit configured to output each of the data frames to any one of the Nc encoding units;
A multiplexing unit configured to multiplex Nt codes input from each of the Nc encoding units for each of the Nt transmission systems;
Nt modulation units corresponding to each of the Nt transmission systems configured to perform OFDM modulation processing on codes multiplexed for the Nt transmission systems,
Each of the Nc encoding units includes:
A first encoding unit configured to perform a convolutional encoding process on each of the input data frames;
A sorting unit configured to output a code obtained by performing the convolutional coding process by the first coding unit to each of the Nt transmission systems;
The transmitter characterized in that the number of bits of one OFDM symbol used in the OFDM modulation processing is a multiple of Nc. The encoding unit includes an outer interleaving unit configured to perform an outer interleaving process on each of the data frames input from the separation unit;
The first encoding unit is configured to perform a convolutional encoding process on each of the data frames subjected to the outer interleaving process by the outer interleaving unit. The transmitter described. The encoding unit includes:
A second encoding unit configured to perform Reed-Solomon encoding processing on each of the data frames input from the separation unit;
An outer interleaving unit configured to perform an outer interleaving process on each of the data frames subjected to the Reed-Solomon encoding process by the second encoding unit,
The first encoding unit is configured to perform a convolutional encoding process on each of the data frames subjected to the outer interleaving process by the outer interleaving unit. The transmitter described. The encoding unit includes:
An energy spreader configured to perform an energy spread process on each of the data frames input from the separator;
A second encoding unit configured to perform a Reed-Solomon encoding process on each of the data frames subjected to the energy diffusion process by the energy spreading unit;
An outer interleaving unit configured to perform an outer interleaving process on each of the data frames subjected to the Reed-Solomon encoding process by the second encoding unit,
The first encoding unit is configured to perform a convolutional encoding process on each of the data frames subjected to the outer interleaving process by the outer interleaving unit. The transmitter described. A receiver configured to receive an OFDM signal transmitted in Nt transmission systems using a MIMO scheme by a transmitter according to claim 1, comprising:
Nc decoding units;
A demodulator configured to separate bit likelihoods in each of the Nt transmission systems from the received OFDM signal;
The bit likelihood in each of the Nt transmission systems of the code to be decoded by each of the Nc decoding units is separated from the bit likelihood in each of the Nt transmission systems input by the demodulation unit. A separation portion configured to:
A multiplexing unit configured to multiplex a code for each data frame input from each of the Nc decoding units;
A reconstructing unit for reconstructing a TS packet from the code multiplexed by the multiplexing unit,
Each of the Nc decoding units is
A reverse allocator configured to generate the bit likelihood of the code from the bit likelihood in each of the Nt transmission systems of the code separated by the separator;
A first decoding unit configured to obtain a decoding result for each data frame by performing a decoding process using a convolutional code based on the bit likelihood of the code input by the reverse allocating unit; A receiver characterized by:   The decoding unit includes an outer deinterleaving unit configured to perform an outer deinterleaving process on each of the codes for each data frame input from the first decoding unit. Item 6. The receiver according to Item 5.   The decoding unit includes a second decoding unit configured to perform Reed-Solomon decoding processing on each of the codes for each data frame input from the outer deinterleaving unit. Item 7. The receiver according to Item 6.   The decoding unit includes an energy despreading unit configured to perform an energy despreading process on each of the codes for each data frame input from the second decoding unit. Item 8. The receiver according to Item 7.

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