JP2017084899A - Surface emitting laser array and method of manufacturing surface emitting laser array - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a surface emitting laser array which can be bonded to a heat sink, without short-circuiting an upper electrode and a lower electrode.SOLUTION: A surface emitting laser array having a light emitting region including a plurality of light emitting parts formed of a vertical resonator type surface emitting laser element having a mesa including a lower reflector, a resonator region including an active layer, and an upper reflector, has electrode pads formed to surround the light emitting region, and a wall formed to surround the electrode pads, and insulated electrically therefrom.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a surface emitting laser array and a method for manufacturing the surface emitting laser array.

  2. Description of the Related Art Conventionally, as a light source for a high-power laser, a surface-emitting laser array in which a plurality of surface-emitting laser elements (VCSEL: Vertical Cavity Surface Emitting LASER) are two-dimensionally arranged is known. The surface emitting laser array is formed on a substrate such as GaAs, a lower semiconductor DBR (Distributed Bragg Reflector) formed on the substrate, an active layer formed on the lower semiconductor DBR, and an active layer. And an upper semiconductor DBR.

  In such a surface emitting laser array, when each surface emitting laser element emits light at the same time for high output, heat generated in the active layer may affect the output. This is because the active layer has a structure sandwiched between a substrate having a high thermal resistance, a lower semiconductor DBR, an upper semiconductor DBR, and the like, and the temperature of the active layer rises when the surface emitting laser element emits light.

  Therefore, conventionally, by removing the substrate of the surface emitting laser array and bonding the heat sink using a bonding material such as solder, the heat generated in the active layer is released to the outside through the heat sink and activated. A method for suppressing an increase in the temperature of the layer is known (see, for example, Non-Patent Document 1).

  However, in the above method, when the surface emitting laser array from which the substrate has been removed is bonded to the heat sink, the bonding material wraps around to the surface opposite to the bonding surface of the surface emitting laser array, and the upper electrode formed on this surface May come into contact with. This is because the thickness of the surface emitting laser array from which the substrate has been removed is as thin as about 10 μm.

  As described above, when the bonding material comes into contact with the upper electrode, the upper electrode is electrically short-circuited with the lower electrode formed on the bonding surface of the surface emitting laser array via the bonding material, which may cause a light emission failure or the like.

  Then, in view of the said subject, it aims at providing the surface emitting laser array which can be joined to a heat sink, without short-circuiting an upper electrode and a lower electrode.

In order to achieve the above object, a surface emitting laser array according to an aspect of the present invention includes:
A surface emitting laser array having a light emitting region having a plurality of light emitting portions formed by a vertical cavity surface emitting laser element having a mesa including a lower reflecting mirror, an active layer, and an upper reflecting mirror There,
An electrode pad portion formed so as to surround the light emitting region;
The electrode pad portion is formed so as to surround the electrode pad portion, and has a wall electrically insulated from the electrode pad portion.

  According to the disclosed technology, it is possible to provide a surface emitting laser array that can be bonded to a heat sink without short-circuiting the upper electrode and the lower electrode.

Schematic plan view of the surface emitting laser array of the first embodiment Schematic sectional view of the surface emitting laser array of the first embodiment Schematic plan view showing a surface emitting laser array mounted on a heat sink Schematic sectional view showing a surface emitting laser array mounted on a heat sink Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (1) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (2) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (3) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (4) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (5) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (6) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (7) Process sectional drawing explaining the manufacturing method of the surface emitting laser array of 1st Embodiment (8) FIG. 1 is a diagram for explaining a surface emitting laser array according to a second embodiment (1). FIG. 2 illustrates a surface emitting laser array according to a second embodiment (2). Schematic plan view for explaining a surface emitting laser array of a third embodiment (1) Schematic plan view for explaining the surface emitting laser array of the third embodiment (2)

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in this specification and drawing, about the component which has the substantially same function structure, the duplicate description is abbreviate | omitted by attaching | subjecting the same code | symbol.

  The surface emitting laser array of the present embodiment is a laser array that can be suitably used for, for example, a light source of a laser spark plug, a light source for optical writing such as a multifunction machine, and a processing laser of a laser processing machine.

[First Embodiment]
The surface emitting laser array according to the first embodiment will be described with reference to FIGS. FIG. 1 is a schematic plan view of the surface emitting laser array of the first embodiment. FIG. 2 is a schematic cross-sectional view of the surface emitting laser array according to the first embodiment, and shows a cross section taken along the one-dot chain line 1A-1B in FIG. In FIG. 2, one light emitting portion and an electrode pad portion are illustrated.

  As shown in FIG. 1, the surface emitting laser array 1 includes a plurality of light emitting units 100 arranged in a two-dimensional manner and a region where the plurality of light emitting units 100 are arranged (hereinafter also referred to as “light emitting region LA”). The electrode pad portion 200 is formed so as to surround the periphery, and the wall 300 is formed so as to surround the periphery of the electrode pad portion 200. In the present embodiment, the light emitting area LA is formed in a rectangular shape in plan view.

  Each of the plurality of light emitting units 100 is formed by a surface emitting laser element having the same structure, for example, a vertical cavity type laser element having an oscillation wavelength of 808 nm band. The oscillation wavelength can be selected according to the application, and is not limited to 808 nm.

  As shown in FIG. 2, the light emitting unit 100 includes a buffer layer 101, a lower semiconductor DBR 102, a lower spacer layer 103, an active layer 104, an upper spacer layer 105, an upper semiconductor DBR 106, a selective oxide layer 107, a contact layer 108, and an interlayer film 109. The upper electrode 110 and the lower electrode 111 are provided. The lower semiconductor DBR 102 and the upper semiconductor DBR 106 may be referred to as a lower reflecting mirror and an upper reflecting mirror, respectively.

  The mesa 120 is formed by removing a part of the active layer 104, the upper spacer layer 105, the upper semiconductor DBR 106, and the contact layer 108. In this case, the upper surface of the lower spacer layer 103 exposed by etching becomes the bottom surface 120a around the mesa 120.

  The buffer layer 101 is formed on the lower electrode 111, and is formed of, for example, n-GaAs.

The lower semiconductor DBR 102 is formed on the buffer layer 101. The lower semiconductor DBR 102 includes, for example, a low refractive index layer made of n-Al _0.9 Ga _0.1 As and a high refractive index layer made of n-Al _0.3 Ga _0.7 As, and has a low refractive index. A layer having a pair of a high refractive index layer and one layer having a period is formed by 40.5 periods.

  Between each refractive index layer of lower semiconductor DBR102, in order to reduce an electrical resistance, the composition gradient layer which changed composition gradually from one composition to the other composition, for example about 20 nm in thickness is formed. It may be provided. In this case, each refractive index layer is determined so as to have an optical thickness of λ / 4, including ½ of the adjacent composition gradient layer, where λ is the oscillation wavelength. The optical thickness and the actual thickness of the layer have the following relationship. For example, when the optical thickness is λ / 4, the actual thickness D of the layer is D = λ / 4N (where N is the refractive index of the medium of the layer).

The lower spacer layer 103 is formed on the lower semiconductor DBR 102, and is formed of, for example, non-doped Al _0.6 Ga _0.4 As.

The active layer 104 is formed on the lower spacer layer 103, and is formed of, for example, three quantum well layers and four barrier layers. Each quantum well layer is made of, for example, Al _0.05 Ga _0.95 As, and each barrier layer is made of, for example, Al _0.3 Ga _0.7 As. The active layer 104 is set to a thickness such that the wavelength of the emitted laser light is in the 808 nm band.

The upper spacer layer 105 is formed on the active layer 104, and is formed of non-doped Al _0.6 Ga _0.4 As, for example.

  A portion including the lower spacer layer 103, the active layer 104, and the upper spacer layer 105 is also referred to as a resonator region, and the thickness thereof is determined to be an optical thickness of one wavelength. The active layer 104 is formed at the center of the resonator region, which is a position corresponding to the antinode in the standing wave distribution of the electric field, so that a high stimulated emission probability is obtained.

The upper semiconductor DBR 106 is formed on the upper spacer layer 105. The upper semiconductor DBR 106 includes, for example, a low refractive index layer made of p-Al _0.9 Ga _0.1 As and a high refractive index layer made of p-Al _0.3 Ga _0.7 As. And a pair of high refractive index layers formed as one period and 25 periods are formed. Between each refractive index layer of upper semiconductor DBR106, in order to reduce an electrical resistance, you may provide the composition inclination layer which changed the composition gradually toward the other composition from one composition. In this case, each refractive index layer is determined so as to have an optical thickness of λ / 4, including ½ of the adjacent composition gradient layer, where the oscillation wavelength is λ. A selective oxidation layer 107 made of, for example, AlAs is formed on one of the low refractive index layers in the upper semiconductor DBR 106.

  For example, the selective oxidation layer 107 is formed by oxidizing from the side surface of the mesa 120 with water vapor or the like to form an unoxidized region 107 b surrounded by the Al oxide layer 107 a at the center of the mesa 120. This non-oxidized region 107b is a current passing region.

  The contact layer 108 is formed on the upper semiconductor DBR 106, and is made of, for example, p-GaAs.

  Note that a structure in which a plurality of semiconductor layers are stacked as described above may be hereinafter referred to as a “stacked body” for convenience.

The interlayer film 109 is an insulating film formed so as to cover a part of the upper surface of the mesa 120, the side surface of the mesa 120, and the bottom surface 120a around the mesa 120. For example, silicon nitride (SiN), silicon oxynitride (SiON) , Silicon oxide (SiO ₂ ).

  The upper electrode 110 is a p-side electrode formed on the interlayer film 109 and is in contact with the contact region 108 a of the contact layer 108 that is the uppermost layer of the mesa 120. The upper electrode 110 is formed of, for example, a multilayer film (metal film) in which Ti / Pt / Au are stacked in this order.

  The lower electrode 111 is an n-side electrode formed on the surface of the buffer layer 101 where the lower semiconductor DBR 102 is not formed. For example, a multilayer film (metal film) in which AuGe / Ni / Au are stacked in this order. It is formed by.

  The electrode pad portion 200 is formed to surround the periphery of the light emitting region LA, and is a portion that is electrically connected to the upper electrode 110 of the light emitting portion 100.

  The wall 300 is formed on the interlayer film 109 so as to surround the periphery of the electrode pad unit 200 and is electrically insulated from the electrode pad unit 200. The wall 300 only needs to be electrically insulated from the electrode pad portion 200, and is formed of, for example, a metal film or an insulating film. When a metal film is used as the wall 300, the wall 300 and the electrode pad unit 200 can be electrically insulated by forming the wall 300 with a gap G1 between the wall 300 and the electrode pad unit 200. When the wall 300 is formed of an insulating film, the wall 300 may be formed with a gap G1 between the wall 300 and the electrode pad part 200, or may be formed adjacent to the electrode pad part 200.

  As the metal film, for example, it is preferable to use a multilayer film (metal film) in which Ti / Pt / Au, which is the same material as the upper electrode 110, is laminated in this order. Thereby, since the upper electrode 110 and the wall 300 can be formed in the same process, a manufacturing process can be simplified.

As the insulating film, for example, SiN, SiON, or SiO ₂ that is the same material as the interlayer film 109 is preferably used. Thereby, since the adhesiveness between the interlayer film 109 and the wall 300 can be improved, the reliability of the wall 300 can be improved.

  Moreover, the cross-sectional shape of the wall 300 can be made into a rectangular shape, for example. The cross-sectional shape of the wall 300 may be, for example, a trapezoid whose first side on the side in contact with the interlayer film 109 is shorter than the second side facing the first side.

  In the present embodiment, the wall 300 is formed on the interlayer film 109 formed on the stacked body, but is not limited to this. The wall 300 only needs to be formed so as to surround the electrode pad portion 200 and be electrically insulated from the electrode pad portion 200. For example, the wall 300 of the interlayer film 109 formed in a region where the stacked body is not formed. It may be formed on the top.

  Next, the surface emitting laser array mounted on the heat sink will be described with reference to FIGS. FIG. 3 is a schematic plan view showing a surface emitting laser array mounted on a heat sink. FIG. 4 is a schematic cross-sectional view showing the surface emitting laser array mounted on the heat radiating plate, and shows a cross section taken along the one-dot chain line 3A-3B in FIG. In FIG. 4, one light emitting portion and an electrode pad portion are illustrated.

  As shown in FIGS. 3 and 4, the surface emitting laser array 1 is mounted on the heat sink 401 with a bonding material 402. At this time, the electrode pad portion 200 of the surface emitting laser array 1 is connected to the second metal film pattern 401 b formed on the heat sink 401 via the bonding wires 403.

  The heat radiating plate 401 is bonded to the lower electrode 111 side of the surface emitting laser array 1 via a bonding material 402, and is formed of a material having high thermal conductivity and an insulating property, for example, aluminum nitride (AlN). It is a plate-like member. For example, a first metal film pattern 401 a and a second metal film pattern 401 b are formed on the heat sink 401. The first metal film pattern 401a and the second metal film pattern 401b are formed of, for example, an Au thin film having a thickness of about 1 μm.

  The bonding material 402 is formed between the lower electrode 111 of the surface-emitting laser array 1 and the first metal film pattern 401 a formed on the heat sink 401, and the lower electrode 111 and the heat sink 401 are thermally and electrically connected. This is a member to be joined. The bonding material 402 is also formed on the side surface of the surface emitting laser array 1.

  As the bonding material 402, for example, it is preferable to use paste solder from the viewpoint of easy handling. Further, as the bonding material 402, a material containing AuSn may be used. When a material containing AuSn is used, no flux is required when joining the surface emitting laser array 1 and the heat radiating plate 401, so that an increase in electrical resistance due to residual flux or the like does not occur. Moreover, since AuSn is stable as a material, long-term reliability is improved. As the bonding material 402, a sintered material containing Ag may be used. Since the sintered Ag has a gap in the inside, if a sintered material containing Ag is used, the stress generated by the difference between the thermal expansion coefficient of the surface emitting laser array 1 and the thermal expansion coefficient of the heat sink 401 Can be absorbed. Thereby, even if the difference in thermal expansion coefficient between the surface-emitting laser array 1 and the heat dissipation plate 401 is large, it is possible to perform bonding.

  The bonding wire 403 is a wire that electrically connects the electrode pad portion 200 of the surface emitting laser array 1 and the second metal film pattern 401b formed on the heat dissipation plate 401, and is formed of, for example, Au.

  Next, an example of the manufacturing method of the surface emitting laser array of 1st Embodiment is demonstrated based on FIGS. 5 to 12 are process cross-sectional views illustrating the method for manufacturing the surface-emitting laser array of the first embodiment.

First, an etching stop layer (not shown) is formed on the substrate 151, and a stacked body is formed on the etching stop layer by crystal growth. As the substrate 151, for example, a GaAs substrate can be used. As a crystal growth method, for example, a metal-organic chemical vapor deposition (MOCVD) method can be used. When forming a laminated body by MOCVD, trimethylaluminum (TMA), trimethylgallium (TMG), and trimethylindium (TMI) can be used as group III materials, and arsine (AsH ₃ ) can be used as group V materials. . Further, carbon tetrabromide (CBr ₄ ) can be used as a p-type dopant material, and hydrogen selenide (H ₂ Se) can be used as an n-type dopant material. As a crystal growth method, a molecular beam epitaxy (MBE) method may be used.

  Next, a resist pattern corresponding to a region where the mesa 120 is formed is formed on the stacked body. As the resist pattern, for example, a square pattern with a side of 25 μm can be arranged in an array.

  Next, the mesa 120 is formed. Specifically, mesa 120 is formed on the stacked body by reactive ion etching using inductively coupled plasma, using the resist pattern as a mask, and the resist pattern is removed.

  Next, the selective oxidation layer 107 is selectively oxidized from the outer peripheral portion (side surface) of the mesa 120 by heat treatment in water vapor. Then, an unoxidized region 107b surrounded by the Al oxide layer 107a is left in the center of the mesa 120. As a result, an oxidized constriction structure that restricts the drive current path of the light emitting unit 100 to only the central portion of the mesa 120 is formed.

  Next, the laminate is heated in a heating furnace. Specifically, heating is performed at a temperature of 380 ° C. to 400 ° C. for 3 minutes in a nitrogen atmosphere. As a result, a natural oxide film formed by oxygen or water adhering to the surface of the laminate in the atmosphere or a trace amount of oxygen or water in the heat treatment chamber is stabilized by heat treatment in a nitrogen atmosphere. It becomes a dynamic film.

  Next, an interlayer film 109 is formed on the stacked body. Specifically, the interlayer film 109 is formed by a CVD method.

  Next, the interlayer film 109 is patterned. Specifically, a resist pattern is formed by photolithography, and the interlayer film 109 is patterned by wet etching using the formed resist pattern as a mask. As the etchant, for example, buffered hydrofluoric acid (BHF) can be used.

  Next, the upper electrode 110 and the wall 300 are formed. Specifically, a resist pattern in which regions for forming the upper electrode 110 and the wall 300 are opened is formed, an electrode material is deposited on the resist pattern by an evaporation method, and the electrode material is lifted off. A wall 300 is formed.

  Next, it cut | disconnects for every chip | tip by scribe braking. Thereby, the chip shown in FIG. 5 is completed.

  Next, the chip is bonded to the transfer substrate 153. Specifically, as shown in FIG. 6, a temporary bonding material 152 is applied on the chip, and as shown in FIG. 7, a transfer substrate 153 is placed on the chip and heated in a vacuum, The chip is bonded to the transfer substrate 153. As the temporary bonding material 152, for example, wax can be used. As the transfer substrate 153, for example, a glass plate can be used.

  Next, as shown in FIG. 8, the substrate 151 and the etching stop layer (not shown) are removed. Specifically, the substrate 151 and the etching stop layer are removed by a wet etching method. As the etchant, a known one can be used.

  Next, as shown in FIG. 9, the lower electrode 111 is formed on the surface of the buffer layer 101 where the lower semiconductor DBR 102 is not formed. Specifically, the lower electrode 111 is formed by vapor-depositing an electrode material by vapor deposition on the surface of the buffer layer 101 where the lower semiconductor DBR 102 is not formed. Thereby, the surface emitting laser array 1 is formed. Note that the lower electrode 111 may be formed before the chip and the transport substrate 153 are bonded together.

  Next, as shown in FIG. 10, the surface-emitting laser array 1 bonded to the transfer substrate 153 is bonded to the heat dissipation plate 401 by the bonding material 402. Specifically, on the hot plate heated to 200 ° C. to 300 ° C., the bonding material 402 is applied on the first metal film pattern 401 a and the surface emitting laser array 1 is placed on the bonding material 402. Thus, the first metal film pattern 401a and the lower electrode 111 of the chip are joined.

  Next, as shown in FIG. 11, the transfer substrate 153 is removed from the surface emitting laser array 1. Specifically, the surface emitting laser array 1 bonded to the heat radiating plate 401 is immersed in an organic solvent, and the temporary bonding material 152 is melted to remove the transfer substrate 153 from the chip bonded to the heat radiating plate 401.

  Next, ohmic contact between the upper electrode 110 and the lower electrode 111 is formed by heat treatment.

  Next, as shown in FIG. 12, the second metal film pattern 401 b of the heat radiating plate 401 and the electrode pad portion 200 of the chip are electrically connected by a bonding wire 403.

  As described above, the surface-emitting laser array 1 according to the first embodiment can be manufactured, and the surface-emitting laser array 1 can be mounted on the heat dissipation plate 401.

  By the way, when the surface emitting laser array 1 from which the substrate 151 has been removed is bonded to the heat radiating plate 401 by the bonding material 402, the bonding material 402 applied to the heat radiating plate 401 reaches the surface on the upper electrode 110 side of the surface emitting laser array 1. May wrap around. This is because the thickness of the surface emitting laser array 1 from which the substrate 151 has been removed is as thin as about 10 μm. When the bonding material 402 reaches the surface toward the upper electrode 110 side of the surface emitting laser array 1, the bonding material 402 may come into contact with the upper electrode 110 and may be electrically short-circuited.

  However, in the surface emitting laser array 1 of the first embodiment, the wall 300 is formed so as to surround the periphery of the electrode pad portion 200. Thereby, even when the surface emitting laser array 1 from which the substrate 151 has been removed is bonded to the heat radiation plate 401, the bonding material 402 may wrap around the upper surface of the surface emitting laser array 1 and come into contact with the electrode pad unit 200. It is suppressed. For this reason, it is possible to suppress an electrical short circuit between the upper electrode 110 and the lower electrode 111 of the surface emitting laser array 1 via the bonding material 402. As a result, it is possible to suppress the occurrence of a light emission failure or the like in which the surface emitting laser array 1 does not emit light.

  Further, in the surface emitting laser array 1 of the first embodiment, the substrate 151 on the lower electrode 111 side of the surface emitting laser array 1 is removed, so that the substrate 151 is interposed between the surface emitting laser array 1 and the heat dissipation plate 401. not exist. Thereby, the heat generated in the active layer 104 of the surface emitting laser array 1 can be efficiently released to the outside through the heat radiation plate 401, and the temperature rise of the active layer 104 can be suppressed. For this reason, the output fall of the surface emitting laser array 1 by the temperature rise of the active layer 104 can be suppressed.

[Second Embodiment]
A surface-emitting laser array according to the second embodiment will be described with reference to FIGS. 13 and 14. FIG. 13 is a schematic plan view illustrating the surface emitting laser array according to the second embodiment. FIG. 14 is a schematic cross-sectional view for explaining the surface emitting laser array according to the second embodiment, and shows a cross section taken along the alternate long and short dash line 13A-13B in FIG. In FIG. 14, one light emitting portion and an electrode pad portion are illustrated.

  The surface emitting laser array 2 of the second embodiment is different in that the wall 300 formed so as to surround the electrode pad portion 200 is formed by the first wall 301 and the second wall 302. It differs from the surface emitting laser array 1 of one embodiment. The surface emitting laser array 2 of the second embodiment has the same configuration as that of the surface emitting laser array 1 of the first embodiment except for the above differences. For this reason, in the following description, it demonstrates focusing on a different point from 1st Embodiment.

  As shown in FIG. 13, the surface emitting laser array 2 includes a plurality of light emitting units 100 arranged two-dimensionally, an electrode pad unit 200 formed so as to surround the light emitting region LA, and an electrode pad unit 200. And a wall 300 formed so as to surround the periphery. In the present embodiment, the light emitting area LA is formed in a rectangular shape in plan view.

  The wall 300 has a first wall 301 and a second wall 302. The first wall 301 is formed with a gap G <b> 2 between the first wall 301 and the electrode pad part 200 so as to surround the electrode pad part 200. The second wall 302 is formed with a gap G <b> 3 between the second wall 302 and the first wall 301 on the outer peripheral side of the first wall 301 so as to surround the electrode pad portion 200.

  In the surface emitting laser array 2 of the second embodiment, a wall 300 is formed so as to surround the periphery of the electrode pad portion 200. Accordingly, even when the surface emitting laser array 2 from which the substrate 151 has been removed is bonded to the heat radiating plate 401, the bonding material 402 is prevented from entering the upper surface of the surface emitting laser array 2 and coming into contact with the electrode pad portion 200. Is done. For this reason, it is possible to suppress an electrical short circuit between the upper electrode 110 and the lower electrode 111 of the surface emitting laser array 2 via the bonding material 402. As a result, it is possible to suppress the occurrence of a light emission failure that the surface emitting laser array 2 does not emit.

  Further, in the surface emitting laser array 2 of the second embodiment, since the substrate 151 on the lower electrode 111 side of the surface emitting laser array 2 is removed, the surface emitting laser array 2 is connected to the heat dissipation plate 401 via the bonding material 402. It is joined. As a result, heat generated in the active layer 104 of the surface emitting laser array 2 can be released to the outside via the heat radiation plate 401, and the temperature rise of the active layer 104 can be suppressed. For this reason, the output fall of the surface emitting laser array 2 by the temperature rise of the active layer 104 can be suppressed.

  In particular, in the surface-emitting laser array 2 of the second embodiment, a gap G3 is formed between the first wall 301 and the second wall 302 provided on the outer peripheral side of the first wall 301. Accordingly, as shown in FIG. 14, even when the bonding material 402 exceeds the second wall 302 on the upper surface of the surface emitting laser array 2, the bonding material 402 has the first wall 301 and the second wall 302. In the gap G3 formed between the two. For this reason, it can suppress especially that the joining material 402 and the electrode pad part 200 are electrically short-circuited.

[Third Embodiment]
A surface-emitting laser array according to a third embodiment will be described with reference to FIGS. 15 and 16. 15 and 16 are schematic plan views for explaining the surface emitting laser array according to the third embodiment.

  The surface emitting laser array 3 of the third embodiment is different from the surface emitting laser array 1 of the first embodiment in the positions where the electrode pad portion 200 and the wall 300 are formed. The surface emitting laser array 3 of the third embodiment has the same configuration as the surface emitting laser array 1 of the first embodiment except for the above differences. For this reason, in the following description, it demonstrates focusing on a different point from 1st Embodiment.

  As shown in FIG. 15, the surface emitting laser array 3 includes a plurality of light emitting units 100 arranged in a two-dimensional manner, an electrode pad unit 200 formed to surround the light emitting region LA, and an electrode pad unit 200. And a wall 300 formed so as to surround the periphery. In the present embodiment, the light emitting area LA is formed in a rectangular shape in plan view.

  The electrode pad part 200 is formed by a first electrode pad part 201, a second electrode pad part 202, a third electrode pad part 203 and a fourth electrode pad part 204. A gap S <b> 1 is formed between the first electrode pad portion 201 and the second electrode pad portion 202. A gap S <b> 2 is formed between the second electrode pad portion 202 and the third electrode pad portion 203. A gap S3 is formed between the third electrode pad portion 203 and the fourth electrode pad portion 204. A gap S4 is formed between the fourth electrode pad portion 204 and the first electrode pad portion 201.

  The wall 300 is formed on the outer peripheral side of the electrode pad portion 200 so as to correspond to at least the region where the electrode pad portion 200 is formed. Specifically, the wall 300 is formed by a third wall 303, a fourth wall 304, a fifth wall 305, and a sixth wall 306. The third wall 303, the fourth wall 304, the fifth wall 305, and the sixth wall 306 are a first electrode pad portion 201, a second electrode pad portion 202, a third electrode pad portion 203, and a third electrode pad portion 203, respectively. It is formed on the outer peripheral side of the fourth electrode pad portion 204. As a result, even when the bonding material 402 wraps around the upper surface of the surface emitting laser array, the electrode pad is formed by the third wall 303, the fourth wall 304, the fifth wall 305, and the sixth wall 306. It can suppress that the joining material 402 contacts the part 200. FIG.

  Note that the position where the electrode pad portion 200 is formed is not limited to the example shown in FIG. 15, and may be formed as shown in FIG. 16. In the case of the surface emitting laser array 3a shown in FIG. 16, the electrode pad portion 200 is formed so as to correspond to at least the region where the electrode pad portion 200 is formed, as in the case of the surface emitting laser array 3 shown in FIG. The wall 300 should just be formed in the outer peripheral side.

  In the surface emitting laser array 3 of the third embodiment, a wall 300 is formed so as to surround the periphery of the electrode pad portion 200. Thereby, even when the surface emitting laser array 3 from which the substrate 151 has been removed is bonded to the heat radiation plate 401, the bonding material 402 is prevented from entering the upper surface of the surface emitting laser array 3 and coming into contact with the electrode pad portion 200. Is done. For this reason, it is possible to suppress an electrical short circuit between the upper electrode 110 and the lower electrode 111 of the surface emitting laser array 3 via the bonding material 402. As a result, it is possible to suppress the occurrence of a light emission failure or the like that the surface emitting laser array 3 does not emit.

  In addition, since the substrate 151 on the lower electrode 111 side of the surface emitting laser array 3 is removed from the surface emitting laser array 3 of the third embodiment, the surface emitting laser array 3 is connected to the heat radiation plate 401 via the bonding material 402. It is joined. Thereby, the heat generated in the active layer 104 of the surface emitting laser array 3 can be released to the outside through the heat radiation plate 401, and the temperature rise of the active layer 104 can be suppressed. For this reason, the output fall of the surface emitting laser array 3 by the temperature rise of the active layer 104 can be suppressed.

  The surface emitting laser array and the method for manufacturing the surface emitting laser array have been described above by the embodiments. However, the present invention is not limited to the above embodiments, and various modifications and improvements can be made within the scope of the present invention. is there.

  In the surface emitting laser array of this embodiment, the light emitting area LA has been described as being formed in a rectangular shape in plan view, but the present invention is not limited to this. For example, the light emitting area LA may be formed in a circular shape in plan view.

DESCRIPTION OF SYMBOLS 1 Surface emitting laser array 100 Light-emitting part 101 Buffer layer 102 Lower semiconductor DBR
103 lower spacer layer 104 active layer 105 upper spacer layer 107 selective oxide layer 108 contact layer 109 interlayer film 110 upper electrode 111 lower electrode 120 mesa 151 substrate 200 electrode pad section 300 wall 301 first wall 302 second wall 401 heat sink 401a First metal film pattern 401b Second metal film pattern 402 Bonding material 403 Bonding wire LA Light emitting region

Proc. Of SPIE Vol. 7229 722903- (1-11)

Claims (9)

A surface emitting laser array having a light emitting region including a plurality of light emitting portions formed by a surface emitting laser element including a lower reflecting mirror, a resonator region including an active layer, and an upper reflecting mirror,
An electrode pad portion formed so as to surround the light emitting region;
A surface-emitting laser array comprising: a wall that is formed to surround the electrode pad portion and is electrically insulated from the electrode pad portion.   2. The surface emitting laser array according to claim 1, wherein the wall is formed with a gap between the wall and the electrode pad portion.   The wall has a first wall formed with a gap between the electrode pad portion and a second wall formed with a gap between the first wall and an outer peripheral side of the first wall. The surface emitting laser array according to claim 1, further comprising:   4. The surface emitting laser array according to claim 1, wherein the wall is formed on an upper surface of the insulating film.   The surface emitting laser array according to any one of claims 1 to 4, wherein the wall is made of a material containing a metal. It has an insulating heat sink with a metal film pattern formed on the surface,
The surface-emitting laser array according to claim 1, wherein the surface-emitting laser array is bonded to the metal film pattern of the heat sink by a bonding material.   The surface emitting laser array according to claim 6, wherein the bonding material is made of a material containing Au and Sn.   The surface emitting laser array according to claim 6, wherein the bonding material is made of a material containing Ag. A surface-emitting laser array having a light-emitting region having a plurality of light-emitting portions formed by a vertical-cavity surface-emitting laser element having a mesa that includes a lower reflector, an active layer, and an upper reflector A manufacturing method comprising:
Forming an electrode pad portion so as to surround the light emitting region;
Forming a wall electrically insulated from the electrode pad portion so as to surround the electrode pad portion;
A method of manufacturing a surface emitting laser array, comprising:

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