JP2017055340A - Circuit device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit device capable of realizing drive control of a resonance circuit with low power consumption, and an electronic apparatus and the like.SOLUTION: A circuit device 100 includes a drive section 110 performing drive control of a resonance circuit 200. The drive section 110 includes: a drive timing setting circuit 113 monitoring a resonance waveform of the resonance circuit 200 and setting drive timing based on monitoring results; and a drive circuit 111 outputting a plurality of drive pulse signals in which drive timing of each of the plurality of drive pulse signals is set by the drive timing setting circuit 113 to the resonance circuit 200.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a circuit device, an electronic device, and the like.

  2. Description of the Related Art Conventionally, circuit devices that perform various processes using signals from a resonance circuit are known. For example, Patent Document 1 discloses a technique related to power supply control in a power receiving apparatus that charges a battery using a contactless power transmission system. Among them, a power receiving side is used by using a signal from a resonance circuit. A technique for transmitting information between the (power receiving apparatus) and the power transmission side is also disclosed.

  4A to 4C of Patent Document 2 disclose a general ASK (Amplitude Shift Keying) modulation method. 4A shows transmission data to be ASK modulated, FIG. 4B shows a carrier wave that is an output waveform of the resonance circuit, and FIG. 4C shows a transmission waveform of an ASK modulation signal. It is shown.

JP 2011-155836 A JP-A-7-143188

  In the prior art, as shown in FIGS. 4A to 4C of Patent Document 2, ASK modulation is realized by switching a carrier wave on and off based on transmission data.

  However, in the prior art, as shown in FIG. 4B, since the carrier wave is generated by always operating the oscillation circuit (resonance circuit), the power consumption of the oscillation circuit cannot be reduced, and the low power consumption is hindered. It was.

  According to some aspects of the present invention, it is possible to provide a circuit device, an electronic device, and the like that can realize drive control of a resonance circuit with low power consumption.

  One aspect of the present invention includes a drive unit that performs drive control of a resonance circuit, and the drive unit monitors a resonance waveform of the resonance circuit and sets a drive timing based on a monitoring result; The present invention relates to a circuit device including a drive circuit that outputs a plurality of drive pulse signals for which the drive timing of each drive pulse signal is set by the drive timing setting circuit to the resonance circuit.

  In one embodiment of the present invention, the drive timing of the drive pulse signal is set based on the monitoring result of the resonance waveform. As a result, the drive pulse signal can be output efficiently according to the resonance state of the resonance circuit, and the resonance circuit can be driven with low power consumption.

  In one embodiment of the present invention, the drive circuit includes a current source, and a first transistor that is supplied with a current from the current source and is controlled by a drive timing signal from the drive timing setting circuit. The drive circuit may output a current pulse as the drive pulse signal by the current source and the first transistor.

  As a result, a current pulse can be output by the current source and the transistor.

  In one embodiment of the present invention, the drive circuit includes a current mirror circuit that current mirrors a current that flows from the current source through the first transistor, and the drive circuit includes the current mirror circuit, and A current pulse may be output.

  As a result, a current mirror circuit can be used to output a current pulse, so that a stable current can be output.

  In one embodiment of the present invention, the current mirror circuit includes: a second transistor through which a current flowing from the current source through the first transistor flows; and a gate node connected to the gate node of the second transistor. A third transistor that is connected in common and outputs the current pulse to the resonance circuit, and a circuit that turns off the third transistor during an off period of the first transistor may be included.

  As a result, it becomes possible to make the on / off of the transistors (particularly the third transistor in this case) constituting the current mirror circuit correspond to the on / off of the first transistor.

  In one embodiment of the present invention, the circuit may be a discharge circuit that discharges gate nodes of the second transistor and the third transistor during an off period of the first transistor.

  Thus, by using the discharge circuit, when the first transistor is turned off, the current flowing through the third transistor can be appropriately turned off.

  The aspect of the invention may further include a reference voltage generation unit, wherein the resonance circuit includes a primary coil and a secondary coil, and the reference voltage generation unit is arranged at one end of the primary coil. A reference voltage of the side resonance signal may be output, and the drive circuit may output the drive pulse signal to the other end of the primary coil.

  Accordingly, by using a circuit having a primary coil and a secondary coil as a resonance circuit, and outputting a reference voltage and a drive pulse signal to each end of the primary coil of the resonance circuit, the resonance circuit is It becomes possible to drive.

  In the aspect of the invention, the drive timing setting circuit may monitor the voltage at the other end of the primary coil and set the drive timing based on the monitoring result.

  As a result, it is possible to set the drive timing by monitoring the voltage at the end of the primary coil of the resonance circuit.

  In one embodiment of the present invention, the drive timing setting circuit compares a determination voltage set with the reference voltage as a reference and a voltage at the other end of the primary coil, and the drive timing is set based on a comparison result. Timing may be set.

  This makes it possible to monitor the resonance waveform by comparing the voltage at the end of the primary coil with the determination voltage.

  Another embodiment of the present invention relates to an electronic apparatus including the above circuit device.

The structural example of a circuit apparatus. The structural example of a drive part. The circuit structural example of a reference voltage production | generation part. The structural example of a control part. A configuration example of a resonance circuit. An example of signal input / output between each part of a circuit device and a resonance circuit. Explanatory drawing of ASK modulation. An example of driving current control during an on period and an off period. An example of driving current control during an on period and an off period. 2 shows a configuration example of a drive circuit. The structural example of a rectifier circuit. 1 is a configuration example of a conventional Colpitts oscillation circuit. The example of the signal waveform of the conventional Colpitts oscillation circuit. 2 shows a configuration example of a drive circuit and a drive timing setting circuit. The example of the signal waveform in each part of a primary side resonance signal and a drive timing setting circuit. The circuit structural example of a drive part. The example of the signal waveform of each signal in an ON period and an OFF period. The example of the signal waveform of each signal in an ON period and an OFF period. The other circuit structural example of a drive part. Example of signal waveform at startup. Another example of signal input / output between each part of the circuit device and the resonance circuit. 7 illustrates a configuration example of an electronic device including a circuit device.

  Hereinafter, this embodiment will be described. In addition, this embodiment demonstrated below does not unduly limit the content of this invention described in the claim. In addition, all the configurations described in the present embodiment are not necessarily essential configuration requirements of the present invention. For example, the drive current control and the start control that are linked to the switch elements described below may not be essential constituent elements of the present invention.

1. Configuration Example of Circuit Device FIG. 1 shows a configuration example of a circuit device 100 according to this embodiment. The circuit device 100 includes a drive unit 110, a signal output unit 120, a reference voltage generation unit 130, a control unit 140, and a storage unit 150. However, the circuit device 100 is not limited to the configuration of FIG. 1, and various modifications such as omitting some of these components or adding other components are possible. Further, various modifications such as omitting some of the constituent elements shown in the figure or adding other constituent elements are possible in the other drawings described in this specification. .

  The drive unit 110 performs drive control of the resonance circuit 200. Specifically, the drive unit 110 outputs a drive signal for driving the resonance circuit 200 to the resonance circuit 200. The drive signal here may be a drive current. Further, as will be described later with reference to H3 in FIG. 17 and I3 in FIG. 18, the drive signal becomes active (high level) at a given timing and inactive (low level) at other timings. It may be a typical signal, that is, a drive pulse signal. The drive signal may be a current pulse that is an intermittent drive current.

  FIG. 2 shows a configuration example of the drive unit 110. The drive unit 110 may include a drive circuit 111, a drive timing setting circuit 113, and a start control circuit 115. The specific circuit configuration of each part of the drive unit 110 will be described later with reference to FIG.

  The drive circuit 111 is a circuit that outputs a drive signal to the resonance circuit 200. The drive timing setting circuit 113 is a circuit for setting the drive timing. Here, the drive timing represents the output timing of the drive signal. That is, the drive circuit 111 outputs a drive signal to the resonance circuit 200 at the timing (drive timing) set by the drive timing setting circuit 113.

  The resonance circuit 200 can be driven (in a narrow sense, the resonance state is maintained) by the drive circuit 111 and the drive timing setting circuit 113. However, in the present embodiment, when the resonance circuit 200 is activated (when the resonance is activated or started), the activation control may be performed. The activation control circuit 115 is a circuit that operates when the resonance circuit 200 is activated. Specifically, the activation control circuit 115 performs control to cause the drive circuit 111 to output a drive signal when an activation signal (enable signal EN) from the control unit 140 is input.

  The signal output unit 120 outputs an output signal based on a signal (resonance signal) from the resonance circuit 200. The output signal here is, for example, data in which the resonance signal is a carrier wave and the carrier wave is ASK modulated by transmission data (data signal DATA), but is not limited thereto. For example, as disclosed in Patent Document 1, a resonance signal may be output as an output signal for power transmission.

  The reference voltage generation unit 130 generates a reference voltage and supplies the reference voltage to the resonance circuit 200. The reference voltage here is, for example, an analog ground AGND (analog reference voltage) that determines a reference in resonance (resonance center voltage). Further, the generated reference voltage is not only supplied to the resonance circuit 200 but may be used as a power supply voltage (VDD) of each part of the circuit device 100.

  FIG. 3 shows a circuit configuration example of the reference voltage generation unit 130. As shown in FIG. 3, the reference voltage generation unit 130 can be realized by a general linear regulator. The reference voltage generation unit 130 includes an output transistor Tr, an operational amplifier Op, and two resistors R1 and R2 for voltage division.

  The input voltage VIN is supplied to the source of the P-type output transistor Tr, and the output of the operational amplifier Op is supplied to the gate. The analog ground AGND is output from the drain. The resistors R1 and R2 are provided in series between the drain of the output transistor Tr (output terminal of the reference voltage generation unit 130) and the ground (low potential side power supply).

  A reference voltage Vref is input to the inverting input terminal of the operational amplifier Op, and a signal obtained by dividing AGND by R1 and R2 is input to the non-inverting input terminal. In this way, even when the input or load fluctuates and the output (AGND) fluctuates, the operational amplifier Op compares the feedback voltage based on AGND with the reference voltage Vref and adjusts so that the difference becomes zero. And AGND can be kept at a constant potential.

  The control unit 140 controls each unit of the circuit device 100. For example, when ASK modulation is performed by the signal output unit 120, the control unit 140 may acquire (for example, generate) the data signal DATA and output the data signal DATA to the signal output unit 120. Further, when the resonance is activated, an activation signal (enable signal EN) instructing activation may be transmitted to the drive unit 110 (in a narrow sense, the activation control circuit 115). Further, in order to determine whether or not to output the enable signal EN, control for monitoring the resonance state of the resonance circuit 200 may be performed.

  The function of the control unit 140 can be realized by various processors, hardware such as an ASIC (gate array or the like), a program, or the like. For example, the control unit 140 may be realized by a DSP (digital signal processor).

  FIG. 4 shows a configuration example of the control unit 140. The control unit 140 may include a watch dog timer 141, a resonance enable control unit 143, and a data output control unit 145.

  The watchdog timer 141 monitors the resonance state by detecting the clock signal CK. Details of the clock signal CK will be described later. The resonance enable control unit 143 outputs an enable signal EN when starting resonance. For example, when the watchdog timer 141 determines that the resonance has stopped (timed out), the enable signal EN may be output. The data output control unit 145 outputs the data signal DATA to the signal output unit 120 and the like. In addition, in order to stabilize the said starting at the time of resonance starting, the data output control part 145 may perform output control for starting, and it mentions later for details.

  The storage unit 150 stores various information used in the circuit device 100. The storage unit 150 may store information used for controlling the drive unit 110, for example, and may store a set value of the signal value of the drive signal (current value of the current pulse) as an example. The storage unit 150 may be realized by a volatile memory such as a RAM, but is preferably realized by a non-volatile memory such as a ROM or a flash memory when storage of control information is assumed as described above.

  FIG. 5 shows a configuration example of the resonance circuit 200 driven by the driving unit 110. As shown in FIG. 5, the resonance circuit 200 includes a capacitor (condenser) C1, an LC oscillation circuit having a primary coil (inductor) L1, and a secondary coil (secondary inductor) L2. The primary coil L1 and the secondary coil L2 of the LC oscillation circuit constitute a transformer. A capacitor (capacitor) C2 is provided between one end of the secondary coil L2 and the low potential side power supply (ground).

  In the example of the resonance circuit of FIG. 5, the reference voltage generator 130 supplies a reference voltage (AGND) to one end of the primary coil L1, and the drive unit 110 supplies a drive signal to the other end of the primary coil L1. To do. As a result, the LC resonance circuit resonates around AGND, and the primary side resonance signal SW is output. Then, due to the electromagnetic induction between the primary coil L1 and the secondary coil L2, the secondary coil L2 generates a resonance signal AIN whose amplitude is converted according to the transformation ratio (turn ratio in a narrow sense). AIN is returned to the signal output unit 120. The signal output unit 120 converts the resonance signal AIN as necessary, and outputs it as an output signal AOUT. As described above, when ASK modulation is performed by the signal output unit 120, the output signal AOUT may be a result obtained by performing modulation with the data signal DATA using the resonance signal AIN as a carrier wave. Further, depending on the use form of the circuit device, an input sine wave (resonance signal AIN) may be output as it is as the output signal AOUT.

  In the following description, the case where the resonance circuit 200 has the configuration shown in FIG. 5 will be described as an example. However, the configuration of the resonance circuit 200 is not limited to that shown in FIG.

  FIG. 6 shows a relationship example of signal input / output between the above-described units. The reference voltage generation unit 130 generates a reference voltage (analog ground AGND), outputs the reference voltage to the resonance circuit 200 as a reference of the primary side resonance signal SW, and also supplies the power supply voltage (VDD) as the drive unit 110, The signal is output to the signal output unit 120 and the control unit 140.

  The drive unit 110 outputs a drive signal to the resonance circuit 200 to drive the resonance circuit 200 and generate a primary resonance signal SW at one end of the primary coil. The signal output unit 120 acquires the resonance signal AIN of the resonance circuit 200 and outputs it as the output signal AOUT via the switch element 121. Note that the power supply voltage for controlling the switch element 121 may be level shifted by the output of the rectifier circuit 160 and the data signal DATA, which will be described later.

  The control unit 140 outputs an enable signal EN used for starting the resonance circuit 200 and a data signal DATA to the drive unit 110. In the driving unit 110, the data signal DATA is used for controlling the driving timing.

  Hereinafter, after considering the power-saving control, specifically, the current control method performed by the drive unit 110, the resonance start-up control will be described. Finally, examples of electronic devices including the circuit device 100 will be described.

2. Current Control Method in Drive Unit As described above, the drive unit 110 drives (resonates) the resonance circuit 200 by supplying a drive signal. Therefore, it is possible to reduce the power consumption of the circuit device 100 by supplying the drive signal efficiently. Specifically, power saving can be achieved by reducing the signal value (current value) of the drive signal according to the situation. In addition, if the driving is intermittent, there is a period during which the current value can be very small (in a narrow sense, 0), so that the total power consumption can be reduced. Hereinafter, each method will be described in detail.

2.1 Control of Current Value Linked to Switch Element (Data Signal) As described above, ASK modulation is known as a modulation method. FIG. 7 shows an example of a waveform when ASK is used. As shown in FIG. 7, when the data signal DATA of 0 or 1 and the resonance signal AIN that is a sine wave are acquired, the signal output unit 120 generates, for example, an ASK modulation waveform and outputs it as the output signal AOUT. The signal output unit 120 can be realized by, for example, a configuration including the switch element 121 that is turned on only when the data signal is 1.

  As can be seen from FIG. 7, at the timing when the data signal DATA becomes 0, the amplitude of the output signal AOUT also becomes 0. That is, when the data signal DATA is 0, the magnitude of the amplitude of the carrier wave (resonance signal AIN) does not affect the output signal AOUT. Extremely speaking, even if the resonance circuit 200 is not driven and there is no resonance signal (even if the amplitude of AIN is 0), no problem occurs when the data signal DATA is 0. On the other hand, in the period in which the data signal DATA is 1, the amplitude of the output signal AOUT must be large enough to be distinguished from the amplitude in the period in which the data signal DATA is 0. Therefore, the resonance signal AIN has a certain magnitude. It is necessary to have an amplitude of. Of course, since maintaining resonance is also important, it is not preferable to control so that the resonance signal AIN disappears even if the data signal is 0, which will be described later.

  That is, the condition to be satisfied by the resonance signal AIN, particularly the condition of the amplitude value, is determined according to the value of the data signal DATA. Since the amplitude value of the resonance signal AIN depends on the signal value of the drive signal, specifically the current value of the drive current, the current control according to the data signal DATA is performed in the drive unit 110, so that the resonance circuit 200 can be efficiently operated. Driving becomes possible.

  In the above description, the signal output unit 120 is a modulation unit, and an example in which ASK modulation is performed in particular has been described. However, the signal output unit 120 is not limited to this. For example, the signal output unit 120 may be configured to turn on and off the output of the resonance signal AIN and not perform modulation. Also in this case, since the resonance signal AIN does not need to be supplied to the signal output unit 120 in the output off period, the merit of controlling the drive current is great.

That is, in the circuit device 100 according to the present embodiment, as illustrated in FIGS. 1 and 5, the drive unit 110 that performs drive control of the resonance circuit 200 and the input node to which the resonance signal AIN from the resonance circuit 200 is input. N _AIN , an output node N _OUT of the output signal AOUT based on the resonance signal AIN, and a signal output unit 120 having a switch element 121 provided between the input node N _AIN and the output node N _OUT . The drive unit 110 controls at least one of the first drive current during the on period of the switch element 121 and the second drive current during the off period of the switch element 121.

  Here, the ON period of the switch element 121 represents a period in which connection between nodes by the switch element 121 is performed, and specifically represents a period in which a signal based on the resonance signal AIN is output as the output signal AOUT. Similarly, the off period represents a period during which the connection between the nodes by the switch element 121 is disconnected, and specifically represents a period during which a signal based on the resonance signal AIN is not output as the output signal AOUT.

  Further, the control of the drive current is a control of the current value in a narrow sense, but is not limited to this. As described above, for efficient driving of the resonance circuit 200, it is only necessary to control the amplitude of the resonance signal. Therefore, for example, when the drive current is supplied as a current pulse, the pulse width (duty ratio) may be controlled as the drive current. The pulse width can be controlled by widely known PWM (pulse width modulation) or the like.

  In this way, the drive current can be controlled based on whether the switch element 121 is in the on period or the off period, that is, whether the resonance signal AIN is used for the output of the output signal AOUT. It becomes possible to control the circuit device 100. Specifically, during the period in which the resonance signal AIN is used to output the output signal AOUT, the accuracy of the output signal AOUT can be improved (for example, suppression of data errors in ASK modulation) by relatively increasing the drive current. Thus, in a period in which the resonance signal AIN is not used for outputting the output signal AOUT, it is possible to save power by relatively reducing the drive current.

  Specifically, the signal output unit 120 may be a modulation unit that modulates the resonance signal AIN of the resonance circuit 200 based on the transmission data DATA and outputs a modulation signal as the output signal AOUT. In this case, the ON period is a period in which the transmission data DATA is at the first logical level, and the OFF period is a period in which the transmission data DATA is at the second logical level.

  In this way, it is possible to realize the circuit device 100 that efficiently outputs an ASK modulation signal.

  Note that although binary ASK modulation has been described with reference to FIG. 7, the signal output unit (modulation unit) 120 may perform other ASK modulation such as four values. For example, the amplitude value of the output signal may be controlled in four stages, and each amplitude value may correspond to a 2-bit data signal “11”, “10”, “01”, “00”. Also in that case, 0 is generally used as the smallest amplitude value among the signals after ASK modulation. That is, even in ASK modulation of four values or more, there is no problem even if the amplitude value of the carrier wave (resonance signal AIN) is small when the transmission data DATA is a given logical level (for example, “00”). Therefore, it can be said that it is useful to control the drive current by distinguishing between the case where the data signal DATA is at the logical level and the case where the data signal DATA is at other logical levels (for example, “11”, “10”, “01”). However, in this case, the amplitude value can be changed even during the ON period of the switch element 121 (in the case of a four-value example, three levels of amplitude values corresponding to “11”, “10”, and “01” are set. It is necessary to provide a configuration for enabling setting.

  Alternatively, the circuit device 100 according to the present embodiment includes a drive unit 110 that performs drive control of the resonance circuit 200, and a modulation unit (signal output unit 120) that modulates the resonance signal AIN of the resonance circuit 200 using the data signal DATA. The driving unit 110 includes at least one of a first driving current in a period in which the data signal DATA is at the first logic level and a second driving current in a period in which the data signal DATA is at the second logic level. The drive current may be controlled.

  Hereinafter, a specific method for controlling the drive current will be described. First, when the ON period and the OFF period of the switch element 121 are largely compared, as described above, the amplitude of the resonance signal AIN needs to be large enough to output the output signal AOUT in the ON period, as described above. In the off period, the amplitude of the resonance signal AIN may not be so large.

  Therefore, the drive unit 110 controls the drive current of the resonance circuit 200 so that the current value of the second drive current is smaller than the current value of the first drive current.

  FIG. 8 shows a time-varying waveform of each signal in this case. As shown in DATA and AIN in FIG. 8, the amplitude of the resonance signal AIN is large (B1) in the on period when the data signal DATA is 1, and the amplitude of the resonance signal AIN is in the off period when the data signal DATA is 0. Relatively small (B2). Since the amplitude of the primary side resonance signal SW and the amplitude of the resonance signal AIN are determined by the transformation ratio (the turns ratio of the primary coil L1 and the secondary coil L2), the amplitude of the primary side resonance signal SW during the ON period ( Such a resonance signal AIN can be obtained by making B3) larger than the amplitude (B4) in the off period. Since the amplitude of the primary resonance signal SW depends on the drive current supplied from the drive unit 110 (drive circuit 111), the current value of the second drive current is smaller than the current value of the first drive current. Then, the output signal AOUT shown in FIG. 8 can be acquired. Specifically, the current value of the drive current (B7) in the off period is made smaller than the current value of the drive current (B6) in the on period. As described above, since the output signal AOUT (B5) output in the off period does not require an amplitude, there is no problem because the amplitude of the resonance signal AIN is small.

  In the present embodiment, finer control may be performed in addition to the two types of control of the on period and the off period. For example, the amplitude of the resonance signal is relatively small in the off period, and generation of an appropriate output signal (for example, generation of an output waveform corresponding to a data signal that is “1” in ASK modulation) is performed with the amplitude remaining unchanged. It is expected to be difficult. Of course, this is not a problem as long as it is within the off period, but the possibility of a problem at the timing of switching from the off period to the on period cannot be denied. Specifically, it is desired to output the output signal AOUT having a relatively large amplitude as soon as possible (immediately in a narrow sense) after switching to the on period, and the resonance signal AIN has a small amplitude in the off period. Therefore, since it takes time to change to a sufficiently large amplitude, there is a possibility that an appropriate output signal AOUT cannot be output immediately after the start of the ON period. In the case of ASK modulation, when data “1” is desired to be output, there is a possibility that the reception side erroneously determines that the signal in the corresponding period is “0” because the amplitude is insufficient.

  In consideration of the above, the on period may not be controlled collectively, but the start period and the period other than the start period (periods after the start period) may be controlled separately in the on period. Specifically, the drive unit 110 performs control to increase the current value of the first drive current in the start period of the on period as compared to a period other than the start period in the on period.

  Here, the start period of the on period represents a period until a given time elapses after switching from the off period to the on period.

  FIG. 9 shows the time change waveform of each signal in this case. As shown in FIG. 9, the amplitude of the resonance signal AIN is larger in the start period (C1) of the on period than in the period (C2) after the start period of the on period. Similarly to the example described above with reference to FIG. 8, the amplitude (C3) of the primary resonance signal SW in the start period of the on period is made larger than the amplitude (C4) in the period after the start period of the on period. Thus, it is possible to obtain such a resonance signal AIN, and more specifically, if the current value of the drive current (C5) in the start period is larger than the current value of the drive current (C6) in the period after the start period. Good.

  In FIG. 9, the amplitude (C7) of the resonance signal in the off period is further smaller than the period (C2) other than the start period in the on period, and the current of the drive current (C8) in the off period is The example in the case where it is small compared with the drive current (C5, C6) of the ON period is shown. This makes it possible to control the drive current in at least three stages. In other words, C5 is boost control for increasing the amplitude of the resonance signal that was small in the off period in a short period, C6 is on control that continues the amplitude necessary for data signal transmission, and C8 maintains resonance. This is an off control that takes this into consideration. However, the relationship among boost control, on control, and off control is not limited to FIG. For example, it is possible to make a modification in which the current values of the drive currents at C6 and C8 are made common without distinguishing between on control and off control.

  Note that the problem here is switching from the off period to the on period as described above. Therefore, for example, when “1” of the data signal continues for 2 bits or more, the ON period continues only for a period corresponding to a plurality of bits. However, if the boost control is performed in the ON period corresponding to the first 1 bit, Good.

  Further, not only the on period is controlled separately for the start period and the subsequent period, but the off period may be controlled separately for the start period and the subsequent period. As described above, since the amplitude of the output signal AOUT is 0 in the off period, the amplitude of the resonance signal AIN is unnecessary. However, if the resonance itself stops, when switching to the ON period, the resonance (oscillation) must be started from the beginning, and it takes time to complete the resonance with a sufficient amplitude. Even if the boost control (C5) in the start period of the on period described above is performed, it takes time to start the resonance from 0, so it is important to maintain the resonance even in the off period. That is, it is desirable that the amplitude of the resonance signal AIN in the off period is a minimum amplitude that can maintain resonance. When the drive current is reduced under such conditions, it is preferable to first reduce the amplitude to the minimum level as soon as possible in the start period of the off period, and maintain the amplitude when the amplitude attenuates to the minimum level. .

  Specifically, the drive unit 110 reduces the current value of the second drive current in the start period of the off period compared to a period other than the start period in the off period (a period after the start period elapses). Control.

  Here, the start period of the off period represents a period until a given time elapses after switching from the on period to the off period. Further, when “0” of the data signal continues for 2 bits or more, the off period continues for a period corresponding to a plurality of bits. However, if the control here is performed in the off period corresponding to the first 1 bit, This point is often the same as the start period of the on period.

  Specifically, as illustrated in FIG. 9, the amplitude of the resonance signal AIN is smaller in the start period (C9) in the off period than in the period (C10) after the start period in the off period. The amplitude (C11) in the start period of the off period of the primary side resonance signal SW may be made larger than the amplitude (C12) in the period after the start period of the off period, specifically, in the start period of the off period. The current value of the drive current (C13) may be made smaller than the current value of the drive current (C14) in the period after the start period.

  Note that when the amplitudes illustrated in C11 and C12 in FIG. 9 are realized, the current value in the start period of the off period may be smaller than the current value in the period after the start period. Current value may be used.

  Alternatively, as illustrated in C <b> 13 of FIG. 9, the drive unit 110 turns off the second drive current in the start period of the off period (in the narrow sense, sets the current value of the second drive current to 0). Control may be performed. When the driving current is 0, if the loss is an ideal coil, the previous amplitude is maintained. However, since the actual coil has a loss, the amplitude of the resonance signal is the time. It decreases with the passage of time.

  In that case, as the start period of the off period, set a period until the amplitude of the resonance signal in the on period is attenuated by the loss and becomes a minimum amplitude for maintaining the resonance, or a period shorter than that. That's fine. If such control is performed, the resonance signal is maintained at a level at which resonance can be maintained at the end of the start period of the off period, so that a drive current having a given current value other than 0 is supplied after the start period has elapsed. Thus, the resonance is maintained without stopping throughout the off period, and the subsequent transition to the on period can be made smooth. Furthermore, since the drive current in the start period of the off period can be cut, further power saving can be expected.

  In FIG. 9, the on period is divided into a start period (corresponding to C1) and a subsequent period (corresponding to C2), and the off period is further divided into a start period (corresponding to C9) and a subsequent period (corresponding to C10). In this example, the drive current is controlled separately. However, it is not necessary for the drive unit 110 to perform all of these controls. For example, the drive unit 110 may perform any control in which the current value of the drive current is different in at least two of the four periods.

  In order to implement the above control, as shown in FIG. 1, the circuit device 100 may include a storage unit 150 that stores a set value of the current value. Then, the drive unit 110 outputs a drive current to the resonance circuit 200 according to the set value. For example, the control unit 140 may read a set value from the storage unit 150 and output a control signal according to the set value to the drive unit 110 so that the drive unit 110 outputs a drive current according to the set value. In the present embodiment, since it is assumed that the control unit 140 outputs the data signal DATA, the control unit 140 determines whether it is an on period or whether it is a start period. It is possible to select a setting value to be read based on the determination.

  Hereinafter, a specific circuit configuration of the drive unit 110 (particularly the drive circuit 111) for realizing the above control will be described.

  FIG. 10 shows a circuit configuration of the drive unit 110 (drive circuit 111). The drive circuit 111 includes a plurality of current sources IS1 to IS3 and a plurality of transistors Tr1-1 to Tr1-3. IS1 and Tr1-1 are connected in series between a given power supply voltage and a second transistor Tr2 constituting a current mirror circuit CM described later. Here, for example, a reference voltage (analog ground AGND) generated by the reference voltage generation unit 130 can be used as a given power supply voltage, but other voltages may be used. Similarly, IS2 and Tr1-2 are connected in series between AGND and Tr2, and IS3 and Tr1-3 are connected in series between AGND and Tr2. In addition, a set of IS1 and Tr1-1, a set of IS2 and Tr1-2, and a set of IS3 and Tr1-3 are connected in parallel to each other. Note that although FIG. 10 shows a configuration having three sets of current sources and transistors, the number is not limited to this. As described above, in view of the control that the driving unit 110 performs different current values in at least two periods, the number of pairs of current sources and transistors may be two or more.

  In the example of FIG. 10, the inverted signal of the boost signal (BOOST) is input to the gate terminal of Tr1-1, and the inverted signal of the ON signal (ON) is input to the gate terminal of Tr1-2. An inverted signal of the off signal (OFF) is input to the gate terminal. The boost signal is a signal that is at a high level during a period in which the boost control of the drive current is performed, and is at a low level during other periods. Specifically, the boost signal is at a high level during the start period of the ON period of the switch element 121. . Similarly, the ON signal is a signal that is at a high level during a period during which the drive current is controlled to be ON and is at a low level during other periods. Specifically, the ON period of the ON period of the switch element 121 is It becomes high level in the following period. Similarly, the off signal is a signal that is at a high level during a period in which the drive current is controlled to be off and is at a low level during other periods. Specifically, the off signal is at a high level during an off period of the switch element 121. . The reason why each input is an inverted signal is that Tr1-1 to Tr1-3 are P-type transistors, and inversion is not necessary if they are N-type.

  That is, in the example of FIG. 10, Tr1-1 to Tr1-3 (in order to distinguish from two transistors Tr2 and Tr3 of a current mirror circuit CM described later, these are collectively referred to as a first transistor) are current sources. This is an element for controlling on / off of the current supply from. Thereby, in the start period of the on period, the drive current based on the current from the current source IS1 is supplied to the resonance circuit, and in the period after the start period of the on period, the drive current based on the current from the current source IS2 is supplied to the resonance circuit. In the off period, a drive current based on the current from the current source IS3 is supplied to the resonance circuit. If the current value is IS1> IS2> IS3, the control described above with reference to FIGS. 8 and 9 can be realized. Although FIG. 10 shows an example in which three types of current control, boost control, on control, and off control, are performed, an appropriate number of current sources that output currents of appropriate current values are connected to each current source. By providing a transistor that is turned on at an appropriate timing, drive current control other than those in FIGS. 8 and 9 can be realized.

  Further, as shown in FIG. 10, the drive circuit 111 may include a current mirror circuit CM that current mirrors a current from a current source (any one of IS1 to IS3 in the example of FIG. 10). By using the current mirror circuit CM, it is possible to suppress a characteristic change (for example, a change in current value) and supply a stable drive current to the resonance circuit 200.

  The current mirror circuit CM has a second transistor Tr2 through which a current from a current source flows, and a third node that has a gate node commonly connected to the gate node of the second transistor Tr2 and outputs a drive current to the resonance circuit 200. A transistor Tr3 is included. As a result, the current supplied from the current source via the first transistor is amplified at a current ratio determined by the size ratio of Tr2 and Tr3 and output to the resonance circuit 200.

  Here, the current ratio is less than 1 (the current of the current source is reduced and supplied to the resonance circuit 200), but it is preferable that the current ratio is set to a certain value in view of efficiency, for example, 10 It should be a value of the degree. This is because the current flowing through the second transistor Tr2 is not used for resonance and is lost, but the current flowing through the third transistor Tr3 is accumulated in the capacitor of the resonance circuit 200 and is unlikely to be lost. This is because it is efficient to increase the value of the current flowing through Tr3 compared to the value.

  Further, when the resonance circuit 200 has a configuration including the primary coil L1 and the secondary coil L2, the reference voltage generator 130 is connected to one end (E1) of the primary coil L1 as shown in FIG. The reference voltage (AGND) of the side resonance signal is output, and the drive unit 110 outputs a drive current to the other end (E2) of the primary coil L1. Specifically, the other end (E2) of the primary coil L1 and the third transistor Tr3 of the current mirror circuit CM are connected.

  Although not directly related to control of the current value of the drive current, the circuit device 100 may have a configuration for generating a power supply voltage used for on / off control of the switch element 121 from the resonance signal AIN.

  FIG. 11 shows a configuration of a power supply voltage generation circuit for the switch element 121. As illustrated in FIG. 11, the circuit device 100 includes a resonance signal AIN that is a signal obtained by boosting the primary-side resonance signal SW by the primary coil L1 and the secondary coil L2 of the resonance circuit 200. A rectifier circuit 160 that generates a rectified signal for power supply voltage is included. The rectifier circuit 160 can be realized by a half-wave rectifier circuit having a diode Dr and a capacitor Cr as shown in FIG. 11, for example.

  Further, when the switch element 121 is operated by the output of the rectifier circuit 160, a level shift may be taken into consideration. This is because the primary side resonance signal (SW) is a signal centered on the reference voltage (AGND) from the reference voltage generation unit 130 as described above, and therefore, when the secondary side resonance signal AIN is used as the power supply voltage. The reference may be returned to another voltage, in a narrow sense, to ground. Therefore, the circuit device 100 (in particular, the signal output unit 120) may include the level shifter 123. The switch element 121 operates based on a signal obtained by level-shifting the rectified signal from the rectifier circuit 160 to a signal based on the low-potential-side power supply voltage (GND) and the switching signal from the control unit 140.

  The switching signal here is a signal used for on / off control of the switch element 121. When the signal output unit 120 is a modulation unit that performs ASK modulation, since the on / off state of the switch element 121 is determined according to the logic level of the data signal DATA, the switching signal corresponds to the data signal DATA.

2.2 Intermittent current supply FIG. 12 shows a configuration example of a well-known Colpitts resonance circuit as a comparative example to the method of the present embodiment, F1 in FIG. F2 shows an example of a time-varying waveform of current.

  As shown in FIG. 12, the resonance signal is output by supplying the power supply voltage VD to the inverter IV. Specifically, as shown in F11 of FIG. 13, by supplying the constant voltage VD, the voltage value becomes sinusoidal as shown in IND0 (F12) and IND1 (F13).

  In this case, the current value is F2, F21 represents the current value flowing through the P-type transistor constituting the inverter IV, and F22 represents the current value flowing through the N-type transistor constituting the inverter IV.

  As can be seen from F1 and F2 in FIG. 13, in the conventional Colpitts resonance circuit, power supply (F11, F21, and F22) is always continued, and thus power consumption is large. In the first place, the signal must be supplied even after the resonance signal is started to be output in the resonance circuit (after the resonance is started) because the elements constituting the resonance circuit have a loss. If the resistance element R is used, loss is inevitable. The coil L ideally has no loss, but such an element is not practical, and the coil L is also assumed to have a loss. In other words, since the amplitude is attenuated due to loss as it is, it is essential to supply power to the resonance circuit in order to maintain resonance.

  However, even if power supply is indispensable, it is only necessary to have an input that can compensate for the loss caused by the circuit elements, and it is not necessary to constantly input current as shown in FIG. That is, the drive current may be intermittent as long as efficient power supply is performed. Here, intermittent means that the drive current has a period in which it is turned on (takes a non-zero value) and a period in which the drive current is turned off (takes 0 or a value close enough thereto).

  Therefore, the present applicant proposes a circuit device 100 that drives the resonance circuit 200 using an intermittent drive signal, that is, a drive pulse signal. Specifically, the circuit device 100 includes a drive unit 110 that performs drive control of the resonance circuit 200, and the drive unit 110 monitors the resonance waveform of the resonance circuit as illustrated in FIG. A drive timing setting circuit 113 for setting the drive timing and a drive circuit 111 for outputting a plurality of drive pulse signals for setting the drive timing of each drive pulse signal to the resonance circuit 200 by the drive timing setting circuit 113 are included.

  In this way, since the resonance circuit 200 can be driven by the drive pulse signal, the drive signal can be turned off, and the power consumption can be reduced. At that time, since the drive timing (timing at which the drive pulse signal becomes high level) is set based on the monitoring result of the resonance waveform, appropriate setting is possible. Ideally, it is only necessary to estimate the degree of attenuation from the specified amplitude of the resonance waveform and input a drive pulse signal that only compensates for the attenuation. However, considering the ease of control, it is assumed that the period (phase) of the resonance waveform is associated with the drive pulse signal. For example, the drive timing may be set so that a drive pulse signal having a predetermined pulse width is input once in a predetermined cycle of the resonance waveform (in a narrow sense, once in one cycle). If the amplitude of the resonance signal is maintained, the loss per cycle is assumed to be constant to some extent. That is, by supplying a predetermined amount of power in accordance with the period of the resonance waveform, it becomes easy to balance the loss and supply. In other words, the “plurality of driving pulse signals” here represent pulse signals (three substantially rectangular pulse signals in the case of G5 in FIG. 15 described later) that are output at a plurality of timings (periods) different in time. In a narrow sense, it represents a signal output over a plurality of periods, one per period of the resonance waveform.

  FIG. 14 shows a configuration example of the drive unit 110. As shown in FIG. 14, the drive circuit 111 is supplied with a current source IS and a current from the current source IS, and is controlled by a drive timing signal from the drive timing setting circuit 113 (turned on). A transistor Tr1 is included. Then, the drive circuit 111 outputs a current pulse as a drive pulse signal by the current source IS and the first transistor Tr1.

  Specifically, a drive timing signal may be supplied to the gate node of the first transistor Tr1. When a signal that becomes high level at the timing of supplying current and becomes low level at other timings is used as a drive timing signal, if the first transistor Tr1 is P-type, an inverted signal of the drive timing signal is used as the gate voltage. Is supplied to the current source IS only during the drive timing.

  Further, the drive circuit 111 may include a current mirror circuit CM that current mirrors a current flowing from the current source IS via the first transistor Tr1. The current mirror circuit CM is connected in common to the second transistor Tr2 through which a current flowing from the current source IS through the first transistor Tr1 flows, and the gate node of the second transistor Tr2 to the resonance circuit 200. A third transistor Tr3 for outputting a current pulse. In this case, the drive circuit 111 outputs a current pulse by the current mirror circuit CM.

  This makes it possible to suppress fluctuations in the current value and supply a stable current as a current pulse to the resonance circuit. The current ratio between Tr2 and Tr3 is the same as that in the example described above with reference to FIG.

  However, by increasing the current ratio (increasing the current flowing through Tr3 compared to the current flowing through Tr2), the third transistor Tr3 is less likely to follow the signal change (becomes slower in operation). For this reason, even when the drive timing ends, the first transistor Tr1 is turned off, and the current flowing through the second transistor Tr2 is turned off, the current flowing through the third transistor Tr3 does not immediately become zero, The current will continue to flow for As a result, more current than intended is supplied to the resonance circuit 200, which is not preferable from the viewpoint of power saving.

  Therefore, the drive circuit 111 may include a circuit DIS that turns off the third transistor Tr3 in the off period of the first transistor Tr1. Specifically, as shown in FIG. 14, the circuit DIS is realized as a fourth transistor Tr4, and the fourth transistor is turned on in the off period of the first transistor Tr1. For example, if Tr4 is an N-type transistor, Tr4 is a transistor in which the inverted signal of the drive timing signal is supplied to the gate node, the drain node is connected to the gate node of the third transistor, and the source node is connected to the ground. It becomes.

  In the example of FIG. 14, the circuit DIS realized by the fourth transistor Tr4 is a discharge circuit that discharges the gate nodes of the second transistor Tr2 and the third transistor Tr3 during the off period of the first transistor Tr1. Can be considered.

  The reason why the current of the third transistor Tr3 continues to flow is due to charging at the gate node. Therefore, by providing the circuit DIS for discharging the gate node, it is possible to prevent unnecessary current from flowing. And power consumption can be further reduced.

  Next, a specific operation example and circuit configuration example of the drive timing setting circuit 113 will be described. As described above, the drive timing setting circuit 113 monitors the resonance waveform, but when the resonance circuit 200 has the primary coil L1 and the secondary coil L2 as shown in FIG. Side waveform (primary side resonance signal SW) or secondary side waveform (resonance signal AIN). Here, the drive timing setting circuit 113 monitors the voltage at the other end of the primary coil L1 (the other end when the side to which the reference voltage AGND is supplied from the reference voltage generation unit 130 is used as one end), and the monitoring result The drive timing is set based on the above. That is, the drive timing setting circuit 113 monitors the resonance waveform of the resonance circuit 200 by monitoring the primary side resonance signal SW.

  More specifically, the drive timing setting circuit 113 compares the determination voltage set with reference to the reference voltage (AGND) with the voltage at the other end of the primary coil L1 (the voltage of SW), and the comparison result is obtained. Based on this, the drive timing is set. In a situation where the amplitude value is kept almost constant, the phase (timing in one cycle) at the timing when the resonance waveform becomes a given voltage value may be considered to be almost constant. That is, an appropriate drive timing can be set by comparing the voltage of the resonance waveform with a given determination voltage. Specifically, a current pulse can be supplied to the resonance circuit 200 at a predetermined timing in each cycle, and a resonance with an appropriate amplitude can be maintained even with low power consumption. Note that the determination voltage is not limited to a voltage generated using the reference voltage as long as the voltage value is set based on the reference voltage (AGND).

  In particular, in the circuit configuration of FIG. 5, the reference voltage generation unit 130 outputs the reference voltage (AGND) of the primary side resonance signal SW to one end of the primary coil L1, and the drive unit 110 (drive circuit 111) Since it is assumed that a drive pulse signal is output to the other end of the primary coil L1, the resonance waveform is a waveform centered on the reference voltage. That is, by setting the determination voltage based on the reference voltage AGND, it is possible to appropriately perform the comparison process. For example, even if the amplitude value (voltage value) of the resonance waveform is slightly deviated, an extreme case in which there is no timing when the amplitude value of the resonance waveform matches the determination voltage is less likely to occur, and the possibility of failure of the determination process is suppressed. it can.

  A specific circuit configuration for performing such comparison processing is as shown in FIG. 14, and the drive timing setting circuit 113 includes a comparator CO, three-stage inverter circuits IV1 to IV3, and a NAND circuit NA. . The drive timing setting circuit 113 can be modified in various ways, such as changing the number of stages of the inverter circuit. The primary resonance signal SW is input to the inverting input terminal of the comparator CO, and a voltage based on the reference voltage is input to the non-inverting input terminal. The input to the non-inverting input terminal is, for example, AGND-α (V), and α is 0.1 V, for example. The NAND circuit NA is supplied with the output of the comparator CO itself and a signal via the three-stage inverter circuits IV1 to IV3.

  FIG. 15 shows an example of a time change waveform of each signal. When the resonance waveform (primary resonance signal SW) is G1 in FIG. 15, the output of the comparator CO is G2. That is, the comparator CO outputs a signal that becomes high level during a period in which the voltage value of the resonance waveform is lower than the determination voltage. Further, by passing through the three-stage inverter circuits IV1 to IV3, the signal shown in G2 is inverted for a given time and inverted to become the signal shown in G3. Since the signals G2 and G3 are input to the NAND circuit NA, the output is G4. That is, by using the circuit shown in FIG. 14, a signal that becomes low level at the drive timing and becomes high level at another timing, that is, an inverted signal of the drive timing signal is output. The length of the drive timing is set by the delay time of the inverter circuits IV1 to IV3. However, as indicated by Tr1 in FIG. 14, if the transistor is a P-type, if the G4 signal is input as it is (or if it is inverted and input even number of times), the transistor can be turned on at the drive timing. it can. In this sense, both the inverted signal of G4 and the G4 signal itself may be considered as drive timing signals in this embodiment in a broad sense.

  By outputting the signal indicated by G4 to the first transistor Tr1, the drive pulse signal (current pulse) becomes the signal indicated by G5 in FIG. As can be seen from the comparison between G1 and G5, the resonance circuit 200 is supplied with a predetermined amount of current once in one period of resonance, which is less current than when continuous current supply is performed. This makes it possible to maintain resonance.

2.3 Current Value Control of Current Pulse Two types of control of the current value of the drive current and control of the drive timing corresponding to the output timing of the drive signal have been described above. However, these controls are not limited to being performed independently, and both can be combined.

  FIG. 16 shows a specific circuit configuration example. In addition, the same code | symbol is attached | subjected about the structure similar to FIG.10 and FIG.14, and detailed description is abbreviate | omitted. As can be seen from FIG. 16, the drive circuit 111 includes a plurality of sets of current sources and first transistors for controlling on / off of current supply of the current sources, as in FIG. 10. As a result, similarly to the example described above with reference to FIG. 10, the current value can be controlled in accordance with the on period and the off period of the switch element 121.

  At that time, a signal supplied to the gate node of one of the first transistors (Tr1-1 in FIG. 16) becomes an inverted signal of the output of the drive timing setting circuit 113 and a NAND output of the boost signal. Considering that Tr1-1 is a P-type transistor, Tr1-1 is turned on when the drive timing signal is at a high level (drive timing) and the boost signal is at a high level. The current from IS1 is output to the current mirror circuit CM.

  Similarly, the inverted signal of the output of the drive timing setting circuit 113 and the NAND output of the ON signal are supplied to the gate node of Tr1-2, and the output of the drive timing setting circuit 113 is supplied to the gate node of Tr1-3. The inverted signal and the NAND output of the off signal are supplied.

  With such a circuit configuration, intermittent driving with a relatively large amplitude value is performed based on the current from the current source IS1 in the period in which the boost control is performed, that is, in the start period of the on period as described above. A current (current pulse) is output to the resonance circuit 200. Further, in the period during which the ON control is performed, that is, the period after the start period of the ON period as described above, the intermittent drive current (current pulse) having a medium amplitude value based on the current from the current source IS2. Is output to the resonance circuit 200. Further, during the off-control period, that is, as described above, the intermittent drive current (current pulse) having a relatively small amplitude value is output to the resonance circuit 200 based on the current from the current source IS3. Is done.

  By doing as described above, both power saving from the viewpoint of current value and power saving on the time axis can be used together, so that further power consumption can be reduced.

  17 and 18 show examples of specific signal time-varying waveforms. In FIG. 17, H1 is the waveform of the data signal, H2 is the waveform of the primary side resonance signal SW and the drive timing signal, H3 is the waveform of the drive current, H4 is the waveform of the resonance signal AIN, and H5 is the waveform of the output signal AOUT. Similarly, I1 to I5 in FIG. 18 are arranged in the order of a data signal, a primary side resonance signal, a drive timing signal, a drive current, a resonance signal, and an output signal.

  As indicated by H1, in FIG. 17, the data signal is switched from the low level to the high level at the timing indicated by H11. Of H2, H21 represents the primary resonance signal SW, and H22 represents the drive timing signal. H21 has a small amplitude in a period before H11 (off period) and a large amplitude in a period after H11 (on period). However, in either case, since the amplitude of the primary side resonance signal SW is sufficient, there is a period that is lower than the determination voltage, and the drive timing signal is at a high level once per cycle as shown in H22. There is a period (drive timing).

  As can be seen from the comparison between H3 and H22, the drive current is output as a current pulse at the timing when the drive timing signal becomes high level. At this time, the current value of the current pulse changes according to the data signal (H1). Specifically, the current value is relatively small in the off period (H31), and the current value is relatively large in the start period (H32) of the on period that is the boost period. On the other hand, the current value is an intermediate value in the period after the start period (H33) in the ON period.

  The magnitude of the resonance signal (H4) corresponds to the primary resonance signal (H21), and the output signal (H5) is a signal obtained by modulating the resonance signal with the data signal (H1). Since this point is as described above, detailed description is omitted.

  As indicated by I1, in FIG. 18, the data signal is switched from the high level to the low level at the timing indicated by I11. Therefore, the amplitude of the primary side resonance signal (I21) is attenuated in the period after I11 as compared with the period before I11. However, since the amplitude of the primary side resonance signal SW is sufficient in this case as well, there is a period that is lower than the determination voltage, and the drive timing signal becomes high once in one cycle as in H22 (I22). .

  The current value of the drive current (I3) is medium in the period after the start period (I31) in the on period, and when the period shifts to the off period (I32), the current value is relatively small. Become. Note that as described above with reference to FIG. 9, it is possible to perform a modification in which the current value of the drive current is further reduced (turned off in a narrow sense) in the start period of the off period.

  Since the resonance signal (I4) and the output signal (I5) are also as described above, detailed description thereof is omitted.

  The method shown in FIG. 16 is different from the method of controlling the current value of the drive current described above with reference to FIG. 10 in that the drive unit 110 has a plurality of first current pulses as the first drive current in the ON period. And a plurality of second current pulses are output as the second drive current in the off period. In this case, the driving unit 110 controls the current value of at least one of the first current pulse and the second current pulse. Furthermore, the driving unit 110 outputs the first current pulse and the second current pulse by the current sources (IS1 to IS3) and the transistors (Tr1-1 to Tr1-3).

3. Start Control Next, control at the start of resonance will be described. In the configuration shown in FIG. 5 and the like, when the switch element 121 is on, the input node N _AIN to which the resonance signal AIN is input from the resonance circuit 200 and the output node N _AOUT of the output signal AOUT are connected. . For this reason, when any load is connected ahead of _NAOUT, the load is also an object to be driven by the resonance circuit 200. The load connection means that the output terminal of AOUT is in physical contact with another circuit device or the like, so that the element of the other circuit device may be connected to the output terminal. As described above, there are cases where interference occurs due to electromagnetic induction or the like in a non-contact state.

In any case, prior to the heavy load of N _AOUT, for example, when a large capacitor capacity is connected, it must be considered the presence of the capacitor in the resonance. For example, even if a current that can maintain resonance with a sufficient amplitude is supplied in the absence of the capacitor, a resonance signal (primary resonance signal SW and primary side resonance signal SW and There is a possibility that the amplitude of the resonance signal AIN) is attenuated, and in some cases, the resonance itself stops.

  That is, in the circuit device 100, it is necessary to perform control to restart when resonance stops. In particular, when a method of maintaining the resonance of the resonance circuit 200 by monitoring the resonance waveform (primary side resonance signal SW) and supplying a current based on the monitoring result as shown in FIGS. By connecting a high load on the side, the amplitude of the primary side resonance signal SW is reduced. Therefore, there are cases where the comparison result between the voltage of the primary side resonance signal SW and a given determination signal does not satisfy the condition for outputting the drive current. For example, the drive timing signal may not be output (G4 in FIG. 15 is always at a high level) because there is no period in which the voltage at the primary side resonance signal SW is equal to or lower than AGND-α (V). Therefore, according to the methods of FIGS. 14 to 18, resonance stops when a high load is connected, and resonance cannot be resumed as it is. That is, in the conventional method such as the Colpitts resonance circuit shown in FIGS. 12 and 13, since a drive signal is always supplied, even if the resonance does not stop or temporarily stops, a clear restart control is necessary. In contrast, restart is important in the configurations of FIGS.

  As illustrated in FIG. 1, the circuit device 100 that performs start-up control includes a drive unit 110 that outputs a drive signal to the resonance circuit 200 and a control unit 140. Then, the control unit 140 outputs an activation signal (enable signal EN) in the activation period in which the resonance of the resonance circuit 200 is activated, and activates the resonance of the resonance circuit 200 by the driving unit 110. Further, the resonance state of the resonance circuit 200 is monitored, and when the resonance stop of the resonance circuit 200 is detected after the resonance circuit 200 is activated, the activation signal is output again.

  In this way, not only the initial activation (resonance activation when the circuit device 100 is activated) can be performed, but also the resonance can be restarted as necessary after monitoring the resonance state. . Therefore, even when resonance stops, such as when a high load is connected to the end of the output terminal of AOUT, resonance can be started again and signal output can be resumed.

  At that time, the switch element 121 of the signal output unit 120 is preferably turned off in the startup period. As described above, as a factor for stopping the resonance, a high load may be connected to the tip of the switch element 121 (the output terminal of the output signal AOUT of the circuit device 100). Therefore, even if an activation signal is output to activate resonance, the resonance circuit 200 must perform resonance including the load if a high load is connected, and it is difficult to stably resonate.

  In that respect, if the switch element 121 is turned off in the startup period (including both the period of initial startup and the period of restart), the resonant circuit 200 and the output terminal of AOUT are disconnected. Even if a high load is connected to the output terminal, the load does not affect the resonance of the resonance circuit 200, and stable resonance (oscillation) is possible. Then, after the resonance is completed, the switch element 121 may be turned on.

  Note that if a high load is connected to the output terminal of AOUT when the switch element 121 is switched to the ON period, resonance may stop again at that timing, but this embodiment allows this. To do. Also in this case, the resonance is stably restarted by monitoring the resonance waveform of the control unit 140 by the sequence of turning off the switch element 121 again, transmitting the activation signal, and starting the resonance by the driving unit 110.

  The “high load” here is assumed to be large enough to affect the resonance. That is, due to the design of the circuit device 100, the load is an irregular load that is not considered to be connected during normal operation (for example, when meaningful data is transmitted from the signal output unit 120). Even if resonance stops at the timing when such an irregular load is connected, there is no problem in the circuit device 100 according to the present embodiment, and when the connection of the load is released, the resonance circuit 200 It only has to resonate. That is, when the resonance is stopped, the switch element 121 is temporarily turned off and the resonance is restarted. When the switch element 121 is turned on again, it is restarted whether the connection of high load is continued or released. In the sequence, it can be said that there is no particular need to consider.

  For example, consider a case where an electronic device including the circuit device 100 according to the present embodiment includes a conductive member exposed to the outside, and transmits / receives information by bringing the conductive member into contact with a device on the reception side of transmission data. . The member is connected to the output terminal of AOUT of the circuit device inside the electronic device. In this case, since the member is exposed to the outside of the electronic device, there is a possibility that the user touches the finger or the like. In this case, a high load is connected to the output terminal. However, in this example, since it is necessary to bring the member into contact with the receiving device at the time of information transmission, it is difficult to consider a usage mode in which the member is also brought into contact with the receiving device while touching with a finger. That is, since it can be assumed to some extent that the finger is separated from the member at the time of information transmission, appropriate information transmission can be realized by performing the above-described control.

  FIG. 19 illustrates a specific circuit configuration example that realizes the start-up control. As shown in FIG. 19, the drive unit 110 includes an activation control circuit 115 controlled by the control unit 140. Further, the drive circuit 111 has a start-up transistor Tr5 that is turned on during the start-up period by the start-up control circuit 115, and the drive circuit 111 drives the start-up current pulse generated when the start-up transistor Tr5 is turned on. Output as a pulse signal.

  The activation control circuit 115 can be realized by an S-R flip-flop as shown in FIG. 19, for example. The activation signal (enable signal EN) from the control unit 140 is input to one input (S) of the SR flip-flop. Further, the output (drive timing signal or its inverted signal) of the drive timing setting circuit 113 is input to the other input (R) of the SR flip-flop. As described above with reference to FIG. 14 and the like, the drive timing setting circuit 113 outputs a signal representing a comparison result between the voltage of the primary side resonance signal SW and a given determination voltage. For this reason, the drive timing setting circuit 113 outputs a pulse signal when the resonance is appropriately performed and the amplitude of the primary side resonance signal SW is large to some extent, and outputs a constant value when the resonance is not performed. Become.

  In other words, the activation control circuit 115 shown in FIG. 19 is activated when the set switch is turned on when the activation signal is input and the amplitude of the resonance waveform (primary resonance signal SW in a narrow sense) becomes sufficiently large. It becomes an S-R flip-flop in which the Reset switch is turned on. Accordingly, the activation transistor Tr5 to which the output of the S-R flip-flop is supplied to the gate node is turned on after the activation signal is input until the amplitude of the resonance signal becomes sufficiently large, and the activation pulse current is output. To do. In other words, the activation period in the present embodiment corresponds to the period until the amplitude of the resonance signal becomes sufficiently large after the activation signal is input.

  FIG. 20 shows a specific waveform example. In FIG. 20, K1 is a reference voltage (AGND), K2 is a primary resonance signal SW, K3 is an output of the start control circuit 115, and K4 is a drive timing signal. An activation signal is input from the control unit 140 at a timing corresponding to K5 in FIG. 21, whereby the output of the activation control circuit 115 (SR flip-flop) changes, and the activation transistor Tr5 is turned on. Thereby, the starting pulse current is supplied to the resonance circuit 200, and resonance is started as indicated by K2. The starting pulse current is turned off (starting transistor Tr5 is turned off) at the timing when the amplitude of the resonance waveform becomes large to some extent (K6 in FIG. 21), and thereafter, the driving timing is set as described above with reference to FIG. Based on the drive timing signal from the circuit 113, the drive circuit 111 outputs a current pulse from the current source IS to the resonance circuit 200. As can be seen from the example of FIG. 20, the start pulse current here is a signal that can increase the amplitude of the resonance signal to some extent, specifically, the amplitude of the resonance signal is compared with the comparator CO in the drive timing setting circuit 113. Any signal that can be driven to exceed the determination voltage may be used. If such a condition is satisfied, the subsequent driving of the resonance circuit 200 can be realized by the configuration described above with reference to FIG.

  Note that the configuration of the circuit device 100 of the present embodiment is not limited to FIG. 19, and various modifications can be made. For example, in FIG. 19, the starting transistor Tr5 used at the time of starting is different from the transistor used at the time of normal operation (first transistor Tr1 in a narrow sense), but these may be shared. In other words, it is possible to output a drive signal with the configuration described above with reference to FIG.

  However, it is desirable that the current value of the starting pulse current used for starting is equal to or greater than the current value of the current pulse used for normal operation. This is because, when starting, it is necessary to change the amplitude from 0 to a relatively large state, and by setting such a current value, resonance can be started in a relatively short time. Accordingly, when a sufficient current value cannot be secured with the configuration of FIG. 16, the drive circuit 111 includes a current source IS and a transistor (first transistor Tr1) for normal operation as shown in FIG. It is desirable to separately have a startup configuration.

  Further, the activation control circuit 115 can be realized with a simpler configuration than the configuration of FIG. In FIG. 19, the output of the drive timing setting circuit 113 is used as a reset input. The fall timing of the drive pulse current (K6 in FIG. 20), the cross timing of the primary side resonance signal SW and the reference voltage (AGND). This is because an experimental result has been obtained that resonance may stop when (K7 in FIG. 20) matches. In the drive timing setting circuit 113, the determination voltage used for the comparison with the primary side resonance signal SW is assumed to be different from the reference voltage (AGND-α). Therefore, a signal based on the comparison result is input to Reset. Then, the voltage value of the primary side resonance signal SW at the falling timing of the drive pulse current can be made not to coincide with AGND.

  In other words, the activation control circuit 115 may have a different configuration as long as the condition that the falling timing of the drive pulse current and the cross timing of the primary side resonance signal and the reference voltage (AGND) do not match can be satisfied. . For example, the pulse width of the starting pulse current may be set to a given fixed value, and the fixed value may be set to have a length clearly different from the half wavelength of the primary side resonance signal SW. In this case, the start control circuit 115 rises in response to the input of the start signal and generates a signal for outputting the drive pulse current having the fixed value pulse width. Therefore, as shown in FIG. There is no need to use flip-flops.

  The resonance state monitoring in the control unit 140 can be realized by various methods. Specifically, the voltage level or the like of the primary side resonance signal SW may be monitored, or the voltage level or the like of the resonance signal AIN may be monitored. Alternatively, if there is a clock signal CK based on the resonance signal, the clock signal CK may be monitored.

  For example, as shown in FIG. 4, the control unit 140 detects the clock signal CK generated based on the signal from the resonance circuit 200 by the watchdog timer 141, thereby monitoring the resonance state of the resonance circuit 200. Good. In the watchdog timer 141, when a regular watchdog operation is not performed, when a clock signal CK is not input, a timeout occurs and exception processing is executed. That is, the start control can be executed by outputting the start signal (enable signal EN) as the exception process.

  Although a circuit for generating the clock signal CK may be provided exclusively, as described above, the drive timing setting circuit 113 generates the primary side resonance signal SW (primary coil L1) in order to generate the drive timing signal. Among these, the voltage at the end different from the side to which AGND is supplied is compared with the determination voltage. The drive timing signal is a clock signal that is output when the amplitude of the primary-side resonance signal SW is large to some extent and that has a frequency of one clock in one cycle of the resonance signal. That is, as shown in FIG. 19, the output of the drive timing setting circuit 113 can be the clock signal CK. In this case, as shown in FIG. 21, the clock signal CK is generated by the drive unit 110 (specifically, the drive timing setting circuit 113), and the control unit 140 acquires the clock signal and uses the watch dog timer 141. By monitoring, the resonance state is monitored.

The circuit device 100 according to the activation control of the present embodiment includes a drive unit 110 that performs drive control of the resonance circuit 200, an input node N _{AIN to} which the resonance signal AIN from the resonance circuit 200 is input, and the resonance signal AIN. an output node _{N AOUT} output signal AOUT based, wherein the signal output unit 120 having a switching element 121 provided between an input node _{N AIN} and the output node _{N AOUT,} driver 110 is a resonance of the resonant circuit 200 It can also be regarded as a circuit device in which the switch element 121 of the signal output unit 120 is turned off during the startup period. With this configuration, regardless of whether a high load is connected to the output node N _AOUT output signal AOUT, it is possible to realize a circuit device 100 is used to start the resonant stably.

  The method of the present embodiment is a circuit device that drives the resonance circuit 200, and outputs a start signal in the start-up period in which the resonance of the resonance circuit 200 is started to start the resonance of the resonance circuit 200, thereby The present invention can also be applied to a circuit device that monitors the resonance state of the circuit 200 and re-outputs the activation signal when the resonance stop of the resonance circuit 200 is detected after the resonance circuit 200 is activated.

4). In the above, the circuit device has been described. However, the technique of the present embodiment is not limited to the circuit device, and can be applied to an electronic device including the circuit device. Various forms of the electronic apparatus according to the present embodiment are conceivable. FIG. 22 illustrates a configuration example of the electronic device. The electronic device may include the above-described circuit device 100, the resonance circuit 200, the processing unit 300, and the output unit 400. The processing unit 300 performs various processes in the electronic device, and may control the circuit device 100, for example. The processing unit 300 can be realized by various processors, for example. The output unit 400 outputs the output signal AOUT from the signal output unit 120 of the circuit device 100. The output unit 400 can be realized by various configurations such as an antenna, a coil, and a conductive member as described later.

  For example, as described above with reference to FIG. 7, the electronic apparatus according to the present embodiment uses a data signal (baseband signal) and a modulation signal (modulation waveform) generated using a signal (carrier wave) from the resonance circuit 200. ) May be an electronic device that transmits to other devices. In particular, the above-described configuration for realizing power saving has high affinity with an electronic device that can be operated by a battery, and the electronic device according to the present embodiment may be a small and lightweight device.

  For example, if a signal based on an operation by a user is used as the data signal, a device such as a remote controller can be realized as the electronic device according to the present embodiment. Specifically, a keyless entry module or the like widely used in an automobile or the like may be used. The keyless entry module communicates with the mobile body (vehicle body) by wireless communication using an antenna, and the mobile body controls the unlocking and locking of doors and trunks, lighting on / off, etc. based on the signal from the keyless entry module To do. The keyless entry module is generally provided with an operation unit such as a button, and when the user operates the operation unit, the operation information is notified to the vehicle body side by wireless communication. That is, when a keyless entry module is realized as an electronic device including the circuit device 100 of the present embodiment, the circuit device 100 acquires user operation information as a data signal, and drives the resonance circuit 200 by the driving unit 110 to generate a carrier wave. The modulation signal generated by the data signal and the carrier wave may be transmitted to the vehicle body via the antenna.

  Further, as described above, data transmission is not limited to transmission via an antenna, but may be a form in which a conductive member is in contact, or an element such as a coil is provided on the surface of an electronic device, and electromagnetic induction is performed. It is also possible to use a form for transmission. For example, the electronic device according to the present embodiment may be a device such as an electronic pen. The electronic pen is used as an input device in a computer such as a PC, and is used in combination with, for example, a tablet (position detection device).

  Specifically, an electronic pen is used to indicate a given position of the tablet (an operation such as touching the given position of the tablet with the pen tip or bringing the pen tip closer to the given position, etc.) ), The tablet detects the indicated position and outputs the coordinates to the computer. Various tablet configurations are conceivable, for example, a thin plate-like device in which the length in the thickness direction (Z-axis) is shorter than the length in the vertical direction (X-axis) and the horizontal direction (Y-axis). Also good. The tablet includes a plurality of loop coils arranged in the X direction and a plurality of loop coils arranged in the Y direction. That is, the tablet has a loop coil group arranged in an array in the direction along the XY plane.

  In the electronic pen, for example, the modulation signal shown in FIG. 7 is output to the pen tip. Therefore, when the pen tip is brought close to the tablet, the detection signal in the loop coil at a position close to the pen tip is larger on the tablet side than the detection signal of the loop coil at a position relatively far from the pen tip. Therefore, for example, in the detection circuit on the tablet side, if the processing of scanning the detection signal level of each coil of a plurality of loop coils is performed and the loop coil with the largest detection signal is specified, the position corresponding to the specified loop coil is It is possible to specify that an instruction has been given by the electronic pen. That is, the tablet can be used as a position detection device.

In this case, the electronic pen as the electronic apparatus according to the present embodiment may be configured such that the modulation signal (output signal AOUT) output from the output node N _AOUT is transmitted to the tablet loop coil. . As an example, the electronic pen may include a transmission coil at a position corresponding to the pen tip, and the modulation signal from the output node may be output to the transmission coil. In this case, if the distance between the pen tip of the electronic pen and a given loop coil of the tablet is close to some extent, the transmitting coil functions as a primary coil and the loop coil functions as a secondary coil, The modulated signal is transmitted to the tablet side. That is, an electromagnetic induction type position detection device can be realized.

  At this time, not only a simple position but also information such as writing pressure may be transmitted from the electronic pen to the tablet. For example, the electronic pen may include a variable capacitor at the nib (core). This variable capacitor has a capacitance that changes according to the amount of pressing against the core. For this reason, the electronic pen can detect writing pressure information by detecting the change in capacitance here.

  Then, the information such as the writing pressure is transmitted to the tablet using the modulation signal as the value of the data signal DATA, and further transmitted to a computer such as a PC for use in drawing a line. Various sequences of position detection and information transmission are conceivable. For example, a position detection process may be first performed in units of a certain period, and then information such as writing pressure may be transmitted. As an example, first, in the position detection phase, the secondary side output (resonance signal AIN) of the resonance circuit 200 is directly transmitted from the pen tip without performing modulation for a certain period. This is synonymous with transmitting a data signal having a value of 1 for the number of bits corresponding to the predetermined period. After that, the data signal corresponding to the number of bits corresponding to the detection accuracy of the pen pressure is modulated and transmitted. For example, if writing pressure detection is performed in 256 stages, a data signal of at least 8 bits may be modulated and transmitted. Note that the information transmitted here is not limited to writing pressure, and may include other information such as information on the charging status of the electronic pen.

  Alternatively, a conductor core (conductive core) may be provided at the tip of the electronic pen, and a modulation signal output from the output node may be applied to the conductive core. The modulation signal is transmitted to the tablet by bringing the conductive core into contact with the tablet surface. In this case, the position detection in this case can use a widely known capacitive coupling method.

  Although the keyless entry module and the electronic pen have been described as examples of the electronic apparatus according to the present embodiment, the technique of the present embodiment can be applied to various electronic apparatuses including the circuit device described above. .

  Although the present embodiment has been described in detail as described above, it will be easily understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. Accordingly, all such modifications are intended to be included in the scope of the present invention. For example, a term described at least once together with a different term having a broader meaning or the same meaning in the specification or the drawings can be replaced with the different term in any part of the specification or the drawings. Further, the configurations and operations of the circuit device and the electronic device are not limited to those described in the present embodiment, and various modifications can be made.

DESCRIPTION OF SYMBOLS 100 ... Circuit apparatus, 110 ... Drive part, 111 ... Drive circuit,
113 ... Driving timing setting circuit, 115 ... Start-up control circuit, 120 ... Signal output unit,
121 ... switch element, 123 ... level shifter, 130 ... reference voltage generator,
140 ... control unit, 141 ... watchdog timer, 143 ... resonance enable control unit,
145 ... Data output control unit, 150 ... Storage unit, 160 ... Rectifier circuit, 200 ... Resonance circuit,
300 ... Processing unit, 400 ... Output unit, AIN ... Resonance signal, AOUT ... Output signal,
CK ... clock signal, CM ... current mirror circuit, CO ... comparator,
DATA ... data signal, DIS ... circuit, IS1-IS3 ... current source,
IV1-IV3 ... Inverter circuit, L1 ... Primary coil, L2 ... Secondary coil,
NA ... NAND circuit, Op ... operational amplifier, SW ... primary side resonance signal,
Tr1-Tr4, Tr5 ... Start-up transistors

Claims (9)

Including a drive unit that performs drive control of the resonance circuit;
The drive unit is
A drive timing setting circuit that monitors a resonance waveform of the resonance circuit and sets a drive timing based on a monitoring result;
A drive circuit that outputs, to the resonance circuit, a plurality of drive pulse signals in which the drive timing of each drive pulse signal is set by the drive timing setting circuit;
A circuit device comprising: In claim 1,
The drive circuit is
A current source;
A first transistor to which a current from the current source is supplied and controlled by a drive timing signal from the drive timing setting circuit;
Including
The drive circuit is
A circuit device characterized in that a current pulse is output as the drive pulse signal by the current source and the first transistor. In claim 2,
The drive circuit is
A current mirror circuit for current mirroring a current flowing from the current source through the first transistor;
The drive circuit is
A circuit device characterized in that the current pulse is output by the current mirror circuit. In claim 3,
The current mirror circuit is:
A second transistor through which a current flowing from the current source through the first transistor flows;
A third transistor having a gate node connected in common to the gate node of the second transistor and outputting the current pulse to the resonant circuit;
A circuit that turns off the third transistor during an off period of the first transistor;
A circuit device comprising: In claim 4,
The circuit is
A circuit device comprising: a discharge circuit that discharges gate nodes of the second transistor and the third transistor in an off period of the first transistor. In any one of Claims 1 thru | or 5,
A reference voltage generator;
The resonant circuit has a primary coil and a secondary coil,
The reference voltage generator is
A reference voltage of the primary side resonance signal is output to one end of the primary coil,
The drive circuit is
The circuit device characterized by outputting the drive pulse signal to the other end of the primary coil. In claim 6,
The drive timing setting circuit includes:
The circuit device characterized by monitoring the voltage at the other end of the primary coil and setting the drive timing based on the monitoring result. In claim 7,
The drive timing setting circuit includes:
A circuit device characterized in that a determination voltage set with reference to the reference voltage is compared with a voltage at the other end of the primary coil, and the drive timing is set based on the comparison result.   An electronic apparatus comprising the circuit device according to claim 1.