JP2016518028A - Photovoltaic module power control and status monitoring system using stacked embedded remote access module switch - Google Patents

Abstract

Provided is a photovoltaic module laminate for power generation. The module includes a plurality of solar cells that are embedded in the module stack and electrically interconnected to form at least one string of solar cells electrically interconnected in the module stack. In addition, at least one remote access module switch (RAMS) power electronic circuit is embedded in the module stack, electrically interconnected to and powered by at least one electrical interconnect solar string, and remotely controlled module power. Functions as a sending gate switch. [Selection] Figure 11

Description

[Cross-reference to related applications]
This application claims the benefit of US Provisional Application No. 61 / 811,736 filed on Apr. 13, 2013 and No. 61/895326 filed Oct. 24, 2013. This is incorporated by reference in its entirety.

  The present disclosure relates generally to the field of photovoltaic (PV) cells and modules, and more specifically to power control and status monitoring systems for photovoltaic modules.

  Advances in photovoltaic (PV) and solar cell technology have paved the way for low-cost mass production and large-scale adoption of solar cells and solar modules as renewable clean energy production mechanisms. As this technology is implemented, there is a growing demand for improved safety and power efficiency at the cell, module, and system levels. A typical solar system includes a solar cell mounted and connected to a solar module stack, a string for transmitting and recovering the power generated by the solar cell to a load and solar system level components (eg, Various combinations of power converter units such as DC to AC power inverter units). A solar module electrically connects several solar cells for power harvesting (typically to one or more series-connected solar cell strings), and typically an electrical interconnect Solar cells (eg, by tab connection / string connection) with solar cells comprising a transparent protective front cover such as glass, a protective backsheet, and a suitable encapsulation layer such as ethylene vinyl acetate (EVA). Encapsulate or package in module stack.

  In general, solar system power depends on external electrical wiring to connect modules and recover power, module stacks (or electrical series, electrical parallel, or a combination of modules connected in series and parallel). Recovered from the positive and negative leads / terminals of some electrically connected solar modules). That is, when the solar cell receives sunlight and generates power, the solar module output leads are energized (ie, they have voltage and can deliver power to the load). ). Furthermore, it is often difficult to control the power output of a module, and existing control systems rely on an external electrical breaker switch or other module external means to connect or disconnect the module output. These solutions are individual external module level components that often leave hot module wires, are prone to failure, and require complex fabrication. Some other prior art configurations use an external microinverter or DC-DC power optimizer attached externally to the external module output leads. An external microinverter or DC-DC power optimizer can cut module power delivery to the load, but adds significant cost and complexity to the PV module and internally cuts module power delivery within the module stack Do not do.

  In addition, photovoltaic modules are used in rooftops and facades of commercial and residential facilities, as well as utility-scale photovoltaic power plants and other special applications (eg, mobile or transportable power generation applications such as automotive applications). ) The demand for transporting, installing and controlling solar modules in a safe and efficient manner is increasing. Furthermore, as the use of photovoltaic systems increases, the awareness and prevention of module theft during operation and maintenance, as well as safety requirements, are an increasing concern.

US Patent Application No. 14 / 072,759

  Therefore, a need arises for a modular power control and status monitoring system that is simple and safe to implement that provides high module safety and improved anti-theft with minimal impact on module power generation (ie, minimal insertion loss). ing. In accordance with the disclosed subject matter, module power control (and status monitoring) utilizing a remote access control switch (RAMS) that substantially eliminates or reduces the disadvantages associated with previously developed module power control systems. ) Provide the system.

  According to one aspect of the disclosed subject matter, a photovoltaic module stack for power generation is provided. The solar module stack includes a plurality of solar cells that are embedded in the module stack and electrically interconnected to form at least one string of solar cells electrically interconnected within the module stack. The module laminate typically includes a protective permeable cover sheet (eg, glass or a flexible lightweight fluoropolymer such as ETFE or PFE) and a front encapsulation layer (eg, EVA, polyolefin, or another suitable Encapsulating material), a plurality of electrically interconnected solar cells and any embedded power electronic component, such as embodiments of the present invention, and a back encapsulation layer (eg, EVA, polyolefin, or another suitable capsule) Encapsulating material) and a suitable protective backsheet (eg, Tedlar or another suitable protective substrate). In addition, at least one remote access module switch (RAMS) power electronic circuit (implemented as either a single package monolithic integrated circuit or a multi-component miniature printed circuit board) is embedded in the module stack, It is electrically interconnected and powered by two electrically interconnected solar cell strings (interconnected in electrical series or a hybrid combination of parallel / series) and functions as a remotely controlled module power delivery gate switch. Optionally, the RAMS device can also provide functionality for PV module real-time status monitoring, including but not limited to the actual module power being delivered and the module temperature.

  These and other aspects of the presently disclosed subject matter, as well as additional new features, will be apparent from the description provided herein. The purpose of this summary is not to be an exhaustive description of the claimed subject matter, but to provide a short overview of some of the features of this subject matter. Other systems, methods, features, and advantages provided herein will become apparent to those skilled in the art after review of the following figures and detailed description. All such additional systems, methods, features, and advantages contained herein are intended to be within the scope of all claims.

  The features, nature and advantages of the disclosed subject matter will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference numbers indicate like features.

FIG. 2 is a diagram of a remote access module switch (RAMS) power electronic circuit (which can be implemented as either a single package monolithic integrated circuit or a multi-component printed circuit board) to be embedded within a module stack. FIG. 2 depicts a continuous AC signal, an exemplary modulated signal, and the resulting AC pulse train. FIG. 6 is a level schematic diagram of a RAMS chip having four terminal leads or terminal pads (two input terminals and two output terminals). FIG. 6 illustrates the diversity of such a design using a 4-terminal RAMS chip. FIG. 6 illustrates the diversity of such a design using a 4-terminal RAMS chip. FIG. 6 illustrates the diversity of such a design using a 4-terminal RAMS chip. FIG. 3 is a representative high level functional schematic circuit diagram illustrating a module powered embedded RAMS power electronic circuit embodiment. FIG. 6 is a level schematic diagram of a RAMS chip having six terminal leads or terminal pads for connection to a plurality of connection points from an interconnect solar cell string. FIG. 2 is a solar module stack using embedded RAMS power electronics. FIG. 6 is a level schematic diagram of a RAMS chip having six terminal leads or terminal pads (including four input terminals and two output terminals). It is a figure of the solar module laminated body which has an embedded electric power electronic circuit. FIG. 2 is a typical high-level functional schematic circuit diagram showing a module-fed embedded RAMS circuit. FIG. 2 is a typical high-level functional schematic circuit diagram showing a module-fed embedded RAMS circuit. FIG. 2 is a representative PV system example using the RAMS embedded module of the present invention in cooperation with a “PV array control and status monitoring system (PACS)”. FIG. 2 is a representative PV system example using the RAMS embedded module of the present invention in cooperation with a “PV array control and status monitoring system (PACS)”. FIG. 2 is a representative PV system example using the RAMS embedded module of the present invention in cooperation with a “PV array control and status monitoring system (PACS)”.

  The following description should not be taken in a limiting sense, but is provided to illustrate the basic principles of the present disclosure. The scope of the present disclosure should be determined with reference to the claims. Illustrative embodiments of the present disclosure are illustrated in the drawings, and like numerals are used to indicate like and corresponding parts of the various drawings.

  Further, while the present disclosure is described with reference to specific embodiments and components such as remote access module switch (RAMS) power electronics controlled by command signals, those skilled in the art will be described herein. Could be applied to other components and circuits (such as control switches using embedded memory or wireless control), techniques, and / or embodiments without undue experimentation.

  This application increases module handling safety, solves the fabrication and reliability challenges associated with known solar module control systems, and provides powerful anti-theft and optional module status monitoring functions Provide solutions for effective and efficient control of solar module power output. In addition to remotely controlled module on / off switching, the robust solar module system of the present application also includes a plurality of PV module stacks (each with embedded RAMS power electronics, each optionally having a unique module identifier). Module identification within a module array or solar system including theft deterrence through anti-theft functions, real-time module status monitoring and updating (such as module stack or RAMS circuit temperature and module power delivery), PV Surge and electrostatic discharge (ESD) prevention for module power control components (RAMS circuits) and solar cells in the module stack can be provided. In addition, the electrical components of the disclosed system can be implemented as low cost, minimal impact components and can be powered by the module itself (ie self-existing without the need for an external power supply). Powered RAMS power electronic circuit).

  In general, a solar cell module (or photovoltaic module laminate) is a plurality disposed between front and back encapsulation / laminate layers (eg, EVA, polyolefin, or another suitable encapsulation material). Including solar cells. Other layers are, among others, rigid light transmissive glass layers (for modules with rigid glass covers) or flexible lightweight light transmissive cover layers (such as ETFE or FPE between transmissive front covers and solar cells). A front protective cover (such as a fluoropolymer cover sheet) and a back protective layer (between the solar cell and the back protective layer). PV module laminates can be flexible (and / or lightweight) or rigid (generally with a glass cover) laminate structure, can be framed or frameless, building-integrated solar It can be modified for various applications such as photovoltaic (BIPV).

  The solar module power control system of the present application can be embedded in a module stack to enable gating and control of module power output (ie, enabling or disabling module power delivery outside the module stack) Utilizes at least one remote access module control switch (RAMS) circuit that functions as a power gate or power switch (in other words, a remote controlled module level bypass switch and controller in accordance with embodiments of the present invention) to the active module. In the primary embodiment of the present invention, the remotely controlled RAMS switch is a bypass switch that internally shorts the module power lead (and thus loops the module current internally) when module power delivery is turned off. The remotely controlled RAMS bypass switch is in the open position (not shorting the module leads) when module power delivery is turned on. For example, the RAMS can be either a single package monolithic CMOS chip with a bypass switch design or a multi-component printed circuit board (PCB) with a bypass switch design embedded in a module stack. One RAMS circuit can be embedded for each photovoltaic (PV) module and positioned within the module encapsulation material, and the power output of the module flows through this RAMS circuit. Alternatively, a plurality of RAMS power electronic circuits (e.g., three electrical interconnect solar cell substrings in a module stack) each connected to a series or array of parallel series hybrid solar cells. Three associated RAMS circuits) can be embedded in the module stack. The RAMS electronics itself (eg, either a single package monolithic integrated circuit or a multi-component PCB) is placed and attached to the electrical interconnect solar cell string using various mechanisms (eg, solar cells are interconnected). (If attached to the support back / sometimes mounted on the back having a structure) (eg by soldering and / or conductive adhesive) or near the solar string output electrical leads and / or these It can be placed as a separate component between the leads (either a monolithic integrated circuit or a multi-component PCB) and connected to the electrical interconnect solar string through an electrical bus connection connector in the module stack. Importantly, module power must pass through an embedded RAMS circuit before it can be sent out through the module external output (power delivery to the outside of the module stack is controlled by the remotely controlled RAMS Enabled when power delivery is enabled by opening the bypass switch and not shorting the module current internally).

  The power delivery switch (RAMS power electronics) is embedded in the module stack and is in the module, so when the switch turns off the module and disables power delivery to the outside (ie bypasses the module current internally) If the parallel bypass switch gates when the switch is closed / shorted so that it disables power delivery greater than the RAMS gate, power is confined within the module (ie, module current). Thus, the switch functions as an anti-theft device and there is no external power delivery, so a module containing any external module output lead is safe for handling. In some cases, it relates to a solar cell or solar cell string connected in series with a RAMS switch in order to reduce the loss resulting from the internal module current loop and enable a low footprint low cost implementation of embedded RAMS power electronics. It may be desirable to reduce the current. In such embodiments, each solar cell is comprised of monolithic tiled or monolithic aisle subcells interconnected in electrical series or a hybrid combination of parallel and series to provide increased voltage and reduced current to the solar cells. Is done. As a result, the module current strength is reduced and the module voltage strength is increased, thus allowing the RAMS power electronics circuit to be designed for a reduced current increase voltage configuration. A typical intensity adjustment factor for a monolithic aisle split solar cell used with the RAMS embodiment of the present invention may be in the range of about 4 to 16. For example, a monolithic aisle-divided crystalline silicon solar cell that can generate a peak power of about 5.3 W using a sub-cell interconnection scheme to provide an intensity adjustment factor of 8 has a maximum power cell voltage of about 4.6V. , A maximum power cell current of about 1.16 A can be generated. In such a series connected string of solar cells, the string current is also reduced by an intensity adjustment factor of 8 (eg, corresponding to about 1.16 A), while the string voltage for the series connected string increases by a factor of 8 To do. This configuration can allow low loss, low cost implementation of the RAMS embodiment of the present invention using a small power electronic circuit (monolithic package or PCB) footprint.

  When the RAMS power electronic switch is opened (eg, RAMS is on or allows power delivery), module power is applied to the external module leads and attached to an external load (eg, multiple RAMS embedded modules). A parallel or bypass switch that can be sent to a power inverter unit such as a string inverter or a central inverter), or in series with the module power output so that power is delivered when the series switch is closed. The control switch can be arranged in The advantage of a parallel or bypass switch gate (as compared to a series switch) when the RAMS embedded PV module is in power delivery mode (ie, RAMS has enabled power delivery) is the insertion loss of RAMS power electronics. This is a significant reduction. This reduction is due to the fact that a RAMS with a parallel or bypass switch gate design does not have a closed switch series resistance in the current path (as opposed to a series switch gate). Accordingly, the parallel switch or bypass switch RAMS reduces the insertion loss associated with its use. Other insertion loss factors of the RAMS chip (for both parallel / bypass switch design and series switch design) are additional and / or optional circuit function blocks (such as the function block shown in FIG. 1), and RAMS power. This includes the power consumption of this circuit as it is powered by the module itself. Through the RAMS power electronic design and by minimizing RAMS insertion loss and power consumption, the RAMS power electronic circuit embedded in the module stack (implemented as either a single package monolithic integrated circuit or a multi-component PCB) Insertion loss in module power delivery mode (ie when the RAMS switch gate enables module power delivery) until less than 1% of module power (and in some cases substantially up to «1%) Can be reduced. Low insertion loss is further facilitated when the embedded RAMS embodiment of the present invention is used with a monolithic aisle split (or monolithic tile split) solar cell with reduced current and increased voltage. A method and structure relating to a monolithic aisle split (or monolithic tile split) solar cell having a reduced current and an increased voltage, referred to herein as an i-cell, is disclosed in commonly owned US patent application filed Nov. 5, 2013. 14 / 072,759, which is hereby incorporated by reference in its entirety.

  To further reduce the RAMS cost, the RAMS power electronics circuit is implemented in a single package monolithic integrated circuit such as a single package surface mount technology (SMT) monolithic complementary metal oxide semiconductor (CMOS) chip package. Or alternatively, the RAMS power electronics circuit may include a core monolithic chip, all contained in a package, and a small number of individual components such as capacitors and / or inductors (eg, System-in-package SIP or hybrid SIP, or a system assembled in a small footprint printed circuit board or PCB). For example, complementary metal oxide semiconductors (CMOS), eg, silicon CMOS, power electronics integrated circuits with parallel or bypass switches, have a small footprint (as compared to a series switch), a small thickness (ie thin), And an inexpensive RAMS monolithic integrated circuit (or alternatively a RAMS PCB) can be provided, which further helps to reduce RAMS chip insertion loss / power dissipation. This reduction is achieved by multiple monolithic aisle divisions (or monolithic tile divisions) each having a reduced current and an increased voltage to significantly reduce the current of the module stack being processed by the RAMS power electronics circuit. This is further possible when used in a module stack containing solar cells.

  The RAMS chip is preferably powered by the PV module and does not require a separate power source. The power consumption of the RAMS power electronics circuit embodiment of the present invention (having a preferred parallel or bypass switch mode) is basically its insertion loss. Thus, the RAMS power electronics circuit starts / starts with the module during sunshine hours when solar power is generated and stops / pauses with the module at night when the cell does not generate power.

  FIG. 1 highlights an exemplary functional building block, a remote access module switch (RAMS) having two input electrical terminals and two output electrical terminals (implemented as either a lead or a pad without leads). 1 is a schematic functional block diagram of a power electronics circuit (implemented as a monolithic integrated circuit, SIP, or multi-component PCB). FIG. For example, the RAMS power electronics package 12 may be sized from about 1 square millimeter to several square millimeters for monolithic integrated circuit implementations for low impact integration as power electronics circuitry embedded in a module stack, or A monolithic CMOS integrated circuit or multi-component SIP with a relatively small footprint, such as a thin package or multi-component PCB, with a footprint ranging from a few square millimeters up to about tens of square millimeters in a SIP package or PCB implementation. It can be a package. A positive input terminal (eg, lead or pad) 14 and a negative input terminal (eg, lead or pad) 16 provide an internal connection to the module electrical bus connection terminal and a positive output terminal (eg, lead or pad). 18 and negative output terminal (eg, lead or pad) 20 are electrical bus connectors to external module terminals (eg, leads). Importantly, the RAMS power electronics functional design shown does not require embedded memory to further reduce footprint and implementation costs. For example, CMOS analog / digital integrated circuits can be implemented with a low footprint and cost without the requirements for embedded memories such as non-volatile memories.

  The functional block 22 includes an AC or AC pulse train detector (eg, in the approximate frequency range from 50 KHz to 1 MHz), a peak detector, a sample and hold circuit 24, a switch drive and module on / off bypass switch 26. Includes remote controlled module on / off switch gate. Optional functions and electronics include a partial string shade management component 28 (eg, at least one bypass switch such as a Schottky barrier diode-SBR) and a module voltage, current and / or power measurement component. 30 (measuring the actual module power being delivered in real time), a module temperature measurement (measured on the RAMS power electronics circuit) component 32, and a unique module identifier or ID (eg, a unique AC power line modulation component 34 (AC power line communication carrier frequency) component that provides module unique module identification information, as well as temperature and power information, and thus, for status monitoring, power and temperature Real-time measurements indicate which modules are related to these real-time measurements. Tagged with a unique identifier), transient voltage suppressor (TVS), electrostatic discharge (ESD) and lightning surge prevention component 36 (RAMS power electronics circuitry, and embedded solar cells and other embedded electronic configurations) Protecting other module components such as elements by shorting transient surges arriving at the module through the module's output electrical terminals). Additional optional functional blocks not shown may include an output voltage regulator that adjusts the module output voltage based on a preset or dynamically determined voltage. The functional blocks, such as components 30 and 32 shown in FIG. 1, may, for example, provide real-time module status measurements by the RAMS power electronics circuit with respect to the generation / delivery of module power and the temperature average value of the RAMS power electronics circuit. Acquisition systems, such as the PV array control and status monitoring system (PACS) described below, can be provided at acceptable intervals on a power line communication (PLC) network or a wireless network (eg, real-time power delivery and Temperature measurements are performed at intervals of approximately a fraction of a second to tens of seconds). Since the RAMS power electronics circuit (monolithic integrated circuit, SIP, or PCB) is embedded in the module stack in the same way as the solar cell itself, the RAMS temperature measurement is a somewhat good representation of the solar cell temperature in the working module. Reflect. Furthermore, since the RAMS power electronics circuit is a pass gate for power delivery of the module, it is possible to perform module voltage and current measurements with some accuracy in real time.

  As described above, the RAMS power electronics circuit has several discrete components that can be implemented as a monolithic integrated circuit (in other words, as a single package IC) (eg, core monolithic chip and capacitor / inductor / Or at least one individual component such as a resistor), or can be implemented as a multi-component printed circuit board (PCB), or any combination thereof. Monolithic IC implementation is most desirable for lowest cost and highest field reliability. Important requirements for RAMS power electronics circuits include circuit footprint and thickness (profile), implementation cost, magnitude of impact, insertion loss, and switching structure. For example, the RAMS power electronics circuit may include a silicon CMOS or BiCMOS (bipolar + CMOS) integrated circuit. CMOS power electronics integrated circuits can be inexpensive compared to other options (compared to multi-component PCB options, etc.) and depending on other requirement factors, dissipating less power be able to. The exemplary RAMS structure disclosed herein is implemented as a multi-component power electronics circuit (such as one configured in a small printed circuit board or PCB) or CMOS that supports analog and digital functions. It is based on a circuit design that can either be monolithic using a power electronics baseline casting process. Further, to reduce costs, the exemplary RAMS structure provided herein can utilize non-volatile memory components (such as flash memory), but does not have a non-volatile memory function. The circuit design. The use of a monolithic aisle split (or monolithic tile split) solar cell with low intensity current and high intensity voltage can further reduce the implementation cost and insertion loss of the RAMS power electronics circuit embodiment of the present invention. .

  The RAMS power electronics circuit provides a power delivery on / off switching gate embedded within the module stack. In one embodiment, the RAMS gate is a toggle switch that utilizes a non-volatile embedded memory. However, in order to reduce the RAMS power electronics circuit footprint and further reduce the additional costs associated with embedded memory, the switch can be commanded dynamically and remotely by a power line communication PLC PC pulse train external to the module. it can. In other words, due to the presence of an external signal such as an AC pulse train on the PV system power line, the RAMS gate switch is commanded to enable module power delivery (or gated by the internal RAMS bypass switch being turned off). Due to the absence of an external signal such as an AC pulse train on the PV system power line, the RAMS switch is commanded to disable module power delivery (or the internal RAMS bypass switch is turned on) The gate switch is turned off. For example, unless the RAMS chip receives a pulse from an external power line (such as an AC pulse train on the power line), the RAMS gate switch is off and remains intact (ie, in a parallel switch gate embodiment, the bypass switch closes the module current). / Short-circuited and power delivery from the module is disabled by the gate switch). Further, when the RAMS power electronics circuit accepts an AC pulse train and as long as the pulse train is accepted, the RAMS gate switch remains on and remains intact (ie, in a parallel switch gate embodiment, the bypass switch is open and the module Power is delivered to the external module leads). Thus, the external signal (AC pulse train on the PV module array power line) functions as a state maintenance command signal for all embedded RAMS power electronics circuits as long as it is present and detected on the power line, and the RAMS gate switch Stays on and stays on (enables module power delivery).

  The command signal generator (eg, AC pulse train generator or AC continuous wave generator) can be a stand-alone component or power inverter (eg, one or more string inverters) for a PV array (eg, string inverter). It can be part of an array control system that can be included. The command signal is an AC power line signal / power line communication PLC (eg, about 10 KHz) having a modulated amplitude at a relatively low frequency and a small duty cycle square wave to transmit an AC pulse packet to the RAMS power electronics circuit. To a maximum of about 10 MHz, and in some cases has a frequency in the range of about 50 KHz to a maximum of about 1 MHz. The frequency of the square wave modulation signal (or the frequency of the AC pulse train) can be selected to be in the range of about 0.05 Hz up to 10 Hz (eg, a frequency of 0.1 Hz modulation). As long as the PV array RAMS circuit detects an AC pulse at least once every X seconds (for a square wave period of T seconds), the PV array module continues to stay and deliver power to the central inverter. X can be selected larger than T for fail-safe redundancy purposes. For example, for T = 10 seconds, X can be selected as a multiple of T, such as X = 30 to 60 seconds. This redundancy level ensures continuous operation and fault tolerance of the PV array even if some pulses are “missed” by the RAMS power electronics detection circuit (eg, due to power line noise). Ensure sex. However, X turns off the PV array in an emergency (eg, a fire disaster or any other electrical safety emergency) within about one minute (or less) (ie, the RAMS gate switch is powered It can be small enough (e.g. not greater than 1 minute) so that delivery can be disabled. Thus, a suitable compromise for PV arrays can be X = 30 seconds (and T = 5 seconds to 10 seconds). PV arrays, for example, operate at somewhat different frequencies, all being recognized by RAMS power electronics circuitry (eg, at frequencies from 1 MHz to 3 MHz, or from 100 KHz to 300 KHz) more than one master AC pulse train An additional redundancy layer can be used by using a generator.

FIG. 2 illustrates a continuous AC signal 40, an exemplary modulation signal 42, and control of RAMS power electronics circuitry embedded in the array module stack (and to enable power delivery from the module to the load). FIG. 6 depicts the resulting AC pulse train 44 that can be transmitted on the PV array power line from the central PACS transmission unit. The continuous AC signal 40 represents a relatively low power / low voltage continuous AC signal (eg, from about 50 KHz to 1 MHz) source prior to modulation. The modulated signal 42 is a relatively small duty cycle (eg, from a fraction of a percent up to about 1.0% at most) used to modify a continuous AC signal into a pulse packet sent to the RAMS power electronics circuit. ) Represents a square wave modulation signal having a low frequency (for example, 0.1 Hz). The AC pulse train 44 is a resulting square wave modulated low power / low voltage AC pulse train that is sent to the RAMS power electronics circuit on the provided PV module line. In other words, the central controller directs the RAMS power electronics circuit to deliver power in a very low frequency square wave with a small duty cycle (eg, AC signal frequency f _RF = 1 MHz, square wave modulation frequency). f _mod = 0.10 Hz, duty cycle D = 1.0%) is transmitted. Conversely, the absence of an AC pulse train shuts down the PV array module (turns on the internal bypass switch of the RAMS power electronics gate switch embedded in the module stack and disables power delivery from such module Implied directive). Thus, the use of non-volatile memory in RAMS provides a high anti-theft function (the module is substantially stopped when removed from the PV array). In other words, as long as the module remains connected to the PV array, an active power line communication (PLC) signal can command the RAMS gate switch to deliver power, but the module is temporarily removed from the PV array. The power delivery by the affected module is disabled due to the internal RAMS gate bypass switch being turned on and internally shorting the module current. In some cases, it may be necessary to short circuit the power delivery from the module during normal operation (eg, when the module is generating power during the day), in which case the PACS unit Can stop transmitting an active pulse train through power line communication (PLC). Our primary embodiment provides a blanket remote module switching function (ie, PACS can turn on and off all modules on the array using a blanket AC pulse train signal), but each module Can make the switching function addressable. In other words, each module on the array can be turned on or off by an addressable command through the PLC (eg, each module has an associated unique AC pulse train, eg, an AC pulse train with a unique frequency) ). In another embodiment, embedded memory can be utilized to turn the RAMS gate switch on / off. However, unless a more complex and expensive RAMS design is utilized, the use of non-volatile memory may reduce the anti-theft feature of active commands (eg, programmed to be in power delivery enabled state) (If / when a module is disconnected from the array while the module is enabled for power delivery by non-volatile memory).

  FIG. 3 is a level schematic of a RAMS power electronics circuit in a single package (such as a monolithic integrated circuit or small PCB) with four terminal leads or terminal pads. The RAMS power electronics circuit of the present disclosure can utilize surface mount technology or be connected to the internal module output terminal and the external module output terminal through a bus connection connector. The monolithic RAMS power electronics circuit of FIG. 3 includes a positive module output terminal L1 and a negative module output terminal L2, a positive RAMS input terminal L3 and a negative RAMS input terminal L4 (L3 and L4 are RAMS power electronics circuits). Internal module output connected to Specifically and preferably, the RAMS power electronics circuit of FIG. 3 has at least three (one in common) or four I / O terminals (leads) designed to include both high and low voltage modules. Or an SMT (surface mount technology) package with a thin package (eg <2 mm, preferably <1 mm). In other words, RAMS power electronics circuits can be designed to operate at low voltage and high current and vice versa. As described above, RAMS power electronics circuit embodiments include monolithic integrated circuit packages (eg, CMOS ICs without any external discrete components), system-in-package (SIP), core monolithic components and discrete components. It can be implemented as a hybrid package, or as a multi-component PCB. Preferably, the RAMS power electronics circuit embodiment of the present invention reduces the final implementation cost (in some cases, reduces the mass production cost to less than about US $ 1 per RAMS chip per PV module). Therefore, it can be implemented as a CMOS IC fabricated using a medium / high voltage baseline CMOS fabrication process.

  The embedded module power control system of the present application provides a single RAMS chip per module or multiple RAMS chips per module (eg, one per interconnect cell substring having at least two solar cell substrings in the module stack). It is important to note that two RAMS chips) can be utilized. Further, the RAMS power electronics circuit itself can have a variable number of input terminals and output terminals (having either a symmetric or asymmetric input / output terminal structure). Accordingly, the connection structure from the internal module to the RAMS circuit can be designed and optimized in different combinations.

  FIGS. 4-6 illustrate such design diversity (with different voltage constraints depending on cell / array requirements) using a 4-terminal RAMS chip.

  FIG. 4 is a diagram of a representative solar module stack including 20 series connected solar cells and embedded low voltage 4-lead RAMS power electronics circuit package (eg, monolithic RAMS IC or PCB). A 20 cell module will typically produce a low voltage (compared to a 20 cell module), and embedded low cost RAMS electronics designs can be applied to any number of modules that have only a low module voltage up to about 100V. Can work with PV modules including solar cells.

  FIG. 5 shows three sets of 20 series connected solar cells each with embedded RAMS power electronics (eg, monolithic RAMS IC or SIP) like that shown in FIG. 4 (60 cells total) It is a figure of the typical solar cell laminated body containing. As shown in FIG. 5, the RAMS outputs are connected in series to provide two external module leads (one positive and one negative). Alternatively, each RAMS power electronics circuit can provide positive and negative external module leads (ie, provide a total of six module leads applied to the module of FIG. 5). The voltage constraints of the RAMS of FIGS. 4 and 5 can be modified depending on other requirements such as module structure, cost, and insertion loss of various components.

  FIG. 6 is a diagram of a solar module stack including 60 series connected solar cells and a high voltage 4-lead RAMS electronics package (eg, monolithic RAMS IC, SIP, or PCB). A 60 cell module will typically produce a higher voltage (compared to a 20 cell module), and embedded RAMS power electronics circuit design with any number of cells having a module voltage up to 100 volts. Can function. These voltages are typical for modules including monolithic aisle split (or monolithic tile split) solar cells with low current strength and high voltage strength. The weak current of the solar cell and the resulting cell string and module provides a RAMS electronics circuit design for the weak current (depending on the current / voltage strength adjustment factor), and thus a low RAMS footprint, insertion loss, and Provide cost.

  In addition to various modular connection designs (60 cell full series connection or 60 cell parallel hybrid connection shown in FIG. 5), embedded RAMS electronics voltage to provide higher PV system efficiency and lower RAMS implementation cost. And solar cell structures and designs that modify current constraints can be used.

FIG. 7 shows a module feed type having two internal module leads (L ₃ and L ₄ connected internal module leads P ₀ connected to the internal module terminal P ₃ ) and two output terminals (L ₁ and L ₂ ). 2 is a representative high level functional schematic circuit diagram illustrating an embedded RAMS power electronics circuit 50. FIG. The circuit of FIG. 7 can function as a representative circuit of the RAMS power electronics circuit shown in FIGS. The circuit diagram of FIG. 7 shows the core switch gate MOS transistor T1 driven by the switch drive CMOS transistor T2 / T3 (when the output level of the drive T2 / T3 is high, T1 is on and the module current is short-circuited to When power delivery is disabled, T1 is off and module power is delivered to the load in the PV array when a pulse train is delivered and detected by the RAMS circuit, as well as an optional function block TVS (transient voltage Suppressor) and partial string bypass diode D4. The CMOS circuit of FIG. 7 can be designed for modules with relatively low voltages (e.g., up to about 100 V) and shows typical module voltages. In the illustrated example, T1 is a relatively high voltage MOS transistor, such as an NMOS transistor switch, and most of the other circuit components are relatively low voltage internal pulse detection and gate switch control circuits. The illustrated AC pulse detector may be an RF power detector (shown as RF2DC). A description of the functions of the circuit diagrams shown in FIGS. 7, 12, and 13 is provided in Table 1 below.

(Table 1)
Table 1. Description of components in FIGS. 7, 12, and 13

  FIG. 8 is a level schematic diagram of a RAMS chip having six terminals (eg, leads or pads). The disclosed RAMS chip can utilize surface mount technology for direct mounting on the back surface or can be connected to the inputs and outputs of the module electrical bus connection through bus connection connectors. The monolithic RAMS power electronics circuit of FIG. 8 has two positive RAMS output L1 terminals (which can be connected together before module power external delivery) and a negative RAMS output L2, a positive RAMS input L3, and a negative RAMS inputs L4 and L5. In other words, the RAMS power electronics circuit of FIG. 8 is shown as having three output leads for symmetry purposes (shown as having a redundant lead output terminal L1), but in another embodiment, The positive L1 output lead can be connected internally. Specifically, the RAMS power electronics circuit of FIG. 8 is thin (eg, <1 mm) with 5 or 6 I / O pads designed to accommodate both high and low voltage modules. It can be an SMT (surface mount technology) IC. In other words, the RAMS power electronics circuit can be designed to operate at low voltage and high current and vice versa. In one case, L4 and L5 can be connected towards the low voltage module lead. As described above, the RAMS chip implementation can be implemented as monolithic (no external discrete components), system-in-package (SIP), or multi-component PCB. Monolithic implementation is performed using CMOS IC manufacturing processes for high performance, low insertion loss, and low cost.

  9 is a diagram of a solar module stack including 60 series connected solar cells and a 6-lead RAMS power electronics package (eg, monolithic RAMS IC, SIP, or PCB) such as that shown in FIG. is there. A 60 cell module will typically produce a higher voltage (compared to a 20 cell module), and embedded RAMS electronics designs include any number of cells with module voltages up to several hundred volts. Can be designed to work with PV modules (especially monolithic aisle partitioning or monolithic, for example, having increased voltage and reduced current, resulting in lower system level losses and enabling low cost RAMS implementations) When using tiled solar cells).

  FIG. 10 is a level schematic of a RAMS power electronics circuit (eg, either monolithic package, SIP, or PCB) having six terminals (eg, leads or pads). The RAMS power electronics circuit of the present disclosure can be internally connected to embedded solar cells in the module using electrical bus connectors to the input and output terminals on the RAMS circuit package. The RAMS power electronics circuit of FIG. 10 (eg, monolithic IC, SIP, or PCB package) has a positive RAMS output L1 (corresponding to a positive module output terminal) and a negative RAMS output L2 (negative module output terminal). ) And positive RAMS inputs L3 and L5 (from the electrical interconnect solar cell string) and negative RAMS inputs L4 and L6 (from the electrical interconnect solar cell string). In other words, the RAMS chip of FIG. 10 has an asymmetric lead design with two output leads and four input leads. Of course, the same RAMS power electronics circuit package with six terminals (eg, monolithic IC, SIP, or PCB package) is positioned on the package to have a different terminal arrangement (either as a pad or lead). can do. Specifically, the RAMS power electronics circuit of FIG. 10 is designed to include both high and low voltage modules (eg, having a module string voltage in the voltage range from tens to hundreds of volts). A thin (eg, <2 mm, preferably <1 mm) package with six I / O terminals arranged as pads or leads. In other words, RAMS power electronics circuits operate at low voltage and high current, and vice versa (ie high voltage with monolithic aisle split or monolithic tile split solar cells with reduced current and increased voltage, etc.) (With low current) can be designed. As described above, RAMS power electronics circuits can handle monolithic integrated circuits (ie, without any additional discrete components), system-in-package (SIP), or desirable voltage and current ranges. It can be implemented as a hybrid package (e.g., packaged in a PCB) having a core monolithic IC fabricated using possible CMOS IC process technology and additional individual components.

  FIG. 11 is a solar module stack comprising 60 series connected solar cells and an embedded high voltage 6 terminal RAMS power electronics circuit package (eg, monolithic RAMS, SIP, or PCB) such as that shown in FIG. FIG. The relative dimensions of the module, solar cell, and RAMS power electronics circuit package are not shown to scale. A 60 cell module with series connected solar cells will generally produce a higher voltage compared to a module with a smaller number of solar cells connected in series (eg, compared to a 20 cell module). Embedded RAMS power electronics circuit designs can work with PV modules containing any number of cells having module voltages from tens of volts up to several hundred volts.

12, four internal module terminals (internal module leads P ₃ to the connected RAMS of L _3, the internal module leads P ₂ to the connected RAMS of L _4, L of RAMS connected to the internal module leads P _{1 5} and the RAMS L ₆ connected to the internal module lead P ₀ ), and two output external module terminals (L ₁ and L ₂ ) from the RAMS power electronics circuit, and a module-fed embedded RAMS power electronics 2 is a representative high-level functional schematic circuit diagram showing an instrument circuit 52. FIG. The circuit of FIG. 12 can function as a representative circuit of the RAMS power electronics circuit shown in FIGS. The embedded RAMS power electronics circuit 52 can be used for high voltages (eg, higher than 100V, eg, module voltages up to several hundred volts). The circuit diagram of FIG. 12 shows that the core switch gate MOS transistor T1 driven by the switch drive CMOS transistor T2 / T3 (when the output of the CMOS drive T2 / T3 is high, the MOS switch T1 is on and the module current is internally transmitted. When shorted, thus disabling module power delivery through the RAMS gate switch and the pulse train is sent out and detected, the MOS switch T1 is off, thus enabling module power delivery through the RAMS switch gate, Module power is delivered to the load), and includes optional functional block TVS (transient voltage suppressor) and partial string bypass diodes D4, D5, D6. The illustrated AC pulse detector may be an RF power detector (shown as RF2DC). A description of the functions of the circuit diagrams shown in FIGS. 7, 12, and 13 is provided in Table 1 above.

FIG. 13 shows four internal module leads (L _{3 of} RAMS connected to internal module lead P ₃ , L _{4 of} RAMS connected to internal module lead P ₂ , L of RAMS connected to internal module lead P _{1. 5,} and the L ₆₎ of the connected RAMS inside module leads P _0, 2 two output leads (L ₁ and L ₂ of the RAMS) and a representative showing the RAMS power electronics 54 embedding module powered with a It is a high-level functional schematic circuit diagram. A description of the functions of the circuit diagrams shown in FIGS. 7, 12, and 13 is provided in Table 1 above.

  As described above, the RAMS gate switch of the present application is an AC pulse train that is sent through a module external power line (eg, PV module array power line using power line communication or PLC) by a PV array control and status monitoring (PACS) system. Command signals that can be used. For example, AC pulse trains have programmable functions and waveform designs, sine wave generation with desired power / voltage output (eg, from about 50 KHz to 1 MHz), low frequency / low duty cycle square wave amplitude modulation (AM) functions, Commercially available with some or all of the functions of a remote control function (such as LAN-enabled remote function control) and / or a programmable waveform editor (such as Agilent IntuLink arbitrary waveform software) to generate the desired waveform Can be generated and transmitted by a programmable signal generator. Remote control LAN enabled signal generators may utilize an uninterruptible power supply (UPS: charged with power from the grid and / or central inverter during normal operation) to ensure sufficient reserve power it can. Furthermore, a single signal generator can be used to control the entire PV array provided, or multiple signal generators can be used to control multiple sections of the PV array.

  Utilizing the embedded RAMS circuit of the present application in combination with a PV array control and status monitoring (PACS) system (and associated maximum power point tracking or MPPT functionality at the module string level) to structure various PV system configurations can do. For example, FIG. 14 shows a typical PV system having 12 solar cell modules (eg, 60 cell modules each having a peak power of at least 300 W) utilizing embedded RAMS and central / remote PACS functionality. . The exemplary PV system shown utilizes three series connected maximum voltage modules per inverter input (ie, a 4-input string inverter). The AC inverter includes PACS functions for RAMS control and data acquisition (eg, power and temperature measurements from PV array modules by embedded RAMS power electronics circuitry), and 120/120 It is a multi-input single-phase (or three-phase) string inverter of about 4 KW that sends out single-phase AC of 240V. Module connections can be configured in many configurations. In this configuration, the exemplary module has reduced current and increased voltage (with an intensity adjustment factor of 8 providing a solar cell with an open circuit voltage higher than 5V and a short circuit current higher than 1.2A). It has monolithic aisle split (or tile split) solar cells. Each branch of the string inverter input (each with MPPT function at the string inverter input) corresponds to power from three series connected solar modules (maximum voltage of about 1,000V in each three module branch for 1KV PV system equipment) Accept). As another representative example, FIG. 15 shows a PV system having two series-connected branches, each having six series-connected solar cell modules (eg, 60 cell modules) that utilize RAMS and PACS functions. In this example, the module has an increased voltage and reduced current (but in this case provides a solar cell with an open circuit voltage higher than 2.5V and a short circuit current higher than 2.4A as a result. Manufactured using monolithic aisle split (or tile split) solar cells (with an intensity adjustment factor of 4). As a result, each 60 cell module in this example has an open circuit voltage higher than 150V. Each branch of the string inverter input (with MPPT function at each string inverter input) corresponds to power from six series connected solar modules (maximum voltage of about 1,000V in each 6 module branch for 1KV PV system equipment) Accept). The illustrated PV system utilizes six series connected (half) voltage modules per inverter input (ie, a two-input string inverter with each input having its own dedicated MPPT function for the branch). The AC inverter in this representative example includes a PACS function for RAMS control and data acquisition, and a multi-input single-phase power (about 4 KW) that sends 120/240 V single-phase AC to an AC load such as a transmission network ( Or a three-phase) string inverter. In yet another embodiment, the PV system can utilize a central inverter with a central MPPT function, as well as a separate PACS circuit unit, as shown in FIG. In this representative example, the PV module array is configured as a plurality of parallel branches, each with series-connected solar modules to boost the maximum branch voltage to the desired installed PV system maximum allowable voltage, so the central inverter is Connected to the module array. It should be understood from the provided PV system diagrams that the module control system and associated AC pulse train generator can be implemented in many configurations.

  In an alternative embodiment, the RAMS gate switch of the present application may utilize an embedded non-volatile memory to gate power delivery from the module and / or be activated through a wireless command signal (instead of a PLC). it can.

  The disclosed system and method provides a reliable and cost effective modular power control system. The above description of exemplary embodiments is provided to enable any person skilled in the art to make or use the claimed subject matter. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without using innovative capabilities. That is, the claimed subject matter is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

L ₁ and L ₂ output external module terminals L ₃ and L ₆ internal module terminals P ₀ and P ₃ internal module leads

Claims (42)

A photovoltaic module laminate for power generation,
A plurality of solar cells electrically interconnected to form at least one string of solar cells embedded in the module stack and electrically interconnected in the module stack;
At least one remote access module switch (RAMS) embedded in the module stack, electrically interconnected to and powered by the at least one electrical interconnect solar cell string, and functioning as a remotely controlled module power delivery gate switch Power electronics,
The module laminated body characterized by including.   2. A lightweight module laminate comprising a stack of a front lightweight light transmissive cover layer, an upper encapsulating layer, the plurality of solar cells, a bottom encapsulating layer, and a back protective layer. A photovoltaic power generation module laminate as described in 1.   It is a flexible lightweight module laminated body, The solar power generation module laminated body of Claim 2 characterized by the above-mentioned.   A building-integrated photovoltaic (BIPV) module stack including a stack of a front lightweight light-transmitting cover layer, an upper encapsulation layer, the plurality of solar cells, a bottom encapsulation layer, and a back protection layer The photovoltaic power generation module laminate according to claim 1.   5. The photovoltaic module laminate according to claim 4, wherein the building-integrated photovoltaic (BIPV) module laminate is a flexible lightweight module laminate.   The rigid module laminate including a stack of a front light-transmitting cover glass, a top encapsulation layer, the plurality of solar cells, a bottom encapsulation layer, and a back protective layer. The solar photovoltaic module laminated body of description.   It is a module laminated body without a frame, The photovoltaic power generation module laminated body of Claim 6 characterized by the above-mentioned.   The plurality of solar cells are monolithic aisle split solar cells (i-cells), each of which is electrically interconnected to provide power to the solar cell with a combination of increased voltage and reduced current. The solar power generation module laminate according to claim 1, comprising a plurality of subcells.   The at least one remote access module switch (RAMS) power electronic circuit is turned on to enable delivery of module power when receiving a power line communication (PLC) command signal and a power line communication (PLC) command The photovoltaic module stack according to claim 1, wherein the photovoltaic power module stack is a normally-off gate switch that is turned off to prevent transmission of module power in the absence of a signal.   The at least one remote access module switch (RAMS) power electronic circuit is turned on to enable delivery of module power when receiving a wireless command signal and delivering module power in the absence of a wireless command signal The photovoltaic power module stack according to claim 1, wherein the photovoltaic power module stack is a normally-off gate switch that is turned off so as to prevent light.   The photovoltaic module stack of claim 1, wherein the remote access module switch (RAMS) power electronic circuit is a semiconductor integrated circuit.   The photovoltaic module stack of claim 11, wherein the remote access module switch (RAMS) power electronic circuit is a monolithic silicon CMOS integrated circuit.   The photovoltaic module stack of claim 1, wherein the remote access module switch (RAMS) power electronic circuit is powered by the electrical interconnect solar cell string. The remote access module switch (RAMS) power electronic circuit internally shorts the electrical interconnect solar cell string by closing a semiconductor bypass switch and turns off module power delivery by bypassing it,
The remote access module switch (RAMS) power electronic circuit turns on module power delivery when receiving a remote control command to open the semiconductor bypass switch;
The photovoltaic power generation module laminate according to claim 1.   The photovoltaic module stack of claim 1, wherein the electrical interconnect solar cell string in a module stack includes solar cells connected in electrical series.   The solar of claim 1, wherein the electrically interconnected solar cell strings in a module stack include solar cells connected in a hybrid combination of electrical series connections of subgroups of electrically parallel connected solar cells. Photovoltaic module laminate.   The remote access module switch (RAMS) power electronic circuit is a circuit for real time measurement of power generated by the electrical interconnect solar cell string and passing through the remote controlled module power delivery gate switch The solar power generation module laminate according to claim 1, further comprising:   The real time measurement of the power to the remote access module switch (RAMS) power electronics to a PV module array control and status monitoring system associated with and in electrical communication with the remote access module switch (RAMS) power electronics The photovoltaic module stack according to claim 17, further comprising a circuit for transmitting the value.   The photovoltaic power generation of claim 1, wherein the remote access module switch (RAMS) power electronic circuit further comprises a circuit for real-time temperature measurement corresponding to the operating temperature of the photovoltaic module stack. Module laminate.   The remote access module switch (RAMS) power electronic circuit transmits the real-time temperature measurement to a PV module array control and status monitoring system associated with and in electrical communication with the remote access module switch (RAMS) power electronic circuit. The photovoltaic module laminate according to claim 19, further comprising a circuit for transmitting. The remote access module switch (RAMS) power electronic circuit further includes circuitry for uniquely identifying a photovoltaic module stack that includes the embedded remote access module switch (RAMS) power electronic circuit,
The remote access module switch (RAMS) power electronic circuit further includes circuitry for transmitting the real time measurement of the power and transmitting the unique identification of the photovoltaic module stack.
The photovoltaic power generation module laminate according to claim 18. The remote access module switch (RAMS) power electronic circuit further includes circuitry for uniquely identifying a photovoltaic module stack that includes the embedded remote access module switch (RAMS) power electronic circuit,
The remote access module switch (RAMS) power electronic circuit further includes a circuit for transmitting the real-time temperature measurement and transmitting the unique identification result of the photovoltaic module stack.
The photovoltaic power generation module laminate according to claim 20, wherein A plurality of electrically interconnected photovoltaic module stacks, each of the module stacks being
A plurality of solar cells electrically interconnected to form at least one string of solar cells embedded in the module stack and electrically interconnected in the module stack;
At least one remote access module switch (RAMS) embedded in the module stack and electrically interconnected to and powered by the at least one electrical interconnect solar cell string and functioning as a remotely controlled module power delivery gate switch ) Power electronics,
The photovoltaic module laminate including:
A PV module array control system capable of communicating with the remote access module switch (RAMS) power electronics in the plurality of electrically interconnected photovoltaic module stacks;
A photovoltaic power generation system characterized by including:   The PV module array control system enables power delivery from the plurality of electrical interconnect photovoltaic module stacks by communicating an enable signal to the remote access module switch (RAMS) power electronics. The photovoltaic power generation system according to claim 23, wherein   25. The photovoltaic system of claim 24, wherein the enabling signal comprises an alternating frequency (AC) pulse train.   The PV module array control system disables power delivery from the plurality of electrical interconnect photovoltaic module stacks by communicating a disable signal to the remote access module switch (RAMS) power electronics. The photovoltaic power generation system according to claim 23, wherein   27. The photovoltaic system of claim 26, wherein the invalidation signal corresponds to the absence of an alternating frequency (AC) pulse train.   Communication of the PV module array control system with the remote access module switch (RAMS) power electronics in the plurality of electrical interconnect photovoltaic module stacks is based on power line communication (PLC). The photovoltaic power generation system according to claim 23.   24. Communication of the PV module array control system with the remote access module switch (RAMS) power electronics in the plurality of electrical interconnect photovoltaic module stacks is based on wireless communications. The photovoltaic power generation system described in 1.   The PV module array control system further includes a status monitoring system capable of communicating with the remote access module switch (RAMS) power electronics within the plurality of electrical interconnect photovoltaic module stacks. Item 24. The photovoltaic power generation system according to Item 23.   The PV module array status monitoring system collects real-time status measurements from the plurality of electrical interconnect photovoltaic module stacks by receiving status measurements from the remote access module switch (RAMS) power electronics The photovoltaic power generation system according to claim 30, wherein:   The solar power generation system according to claim 31, wherein the status measurement values include power measurement values corresponding to the plurality of electrical interconnection solar power generation module stacks.   The solar power generation system according to claim 31, wherein the status measurement value includes a temperature measurement value corresponding to the plurality of electrical interconnection solar power generation module stacks.   The solar light of claim 1, wherein the plurality of solar cells embedded in the module stack further comprises a plurality of embedded bypass switches for distributed shade management for enhanced module power harvesting. Power generation module laminate.   35. The photovoltaic module stack according to claim 34, wherein the plurality of embedded bypass switches for distributed shade management include individual bypass switches electrically attached to the plurality of solar cells.   35. The photovoltaic module stack of claim 34, wherein the plurality of embedded bypass switches for distributed shade management include monolithic integrated bypass switches associated with the plurality of solar cells.   The plurality of embedded bypass switches for distributed shade management includes a combination of individual bypass switches electrically attached to the plurality of solar cells and a plurality of monolithic integrated bypass switches associated with the plurality of solar cells. The photovoltaic power generation module laminate according to claim 34, wherein:   The plurality of solar cells embedded in a module stack further comprises a plurality of embedded maximum power point tracking (MPPT) power optimizers for enhanced module power harvesting. Solar power module stack.   The plurality of solar cells embedded in the module stack are equipped with a plurality of embedded bypass switches and a plurality of embedded maximum power point tracking (MPPT) power optimizers for distributed shade management for enhanced module power harvesting. The photovoltaic power module laminated body according to claim 1, further comprising:   40. The solar light of claim 39, wherein the plurality of solar cells embedded in a module stack further comprises a plurality of embedded bypass switches for distributed shade management for enhanced module power harvesting. Power generation module laminate.   The photovoltaic power generation system of claim 23, further comprising a power inverter for converting power from DC to AC.   The photovoltaic power generation system of claim 41, wherein the power inverter and the PV module array control system are combined with each other as an integrated electronic system.