JP2016502333A - Port isolation in shared transformers - Google Patents

Abstract

A technique for improving the performance of a shared transformer among multiple modes of operation. In an aspect, the first and second primary windings of the transformer are coupled to an AC ground voltage. The primary winding is coupled to the secondary winding of the transformer. For example, when operating in the first mode, a switch that couples the second primary winding to the common reference voltage is opened to deactivate the second primary winding. Similarly, for example when operating in the second mode, if it is desired to deactivate the first primary winding, the switch that couples the first primary winding to the common reference voltage is opened. In this way, the inactive primary winding advantageously does not load the secondary winding. Further aspects provide, for example, alternative techniques for extending the technique to more than one mode and coupling signals from the primary winding to the secondary winding. [Selection] Figure 6

Description

Claiming priority under 35 USC 119

  [0001] This patent application claims priority from US Provisional Patent Application No. 61 / 728,174, filed November 19, 2012, entitled "Port isolation with shared transformer" And is expressly incorporated herein by reference.

  [0002] The disclosure relates to transformers for electronic circuits.

  [0003] Wireless transceivers typically incorporate circuitry for operating in multiple modes. For example, a radio frequency (RF) receiver includes a first low noise amplifier (LNA) for receiving a first frequency band and a second low noise amplifier for receiving a second frequency band. May be included. Each of the outputs of the LNA drives an inductive load, eg, a first and second primary winding, respectively, of the transformer, and the inductive load can further be coupled to the secondary winding of the transformer. The secondary winding can generate a differential signal for further processing by a down-conversion mixer, which can be shared between the two frequency bands.

  [0004] In a typical implementation, if only one frequency band is processed at a time, the first LNA may be active when the second LNA is inactive. Even when the second LNA is inactive, however, the second primary winding is still (magnetically) coupled to the secondary winding of the transformer. This mutual coupling may add noise and / or undesirably attenuate signal coupling between the first primary and secondary windings when the first LNA is active. A similar phenomenon occurs when the second LNA is active and the first LNA is inactive. The additional attenuation and noise caused by these effects degrades the performance of multiband multiband transceivers.

  [0005] It would be desirable to provide a technique for improving the performance of a transformer that accommodates multiple modes within a wireless transceiver.

FIG. 2 illustrates a block diagram of a prior art wireless communication device design in which the techniques of this disclosure may be implemented. Fig. 4 illustrates a receiver implementation for processing received signals in two separate frequency bands utilizing two separate transformers. Fig. 6 illustrates an alternative implementation of a receiver incorporating a multi-port transformer. Fig. 6 illustrates an alternative exemplary embodiment of a receiver incorporating a multi-port transformer. 2 illustrates an exemplary embodiment of a receiver according to the present disclosure. 4 illustrates an alternative exemplary embodiment of a receiver according to the present disclosure. Fig. 4 illustrates an alternative exemplary embodiment according to the present disclosure. The techniques disclosed herein, which illustrate alternative exemplary embodiments of the present disclosure, apply to a transmitter. Illustrating alternative exemplary embodiments of the present disclosure, a generic technique is shown herein to accommodate multiple modes using a single shared circuit. 1 illustrates an exemplary embodiment of a method according to the present disclosure. The techniques described herein, which illustrate alternative exemplary embodiments of the present disclosure, are further applied to single-ended to differential signal conversion scenarios within a receiver. The techniques described herein, which illustrate alternative exemplary embodiments of the present disclosure, are further applied to single-ended to differential signal conversion scenarios within a receiver. The techniques described herein, which illustrate alternative exemplary embodiments of the present disclosure, are further applied to single-ended to differential signal conversion scenarios within a receiver. The techniques described herein, which illustrate alternative exemplary embodiments of the present disclosure, are further applied to single-ended to differential signal conversion scenarios within a receiver. The techniques described herein, which illustrate alternative exemplary embodiments of the present disclosure, are further applied to single-ended to differential signal conversion scenarios within a receiver. FIG. 6 illustrates an alternative exemplary embodiment of the present disclosure for single-ended to differential conversion within a receiver. Illustrating an alternative exemplary embodiment of the present disclosure, where the transformer and switch configuration of FIG. 15 is utilized between the down-conversion mixer and LNA of the receiver. The techniques disclosed herein herein are applied to the transmitter, illustrating alternative exemplary embodiments of the present disclosure.

  [0020] Various aspects of the disclosure are described more fully hereinafter with reference to the accompanying drawings. The present disclosure, however, can be embodied in many different forms and should not be construed as limited to any particular configuration or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein, one of ordinary skill in the art will appreciate that the scope of the disclosure is disclosed herein, whether implemented independently or in combination with any other aspect of the disclosure. It should be understood that it is intended to cover any aspect of. For example, an apparatus may be implemented or a method may be implemented using any number of aspects described herein. In addition, the scope of the disclosure may be realized using other structures, functionality, or structures and functionality in addition to, or otherwise, various aspects of the disclosure described herein. It is intended to cover an apparatus or method. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.

  [0021] The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of the invention and is intended to represent the only exemplary embodiments in which the invention can be implemented. Not. The term “exemplary” as used throughout this specification means “serving as an example, instance, or illustration” and is not necessarily preferred or advantageous over other exemplary aspects. Should not be construed. The detailed description includes specific details for the purpose of providing a thorough understanding of the exemplary aspects of the invention. It will be apparent to those skilled in the art that the exemplary aspects of the invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the novelty of the exemplary aspects presented herein. In this specification and in the claims, the terms “module” and “block” may be used interchangeably to refer to an entity configured to perform the operations described.

  [0022] FIG. 1 illustrates a block diagram of a design of a prior art wireless communication device 100 in which the techniques of this disclosure may be implemented. FIG. 1 presents an illustrative transceiver design. In general, the conditioning of signals in the transmitter and receiver may be performed by one or more stages of amplifiers, filters, upconverters, downconverters, etc. These circuit blocks may be arranged differently from the configuration presented in FIG. In addition, other circuit blocks not presented in FIG. 1 can also be used to condition signals in the transmitter and receiver. Unless otherwise stated, any signal in FIG. 1, or any other diagram in the drawing, can be either single-ended or differential. Some circuit blocks in FIG. 1 may also be omitted.

  [0023] In the design presented in FIG. 1, the wireless device 100 includes a transceiver 120 and a data processor 110. Data processor 110 may include memory (not shown) for storing data and program code. The transceiver 120 includes a transmitter 130 and a receiver 150 that support bi-directional communication. In general, the wireless device 100 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. All or a portion of transceiver 120 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed signal ICs, etc.

  [0024] The transmitter or receiver may be implemented using a superheterodyne architecture or a direct conversion architecture. In a superheterodyne architecture, the signal is between radio frequency (RF) and baseband in multiple stages, for example from RF to intermediate frequency (IF) in one stage and then in another stage for the receiver. Frequency conversion from IF to baseband. In a direct conversion architecture, the signal is frequency converted between RF and baseband in one stage. Superheterodyne and direct conversion architectures may use different circuit blocks and / or have different requirements. In the design presented in FIG. 1, transmitter 130 and receiver 150 are implemented using a direct conversion architecture.

  [0025] In the transmit path, the data processor 110 processes the data to be transmitted and provides I and Q analog output signals to the transmitter 130. In the exemplary embodiment presented, data processor 110 converts digital signals generated by data processor 110 into I and Q analog output signals, eg, I and Q output currents, for further processing. Digital-to-analog converters (DACs) 114a and 114b are included.

  [0026] Within transmitter 130, low pass filters 132a and 132b filter the I and Q analog output signals, respectively, to remove unwanted images caused by previous digital-to-analog conversions. Amplifiers (Amp) 134a and 134b amplify the signals from low pass filters 132a and 132b, respectively, and provide I and Q baseband signals. Upconverter 140 uses the I and Q TX LO signals from transmit (TX) local oscillator (LO) signal generator 190 to upconvert I and Q baseband signals and provide an upconverted signal. Filter 142 filters the upconverted signal to remove noise in the received frequency band as well as unwanted images caused by frequency upconversion. A power amplifier (PA) 144 obtains the desired output power level and amplifies the signal from the filter 142 to provide a transmit RF signal. The transmit RF signal is sent through a duplexer or switch 146 and transmitted via an antenna 148.

  [0027] In the receive path, antenna 148 receives the signal transmitted by the base station and provides a received RF signal that is routed through a duplexer or switch 146 and fed to a low noise amplifier (LNA) 152. The The duplexer 146 is designed to operate with a specific RX to TX duplexer frequency separation so that the RX signal is isolated from the TX signal. The received RF signal is amplified by LNA 152 and filtered by filter 154 to obtain the desired RF input signal. Downconversion mixers 161a and 161b mix the output of filter 154 with the I and Q RX LO signals (ie, LO_I and LO_Q) from receive (RX) LO signal generator 180 to generate I and Q baseband signals. To do. The I and Q baseband signals are amplified by amplifiers 162a and 162b and further filtered by low pass filters 164a and 164b to obtain I and Q analog input signals that are provided to data processor 110. In the exemplary embodiment presented, data processor 110 includes analog-to-digital converters (ADCs) 116a and 116b to convert analog input signals to digital signals for further processing by data processor 110.

  [0028] In FIG. 1, RX LO signal generator 180 generates I and Q RX LO signals that are used for frequency downconversion, while TX LO signal generator 190 is used for frequency upconversion. Generate I and Q TX LO signals. Each LO signal is a periodic signal having a specific fundamental frequency. The PLL 192 receives timing information from the data processor 110 and generates control signals that are used to adjust the frequency and / or phase of the TX LO signal from the LO signal generator 190. Similarly, PLL 182 receives timing information from data processor 110 and generates control signals that are used to adjust the frequency and / or phase of the RX LO signal from LO signal generator 180. In an implementation, PLLs 182, 192 may also receive a reference frequency signal from one or more crystal oscillators supplied with device 100.

  [0029] In certain implementations (not shown in FIG. 1), a balun may be provided between the mixers 161a, 161b and LNA 152 outputs of the receiver 150. The balun may include a transformer that converts a single-ended signal into a differential signal and couples the signal from the primary winding to the secondary winding, for example.

  [0030] FIG. 2 illustrates an implementation of a receiver 200 for processing received signals in two separate frequency bands utilizing two separate transformers.

  [0031] In FIG. 2, the first LNA 152.1 receives the first band input signal B1IN and amplifies B1IN to produce an output signal coupled to the first band winding L1a. The first primary winding or inductor L1a is mutually coupled to the secondary winding or inductor L1b according to the transformer configuration, and the differential signal across the secondary winding L1b is coupled to the first through the coupling capacitors C11, C12. To the input of the first band mixer 161.1. Note that the single-ended output of LNA 152.1 is thus converted to a differential input for mixer 161.1. The first band mixer 161.1 may be implemented in various ways, for example, one or more down-conversion mixers 1 (not shown in FIG. 2) 1 to generate a first differential mixer output signal. The mixer input may be downconverted in frequency by multiplying with one or more (eg, in-phase and quadrature) local oscillator (LO) signals.

  [0032] Note that in certain alternative implementations (not shown), the coupling capacitors C11, C12 may be omitted if a passive mixer is used. For example, winding L1b can be coupled directly (eg, DC) to mixer 161.1.

  [0033] In FIG. 2, the second band input signal B2IN is similarly supplied to the second LNA 152.2 and coupled to each other windings L2a, L2b, coupling capacitors C21, C22, and a second mixer A second signal path including 161.2 produces a second differential mixer output signal. The first and second differential mixer output signals are combined together and input to a low pass filter 164, and the filtered output is subsequently provided to the ADC 116 for digitization. As described above for the first signal path, in an alternative implementation (not shown), the coupling capacitors C21, C22 may be omitted if a passive mixer is used. For example, winding L2b can be coupled directly (eg, DC) to the mixer.

  [0034] In an exemplary embodiment, B1 may correspond to a lower frequency band while B1 may correspond to a higher frequency band, for example. In alternative exemplary embodiments, other correspondences between bands and frequencies may be employed within the scope of this disclosure.

  [0035] In this specification and claims, the term "mutual coupling" refers to other types such as direct electrical coupling (eg, coupling through a low resistance conductive path) or mechanical coupling, etc. It can be seen that it shows the coupling of magnetic flux between the two windings of the transformer as opposed to coupling. Further, the indications herein as “primary” of a transformer winding and “secondary” of another winding of the transformer are arbitrary and any alternative convention is disclosed herein. It will be generally understood that it can be readily adopted for discussion purposes without changing the scope of

  [0036] It will be appreciated that the receiver architecture 200 requires providing a separate signal path for each received signal band. In particular, the first mixer 161.1 (and associated elements) is required to process B1IN, and the second mixer 161.2 (and associated elements) is required to process B2IN, etc. It is said. Furthermore, each path requires a separate single-ended to differential conversion mechanism, such as transformer L1a / L1b or L2a / L2b. These requirements therefore impose a heavy area and current consumption penalty on circuits that utilize such an architecture.

  [0037] FIG. 3 illustrates an alternative implementation 300 of a receiver that incorporates a multi-port transformer. In FIG. 3, the output of the first LNA 152.1 is coupled to the first primary winding L1, and the output of the second LNA 152.2 is coupled to the second primary winding L2. L1 and L2 may be implemented as a single primary winding of a transformer that is electrically coupled in series with each other and magnetically coupled, and also includes a secondary winding L3 coupled together, for example. In particular, L1 and L2 can be implemented as a single winding, and the AC ground node 300a of the winding is tapped and coupled to the supply voltage VDD. In the case where L1 and L2 are implemented as a single winding, L1 and L2 may also be referred to herein as the first and second portions, respectively, of the primary winding.

  [0038] VDD corresponds to a fixed DC voltage that supplies power to circuit elements coupled thereto, and may further correspond to an AC ground voltage. In this specification and claims, the term “AC ground voltage” corresponds to virtually any voltage that is ground voltage at AC, eg, DC supply voltage, DC ground voltage, bias voltage, etc. sell. Such exemplary embodiments are contemplated as being within the scope of this disclosure.

  [0039] During normal operation of the receiver, the receiver 300 receives at most in only one of the two bands B1 and B2, so that only one of the LNAs 152.1 and 152.2 is at any time. It is expected to become active. Thus, by design, L3 will be magnetically coupled to both L1 and L2, while L3 will only receive active signals from either L1 or L2. It will be appreciated that the receiver 300 advantageously utilizes fewer components than, for example, the receiver 200 presented in FIG. 2, such that L1 and L2 are implemented as a single primary winding. Let's go. Furthermore, the receiver 300 allows a single mixer 161 to be shared between the two bands B1 and B2 (or possibly in more than two bands in alternative implementations not shown). Thus, the mixer 161 may also be referred to herein as a “shared circuit”. Note that mixer 161 may incorporate both an I mixer and a Q mixer, for example, not presented separately in FIG. Also, certain implementations may remove capacitors C11, C12 and directly (DC) couple winding L3 to shared mixer 161.

  [0040] In certain scenarios, for example, if the capacitive load of the inactive signal path is not negligible, or if the turns ratio of the primary winding to the secondary winding of the inactive path is not very large, the active LNA signal path It will be appreciated that the loading effects from inactive signal paths may be undesirably experienced. For example, if LNA 152.1 is active and LNA 152.2 is inactive, for example, if receiver 300 is configured to receive signals on B1, L3 may be used even though L2 is not actively in use. Instead, it still experiences the load from L2 through the transformer coupling between L2 and L3. This effect reduces the signal current flowing through the mixer 161, thereby lowering the noise figure (NF) of the B1 signal path and reducing the overall signal gain of the B1 signal. The same effect will also degrade the performance of the B2 signal path when LNA 152.2 is active and LNA 152.1 is inactive.

  [0041] Accordingly, it is desirable to provide a technique for improving the performance of multi-band communication devices that utilize transformer sharing across multiple bands.

  [0042] FIG. 3A illustrates an alternative implementation 300A of a receiver that incorporates a multi-port transformer. In FIG. 3A, the output of B2LNA 152.2 is coupled to an auxiliary intermediate node 300c of the primary winding, and the primary winding includes a first primary winding L1 and a second primary winding L2. According to this implementation, B2LNA 152.2 effectively encounters the second primary winding L2 at its output, while B1LNA152.1 is the first primary winding L1 and the second primary winding L2. A larger impedance corresponding to the combination is encountered. Note that embodiment 300A would nevertheless support the current flowing in L2 during B1 operation. Note that the primary winding can be smaller, for example, compared to the primary winding of the implementation 300 of FIG.

  [0043] In the displayed implementation, if LNA 152.1 is active, LNA 152.2 is inactive. However, the off-state parasitic capacitance of LNA 152.2 coupled to node 300c reduces the current through the L2 winding, thereby reducing the signal path gain for LNA 152.1 and the noise figure (NF) of the B1 signal path. ) Will be reduced. Similarly, when LNA 152.2 is active and LNA 152.1 is inactive, the large capacitive load of LNA 152.1 reduces the current flowing in the L2 coil, reducing the signal path gain and B2 for LNA 152.2. This will result in a reduced noise figure in the signal path.

  [0044] FIG. 4 illustrates an exemplary embodiment 400 of a receiver according to the present disclosure. It should be noted that FIG. 4 is presented for exemplary purposes only and is not intended to limit the scope of the present disclosure.

  [0045] In FIG. 4, the output of the first LNA 152.1 is coupled to VDD via a first primary winding L1. The output of the second LNA 152.2 is coupled to VDD via a second primary winding implemented as a series combination of L2 and L2 '. In the present specification and claims, L2 'may also be indicated as "auxiliary second primary winding". L2 'can further be shown as the "auxiliary second part" of the primary winding, for example when L1, L2, and L2' are implemented as a single winding. The switch SA is further provided to couple VDD directly to a node between L2 and L2 ', also shown herein as "intermediate node" 300b. In the exemplary embodiment, switch SA is closed when B2_En is low, ie, when the B1 signal path is active. Thus, winding L2 ′ is bypassed when the active signal path couples L1 to L3 / L3 ′ to process the B1 signal, and therefore (since L2 ′ will be shorted by SA) L2 The coupling between 'and L3 reduces any gain attenuation in the active signal path. It will nevertheless be recognized that while gain attenuation may be mitigated thereby, excess mutual coupling, for example between L2 and L3, may still exist.

  [0046] In an exemplary embodiment, primary windings L1, L2 ', and L2 are implemented as a single winding that forms a primary winding of a transformer that further includes a secondary winding formed by L3. sell. In this case, coupling to VDD and switch SA may be provided by tapping the single-winding “supply” node 300a. This will achieve a similar effect when the receiver 400 is configured to receive B2 signals. Such alternative exemplary embodiments are considered to be within the scope of this disclosure.

  [0047] While gain attenuation in the active signal path may be mitigated according to the scheme described hereinabove in connection with FIG. 4, excess mutual coupling is, for example, between L2 and L3 during B1 operation. It will nevertheless be recognized that it can still exist between L1 and L3 during B2 operation. This mutual coupling causes a portion of the signal current to flow in the L2 winding, thereby reducing the gain of the LNA 152.1 when the B1 signal path is active and further increasing the noise figure (NF) of the B1 signal path. Reduce.

  [0048] FIG. 5 illustrates an alternative exemplary embodiment 500 of a receiver in accordance with the present disclosure. It should be noted that FIG. 5 is presented for exemplary purposes only and is not intended to limit the scope of the present disclosure.

  [0049] In FIG. 5, the output of the first LNA 152.1 is coupled to VDD via a first primary winding L1. The output of the second LNA 152.2 is coupled to the AC ground node 300a via a second primary winding L2 and a switch SB coupled in series. By opening or closing switch SB, L2 can be selectively decoupled from or coupled to VDD, respectively. In the exemplary embodiment, SB is opened when B2_En is low, ie, when the B1 signal path is active. Thus, L2 is decoupled from VDD when the active signal path couples L1 to L3 to process the B1 signal. Thus, in the exemplary embodiment presented, L2 reduces the signal across L3 through mutual coupling when LNA 152.1 is active, eg, when receiver 500 is configured to receive B1 signals. Does not cause. This is due to the fact that there is no current flowing in L2 when the SB is open. In this way, the noise figure and gain of receiver 500 are improved relative to that of receiver 400, for example.

  [0050] Note that when the B2 signal path is active, B2_En is high and therefore SB is closed. Thus, L2 is coupled to VDD when LNA 152.2 generates an output signal that is coupled from L2 to L3. Note that B2 signal path operation will also be affected by the load from L1. However, if B2 is designed for a lower frequency of operation, L2 will typically be much larger than L1. Thus, despite no decoupling from L1 during B2 signal path operation, the degradation in B2 performance may nevertheless be slight.

  [0051] In aspects of this disclosure, during B2 operation, there is a minimum voltage swing across the terminals of SB when switch SB is in series with VDD and VDD is typically not affected by large voltage fluctuations. It will be recognized that Therefore, it is expected that minimal non-linearity will be brought about by charging and discharging any parasitic capacitance associated with SB. In addition, any parasitic capacitance associated with SB will not overload the B2 signal path and LNA 152.2 during B2 operation, which means that SB is not adjacent to the LNA output, rather than VDD. This is because it is arranged near the port. In another aspect, the switch SB provides isolation to prevent unwanted spurious signals and / or noise coupling from, for example, an inactive signal path to an active signal path.

  [0052] In an exemplary embodiment, the size of the switch SB may be further optimized to reduce the noise figure of the receiver 500. It will be appreciated that the large size for switch SB adds parasitic capacitance and reduces isolation between L2 and L3. On the other hand, the small switch size for switch SB adds more signal loss when SB is closed and the B2 signal path is active. In general, it will be appreciated that the switch SB should be placed in series with the primary winding having a greater number of turns associated with the secondary winding. For example, if the turns ratio L2 / L3 is much greater than the turns ratio L1 / L3, the switch should be placed in series with the L2 winding. On the other hand, if L1 / L3 is much larger than L2 / L3, the switch should be placed in series with the L1 winding.

  [0053] In general, it will be appreciated that increasing the size of the SB will reduce its ON series resistance and thus improve the noise performance of the B2 path. However, an excessively large size for the SB will introduce a capacitive load on the B1 signal path through magnetic coupling from the L2-L3 windings and will degrade the performance of the B1 signal path. Therefore, the SB size should be optimized to obtain acceptable performance for both B1 and B2.

  [0054] FIG. 6 illustrates an alternative exemplary embodiment 600 in accordance with the present disclosure. In FIG. 6, the output of the first LNA 152.1 is coupled to VDD via L1 and a series coupled switch SC, while the output of the second LNA 152.2 is coupled in series with L2. Coupled to VDD via switch SD. In the exemplary embodiment, SC is controlled by signal B1_En, which is set high during B1 operation, while SD is controlled by signal B2_En, which is set high during B2 operation. In an exemplary embodiment, during B1 operation, SC can be closed and SD can be opened, while during B2 operation, SD can be closed and SC can be opened. Thus, the advantages of receiver 500 described in connection with FIG. 5 can be applied to processing for both bands B1 and B2 within receiver 600. While an exemplary embodiment 600 for adapting to two receive bands is presented, the techniques described herein above can be readily applied to adapt to more than one band, such alternative examples. Note that specific embodiments are considered to be within the scope of this disclosure.

  [0055] FIG. 7 illustrates an alternative exemplary embodiment 700 of the present disclosure, in which the techniques disclosed herein are applied to a transmitter. In FIG. 7, the output of the digital-to-analog converter 114 is coupled to a low pass filter (LPF) 132. The differential output of LPF 132 may be coupled to the differential input of upconversion mixer 141, which may then be coupled to the differential ends of winding L3 via coupling capacitors C1, C2. In the exemplary embodiment, L3 forms the primary winding of the transformer that also includes the secondary winding formed by L1 and L2. The other terminals of L1 and L2 are coupled to driver amplifiers 144.1 and 144.2 via coupling capacitors C3 and C4, respectively.

  [0056] In FIG. 7, L1 is coupled to VDD by a series-coupled switch SF, and L2 is coupled to VDD by a series-coupled switch SE. Note that depending on the setting, VDD can also be replaced by GND. It should be noted that in this specification and claims, any node indicated by GND may generally correspond to any AC ground voltage having any DC level, unless stated otherwise. Such alternative exemplary embodiments are considered to be within the scope of this disclosure.

  [0057] In an exemplary embodiment, SE is controlled by control signal B2_En, which can be high during B2 operation, and switch SE can be closed for transmission in frequency band B2. Similar to the case described for receiver 500, the SE may decouple L2 from VDD during B1 operation and couple L2 to VDD during B2 operation. In this way, the load on the primary winding due to the secondary winding associated with the inactive signal path can be reduced. Switch SF is similarly provided to couple L1 to VDD during B1 operation, and moreover, separate windings (not shown) share two or more according to sharing (not shown) common up-conversion mixer 141 Note that it may be provided for each of the signal paths. Such alternative exemplary embodiments are considered to be within the scope of this disclosure.

  [0058] FIG. 8 illustrates an alternative exemplary embodiment 800 of the present disclosure, in which a generic technique is shown for adapting to multiple modes using a single shared circuit. In this specification and the claims, the term “mode” may encompass any type of operation having a distinct set of characteristics. For example, a mode encompasses a “frequency band” when used elsewhere in this specification, and therefore mode 1 and mode 2 may refer to band 1 and band 2. Alternatively, the modes may include “channels” such as, for example, time multiplexed, code multiplexed, or spatially multiplexed channels. Such alternative exemplary embodiments are considered to be within the scope of this disclosure.

  [0059] In FIG. 8, mode 1 circuit 810, or "first mode circuit" node 810a, is coupled to VDD via winding L1 and switch SH. The node 820a of the mode 2 circuit 820 or “second mode circuit” is coupled to VDD via the second primary winding L2 and the switch SG. In general, nodes 810a and 820a may correspond to input and / or output signal nodes of mode 1 circuit 810 and mode 2 circuit 820, respectively. The L1 and L2 fluxes are coupled to the L3 flux in the transformer configuration, and L3 is coupled correspondingly to the shared circuit 830. Shared circuit 830 may function to process signals associated with both mode 1 and mode 2.

  [0060] As described similarly for the exemplary embodiments at the top of this specification, if Mode 2 Enable is high, for example, Mode 2 circuit 820 is associated with Mode 2 When actively processing the signal, the switch SG can be closed and the switch SH can be opened. Conversely, if mode 2 enable is low, for example, if mode 1 circuit 810 actively processes a signal associated with mode 1, switch SG may be opened and switch SH may be closed. In light of the present disclosure, it will be appreciated that decoupling L2 from VDD when mode 2 is inactive advantageously reduces the load on L3 by L2.

  [0061] FIG. 9 illustrates an exemplary embodiment of a method in accordance with the present disclosure. It should be noted that FIG. 9 is presented for exemplary purposes only and is not intended to limit the scope of the present disclosure for any particular method presented.

  [0062] In FIG. 9, at block 910, the second primary winding is coupled to the AC ground node when the second mode circuit associated with the second primary winding is active. The AC ground node is coupled to an AC ground voltage, the first primary winding is further coupled to the AC ground node, and the first and second primary windings are coupled to the secondary winding.

  [0063] At block 920, the second primary winding is decoupled from the AC ground node when the second mode circuit is inactive.

  [0064] It will be appreciated that while a particular implementation is presented to handle two bands, more than one band may also be accommodated using the presented receiver architecture. Further, such elements may also be incorporated in the presented transceiver, but for ease of illustration, certain transceiver elements, such as baseband amplifiers, filters, etc., are included in all drawings. It will be recognized that it has not been presented.

  [0065] FIGS. 10-14 illustrate alternative exemplary embodiments of the present disclosure, in which the techniques described herein further provide for single-ended to differential signal conversion scenarios within a receiver. Applied. Note that the exemplary embodiments in FIGS. 10-14 are presented for exemplary purposes only and are not intended to limit the scope of the present disclosure. Further, it will be appreciated that the LNA 152 presented in FIGS. 10-14 is not limited to any particular architecture or circuit topology. For example, the LNA 152 can be a single stage, multi-stage, common source, or common gate, or any other type of circuit topology well known in the art, and such exemplary embodiments are described in this disclosure. It is considered to be within range.

  [0066] In the exemplary embodiment 1000 of FIG. 10, the single-ended signal B1IN corresponding to the first band is coupled to the first primary winding L1, while the single-ended signal corresponding to the second band. B2IN is coupled to the second primary winding L2. L1 and L2 are coupled together at an AC ground node 300a, referred to as GND in FIG. L1 and L2 are further coupled to each other to secondary winding L3, with its differential end coupled to the input of amplifier 152, for example, a low noise amplifier (LNA) at the receiver front end. Thus, the single-ended signal B1IN or B2IN is converted to a differential signal for input to the amplifier 152.

  [0067] In certain exemplary embodiments, B1IN and B2IN may each be coupled to a pin on an integrated circuit that is configured to receive a signal, for example, to receive processing within the respective band. For example, B1IN can be coupled to the output of a SAW filter, duplexer, external matching network, or other type of filter that is tuned to the B2 band, while B1IN is tuned to a SAW filter, duplexer, external matching network, or B1 band. Can be coupled to the output of other types of filters. In alternative exemplary embodiments, B1IN and B2IN may be coupled to other nodes, on-chip or off-chip, and such alternative exemplary embodiments are considered to be within the scope of this disclosure. .

  [0068] In the exemplary embodiment 1100 of FIG. 11, B1IN is coupled to the first node of L1, and B2IN is coupled to the second node of L1. The second node of L1 is coupled to L2, which is further coupled to GND. L1 and L2 are further coupled together to L3, the differential end of which is coupled to amplifier 152. In accordance with the principles described herein above, a single-ended signal present at either B1IN or B2IN can be converted to a differential signal input to amplifier 152 by the mutual coupling of L1 and L2 to L3. Further, the L3 coil can be implemented using a center tap at the center. Such a configuration may be useful, for example, to bias the LNA at the appropriate operating point.

  [0069] In the exemplary embodiment 1200 of FIG. 12, L2 is coupled to the AC ground node 300a by a switch SB. SB is controlled by signal B2_En so that SB is opened when B2_En is low and SB is closed when B2_En is high. Thus, L2 is decoupled from GND when B1 is active, and L2 is coupled to GND when B2 is active. It will be appreciated that the exemplary embodiment 1200 has the aforementioned advantages of removing undesirable loads on L3 by L2 when B1 is active.

  [0070] In the exemplary embodiment 1300 of FIG. 13, the auxiliary second primary winding L2 ′ couples the AC ground node 300a to the second primary winding L2, and the switch SA is for the SB. It operates in the same manner as described herein above.

  [0071] In the exemplary embodiment 1400 of FIG. 14, the switches SC and SD are controlled by signals B1_En and B2_En, respectively. According to the principles described hereinabove, SC couples L1 to an AC ground node called GND when B1_En is high, and SD couples AC to an AC ground called GND when B2_En is high. Combine mode. Thus, the advantageous features described in connection with FIG. 12 can be applied to operation within both B1 and B2.

  [0072] FIG. 15 illustrates an alternative exemplary embodiment 1500 of the present disclosure for single-ended to differential conversion within a receiver. In FIG. 15, single-ended signals B1IN and B2IN are coupled to first and second terminals, respectively, of primary winding L1. The L1 second terminal is further coupled to GND via a switch SJ controlled by B1_En, while the L1 first terminal is further coupled to GND via a switch SI controlled by B2_En. During B1 operation, SI is opened and SJ is closed, in which case L1 therefore couples B1IN to GND. During B2 operation, SI is closed and SJ is opened, in which case L1 couples B2IN to GND. As L1 is coupled to L3, exemplary embodiment 1500 efficiently uses a single primary winding L1 and two switches SI and SJ for two bands B1 and B2. A single-ended to differential conversion is advantageously performed.

  [0073] In an alternative exemplary embodiment (not shown), transformer configurations L1-L3 and switch configurations SI, SJ are also associated with B1 and B2, for example according to the application presented in FIG. It can be applied to convert a single-ended LNA output to a differential input for a later mixer. Such alternative exemplary embodiments are considered to be within the scope of this disclosure.

  [0074] FIG. 16 illustrates an alternative exemplary embodiment of the present disclosure, in which the transformer and switch configuration of FIG. 15 is utilized between the down-conversion mixer and LNA of the receiver. In particular, in light of the description at the top of this specification in relation to FIG. 15, it will be appreciated that switch SJ can be closed when B1_En is high and switch SI can be closed when B2_En is high. . In this way, the signal from either the B1LNA 152.1 or B2LNA 152.2 output can be selectively coupled to the shared downconversion mixer 161 for further processing. As previously described hereinabove, the capacitors C11, C12 may be omitted in alternative exemplary embodiments utilizing a passive mixer.

  [0075] FIG. 17 illustrates an alternative exemplary embodiment of the present disclosure, in which the techniques disclosed herein are applied to a transmitter. In particular, in light of the description at the top of this specification in relation to FIG. 15, it will be appreciated that switch SJ can be closed when B1_En is high and switch SI can be closed when B2_En is high. . Thus, the differential signal across L3 at the output of upconversion mixer 141 is selectively coupled to either the driver amplifier 144.1 or driver amplifier 144.2 input via coupling capacitors C3 and C4, respectively. sell. As previously described hereinabove, capacitors C1, C2 may be omitted in alternative exemplary embodiments utilizing a passive mixer.

  [0076] In this specification and in the claims, when an element is referred to as "connected" or "coupled" to another element, it can be directly connected or coupled to the other element. It will be understood that there may be intervening elements. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Further, when an element is referred to simply as “coupled” to another element, there may or may not be a low resistance path between such elements, while the element is in another element. Reference to “electrically coupled” indicates that a low resistance path exists between such elements.

  [0077] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description are voltages, currents, electromagnetic waves, magnetic fields or magnetic particles, light fields or light particles, or any of them Can be represented by a combination.

  [0078] Those of skill in the art will further recognize that the various exemplary logic blocks, modules, circuits, and algorithm steps described in connection with the exemplary aspects disclosed herein are electronic hardware, computer software, or both You will recognize that it can be implemented as a combination of. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in a variety of ways for each particular application, but such implementation decisions are causing deviations from the scope of the exemplary aspects of the invention. Should not be interpreted.

  [0079] Various exemplary logic blocks, modules, and circuits described in connection with the exemplary aspects disclosed herein are general purpose processors, digital signal processors (DSPs), application specific integrated circuits. (ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. Can be implemented or carried out. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, eg, a DSP and microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration combination.

  [0080] Method or algorithm steps described in connection with the exemplary aspects disclosed herein may be implemented directly in hardware, in a software module executed by a processor, or in a combination of the two. Can be realized. Software modules include random access memory (RAM), flash memory, read only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM (registered trademark)), registers, hard disk, removable disk, It may reside in a CD-ROM or any other form of storage medium that is well known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may exist in the user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.

  [0081] In one or more exemplary aspects, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer readable media can be RAM, ROM, EEPROM®, CD-ROM or other optical disk storage device, magnetic disk storage device or other magnetic storage device, or instructions or data. Any other medium that can be used to carry or store the desired program code in the form of a structure and that can be accessed by a computer can be provided. Also, any connection is strictly referred to as a computer readable medium. For example, the software uses a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology such as infrared, wireless, and microwave to websites, servers, or other remote sources Coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the media definition. Disc and disc, as used herein, are compact disc (CD), laser disc (registered trademark), optical disc, digital versatile disc (DVD), floppy disc (registered trademark). , And Blu-ray discs, where a disk typically reproduces data magnetically and a disc optically reproduces data using a laser. Combinations of the above should also be included within the scope of computer-readable media.

  [0082] The previous description of the disclosed exemplary embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these illustrative aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be modified by other illustrative examples without departing from the spirit or scope of the invention. It can be applied to the embodiment. Accordingly, this disclosure is not intended to be limited to the exemplary embodiments presented herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. is there.

Claims (20)

An apparatus, the apparatus comprising:
A primary winding comprising first and second portions connected to an AC ground node;
A secondary winding coupled to the primary winding;
A first mode circuit coupled to the first portion;
A second mode circuit coupled to the second portion;
A first switch coupled in series with the first portion and an AC ground node, wherein the first switch is configured to be closed when the first mode circuit is active.   The apparatus of claim 1, wherein the apparatus comprises a circuit coupled to the secondary winding configured to process signals associated with the first mode circuit and the second mode circuit. Further prepare.   3. The apparatus of claim 2, wherein the first mode circuit comprises a low noise amplifier configured to amplify a signal in a first frequency band, and the second mode circuit comprises a second The circuit coupled to the secondary winding comprises a down-conversion mixer.   3. The apparatus of claim 2, wherein the first mode circuit comprises a driver amplifier configured to transmit a signal in a first frequency band, and the second mode circuit comprises a second The circuit comprising a driver amplifier configured to transmit a signal in a frequency band and coupled to the secondary winding comprises an upconversion mixer.   The apparatus of claim 1, further comprising a second switch that couples the second primary winding to the AC ground node, wherein the second switch is the second switch. The two mode circuits are configured to be closed when active.   The apparatus of claim 1, further comprising a third winding coupled to the AC ground node, wherein the secondary winding is further coupled to the third winding. Are connected to each other.   3. The apparatus of claim 2, further comprising an auxiliary second part that couples the second part to the AC ground node.   3. The apparatus of claim 2, wherein the circuit coupled to the secondary winding comprises a low noise amplifier having different inputs.   9. The apparatus according to claim 8, wherein the first mode circuit includes a filter for passing a first band, and the second mode circuit is a filter for passing a second band. Is provided.   9. The apparatus of claim 8, wherein the first mode circuit comprises a matching network for passing a first band, and the second mode circuit is for passing a second band. A matching network is provided. An apparatus, the apparatus comprising:
A first primary winding coupled to the auxiliary intermediate node;
A second primary winding coupled to the auxiliary intermediate node and further to an AC ground node;
A secondary winding coupled to the first and second primary windings;
A first mode circuit coupled to the first primary winding;
A second mode circuit coupled to the second primary winding;
A circuit coupled to the secondary winding configured to process signals associated with the first mode circuit and the second mode circuit.   12. The apparatus of claim 11, wherein the first mode circuit comprises a low noise amplifier configured to amplify a signal in a first frequency band, and the second mode circuit comprises a second The circuit coupled to the secondary winding comprises a down-conversion mixer.   12. The apparatus of claim 11, wherein the first mode circuit comprises a driver amplifier configured to transmit a signal in a first frequency band, and the second mode circuit comprises a second The circuit comprising a driver amplifier configured to transmit a signal in a frequency band and coupled to the secondary winding comprises an upconversion mixer. An apparatus, the apparatus comprising:
A primary winding comprising first and second terminals;
A first mode circuit coupled to the first terminal of the primary winding;
A second mode circuit coupled to the second end of the primary winding;
A secondary winding coupled to the primary winding;
A circuit coupled to the secondary winding to process signals associated with the first mode circuit and the second mode circuit;
A first switch configured to couple the first terminal of the primary winding to an AC ground node when the second mode circuit is active;
A second switch configured to couple the second terminal of the primary winding to an AC ground node when the first mode circuit is active;   15. The apparatus of claim 14, wherein the circuit coupled to the secondary winding comprises a low noise amplifier.   15. The apparatus of claim 14, wherein the circuit coupled to the secondary winding comprises a downconversion mixer, and the first mode circuit comprises a low noise amplifier for a first band. The second mode circuit comprises a low noise amplifier for the second band.   15. The apparatus of claim 14, wherein the circuit coupled to the secondary winding comprises an upconversion mixer, the first mode circuit comprises a driver amplifier for a first band, The second mode circuit includes a driver amplifier for the second band. An apparatus, the apparatus comprising:
A first mode circuit;
A second mode circuit;
Means for processing signals associated with the first mode circuit and the second mode circuit;
Means for coupling the signals of the first mode circuit and the second mode circuit to means for processing the signals.   19. The apparatus of claim 18, wherein the means for processing the signal comprises a downconversion mixer, the first mode circuit comprises a low noise amplifier for a first band, and The two mode circuit comprises a low noise amplifier for the second band.   19. The apparatus of claim 18, wherein the means for processing comprises an upconversion mixer, the first mode circuit comprises a driver amplifier for a first band, and the second mode. The circuit comprises a driver amplifier for the second band.

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