JP2016219698A - Magnetoresistive memory and method for manufacturing magnetoresistive memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce writing current.SOLUTION: In a method for manufacturing a magnetoresistive memory, an insulating layer 13 is formed on a substrate layer 12 that contains a first material having conductivity and has a columnar crystal structure by being subjected to annealing; a free layer 14 is formed on the insulating layer 13, the free layer including a plurality of magnetic layers 14b, 14c which are formed to face to each other with a magnetization promoting layer 14a for promoting vertical magnetization sandwiched therebetween and which have a variable magnetization direction; a tunnel insulating layer 15 is formed on the free layer 14; and a reference layer 16 having a fixed magnetization direction is formed on the tunnel insulating layer 15.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a magnetoresistive memory and a method of manufacturing a magnetoresistive memory.

  As MRAM (Magnetoresistive Random Access Memory) which is a magnetoresistive memory, there is one in which wiring is introduced under a magnetic tunnel junction (MTJ) portion and writing is performed by a magnetic field generated by a current flowing through the wiring. .

However, in this method, the write current increases with the miniaturization of the MRAM, and in recent years, a spin injection type MRAM has been proposed in which the write current becomes smaller as the miniaturization is performed.
The spin injection type MRAM is magnetized by passing the spin angular momentum from the spin of electrons flowing into the magnetization free layer, which is a ferromagnetic layer, to the localized magnetic moment of the magnetization free layer when a current is passed through the MTJ portion. Writing is performed by utilizing the occurrence of inversion.

  As for the MRAM, a method has been proposed in which a magnetization free layer is formed using a plurality of ferromagnetic layers, and the retention characteristic of recorded contents is improved while maintaining the write current at the same level. In addition, a method of performing magnetization reversal utilizing the fact that magnetic anisotropy changes due to a field effect, and a method of assisting magnetization reversal using a field effect have been proposed.

International Publication No. 2009/133650 International Publication No. 2013/012800 International Publication No. 2012/159078

H. Sato et al., "Comprehensive study of CoFeB-MgO magnetic tunnel junction characteristics with single- and double-interface scaling down to 1X nm", IEDM, pp. 3.2.1-3.2.4, 2013 Skowro? ski et al., "Interlayer exchange coupling and current induced magnetization switching in magnetic tunnel junctions with MgO wedge barrier", J. Appl. Phys. 107, 093917, pp.1-4, 2010 C. Y. You and S. D. Bader, "Prediction of switching / rotation of the magnetization direction with applied voltage in a controllable rotated exchange coupled system", J. Magn. Magn. Mater. 195, pp.488-500, 1999 C.W.Cheng et al., "Observation of parallel-antiparallel magnetic coupling in ultrathin CoFeBMgO based structures with perpendicular magnetic anisotropy", J. Appl. Phys. 112, 033917, pp.1-5, 2012

  By the way, as the miniaturization advances and the volume of the magnetization free layer decreases, the retention characteristic of the recorded content deteriorates. Therefore, even with a spin injection type MRAM in which the write current decreases as the size is reduced, there is a problem in that the write current cannot be reduced so much that the volume of the magnetization free layer must be maintained to some extent.

  In one aspect, the magnetoresistive memory includes a first material having conductivity, a base layer having a columnar crystal structure, a first insulating layer formed on the base layer, and the first insulating layer A magnetization free layer including a plurality of first magnetic layers having a variable magnetization direction, formed on the magnetization promotion layer that opposes the magnetization enhancement layer that promotes perpendicular magnetization, and formed on the magnetization free layer. And a second magnetic layer having a fixed magnetization direction formed on the second insulating layer.

  In one embodiment, the first insulating layer is formed on the base layer that includes the first material having conductivity and becomes a columnar crystal structure by performing an annealing process, and the first insulating layer is formed on the first insulating layer. In addition, a magnetization free layer including a plurality of first magnetic layers with variable magnetization directions formed so as to face each other with a magnetization promotion layer for promoting perpendicular magnetization interposed therebetween is formed on the magnetization free layer. There is provided a method for manufacturing a magnetoresistive memory, in which two insulating layers are formed, and a second magnetic layer having a fixed magnetization direction is formed on the second insulating layer.

  One aspect is that the write current can be reduced.

It is sectional drawing which shows an example of the magnetoresistive memory of this Embodiment. It is a figure which shows the comparative example of a magnetoresistive memory. It is a figure which shows an example of 0 V or more bias voltage dependence of the RH characteristic of the free layer of the magnetoresistive memory of this Embodiment. It is a figure which shows an example of the bias voltage dependence below 0V of the RH characteristic of the free layer of the magnetoresistive memory of this Embodiment. It is a figure which shows an example of the bias voltage dependence of an offset magnetic field and a coercive force. It is a figure which shows the mode of an example of magnetization reversal. It is a figure which shows the mode of "0" writing. It is a figure which shows the mode of "1" writing. It is a phase diagram which shows an example of the relationship between a bias voltage, a coercive force, and an offset magnetic field. It is a phase diagram which shows an example of the relationship between a bias voltage, a coercive force, and an offset magnetic field in the magnetoresistive memory of this Embodiment. It is a figure which shows an example of 0 V or more bias voltage dependence of the RH characteristic of the free layer of the magnetoresistive memory of a comparative example. It is a figure which shows an example of the bias voltage dependence below 0V of the RH characteristic of the free layer of the magnetoresistive memory of a comparative example. It is a figure which shows an example of the bias voltage dependence of the offset magnetic field and the coercive force in the magnetoresistive memory of the comparative example. It is a figure which shows an example of the resistance dependence of the write current in the magnetoresistive memory of this Embodiment and the magnetoresistive memory of a comparative example. It is a figure which shows an example of the resistance dependence of MR ratio in the magnetoresistive memory of this Embodiment, and the magnetoresistive memory of a comparative example. It is a flowchart which shows the flow of the manufacturing method of a magnetoresistive memory. It is sectional drawing which shows an example of the laminated structure formed by a film-forming process. It is a figure which shows an example of the equivalent circuit of the magnetoresistive memory containing a memory element and a transistor.

Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings.
FIG. 1 is a cross-sectional view showing an example of the magnetoresistive memory according to the present embodiment.
The magnetoresistive memory 10 is a perpendicular magnetization type MTJ type magnetoresistive memory.

  In FIG. 1, one (one bit) memory element portion of a top-pin type (a structure in which a reference layer (also referred to as a magnetization fixed layer or a pinned layer) is on a tunnel insulating layer) is provided. It is shown. The illustration of the lower electrode and the upper electrode is omitted.

  The magnetoresistive memory 10 includes a leakage magnetic field suppression layer 11, an underlayer 12, an insulating layer 13, a magnetization free layer (hereinafter simply referred to as a free layer) 14, a tunnel insulating layer 15, a reference layer 16, a magnetization promotion layer 17, and a magnetization reversal suppression. The layer 18, the conductive layer 19, and the leakage magnetic field suppression layer 20 are included.

  The leakage magnetic field suppression layer 11 is provided to suppress the leakage magnetic field from the reference layer 16. The leakage magnetic field suppression layer 11 is, for example, a CoPt (cobalt platinum) layer having a thickness of about 4 to 8 nm. Note that the leakage magnetic field suppression layer 11 may be omitted if the leakage magnetic field is small or if the leakage magnetic field suppression layer 20 described later can sufficiently suppress the leakage magnetic field.

  The underlayer 12 is formed on the leakage magnetic field suppressing layer 11, includes a conductive material, and has a columnar crystal structure. The underlayer 12 has a function of increasing the interaction between the free layer 14 and the reference layer 16 formed thereabove by unevenness present on the surface in contact with the free layer 14. The underlayer 12 also functions as a buffer layer for breaking the magnetic coupling between the leakage magnetic field suppressing layer 11 and the free layer 14.

  As the underlayer 12, for example, Ru (ruthenium) that grows in a columnar shape by annealing is used. In addition to Ru, a material having conductivity and crystal growth in a columnar shape in the film thickness direction may be used. When Ru is used, the thickness of the underlayer 12 is preferably 2 nm or more and 6 nm or less. This is because when the film thickness is less than 2 nm, the unevenness is too small and the effect of increasing the above interaction is low, and when the film thickness exceeds 6 nm, the function of adjusting the leakage magnetic field from the reference layer 16 is lost.

  The insulating layer 13 is formed on the base layer 12. The insulating layer 13 has a function of increasing the perpendicular magnetic anisotropy in the free layer 14. For example, MgO (magnesium oxide), which is an oxide of Mg (magnesium), is used as the insulating layer 13. If the film thickness is too thick, the resistance of the memory element becomes too large. It is desirable that the thickness be in the range of 0.0 nm or less.

In addition, the material used for the insulating layer 13 is not limited to MgO, For example, oxides, such as Al (aluminum), Hf (hafnium), Ta (tantalum), etc. may be sufficient.
The free layer 14 is formed on the insulating layer 13. The free layer 14 includes a plurality of magnetic layers 14b and 14c having variable magnetization directions formed so as to face each other with a magnetization promoting layer 14a that promotes perpendicular magnetization interposed therebetween.

As the magnetization promoting layer 14a, for example, Ta or Hf is used.
For the magnetic layers 14b and 14c, for example, a ferromagnetic material such as CoFeB (cobalt iron boron) is used.

  If the thickness of each of the magnetic layers 14b and 14c is too thick, the magnetization direction tends to be an in-plane direction. Therefore, when Ta is used as the magnetization promoting layer 14a and CoFeB is used as the magnetic layers 14b and 14c, the thickness of each layer may be in the following range, for example, so that the magnetic layers 14b and 14c are perpendicularly magnetized. desirable. The film thickness of the magnetization promoting layer 14a is 0.4 nm or more and 2.0 nm or less, the film thickness of the magnetic layer 14b is 1.1 nm or more and 1.9 nm or less, and the film thickness of the magnetic layer 14c is 0.7 nm. As mentioned above, it is 1.2 nm or less.

  In the example of FIG. 1, the magnetic layers included in the free layer 14 are two magnetic layers 14 b and 14 c, but in order to increase the volume of the free layer 14 and improve the retention characteristics of the recorded content, Three or more magnetic layers may be provided.

  The tunnel insulating layer 15 functions as an MTJ tunnel barrier. As the tunnel insulating layer 15, for example, an oxide such as Mg, Al, Hf, or Ta is used. However, it is desirable to use MgO which has the property of a crystal in which atoms are regularly arranged, the electrons of the tunnel current are not easily scattered, and a relatively large MR (MagnetoResistance) ratio can be easily obtained.

When MgO is used as the tunnel insulating layer 15, the thickness of the tunnel insulating layer 15 is preferably smaller than 1.0 nm so that the resistance of the memory element does not become too high. For example, in the memory elements proposed in Patent Documents 1 to 3, the thickness of MgO is as thick as 1.0 nm or more. For example, the value of resistance RA (Resistance-Area) per unit area of MgO having a film thickness of 1.5 nm is about 1 kΩ · μm ² . When the size of the memory element having this MgO layer (the area of the xy plane when the film thickness direction is the z direction) is 20 nm × 20 nm, the resistance of the memory element is as high as 3E ⁶ Ω or more, It is difficult to apply to the recent MRAM which is becoming finer.

A relatively good MR ratio can be obtained when the thickness of the tunnel insulating layer 15 using MgO is 0.8 nm or more.
The reference layer 16 is formed on the tunnel insulating layer 15 and is a magnetic layer whose magnetization direction is fixed. As the reference layer 16, for example, a ferromagnetic material such as CoFeB is used. When CoFeB is used as the reference layer 16, the film thickness is desirably 1.1 nm or more and 1.9 nm or less so that the reference layer 16 becomes a perpendicular magnetization film.

  The magnetization promotion layer 17 is formed between the reference layer 16 and the magnetization reversal suppression layer 18. As the magnetization promotion layer 17, for example, Ta or a compound thereof is used. When Ta is used as the magnetization promoting layer 17, the film thickness is such that the reference layer 16 and the magnetization reversal suppression layer 18 become a perpendicular magnetization film, and the ferromagnetic layer is strong between the reference layer 16 and the magnetization reversal suppression layer 18. For example, the thickness is preferably 0.2 nm or more and 0.5 nm or less so that the bonding works.

  The magnetization reversal suppression layer 18 is formed on the magnetization promotion layer 17 in order to enhance the magnetization of the reference layer 16 so that the magnetization direction of the reference layer 16 is not reversed. As the magnetization reversal suppression layer 18, for example, CoPt is used. When CoPt is used as the magnetization reversal suppression layer 18, the film thickness is desirably 4 nm or more so that the magnetization reversal suppression layer 18 becomes a perpendicular magnetization film having a large perpendicular magnetic anisotropy. On the other hand, the thickness of the magnetization reversal suppression layer 18 is desirably 8 nm or less because the leakage magnetic field increases when it is too thick.

  The conductive layer 19 is formed between the magnetization reversal suppression layer 18 and the leakage magnetic field suppression layer 20 and is provided for antiferromagnetic coupling between the two layers. For example, Ru is used as the conductive layer 19. When the film thickness of the conductive layer 19 is changed, the coupling between the magnetization reversal suppression layer 18 and the leakage magnetic field suppression layer 20 becomes ferromagnetic coupling or antiferromagnetic coupling due to the RKKY interaction. Therefore, the upper limit and the lower limit of the film thickness of the conductive layer 19 are values that can provide a large antiferromagnetic coupling. For example, the film thickness of the conductive layer 19 is desirably 0.6 nm or more and 1.2 nm or less so that a relatively large antiferromagnetic coupling can be obtained.

  The leakage magnetic field suppression layer 20 is provided to suppress the leakage magnetic field from the reference layer 16. The leakage magnetic field suppression layer 20 is a CoPt layer having a thickness of about 6 to 15 nm, for example. If the above-described leakage magnetic field suppression layer 11 is not provided, the thickness of the leakage magnetic field suppression layer 20 may be increased to, for example, 15 nm. Note that the effect of shifting the offset magnetic field of the free layer 14 due to the leakage magnetic field (the offset magnetic field will be described later) becomes large when the size of the MTJ portion is small. Therefore, the film thickness of the leakage magnetic field suppression layer 20 is also appropriately changed depending on this size. It is desirable to do.

Next, before describing the effect of the magnetoresistive memory according to the present embodiment, a magnetoresistive memory in which a Ta layer is provided between the base layer 12 and the insulating layer 13 will be described as a comparative example.
FIG. 2 is a diagram illustrating a comparative example of the magnetoresistive memory.

  The magnetoresistive memory 30 includes a leakage magnetic field suppression layer 31, a base layer 32, a Ta layer 33, an insulating layer 34, a free layer 35 (including a magnetization promoting layer 35a, magnetic layers 35b and 35c), a tunnel insulating layer 36, and a reference layer 37. have. Furthermore, it has a magnetization promotion layer 38, a magnetization reversal suppression layer 39, a conductive layer 40, and a leakage magnetic field suppression layer 41.

Each layer of the magnetoresistive memory 30 corresponds to each layer of the magnetoresistive memory 10 shown in FIG. 1 except for the Ta layer 33.
The magnetoresistive memory 30 shown in FIG. 2 is different from the magnetoresistive memory 10 shown in FIG. 1 in that a Ta layer 33 is provided between the base layer 32 and the insulating layer 34.

When the underlying layer 32 is Ru and the insulating layer 34 is MgO, the Ta layer 33 cuts off the crystallinity of Ru and makes it easy to orient MgO in the (001) direction.
In contrast to such a magnetoresistive memory 30, in the magnetoresistive memory 10 shown in FIG. 1, an insulating layer 13 and an MTJ portion are sequentially formed on the base layer 12. Therefore, in the magnetoresistive memory 10, the surface unevenness of the insulating layer 13, the free layer 14, the tunnel insulating layer 15, the reference layer 16, and the like increases due to the surface unevenness of the base layer 12.

  It should be noted that the tunnel insulating layers 15 and 36 of the magnetoresistive memory 10 and the magnetoresistive memory 30 and the magnetic layers sandwiching the tunnel insulating layers 15 and 36 (free layers 14 and 35 and reference layers 16 and 37). Are the same structure. That is, when the same bias voltage is applied to the magnetoresistive memories 10 and 30, the currents flowing through the magnetoresistive memories 10 and 30 are substantially equal. The difference between the magnetoresistive memories 10 and 30 is the presence or absence of the Ta layer 33, and the size of the resulting irregularities.

  In the magnetoresistive memory 10, the increase in the unevenness increases Neel coupling (also referred to as orange peel coupling) between the free layer 14 and the reference layer 16, and interaction between the free layer 14 and the reference layer 16 is increased. To increase. By increasing this interaction, the write current Ic for causing magnetization reversal in the magnetoresistive memory 10 can be made smaller than that of the magnetoresistive memory 30 of the comparative example for the following reason. That is, even in a magnetoresistive memory that uses a free layer composed of a plurality of magnetic layers in order to maintain the retention characteristics, by adopting a stacked structure like the magnetoresistive memory 10, the magnetoresistive memory 30 The write current Ic can be made smaller than in the case of the stacked structure.

Hereinafter, the reason why the write current Ic becomes smaller due to the increased interaction will be described.
(Bias voltage dependence of resistance-magnetic field characteristics (hereinafter referred to as RH characteristics) of the free layer 14 of the magnetoresistive memory 10)
FIG. 3 is a diagram illustrating an example of the bias voltage dependence of 0 V or more of the RH characteristics of the free layer of the magnetoresistive memory according to the present embodiment.

The horizontal axis represents the bias magnetic field strength H (unit: Oe), and the vertical axis represents the resistance R (Ω).
In the magnetoresistive memory 10 to be measured, the leakage magnetic field suppression layer 11 is a CoPt layer, the base layer 12 is a Ru layer, and the insulating layer 13 is an MgO layer. In the free layer 14, the magnetization promotion layer 14a is a Ta layer, and the magnetic layers 14b and 14c are CoFeB layers. Further, the tunnel insulating layer 15 is an MgO layer, and the reference layer 16 is a CoFeB layer. The magnetization promotion layer 17 is a Ta layer, the magnetization reversal suppression layer 18 is a CoPt layer, the conductive layer 19 is a Ru layer, and the leakage magnetic field suppression layer 20 is a CoPt layer.

Note that the size of the stacked structure (memory element) (area of the xy plane when the film thickness direction is the z direction) is 45 nm × 45 nm.
Each of these layers is, for example, laminated by sputtering and then crystallized by annealing (an example of a method for manufacturing the magnetoresistive memory 10 will be described later).

  In FIG. 3, when bias voltages of 0 V, 0.2 V, 0.4 V, and 0.6 V are applied between electrodes (see FIG. 17) that sandwich the laminated structure of the magnetoresistive memory 10 as described above, An example of RH characteristics is shown.

  The RH characteristic has a hysteresis characteristic as shown in FIG. Hereinafter, the intensity of the bias magnetic field at the center of the hysteresis loop is referred to as an offset magnetic field Hoff, and the difference in the intensity of the bias magnetic field from the center of the hysteresis loop to the right end or the left end is referred to as a coercive force Hc.

As shown in FIG. 3, when the bias voltage increases in the positive direction, the offset magnetic field Hoff shifts to the negative side, and the coercive force Hc decreases.
FIG. 4 is a diagram illustrating an example of a bias voltage dependency of 0 V or less of the RH characteristics of the free layer of the magnetoresistive memory according to the present embodiment.

The horizontal axis represents the bias magnetic field strength H (unit: Oe), and the vertical axis represents the resistance R (Ω).
The magnetoresistive memory 10 to be measured is the same as that at the time of measurement in FIG.

  FIG. 4 shows an example of the RH characteristic when bias voltages of 0 V, −0.2 V, −0.4 V, and −0.6 V are applied between electrodes sandwiching the laminated structure of the magnetoresistive memory 10. Has been.

As shown in FIG. 4, when the bias voltage increases in the negative direction, the offset magnetic field Hoff shifts to the positive side, and the coercive force Hc decreases.
FIG. 5 is a diagram illustrating an example of bias voltage dependence of the offset magnetic field and the coercive force.

The horizontal axis indicates the bias voltage (unit is V), and the vertical axis indicates the coercive force Hc and the offset magnetic field Hoff (unit is Oe).
As shown in FIG. 5, the coercive force Hc decreases as the absolute value of the bias voltage increases, and the offset magnetic field Hoff changes substantially linearly with respect to the bias voltage.

  The change in the coercive force Hc as described above is caused by the effect that the perpendicular magnetic anisotropy changes due to the spin-polarized current flowing in the MTJ portion or the change in the bias voltage, and between the free layer 14 and the reference layer 16. This is thought to be due to the effect of changing the exchange interaction.

  On the other hand, the change in the offset magnetic field Hoff as described above is caused by the bias voltage in which the spin-polarized current flowing in the MTJ portion and the exchange coupling acting between the free layer 14, the tunnel insulating layer 15, and the reference layer 16 change. This is thought to be due to

  Note that the magnitude of the exchange coupling increases in a region where the tunnel insulating layer 15 is thin (see, for example, Non-Patent Document 2). In addition, the magnitude of the exchange interaction varies depending on the bias voltage (see, for example, Non-Patent Document 3). Note that exchange interaction also works between the magnetic layer 14b, the magnetization promotion layer 14a, and the magnetic layer 14c of the free layer 14 (see, for example, Non-Patent Document 4).

In the magnetoresistive memory 10 of this embodiment having the characteristics shown in FIG. 5, the magnetization reversal is performed by changing the bias voltage as follows, and the resistance of the MTJ portion changes.
FIG. 6 is a diagram illustrating an example of magnetization reversal.

FIG. 6 shows the state of the RH characteristics when the bias voltage is −0.6 V, 0 V, and 0.6 V.
When the bias magnetic field strength H is zero, when a bias voltage of 0.6 V is applied, the resistance R is in a relatively high resistance state of 6000Ω or more. When the bias voltage is 0V while the bias magnetic field strength H is kept zero, the resistance R maintains a high resistance state, and the coercive force Hc is larger than when the bias voltage is 0.6V. Become.

  When the bias voltage changes from 0V to -0.6V while the intensity H of the bias magnetic field is maintained at zero, magnetization reversal occurs and the resistance R becomes a relatively low resistance state of 5000Ω or less.

If the bias voltage changes to 0V again while the bias magnetic field strength H remains zero, the resistor R remains in the low resistance state.
When the bias voltage changes to 0.6 V again while maintaining the bias magnetic field strength H at zero, magnetization reversal occurs and the resistance R enters a high resistance state.

Using this property, “0” writing and “1” writing to the MTJ portion of the magnetoresistive memory 10 can be performed as follows without applying the bias magnetic field strength H.
FIG. 7 is a diagram showing a state of writing “0”.

FIG. 7 shows an MTJ portion including the free layer 14, the tunnel insulating layer 15, and the reference layer 16 in which the magnetization direction is fixed downward.
When the intensity H of the bias magnetic field is zero and the bias voltage Vb = 0 V and the resistance state is high (the magnetization direction of the free layer 14 is opposite to the magnetization direction of the reference layer 16), In this state, “1” is written.

  When “0” is written to the MTJ portion, the bias voltage Vb = −V1 is set such that the RH characteristic has only a low resistance state (for example, 5000Ω or less in the case of FIG. 6) when the intensity H of the bias magnetic field is zero. This is done by applying to the MTJ part. As a result, the magnetization direction of the free layer 14 is reversed and becomes the same as the magnetization direction of the reference layer 16, and “0” is written.

FIG. 8 is a diagram illustrating a state of writing “1”.
When the bias magnetic field strength H is zero and the bias voltage Vb = 0 V and the resistance state is low (the magnetization direction of the free layer 14 is the same as the magnetization direction of the reference layer 16), In this state, 0 "is written.

  When “1” is written to the MTJ portion, when the bias magnetic field strength H is zero, a bias voltage Vb = + V2 that has only a high resistance state (for example, 6000Ω or more in the case of FIG. 6) is obtained. This is done by applying to the part. As a result, the magnetization direction of the free layer 14 is reversed, opposite to the magnetization direction of the reference layer 16, and “1” is written.

FIG. 9 is a phase diagram illustrating an example of the relationship between the bias voltage, the coercive force, and the offset magnetic field.
The horizontal axis represents the bias voltage Vb, and the vertical axis represents the coercive force Hc, the offset magnetic field Hoff, and Hoff0-Hoff. Hoff0 indicates the offset magnetic field Hoff when the bias voltage Vb = 0V.

  In addition to the bias voltage dependency of the offset magnetic field Hoff and the coercive force Hc, FIG. 9 shows the bias voltage dependency of Hoff0−Hoff in a portion where the bias voltage Vb is 0 V or more.

  The bias voltage Vb at which “0” can be written has such a value that the RH characteristic has only a low resistance state when the intensity H of the bias magnetic field is zero. When the intensity H of the bias magnetic field is zero, the RH characteristic that has only a low resistance state can be said to be an RH characteristic that satisfies the condition of Hoff> Hc as can be seen from FIG. The bias voltage Vb that satisfies this condition is Vb <Vth0 in the phase diagram of FIG. In other words, “0” can be written by setting the bias voltage Vb to Vb <Vth0.

  On the other hand, the bias voltage Vb at which “1” can be written is such a value that the RH characteristic has only a high resistance state when the intensity H of the bias magnetic field is zero. When the intensity H of the bias magnetic field is zero, the RH characteristic that has only a high resistance state can be said to be an RH characteristic that satisfies the condition of Hoff0−Hoff> Hc as can be seen from FIG. The bias voltage Vb satisfying this condition is Vb> Vth1 in the phase diagram of FIG. In other words, “1” can be written by setting the bias voltage Vb to Vb> Vth1.

FIG. 10 is a phase diagram showing an example of the relationship between the bias voltage, the coercive force, and the offset magnetic field in the magnetoresistive memory according to the present embodiment.
FIG. 10 is obtained by rewriting the bias voltage dependence of the offset magnetic field and the coercive force shown in FIG. 5 into a phase diagram as shown in FIG. FIG. 10 shows the offset magnetic field Hoff when the bias voltage Vb is 0 V or lower, the bias voltage dependency of Hoff0-Hoff when the bias voltage Vb is 0 V or higher, and the bias voltage dependency of the coercive force Hc.

  As shown in FIG. 10, Vb <Vth0 and Hoff> Hc. In the example of FIG. 10, Vth0 has a smaller absolute value than −0.4V. Further, Vb> Vth1 and Hoff0−Hoff> Hc. Vth0 has a value of about 0.4 V in the example of FIG.

That is, “0” writing and “1” writing can be performed with a relatively small bias voltage Vb.
As a result, the write current Ic to the MTJ portion can be relatively small.

For comparison, the bias voltage dependence of the RH characteristic of the free layer 35 of the magnetoresistive memory 30 shown in FIG. 2 is shown.
(Dependence of bias voltage on RH characteristics of free layer 35 of magnetoresistive memory 30)
FIG. 11 is a diagram illustrating an example of the bias voltage dependence of 0 V or more of the RH characteristics of the free layer of the magnetoresistive memory of the comparative example.

The horizontal axis represents the bias magnetic field strength H (unit: Oe), and the vertical axis represents the resistance R (Ω).
In the magnetoresistive memory 30 to be measured, the material of each layer other than the Ta layer 33 is the same as that of the magnetoresistive memory 10.

Note that the size of the laminated structure (the area of the xy plane when the film thickness direction is the z direction) is 45 nm × 45 nm.
FIG. 11 shows an example of the RH characteristic when bias voltages of 0 V, 0.2 V, 0.4 V, and 0.6 V are applied between the electrodes that sandwich the laminated structure of the magnetoresistive memory 30 as described above. It is shown. As shown in FIG. 11, when the bias voltage increases in the positive direction, the coercive force Hc decreases in the same characteristic as in FIG. 3, but the offset magnetic field Hoff shift is smaller than that in FIG.

FIG. 12 is a diagram illustrating an example of a bias voltage dependency of 0 V or less of the RH characteristics of the free layer of the magnetoresistive memory of the comparative example.
The horizontal axis represents the bias magnetic field strength H (unit: Oe), and the vertical axis represents the resistance R (Ω).

The magnetoresistive memory 30 to be measured is the same as that at the time of measurement in FIG.
FIG. 12 shows an example of the RH characteristic when bias voltages of 0 V, −0.2 V, −0.4 V, and −0.6 V are applied between electrodes sandwiching the stacked structure of the magnetoresistive memory 30. Has been. As shown in FIG. 12, when the bias voltage increases in the negative direction, the coercive force Hc decreases in the same characteristic as in FIG. 4, but the offset magnetic field Hoff shift is smaller than that in FIG.

FIG. 13 is a diagram illustrating an example of the bias voltage dependence of the offset magnetic field and the coercive force in the magnetoresistive memory of the comparative example.
The horizontal axis indicates the bias voltage (unit is V), and the vertical axis indicates the coercive force Hc and the offset magnetic field Hoff (unit is Oe).

  As shown in FIG. 13, the coercive force Hc decreases as the absolute value of the bias voltage increases. The offset magnetic field Hoff decreases as the bias voltage increases, but the degree is smaller than that in FIG.

  In the magnetoresistive memory 30 of the comparative example having such characteristics, the absolute value of the bias voltage satisfying Hoff> Hc and the absolute value of the bias voltage satisfying Hoff0−Hoff> Hc are larger than those of the magnetoresistive memory 10. . For this reason, the write current Ic also increases.

(Example of write current Ic)
FIG. 14 is a diagram showing an example of the resistance dependence of the write current in the magnetoresistive memory of this embodiment and the magnetoresistive memory of the comparative example.

  The horizontal axis represents the resistance R (unit: Ω) between the electrodes sandwiching the stacked structure of the magnetoresistive memories 10 and 30 shown in FIG. 1 or FIG. 2, and the vertical axis represents “0” writing or “1” writing. Write current Ic (unit: μA).

  As shown in FIG. 14, the write current Ic tends to be lower in the magnetoresistive memory 10 than in the magnetoresistive memory 30 regardless of whether the value of the resistance R is small or large. Is obtained.

(Example of MR ratio)
FIG. 15 is a diagram showing an example of the resistance dependency of the MR ratio in the magnetoresistive memory of this embodiment and the magnetoresistive memory of the comparative example.

The horizontal axis represents the resistance R (unit: Ω) of the magnetoresistive memory 10, 30 shown in FIG. 1 or FIG. 2, and the vertical axis represents the MR ratio (unit:%).
As shown in FIG. 15, the MR ratio value of the magnetoresistive memory 10 is equal to the value of the magnetoresistive memory 30.

Hereinafter, a method for manufacturing the magnetoresistive memory 10 of the present embodiment will be described.
(Example of manufacturing method of magnetoresistive memory 10)
FIG. 16 is a flowchart showing a flow of a manufacturing method of the magnetoresistive memory.

Manufacturing steps of the magnetoresistive memory 10 include a film forming process (step S1), an annealing process (step S2), and a processing process (step S3).
In the film forming process, the following laminated structure is formed.

FIG. 17 is a cross-sectional view illustrating an example of a laminated structure formed by a film forming process.
The same reference numerals are assigned to the same layers as those shown in FIG. In the example of FIG. 17, an example is shown in which electrodes (lower electrode 52 and upper electrode 53) are formed above and below the stacked structure shown in FIG. 1 via buffer layers 50 and 51.

Hereinafter, examples of forming each layer will be described. In addition, the range of the film thickness of each layer is based on the reason mentioned above.
The film forming process is performed in-situ using, for example, a multi-chamber type sputtering apparatus.

  First, as a lower electrode 52, for example, a Ta layer 52a having a thickness of about 3 nm, a Ru layer 52b having a thickness of about 20 nm, and a Ta layer 52c having a thickness of about 15 nm are formed on a substrate such as a multilayer wiring wafer (not shown). . The Ta layers 52a and 52c are formed by RF (Radio Frequency) sputtering, for example, at 1000 V in a Kr (krypton) gas atmosphere, and the Ru layer 52b is 600 W in an Ar (argon) gas atmosphere. The Ta layer 52c is formed for the purpose of use as an etching stopper when the MTJ portion is formed by reactive etching (RIE (Reactive Ion Etching)) using methanol gas.

  On the lower electrode 52, the buffer layer 50 is formed using, for example, Ru having a thickness of about 2 to 10 nm. On the buffer layer 50, the leakage magnetic field suppression layer 11 is formed using CoPt having a film thickness of about 4 to 8 nm, for example. The leakage magnetic field suppression layer 11 made of CoPt is formed, for example, by depositing Co and Pt alternately at 300 W in an Xe (xenon) gas atmosphere by RF sputtering. For example, the film formation of Co with a thickness of 0.4 nm and Pt with a thickness of 0.6 nm is repeated 6 times, and finally Co is formed with a thickness of 0.4 nm to obtain CoPt with a thickness of 6.4 nm. It is done.

  The leakage magnetic field suppression layer 11 may not be provided when the leakage magnetic field from the reference layer 16 is sufficiently small. However, in the magnetoresistive memory 10 having the top pin structure, when RIE processing is performed, it is desirable to introduce a layer of about 2 to 10 nm (the base layer 12 and the buffer layer 50) under the free layer 14. This is because it is possible to prevent the MTJ portion from deteriorating due to etching residue adhering during RIE processing.

  Thereafter, an underlayer 12 made of Ru, for example, with a film thickness of 2 to 10 nm is formed on the leakage magnetic field suppressing layer 11 by RF sputtering. Furthermore, an insulating layer 13 made of, for example, MgO is formed on the base layer 12 with a film thickness of 0.5 to 1.0 nm.

  For example, when forming the insulating layer 13 with a film thickness of about 0.8 nm, first, a Mg layer with a film thickness of 0.7 nm is formed by RF sputtering at 100 W in an Ar atmosphere. Thereafter, the magnetoresistive memory 10 being manufactured is moved to the oxidation chamber of the multi-chamber type sputtering apparatus and naturally oxidized for 10 seconds. Thereafter, an insulating layer 13 having a film thickness of about 0.8 nm is obtained by forming a Mg layer having a film thickness of 0.2 nm, for example, by RF sputtering again. The Mg layer having a thickness of 0.2 nm is provided to adjust the ratio of Mg atoms to O (oxygen) atoms and to prevent the free layer 14 on the insulating layer 13 from being oxidized.

Thereafter, the magnetic layer 14b of Co ₁₅ Fe ₆₀ B ₂₅ is formed with a film thickness of 1.1 to 1.9 nm on the insulating layer 13 by RF sputtering, for example, at 300 W in an Ar atmosphere. Further, a magnetization promoting layer 14a made of Ta is formed with a film thickness of 0.4 to 2.0 nm by RF sputtering on the magnetic layer 14b, for example, at 300 W in an Ar atmosphere. On the magnetization promotion layer 14a, for example, a magnetic layer 14c of Co ₂₀ Fe ₆₀ B ₂₀ is formed with a film thickness of 0.7 to 1.2 nm by RF sputtering in an Ar atmosphere at 300 W.

Note that the B composition ratio in the magnetic layer 14b is larger than the B composition ratio in the magnetic layer 14c so as to facilitate perpendicular magnetization in the magnetic layer 14b.
Thereafter, similarly to the formation method of the insulating layer 13, for example, the tunnel insulating layer 15 made of MgO having a thickness of less than 1.0 nm and 0.8 nm or more is formed. For example, when the tunnel insulating layer 15 having a thickness of about 0.9 nm is formed, an Mg layer having a thickness of 0.7 nm is first formed on the magnetic layer 14c, and MgO is formed by natural oxidation for 55 seconds. A 0.2 nm Mg layer is formed. The Mg layer having a thickness of 0.2 nm is provided to adjust the ratio of Mg atoms to O atoms and to prevent the reference layer 16 on the tunnel insulating layer 15 from being oxidized.

Thereafter, the reference layer 16 of Co ₁₅ Fe ₆₀ B ₂₅ is formed with a film thickness of 1.1 to 1.9 nm on the tunnel insulating layer 15 by RF sputtering, for example, in an Ar atmosphere at 300 W. Further, the magnetization promotion layer 17 made of Ta, for example, is formed with a film thickness of 0.2 to 0.5 nm on the reference layer 16 by RF sputtering, and the magnetization reversal suppression layer 18 made of CoPt is formed on the magnetization promotion layer 17. It is formed with a thickness of 4 to 8 nm. Also, a conductive layer 19 made of, for example, Ru is formed with a film thickness of 0.6 to 1.2 nm on the magnetization reversal suppressing layer 18 by RF sputtering, and a leakage magnetic field suppressing layer 20 made of, for example, CoPt is formed on the conductive layer 19. Is formed with a film thickness of 6 to 15 nm.

Thereafter, for example, the buffer layer 51 of Ru is formed with a film thickness of about 7 nm by RF sputtering, and the upper electrode 53 of Ta is formed with a film thickness of about 120 nm on the buffer layer 51. The upper electrode 53 made of Ta is used as a hard mask when the MTJ portion is subjected to RIE processing. The upper electrode 53 is processed by RIE using a mixed gas of CL ₂ (chlorine) and BCL ₃ (boron trichloride), for example. The buffer layer 51 made of Ru is used as an etching stopper during hard mask processing.

After the film formation process as described above, an annealing process for crystallization is performed on the formed laminated structure. The annealing process is performed at 300 ° C., for example.
After the annealing process, a processing process using RIE or the like is performed, and the magnetoresistive memory 10 is formed.

FIG. 18 is a diagram illustrating an example of an equivalent circuit of a magnetoresistive memory including a memory element and a transistor.
The magnetoresistive memory 10 includes a plurality of memory elements (magnetoresistive elements) 61a1 to 61an each including an MTJ portion, and a plurality of transistors (n-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors)) 61b1 to 61bn. Each of the memory elements 61a1 to 61an has a stacked structure as shown in FIG.

  For example, the lower electrode (lower electrode 52 in FIG. 17) of the memory element 61a1 is connected to one input / output terminal (drain or source) of the transistor 61b1. The upper electrode (the upper electrode 53 in FIG. 17) of the memory element 61a1 is connected to the bit line 62. Other memory elements and transistors have the same connection.

  For example, when writing to the memory element 61a1, a voltage of H (High) level is applied to the word line 63 by a selection circuit (not shown), and the transistor 61b1 is turned on. Then, a voltage is applied so that currents having different polarities flow between the bit line 62 and the source line 64 in accordance with the write value. When the current density of the write current Ic exceeds the “0” write or “1” write threshold, the magnetization of the free layer 14 is reversed, and the recorded content (“1” or “0”) is reversed.

  On the other hand, at the time of reading from the memory element 61a1, an H level voltage is applied to the word line 63 by a selection circuit (not shown), and the transistor 61b1 is turned on. A voltage smaller than that at the time of writing is applied between the bit line 62 and the source line 64. As a result, a current value based on the resistance value of the memory element 61a1 flows between the bit line 62 and the source line 64 via the transistor 61b1 and the memory element 61a1, and the current is detected by a sense amplifier (not shown). Is determined.

  In the magnetoresistive memory 10 according to the present embodiment, the insulating layer 13 and the MTJ portion are sequentially formed on the base layer 12 as described above. Therefore, as described above, the interaction between the free layer 14 and the reference layer 16 is increased by the influence of the irregularities on the surface of the underlayer 12, and the write current Ic can be reduced. Thereby, the power consumption of the magnetoresistive memory 10 is suppressed.

  As described above, one aspect of the magnetoresistive memory and the method of manufacturing the magnetoresistive memory according to the present invention has been described based on the embodiments. However, these are merely examples, and the present invention is not limited to the above description.

DESCRIPTION OF SYMBOLS 10 Magnetoresistive memory 11, 20 Leakage magnetic field suppression layer 12 Underlayer 13 Insulating layer 14 Magnetization free layer 14a, 17 Magnetization promotion layer 14b, 14c Magnetic layer 15 Tunnel insulating layer 16 Reference layer 18 Magnetization reversal suppression layer 19 Conductive layer Ic Write current

Claims (4)

A first material having conductivity, an underlayer having a columnar crystal structure;
A first insulating layer formed on the underlayer;
A magnetization free layer formed on the first insulating layer and including a plurality of first magnetic layers having a variable magnetization direction formed so as to face each other with a magnetization promotion layer promoting perpendicular magnetization interposed therebetween;
A second insulating layer formed on the magnetization free layer;
A second magnetic layer formed on the second insulating layer and having a fixed magnetization direction;
A magnetoresistive memory comprising: The relationship between the bias magnetic field for the magnetization free layer and the resistance based on the magnetization direction of the magnetization free layer shows a hysteresis characteristic that changes according to the bias voltage applied to the magnetization free layer,
The offset magnetic field, which is the bias magnetic field in the center of the hysteresis loop of the hysteresis characteristic, has a characteristic that decreases as the bias voltage increases,
The coercive force based on the hysteresis loop has a characteristic of decreasing as the absolute value of the bias voltage increases,
When the bias voltage is smaller than a first voltage value, the offset magnetic field is larger than the coercivity, and a first value is written,
When the bias voltage is greater than a second voltage value, the difference between the offset magnetic field and the offset magnetic field when the bias voltage is not applied is greater than the coercivity, and the second value is written. Called
The magnetoresistive memory according to claim 1.   The magnetoresistive memory according to claim 1, wherein the second insulating layer is made of MgO having a thickness of less than 1 nm. A first insulating layer is formed on the base layer that includes the first material having conductivity and has a columnar crystal structure by annealing.
On the first insulating layer, a magnetization free layer including a plurality of first magnetic layers with variable magnetization directions formed so as to face each other with a magnetization promoting layer promoting perpendicular magnetization interposed therebetween,
Forming a second insulating layer on the magnetization free layer;
Forming a second magnetic layer having a fixed magnetization direction on the second insulating layer;
A method of manufacturing a magnetoresistive memory.

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