JP2016178592A - Video encoder, video encoding device, video encoding method and video encoding program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a video encoder, and the like, capable of enhancing the prediction accuracy, even when there is one reference picture.SOLUTION: A video encoder 1A includes detection means 11 for detecting whether the number of succession motion vector, received by refine means 30 as a reference of search of a prediction motion vector representing the prediction of motion of a processing object block in a picture included in a coding object video, is one or two, prosthetic vector selection means 12 for selecting a prosthetic vector according to a predetermined selection method, when the number of succession motion vector is one, and transmission means 13 for transmitting a selected prosthetic motion vector to the refine means for detecting the prediction motion vector of the processing object block, based on the prosthetic motion vector and the received prosthetic vector.SELECTED DRAWING: Figure 10

Description

  The present invention relates to a technique for encoding video.

  Patent Documents 1 and 2 describe examples of techniques for encoding video. The video encoding apparatus described in Patent Document 1 encodes a video block using one of bidirectional prediction for two reference pictures and unidirectional prediction for one reference picture.

Special table 2014-506084 gazette

  In the technique of Patent Literature 1, when there is one reference picture, only unidirectional prediction is used. Therefore, it is not always possible to predict with high accuracy.

  One of the objects of the present invention is to provide a video encoding device and the like that can improve the accuracy of prediction even when there is only one reference picture.

  In the video encoding device according to an aspect of the present invention, the number of inherited motion vectors received by the refinement unit as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video is Detecting means for detecting whether the number is one or two; if the number of the inherited motion vectors is one, the compensating vector selecting means for selecting a compensating motion vector according to a predetermined selecting method; and the inheritance Transmitting means for transmitting the selected compensation motion vector to the refinement means for detecting the predicted motion vector of the processing target block based on the motion vector and the received compensation vector.

  In the video encoding method according to one aspect of the present invention, the number of inherited motion vectors received by the refiner as a reference for searching for a predicted motion vector representing prediction of motion of a block to be processed in a picture included in a video to be encoded is calculated. If the number of the inherited motion vectors is one, the compensation motion vector is selected according to a predetermined selection method, and the inherited motion vector and the received compensation vector are detected. Based on the above, the selected compensation motion vector is transmitted to the refiner that detects the predicted motion vector of the processing target block.

  A video encoding program according to an aspect of the present invention is a computer-readable recording medium including an inherited motion vector received by a refinement unit as a reference for a search for a predicted motion vector representing a motion prediction of a processing target block in a picture included in an encoding target video Detecting means for detecting whether the number of motion vectors is one or two; and, when the number of inherited motion vectors is one, compensation vector selection means for selecting a compensation motion vector according to a predetermined selection method; Based on the inherited motion vector and the received compensation vector, the refinement unit that detects the predicted motion vector of the processing target block is operated as a transmission unit that transmits the selected compensation motion vector.

  The present invention has an effect that the accuracy of prediction can be improved even when there is only one reference picture.

FIG. 1 is a block diagram showing an overall image of a video encoding device 1 according to the first embodiment of the present invention. FIG. 2 is a block diagram showing an implementation example of the entire video encoding device 1 according to the first embodiment of the present invention. FIG. 3 is a block diagram illustrating an example of a configuration of the motion compensation unit 100 of the video encoding device 1 according to the first embodiment of the present invention. FIG. 4 is a block diagram illustrating an example of a configuration of a motion compensation circuit 200 that is an implementation example of the motion compensation unit 100 of the video encoding device 1 according to the first embodiment of the present invention. FIG. 5 is a diagram schematically showing the position of a block from which a motion vector is selected by the AMVP generation circuit 260. FIG. 6 is a block diagram illustrating an example of a configuration of the motion vector compensation unit 10 according to the first embodiment of this invention. FIG. 7 is a block diagram illustrating an example of a configuration of a motion vector compensation circuit 210 that is an implementation example of the motion vector compensation unit 10 according to the first embodiment of this invention. FIG. 8 is a flowchart illustrating an example of an operation of generating a predicted image of the encoding target image in the video encoding device 1 according to the first embodiment of the present invention. FIG. 9 is a flowchart showing an example of motion vector compensation processing in the video encoding device 1 according to the first embodiment of the present invention. FIG. 10 is a block diagram illustrating an example of a configuration of a video encoding device 1A according to the second embodiment of the present invention. FIG. 11 is a diagram illustrating an example of a hardware configuration of a computer 1000 that can realize the video encoding device according to each embodiment of the present invention. FIG. 12 is a block diagram illustrating an example of an overall image of a video encoding device 1C of a comparative example of the present invention. FIG. 13 is a block diagram showing an example of the configuration of a motion compensation circuit 300 according to a comparative example of the present invention.

  Next, embodiments of the present invention will be described in detail with reference to the drawings.

<Comparative example>
First, a comparative example as an object to be compared with the embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 12 is a block diagram illustrating an example of an overall image of a video encoding device 1C of a comparative example of the present invention. The video encoding device 1C is a device that encodes received video. Specifically, the video encoding device 1C receives video, and encodes the received video in accordance with, for example, any encoding method. The video encoding device 1C is a device that outputs a bitstream in which video is encoded. The encoding method is, for example, H.264. H.265 / HEVC (High Efficiency Video Coding). The encoding method is, for example, H.264. H.264 / MPEG-4 AVC (Moving Picture Experts Group Advanced Video Coding). In the following, the encoding method is H.264. The case of H.265 / HEVC will be described.

  Referring to FIG. 12, the video encoding device 1C includes a block division circuit 201, a pre-analysis circuit 202, a motion compensation circuit 300, an intra prediction circuit 203, a switching circuit 204, an integer conversion circuit 205, a quantization, and the like. A circuit 206, an inverse quantization circuit 207, an inverse transformation circuit 208, and an encoding circuit 209 are included. The video encoding device 1C further includes a filter circuit 216, a frame buffer 217, a subtraction circuit 218, and an addition circuit 219.

  The block division circuit 201 divides a digitized video picture into blocks. The intra prediction circuit 203 performs intra prediction. The switching circuit 204 switches between an output from a motion compensation circuit 300 described later and an output from the intra prediction circuit 203. The subtraction circuit 218 calculates the difference between the input video and the output from the motion compensation circuit 300 or the output from the intra prediction circuit 203 selected by the switching by the switching circuit 204. The integer conversion circuit 205 performs integer conversion. The quantization circuit 206 performs quantization. The encoding circuit 209 performs encoding and outputs a bit stream obtained by encoding. The inverse quantization circuit 207 performs inverse quantization. The inverse integer conversion circuit 208 performs inverse integer conversion. The adder circuit 219 adds the output of the inverse integer conversion circuit 208 and the output from the motion compensation circuit 300 or the output from the intra prediction circuit 203 selected by the switching by the switching circuit 204. The filter circuit 216 performs filtering using a deblocking filter or the like. The frame buffer 217 stores the encoded picture. Each of the above elements performs an operation according to the above-mentioned standard. Therefore, detailed description of the above elements is omitted.

  For example, the pre-analysis circuit 202 detects a motion vector in an input picture (that is, a picture to be encoded) using an encoded picture stored in the frame buffer 217, for example. For example, when the encoding target picture is a P picture, the pre-analysis circuit 202 transmits one motion vector to the motion compensation circuit 300. When the encoding target picture is a B picture, the pre-analysis circuit 202 transmits one or two motion vectors to the motion compensation circuit 300. When the encoding target picture is a B picture, the pre-analysis circuit 202 derives, for example, two motion vectors. When the pre-analysis circuit 202 determines that any of the motion vectors is optimal based on a predetermined determination criterion, the pre-analysis circuit 202 may transmit only the motion vector determined to be optimal to the motion compensation circuit 300. . In that case, the pre-analysis circuit 202 transmits one motion vector to the motion compensation circuit 300. If there is no motion vector determined to be optimal by the pre-analysis circuit 202, the pre-analysis circuit 202 transmits two motion vectors to the motion compensation circuit 300.

  The reference image related to the two motion vectors may be a combination of a picture after the encoding target image and a preceding picture, or a combination of two pictures before the encoding target image. It may be a combination of two later pictures. In the following description, a motion vector transmitted from the pre-analysis circuit 202 to the motion compensation circuit 300 is referred to as an inherited motion vector.

Two signal lines capable of separately transmitting two inherited motion vectors may be provided between the pre-analysis circuit 202 and the motion compensation circuit 300. Then, the two inherited motion vectors may be transmitted to the motion compensation circuit 300 through different signal lines. When the pre-analysis circuit 202 transmits one inherited motion vector to the motion compensation circuit 300, the prior analysis circuit 202 may transmit the inherited motion vector through one of the signal lines. Then, the pre-analysis circuit 202 may transmit a signal representing a signal line system used for transmission of the inherited motion vector to the motion compensation circuit 300. For example, the two signal lines are referred to as a first signal line and a second signal line. In the following description, the inherited motion vector transmitted through the first signal line is denoted as “mMV ₀ ”. Similarly, the inherited motion vector transmitted via the second signal line is denoted as “mMV ₁ ”.

Pre-analysis circuit 202, for example, send the MMV _0, to not send the MMV ₁ transmits the MMV _0, a signal indicating not to send the MMV _1, and transmits to the motion compensation circuit 300. For example, when the pre-analysis circuit 202 does not transmit mMV ₀ but transmits mMV ₁ , the pre-analysis circuit 202 transmits a signal indicating that the mMV ₁ is transmitted without transmitting the mMV ₀ to the motion compensation circuit 300. For example, when transmitting the mMV ₀ and the mMV ₁ , the pre-analysis circuit 202 transmits a signal indicating that the mMV ₀ and the mMV ₁ are transmitted to the motion compensation circuit 300. In the following description, the signal representing the inherited motion vector to be transmitted is denoted as “mDir” (or signal “mDir”). Further, the signal mDir is also expressed as “prediction direction”. In the description of each embodiment of the present invention, the value indicating that the signal mDir transmits mMV ₀ and does not transmit mMV ₁ is also expressed as “L0”. The value indicating that the signal mDir does not transmit mMV ₀ but transmits mMV ₁ is also expressed as “L1”. Further, a value representing transmission of mMV ₀ and mMV _{1 of} the signal mDir is also expressed as “Bi”.

In general, L0 and L1 respectively indicate two reference image lists in a B picture. The above-described inherited motion vector MMV ₀ may be a motion vector in a reference image in the reference image list L0, for example. The inherited motion vector MMV ₁ may be, for example, a motion vector in a reference image in the reference image list L1.

  FIG. 13 is a block diagram illustrating an example of the configuration of the motion compensation circuit 300 of the comparative example.

  Referring to FIG. 13, the motion compensation circuit 300 according to the present modification includes a switch circuit 220, a refinement circuit 230, a bi-prediction generation circuit 240, and a prediction selection circuit 250. The switch circuit 320 includes a first switch circuit 321 and a second switch circuit 322. The refinement circuit 230 includes a first refinement circuit 231 and a second refinement circuit 232. Although not shown in FIG. 13, the refinement circuit 230 can read the encoded picture stored in the frame buffer 217, as shown in FIG.

A first signal line is connected to the input of the first switch circuit 321. Then, mMV ₀ is input to the input of the first switch circuit 321 through the first signal line. The output of the first switch circuit 321 is connected to the first refinement circuit 231. A second signal line is connected to the input of the second switch circuit 322. Then, mMV ₁ is input to the input of the second switch circuit 322 via the second signal line. The output of the second switch circuit 322 is connected to the second refinement circuit 232. A signal mDir is input to the first switch circuit 321 and the second switch circuit 322.

  In the first switch circuit 321 and the second switch circuit 322, the ON state, which is a state where the input and the output are connected, and the input and the connection are disconnected according to the value of the signal mDir. It is designed to switch between the off state, which is a state. Specifically, when the value of mDir is L0, the first switch circuit 321 is turned on and the second switch circuit 322 is turned off. When the value of mDir is L1, the first switch circuit 321 is turned off and the second switch circuit 322 is turned on. When the value of mDir is Bi, both the first switch circuit 321 and the second switch circuit 322 are turned on.

The first refinement circuit 231 is a region in which the coding cost of the block to be coded is minimized (that is, the predicted image) in a predetermined range based on the motion vector MMV ₀ of the reference image referenced by the input motion vector MMV ₀ . ) Is detected. The encoding cost may be an encoding cost selected from existing encoding costs. The encoding cost may be, for example, the sum of the sum of absolute values of errors (SAD: Sum of Absolute Difference) between the encoding target block and the predicted image and the weighted bit amount of the motion vector. The predetermined range based on the motion vector MMV ₀ may be, for example, inside a circle with a predetermined radius centered on the position indicated by the motion vector MMV ₀ . The predetermined range based on the motion vector MMV ₀ may be, for example, inside a figure having a predetermined shape centered on the position indicated by the motion vector MMV ₀ . The predetermined range based on the motion vector MMV ₀ may be, for example, the entire reference image referred to by the motion vector MMV ₀ . The first refinement circuit 231 sets a vector from the coordinates of the encoding target block in the picture including the encoding target block to the coordinates of the point indicating the region where the encoding target cost is minimum as the predicted motion vector rMV _0. To detect. The first refinement circuit 231 outputs the detected image of the region where the encoding target cost is minimized to the prediction selection circuit 250 as a prediction signal “pred (rMV ₀ )” indicating the prediction of the encoding target region. The first refinement circuit 231 does not operate when the signal mDir is L1, that is, when the inherited motion vector MMV ₀ is not input.

The second refinement circuit 232 is a region in which the coding cost of the coding target block is minimized (that is, the predicted image) in a predetermined range based on the motion vector MMV ₁ of the reference image referenced by the input motion vector MMV ₁ . ) Is detected. The predetermined range based on the motion vector MMV ₁ may be, for example, inside a circle with a predetermined radius centered on the position indicated by the motion vector MMV ₁ . The predetermined range based on the motion vector MMV ₁ may be, for example, inside a figure having a predetermined shape centered on the position indicated by the motion vector MMV ₁ . The predetermined range based on the motion vector MMV ₁ may be, for example, the entire reference image referred to by the motion vector MMV ₁ . The second refinement circuit 232 sets a vector from the coordinates of the encoding target block in the picture including the encoding target block to the coordinates of the point indicating the region where the encoding target cost is minimized as a predicted motion vector rMV _1. To detect. The second refinement circuit 232 outputs the detected image of the region where the encoding target cost is minimized to the prediction selection circuit 250 as a prediction signal “pred (rMV ₁ )” indicating the prediction of the encoding target region. The second refinement circuit 232 does not operate when the signal mDir is L2, that is, when the inherited motion vector MMV ₁ is not input.

Bi-predictive generating circuit 240, when the value of the signal mDir is Bi, that is, when the inheritance motion vector MMV ₀ and MMV ₁ are inputted, generates the bi-prediction based on the inherited motion vector MMV ₀ and MMV _1. The bi-prediction generation circuit 240 outputs a bi-prediction signal bipred (rMV ₀ , rMV ₁ ) representing the generated bi-prediction to the prediction selection circuit 250. In the following description, a region indicated by a point selected from a predetermined range based on the inherited motion vector MMV ₀ of the reference image referred to by the input inherited motion vector MMV ₀ is referred to as a first reference region. An area indicated by a point selected from a predetermined range based on the inherited motion vector MMV ₁ of the reference image referenced by the input inherited motion vector MMV ₁ is referred to as a second reference area. The bi-prediction generation circuit 240 calculates the average image having the minimum encoding cost as described above from the average images of the first reference area and the second reference area where the encoding cost of the encoding target block is minimum. Detect as bi-prediction. Then, the bi-prediction generation circuit 240 identifies the first reference region and the second reference region in which the average image with the lowest coding cost is calculated. Further, the bi-prediction generation circuit 240 sets the motion vector from the coordinate indicating the encoding target block to the coordinate indicating the identified first reference area as the predicted motion vector rMV ₀ . Similarly, the bi-prediction generation circuit 240 sets the motion vector from the coordinate indicating the encoding target block to the coordinate indicating the identified second reference region as the predicted motion vector rMV ₁ . The bi-prediction generation circuit 240 does not operate when the inherited motion vector mMV ₀ or the inherited motion vector mMV ₁ is not input.

  Note that one of the reference images of the inherited motion vectors MMV0 and mMV1 is a picture temporally preceding the encoding target image, and the other reference image is a picture temporally preceding the encoding target image. Also good. In that case, the average image with the minimum encoding cost among the average images of the first reference region and the second reference region, where the encoding cost of the encoding target block is the minimum, is called bi-directional prediction. . In other words, the bi-prediction generation circuit 240 may derive bi-directional prediction instead of bi-prediction and output the derived bi-directional prediction.

The prediction selection circuit 250 has a code among the prediction image represented by the prediction signal pred (rMV ₀ ), the prediction image represented by the prediction signal pred (rMV ₁ ), and the prediction image represented by the bi-prediction signal bipred (rMV ₀ , rMV ₁ ). The predicted image with the smallest cost to be converted is identified. And the prediction signal pred showing the identified prediction image and the prediction motion vector which shows the prediction image which the prediction signal pred represents are output. The prediction selection circuit 250 further outputs the signal mDir as the signal rDir. In the following description, the signal rDir may also be expressed as “prediction direction”. When the signal representing the selected prediction image is the prediction signal pred (rMV ₀ ), the prediction selection circuit 250 outputs rMV ₀ as the prediction motion vector. When the signal representing the selected prediction image is the prediction signal pred (rMV ₁ ), the prediction selection circuit 250 outputs rMV ₁ as a prediction motion vector. When the signal representing the selected prediction image is the bi-prediction signal bipred (rMV ₀ , rMV ₁ ), the prediction selection circuit 250 outputs rMV ₀ and rMV ₁ as prediction motion vectors.

  In the comparative example described above, when the encoding target block is included in the P picture, the second refinement circuit 232 and the bi-prediction generation circuit 240 do not operate and enter a sleep state. Further, even when the encoding target block is included in the B picture, if one inherited motion vector is input instead of two, the second refinement circuit 232 and the bi-prediction generation circuit 240 do not operate and sleep. It becomes a state.

<First Embodiment>
Next, a first embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing an overall image of the video encoding device 1 of the present embodiment. Referring to FIG. 1, the video encoding apparatus 1 according to the present embodiment includes a block dividing unit 101, a prior analysis unit 102, an intra prediction unit 103, a switching unit 104, an integer conversion unit 105, and a quantization unit 106. And an inverse quantization unit 107, an inverse integer transform unit 108, and an encoding unit 109. The encoding apparatus 1 according to the present embodiment further includes a filter unit 116, a frame storage unit 117, a subtraction unit 118, and an addition unit 119. The video encoding device 1 according to the present embodiment further includes a motion compensation unit 100.

  FIG. 2 is a block diagram showing an implementation example of the entire video encoding device 1 of the present embodiment. Comparing FIG. 2 with FIG. 12, the video encoding device 1 of the implementation example of the present embodiment includes a motion compensation circuit 200 instead of the motion compensation circuit 300. Other components of the video encoding device 1 of the implementation example of the present embodiment are the same as those of the video encoding device 1C of the comparative example to which the same reference numerals are given. Therefore, below, description of components other than the motion compensation circuit 200 among the components of the video encoding device 1 shown in FIG. 2 is omitted.

  In the example illustrated in FIG. 2, the block division circuit 201 operates as the block division unit 101. The pre-analysis circuit 202 operates as the pre-analysis unit 102. The intra prediction circuit 203 operates as the intra prediction unit 103. The switching circuit 204 operates as the switching unit 104. The integer conversion circuit 205 operates as the integer conversion unit 105. The quantization circuit 206 operates as the quantization unit 106. The inverse quantization circuit 207 operates as the inverse quantization unit 107. The inverse integer conversion circuit 208 operates as the inverse integer conversion unit 108. The encoding circuit 209 operates as the encoding unit 109. The filter circuit 216 operates as the filter unit 116. The frame buffer 217 operates as the frame storage unit 117. The subtraction circuit 218 operates as the subtraction unit 118. The adder circuit 219 operates as the adder 119. The motion compensation circuit 200 operates as the motion compensation unit 100. Therefore, below, description of components other than the motion compensation unit 100 among the components of the video encoding device 1 illustrated in FIG. 1 is omitted.

  FIG. 3 is a block diagram illustrating an example of the configuration of the motion compensation unit 100 of the video encoding device 1 of the present embodiment. Referring to FIG. 3, the motion compensation unit 100 includes a motion vector compensation unit 10, a switch unit 20, a refinement unit 30, a bi-prediction generation unit 40, a prediction selection unit 50, and an AMVP generation unit 60 (Advanced Motion Vector). Prediction) and a mode determination unit 70. In the following description, the AMVP generation unit 60 may be referred to as an “altitude motion vector prediction unit 60”.

  The AMVP generation unit 60 selects a prediction motion vector in a block around the encoding target block or a prediction motion vector of a picture immediately before the picture including the encoding target block, and uses the selected motion vector as a motion vector compensation unit 10 to send.

  The mode determination unit 70 transmits a signal representing a compensation mode to be described later to the motion vector compensation unit 10. The compensation mode may be experimentally determined in advance. In that case, the mode determination unit 70 may transmit a signal representing a compensation mode determined experimentally in advance to the motion vector compensation unit 10. The compensation mode may be determined in advance for each picture type. In this case, the mode determination unit 70 may transmit a signal representing the compensation mode determined for the type of picture including the encoding target block to the motion vector compensation unit 10. The compensation mode may be determined dynamically during the encoding process. In this case, for example, the mode determination unit 70 may evaluate the encoding error by comparing, for example, a picture and an image in which the picture is encoded and decoded. Then, the mode determination unit 70 may dynamically select the compensation mode so that the error is reduced by using the error evaluation result.

The motion vector compensation unit 10 selects a compensation motion vector from the motion vectors received from the AMVP generation unit 60 according to the selection method in the received compensation mode. The compensation mode and the selection method will be described later in detail. Motion vector compensation unit 10, one of the inherited motion vector MMV ₀ and inheritance motion vector MMV ₀ may be selected if compensation motion vector not input.

When the inherited motion vector MMV ₀ is not input, the switch unit 20 inputs the compensation motion vector to the refiner 30 instead of the inherited motion vector MMV ₀ . When the inherited motion vector MMV ₁ is not input, the switch unit 20 inputs the compensation motion vector to the refinement unit 30 instead of the inherited motion vector MMV ₁ .

  The refiner 30 operates in the same manner as the refiner circuit 230 of the comparative example described above. The bi-prediction generation unit 40 operates in the same manner as the bi-prediction generation circuit 240 of the comparative example described above. The prediction selection unit 50 operates in the same manner as the prediction selection circuit 250 of the above-described comparative example.

  FIG. 4 is a block diagram illustrating an example of a configuration of a motion compensation circuit 200 that is an implementation example of the motion compensation unit 100 of the video encoding device 1 of the present embodiment. The motion compensation circuit 200 of the present implementation example includes a motion vector compensation circuit 210, a switch circuit 220, a refinement circuit 230, a bi-prediction generation circuit 240, a prediction selection circuit 250, an AMVP generation circuit 260, and a mode determination circuit 270. Including. The switch circuit 220 includes a first switch circuit 221 and a second switch circuit 222. The refinement circuit 230 includes a first refinement circuit 231 and a second refinement circuit 232. Comparing FIG. 4 with FIG. 13, the refinement circuit 230, the bi-prediction generation circuit 240, and the prediction selection circuit 250 of the implementation example of the video encoding device 1 of the present embodiment are each the motion compensation of the above-described comparative example. The circuit 300 is the same as the component having the same name and symbol. The motion vector compensation unit 10 is realized by, for example, a motion vector compensation circuit 210 illustrated in FIG. The switch unit 20 is realized by, for example, the switch circuit 220 illustrated in FIG. The AMVP generation unit 60 is realized by, for example, the AMVP generation circuit 260 illustrated in FIG. The mode determination unit 70 is realized by, for example, the mode determination circuit 270 illustrated in FIG. Hereinafter, mainly the motion vector compensation circuit 210, the switch circuit 220, the AMVP generation circuit 260, and the mode determination circuit 270 will be described in detail.

  The AMVP generation circuit 260 receives the peripheral vector and selects a predicted motion vector from the received peripheral vector. The peripheral vector is a prediction motion vector of a block adjacent to the encoding target block or a prediction motion vector of a block of a picture immediately before the encoding target block. For example, when the encoding method is HEVC, the AMVP generation circuit 260 selects two prediction motion vectors. The AMVP generation circuit 260 may select a prediction motion vector as long as it is a selection method in the encoding method of video encoding performed by the video encoding device 1. The AMVP generation circuit 260 transmits the selected predicted motion vector to the motion vector compensation circuit 210.

  FIG. 5 is a diagram schematically showing the position of a block from which a motion vector is selected by the AMVP generation circuit 260. The AMVP generation circuit 260 selects, for example, predicted motion vectors of any two blocks of A0, A1, B0, B1, B2, C0, and C1. In the following description, the prediction motion vectors of the two blocks C0 and C1 are particularly expressed as “temporal prediction motion vectors”. In addition, the prediction motion vector of the blocks A0, A1, B0, B1, and B2 is particularly expressed as “AMVP prediction motion vector”. For example, the AMVP generation circuit 260 may select two AMVP predicted motion vectors from the predicted motion vectors of the blocks A0, A1, B0, B1, and B2. When there is no predicted motion vector that can be selected as the AMVP predicted motion vector in the predicted motion vectors of the blocks A0, A1, B0, B1, and B2, the AMVP generation circuit 260 calculates the predicted motion vector of the block of C0, It may be selected as a temporal prediction motion vector. Further, when the predicted motion vector of the C0 block cannot be selected as the temporal prediction motion vector, the AMVP generation circuit 260 may select the predicted motion vector of the C1 block as the temporal prediction motion vector. Then, the AMVP generation circuit 260 may transmit the selected AMVP prediction motion vector or temporal prediction motion vector to the motion vector compensation circuit 210. The AMVP generation circuit 260 may transmit the two selected AMVP prediction motion vectors and the temporal prediction motion vector to the motion vector compensation circuit 210. The AMVP generation circuit 260 may transmit the AMVP prediction motion vector and the temporal prediction motion vector to the motion vector compensation circuit 210 without selecting them.

  The mode determination circuit 270 determines a motion vector compensation mode, which will be described later, and transmits a signal indicating the determined compensation mode to the motion vector compensation circuit 210.

  Based on the value of the signal mDir and the compensation mode (for example, cMode in FIG. 4), the motion vector compensation circuit 210 calculates the compensation vector cMV from the AMVP predicted motion vector or the temporally predicted motion vector received from the AMVP generation circuit 260. select. The compensation mode cMode is input from the mode determination circuit 270, for example. The compensation mode cMode may be experimentally determined in advance and stored in a storage unit (not shown) outside the motion compensation circuit 200, for example. The motion vector compensation circuit 210 may read the compensation mode cMode from the storage unit outside the motion compensation circuit 200. The output of the motion vector compensation circuit 210 is connected to one of the two input terminals of the first switch circuit 221 and one of the two input terminals of the second switch circuit 222 included in the switch circuit 220.

One of the two input terminals of the first switch circuit 221 is connected to the motion vector compensation circuit 210. The other two input terminals of the first switch circuit 221 is connected to a signal line motion vector MMV ₀ is input. Further, the control terminal of the first switch circuit 221 is connected to the signal mDir. The first switch circuit 221 connects the input terminal connected to the output terminal to the input terminal connected to the signal line to which the motion vector MMV ₀ is input and the motion vector compensation circuit 210 according to the value of the signal mDir. Switch between connected signal lines. Specifically, when the value of the signal mDir is the above-described L0 or Bi, the first switch circuit 221 includes an input terminal connected to a signal line to which the motion vector mMV ₀ is input, and an output terminal. Connect between them. When the value of the signal mDir is L1 described above, the first switch circuit 221 connects between the input terminal connected to the motion vector compensation circuit 210 and the output terminal. The output terminal of the first switch circuit 221 is connected to the first refinement circuit 231 of the refinement circuit 230.

One of the two input terminals of the second switch circuit 222 is connected to the motion vector compensation circuit 210. The other two input terminals of the second switch circuit 222 is connected to a signal line motion vector MMV ₁ is input. Further, the control terminal of the second switch circuit 222 is connected to the signal mDir. The second switch circuit 222 has an input terminal connected to the output terminal in accordance with the value of the signal mDir, an input terminal connected to the signal line to which the motion vector MMV ₀ is input, and the motion vector compensation circuit 210. Switch between connected signal lines. Specifically, when the value of the signal mDir is L1 or Bi described above, the first switch circuit 221 includes an input terminal connected to a signal line to which the motion vector MMV ₁ is input, and an output terminal. Connect between them. When the value of the signal mDir is L0 described above, the second switch circuit 222 connects between the input terminal connected to the motion vector compensation circuit 210 and the output terminal. The output terminal of the second switch circuit 222 is connected to the second refinement circuit 232 of the refinement circuit 230.

By the motion compensation circuit 200 having the above configuration, when the inheritance motion vector MMV ₀ not input to the first refinement circuit 231, compensating the motion vector cMV is input to the first refined circuit 231. Further, when the inherited motion vector MMV ₁ is not input to the second refinement circuit 232, the compensation motion vector cMV is input to the second refinement circuit 232.

In the present embodiment, two vectors are input to the first refinement circuit 231 and the second refinement circuit 232. The first refinement circuit 231 and the second refinement circuit 232 operate without entering a pause state regardless of whether the picture including the encoding target block is a B picture or a P picture. Further, in the present embodiment, the bi-prediction generation circuit 240 operates without entering a pause state when the picture including the encoding target block is a B picture. In the present embodiment, the bi-prediction generation circuit 240 enters a pause state when the picture including the encoding target block is a P picture. Next, the motion vector compensation unit 10 according to the present embodiment will be described with reference to the drawings. This will be described in detail.

  FIG. 6 is a block diagram illustrating an example of the configuration of the motion vector compensation unit 10 of the present embodiment. Referring to FIG. 6, the motion vector compensation unit 10 includes a detection unit 11, a compensation vector selection unit 12, a transmission unit 13, and a reception unit 14.

  The detection unit 11 detects whether the number of inherited motion vectors input to the refinement unit 30 is two or one. For example, the detection unit 11 receives the signal mDir from the prior analysis unit 102. When the value of the signal mDir is L0 or L1, the detection unit 11 detects that the inherited motion vector input to the refinement unit 30 is one. When the value of the signal mDir is Bi, the detection unit 11 detects that there are two inherited motion vectors input to the refinement unit 30.

The receiving unit 14 receives at least one of the inherited motion vector MMV ₀ and the inherited motion vector MMV ₁ from the prior analysis unit 102. The receiving unit 14 further receives the compensation mode cMode from the mode determining unit 70. The receiving unit 14 further receives, for example, two selected prediction motion vectors (hereinafter referred to as “AMVP ₀ ” and “AMVP ₁ ”) and a temporal prediction motion vector from the AMVP generation unit 60.

For example, when only one inherited motion vector is input, the compensation vector selection unit 12 selects a compensation motion vector from the prediction motion vector and the temporal prediction motion vector according to the selection method in the compensation mode cMode. At this time, the compensation vector selection unit 12 may select a compensation motion vector based on the input inherited motion vector (that is, the inherited motion vector MMV ₀ or the inherited motion vector MMV ₁ ). Hereinafter, an example of the compensation mode and a selection method in the compensation mode will be described in detail.

(1) Compensation mode 0
The compensation vector selection unit 12 may not generate a compensation vector. In the present embodiment, the compensation vector selection unit 12 does not generate a compensation vector when the compensation mode is “compensation mode 0”.

(2) Compensation mode 1
The compensation vector selection unit 12 may select an AMVP predicted motion vector having a minimum distance from the inherited motion vector as the compensation vector. When the number of AMVP predicted motion vectors is two, the compensation vector selection unit 12 may select an AMVP predicted motion vector having a small distance from the successor motion vector as the compensation vector from the two AMVP predicted motion vectors. Good. In the present embodiment, when the compensation mode is “compensation mode 1”, the compensation vector selection unit 12 selects an AMVP predicted motion vector having the smallest distance from the inherited motion vector as the compensation vector.

(3) Compensation mode 2
The compensation vector selection unit 12 may select the AMVP predicted motion vector having the longest distance from the inherited motion vector as the compensation vector. When the number of AMVP predicted motion vectors is two, the compensation vector selection unit 12 may select an AMVP predicted motion vector having a large distance from the successor motion vector as the compensation vector from the two AMVP predicted motion vectors. Good. In the present embodiment, when the compensation mode is “compensation mode 2”, the compensation vector selection unit 12 selects an AMVP motion vector predictor having the longest distance from the inherited motion vector as the compensation vector.

(4) Compensation mode 3
The compensation vector selection unit 12 may select a zero vector as the compensation vector. In the present embodiment, the compensation vector selection unit 12 selects a zero vector as a compensation vector when the compensation mode is “compensation mode 3”.

  The compensation modes from the compensation mode 0 to the compensation mode 3 described above can be selected regardless of whether the picture including the encoding target block is a B picture or a P picture.

  Compensation modes from compensation mode 4 to compensation mode 7 described below can be selected when the picture including the block to be encoded is a B picture. In the compensation modes from the compensation mode 4 to the compensation mode 7, the compensation vector is compensated as a motion vector in a prediction direction different from the inherited motion vector.

(5) Compensation mode 4
The compensation vector selection unit 12 may select an AMVP predicted motion vector having an index of 0 as the compensation vector. The AMVP generating unit 60 may assign 0 as an index to one of the two AMVP motion vector predictors and 1 as an index to the other. In the present embodiment, when the compensation mode is “compensation mode 4”, the compensation vector selection unit 12 selects an AMVP motion vector predictor having an index of 0 as the compensation vector.

(6) Compensation mode 5
The compensation vector selection unit 12 may select an AMVP predicted motion vector having an index of 1 as a compensation vector. In the present embodiment, when the compensation mode is “compensation mode 5”, the compensation vector selection unit 12 selects an AMVP motion vector predictor having an index of 1 as the compensation vector.

(7) Compensation mode 6
The compensation vector selection unit 12 may select a zero vector as the compensation vector. In the present embodiment, the compensation vector selection unit 12 selects a zero vector as a compensation vector when the compensation mode is “compensation mode 6”.

(8) Compensation mode 7
The assistant vector selection unit 12 selects a temporal prediction motion vector as the compensation vector. As described above, for example, when a motion vector predictor in the block C0 in the example illustrated in FIG. 5 exists, the AMVP generation unit 60 selects a motion vector predictor in the block C0 as the temporal motion vector predictor. When the predicted motion vector in the C0 block does not exist, the AMVP generation unit 60 selects the predicted motion vector in the C1 block as the temporal predicted motion vector. In this embodiment, the compensation vector selection unit 12 selects a temporal prediction motion vector as a compensation vector when the compensation mode is “compensation mode 7”.

  FIG. 7 is a block diagram illustrating an example of the configuration of the motion vector compensation circuit 210 of the present embodiment. The motion vector compensation circuit 210 is an implementation example in which the motion vector compensation unit 10 is implemented as a circuit. The motion vector compensation circuit 210 is a circuit that operates as the motion vector compensation unit 10. Referring to FIG. 7, the motion vector compensation circuit 210 includes a detection circuit 211, a compensation vector selection circuit 212, a transmission circuit 213, and a reception circuit 214. The detection circuit 211 operates as the detection unit 11 described above. The compensation vector selection circuit 212 operates as the above-described compensation vector selection unit 12. The transmission circuit 213 operates as the transmission unit 13 described above. The receiving circuit 214 operates as the above-described receiving unit 14. Therefore, a detailed description of the motion vector compensation circuit 210 is omitted.

  Next, the operation of the present embodiment will be described in detail with reference to the drawings.

  FIG. 8 is a flowchart illustrating an example of an operation of generating a predicted image of the encoding target image in the video encoding device 1 according to the present embodiment.

  Referring to FIG. 8, first, the pre-analysis unit 102 generates an inherited motion vector (step S101). Next, the AMVP generation unit 60 generates an AMVP motion vector predictor and a temporal motion vector predictor (step S102). Next, the motion vector compensation unit 10 executes motion vector compensation processing (step S103). The motion vector compensation process will be described later in detail. Next, the refiner 30 refines the motion vector (step S104). That is, the refinement unit 30 detects a predicted motion vector based on the received motion vectors (that is, two inherited motion vectors, or the inherited motion vector and the compensation motion vector). The refiner 30 further generates a predicted image based on the predicted motion vector (step S105).

When the picture including the encoding target block is a P picture (NO in step S106), the video encoding device 1 next performs the operation of step S108. In this case, the prediction selection unit 50 selects, for example, one predicted image with a lower encoding cost from the two predicted images.
If the picture including the encoding target block is a B picture (YES in step S106), then the bi-prediction generation unit 40 generates a bi-prediction image (step S107). Then, the prediction selection unit 50 selects a predicted image (step S108). In this case, the prediction selection unit 50 selects one image as a predicted image from two predicted images and one bi-predicted image.

  Next, the motion vector compensation processing operation of the video encoding device 1 of the present embodiment will be described in detail with reference to the drawings.

  FIG. 9 is a flowchart showing an example of motion vector compensation processing of the video encoding device 1 according to the present embodiment.

  Referring to FIG. 9, first, the detection unit 11 detects the number of inherited motion vectors input to the refinement unit 30 via the switch unit 20 (step S201). Specifically, the detection unit 11 detects the value of the signal mDir. Then, the detection unit 11 detects whether the number of inherited motion vectors is one or two based on the value of the signal mDir. When the value of the signal mDir is L0 or L1, the detection unit 11 detects that the number of inherited motion vectors is one. When the value of the signal mDir is Bi, the detection unit 11 detects that the number of inherited motion vectors is two.

  If the number of inherited motion vectors is not one (NO in step S202), that is, if the value of the signal mDir is Bi, the video encoding device 1 ends the motion vector compensation processing shown in FIG.

  If the number of inherited motion vectors is 1 (YES in step S202), that is, if the value of the signal mDir is L0 or L1, the receiving unit 14 receives the compensation mode (step S203). In addition, when the compensation mode is determined in advance, the receiving unit 14 does not have to receive the compensation mode. Next, the receiving unit 14 receives at least one of the AMVP motion vector predictor and the temporal motion vector predictor (step S204). The receiving unit 14 further receives the inherited motion vector (step S205).

  Next, the compensation vector selection unit 12 selects a compensation motion vector from at least one of the received AMVP prediction motion vector, temporal prediction motion vector, and zero vector based on the received compensation mode (step S206). ).

  The transmission unit 13 transmits the selected compensation motion vector to the refinement unit 30 via the switch unit 20 (step S207). Then, the video encoding device 1 ends the operation shown in FIG.

  The present embodiment described above has the first effect that the accuracy of prediction can be improved even when there is only one reference picture.

  The reason is that, when there is one reference picture, that is, when there is one inherited motion vector, the compensation motion vector selected by the compensation vector selection unit 12 is supplied to the refinement unit 30. In that case, the prediction selection unit 50 selects, for example, an image with the lowest coding cost from the predicted image based on the inherited motion vector and the predicted image based on the compensation motion vector. Alternatively, the prediction selection unit 50 selects, for example, an image with the lowest coding cost from the predicted image based on the inherited motion vector, the predicted image based on the compensation motion vector, and the bi-predicted image. Therefore, the prediction accuracy for the encoding target block of the selected image is improved.

In addition, it is expected that the motion compensation prediction will be highly accurate by additional evaluation of motion vectors for which the preanalyzer could not be used. This is because the predicted directions and components of the inherited motion vectors mMV ₀ and mMV ₁ determined by the pre-analyzer are not necessarily optimal. In particular, since a motion vector search that considers the temporal direct mode is not performed in the B picture, there is a high possibility that the selection of the prediction direction is not optimal.

Reduction of overhead can be expected by selecting a motion vector suitable for space-time adaptive prediction (ie, AMVP and merge prediction) of the motion vector in the HEVC standard. This is because the inherited motion vectors MmV ₀ and mMV ₁ determined by the pre-analyzer based on the median prediction are not necessarily optimal motion vectors for AMVP and merge prediction.

  In the present embodiment, there is a second effect that the arithmetic unit (that is, the first refinement circuit 231, the second refinement circuit 232, and the bi-prediction generation circuit 240 shown in FIG. 4) can be utilized. . The reason is that, when there is one inherited motion vector, the inherited motion vector of the first refinement circuit 231 and the second refinement circuit 232 is input as the compensation motion vector selected by the compensation vector selection unit 12. This is because it is input to the person who does not. Furthermore, if the picture including the encoding target block is a B picture, even if the number of inherited motion vectors is 1, the bi-prediction generation circuit 240 generates bi-prediction.

<Second Embodiment>
Next, a second embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 10 is a block diagram illustrating an example of the configuration of the video encoding device 1A of the present embodiment.

  Referring to FIG. 10, the video encoding device 1 </ b> A according to the present embodiment includes a detection unit 11, a compensation vector selection unit 12, and a transmission unit 13. The detection unit 11 detects whether the number of inherited motion vectors received by the refinement unit 30 is one or two. The refinement unit 30 receives the inherited motion vector as a reference for searching for a predicted motion vector that represents the prediction of the motion of the processing target block in the picture included in the encoding target video. When the number of inherited motion vectors is one, the compensation vector selection unit 12 selects a compensation motion vector according to a predetermined selection method. The transmission unit 13 transmits the selected compensation motion vector to the refinement unit 30. The refiner 30 detects a predicted motion vector of the processing target block based on the inherited motion vector and the received compensation vector.

  The present embodiment described above has the same effect as the first effect of the first embodiment. The reason is the same as the reason why the first effect of the first embodiment occurs.

<Other embodiments>
The video encoding apparatuses 1 and 1A described above can be realized by a computer and a program for controlling the computer, dedicated hardware, or a combination of the computer and the program for controlling the computer and dedicated hardware, respectively.

  FIG. 11 is a diagram illustrating an example of a hardware configuration of a computer 1000 that can realize the above-described video encoding devices 1 and 1A. Referring to FIG. 11, a computer 1000 includes a processor 1001, a memory 1002, a storage device 1003, and an I / O (Input / Output) interface 1004. The computer 1000 can access the recording medium 1005. The memory 1002 and the storage device 1003 are storage devices such as a RAM (Random Access Memory) and a hard disk, for example. The recording medium 1005 is, for example, a storage device such as a RAM or a hard disk, a ROM (Read Only Memory), or a portable recording medium. The storage device 1003 may be the recording medium 1005. The processor 1001 can read and write data and programs from and to the memory 1002 and the storage device 1003. The processor 1001 can access, for example, a video transmission source and a bitstream transmission destination via the I / O interface 1004. The processor 1001 can access the recording medium 1005. The recording medium 1005 stores a program that causes the computer 1000 to operate as the video encoding device 1 or the video encoding device 1A.

  The processor 1001 loads a program stored in the recording medium 1005 and causing the computer 1000 to operate as the video encoding device 1 or the video encoding device 1A into the memory 1002. Then, when the processor 1001 executes the program loaded in the memory 1002, the computer 1000 operates as the video encoding device 1 or the video encoding device 1A.

  The units included in the first list below are, for example, a dedicated program that can be read from the recording medium 1005 that stores the program into the memory 1002 and that can realize the function of each unit, and a processor 1001 that executes the program. Can be realized. The first list includes a detection unit 11, a compensation vector selection unit 12, a transmission unit 13, and a reception unit 14. The first list further includes a motion vector compensation unit 10, a switch unit 20, a refinement unit 30, a bi-prediction generation unit 40, a prediction selection unit 50, an AMVP generation unit 60, and a mode determination unit 70. . The first list further includes a motion compensation unit 100, a block division unit 101, a prior analysis unit 102, an intra prediction unit 103, a switching unit 104, an integer conversion unit 105, a quantization unit 106, and an inverse quantum. The encoding unit 107, the inverse integer conversion unit 108, and the encoding unit 109 are included. The first list further includes a filter unit 116, a subtracting unit 118, and an adding unit 119. Further, the units included in the second list below can be realized by the memory 1002 included in the computer 1000 and the storage device 1003 such as a hard disk device. The second list includes a frame storage unit 117. Alternatively, some or all of the units included in the first list and the units included in the second list can be realized by a dedicated circuit that realizes the function of each unit.

  The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

  Moreover, although a part or all of said embodiment can be described also as the following additional remarks, it is not restricted to the following.

(Appendix 1)
Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detecting means for detecting;
When the number of inherited motion vectors is one, compensation vector selection means for selecting a compensation motion vector according to a predetermined selection method;
Transmitting means for transmitting the selected compensation motion vector to the refinement means for detecting a predicted motion vector of the processing target block based on the inherited motion vector and the received compensation vector;
A video encoding device comprising:

(Appendix 2)
The video encoding apparatus according to claim 1, wherein the compensation vector selection unit selects one of the predicted motion vectors in an adjacent block of the processing target block as the compensation motion vector.

(Appendix 3)
The compensation vector selection means, in addition to the predicted motion vector in the adjacent block of the processing target block, any one of the temporal prediction motion vector of the picture immediately before the picture in the encoding target video and a zero vector, The video encoding device according to attachment 2, wherein the video encoding device is selected as the compensation motion vector.

(Appendix 4)
Receiving means for receiving a compensation mode indicating any of the plurality of selection methods;
The video encoding device according to any one of claims 1 to 3, wherein the compensation vector selection unit selects the compensation motion vector according to the selection method indicated by the compensation mode.

(Appendix 5)
A first prediction image that best predicts the block to be encoded in the search range of the first reference image based on the received inherited motion vector is detected, and the search range of the second reference image based on the compensation vector is detected. The refinement means for detecting a second predicted image that best predicts the block to be encoded in
Prediction selection means for selecting one prediction image from the first prediction image and the second prediction image;
The video encoding device according to any one of appendices 1 to 4, further comprising:

(Appendix 6)
Of the average images of the region in the search range of the first reference image based on the received inherited motion vector and the region in the search range of the second reference image based on the compensation vector, the coding target block is best. Bi-prediction generating means for detecting the average image to be predicted as a third predicted image;
The video encoding device according to claim 5, wherein the prediction selection unit selects one prediction image from the first prediction image, the second prediction image, and the third prediction image.

(Appendix 7)
Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detect
If the number of inherited motion vectors is one, select a compensation motion vector according to a predetermined selection method,
Based on the inherited motion vector and the received compensation vector, the selected compensation motion vector is transmitted to the refinement unit that detects a predicted motion vector of the processing target block.
Video encoding method.

(Appendix 8)
The video encoding method according to claim 7, wherein one of the predicted motion vectors in a block adjacent to the processing target block is selected as the compensation motion vector.

(Appendix 9)
In addition to the predicted motion vector in the block adjacent to the processing target block, either the temporally predicted motion vector of the picture immediately before the picture in the encoding target video or the zero vector is selected as the supplemental motion vector. The video encoding method according to appendix 8.

(Appendix 10)
Receiving a compensation mode indicating one of a plurality of the selection methods;
The video encoding method according to any one of appendices 7 to 9, wherein the compensation motion vector is selected according to the selection method indicated by the compensation mode.

(Appendix 11)
A first prediction image that best predicts the block to be encoded in the search range of the first reference image based on the received inherited motion vector is detected, and the search range of the second reference image based on the compensation vector is detected. A second predicted image that best predicts the block to be encoded at
Selecting one predicted image from the first predicted image and the second predicted image;
The video encoding method according to any one of appendices 7 to 10.

(Appendix 12)
Of the average images of the region in the search range of the first reference image based on the received inherited motion vector and the region in the search range of the second reference image based on the compensation vector, the coding target block is best. Detecting the average image to be predicted as a third predicted image;
The video encoding method according to claim 11, wherein one predicted image is selected from the first predicted image, the second predicted image, and the third predicted image.

(Appendix 13)
Computer
Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detecting means for detecting;
When the number of inherited motion vectors is one, compensation vector selection means for selecting a compensation motion vector according to a predetermined selection method;
Transmitting means for transmitting the selected compensation motion vector to the refinement means for detecting a predicted motion vector of the processing target block based on the inherited motion vector and the received compensation vector;
Video coding program to be operated.

(Appendix 14)
Computer
14. The video encoding program according to appendix 13, which is operated as the compensation vector selection unit that selects any one of the predicted motion vectors in a block adjacent to the processing target block as the compensation motion vector.

(Appendix 15)
Computer
In addition to the predicted motion vector in the block adjacent to the processing target block, either the temporally predicted motion vector of the picture immediately before the picture in the encoding target video or the zero vector is selected as the supplemental motion vector. 15. The video encoding program according to appendix 14, which is operated as the compensation vector selection unit.

(Appendix 16)
Computer
Receiving means for receiving a compensation mode indicating any of the plurality of selection methods;
The compensation vector selection means for selecting the compensation motion vector according to the selection method indicated by the compensation mode;
The video encoding program according to any one of supplementary notes 13 to 15, which is operated as described above.

(Appendix 17)
Computer
A first prediction image that best predicts the block to be encoded in the search range of the first reference image based on the received inherited motion vector is detected, and the search range of the second reference image based on the compensation vector is detected. The refinement means for detecting a second predicted image that best predicts the block to be encoded in
Prediction selection means for selecting one prediction image from the first prediction image and the second prediction image;
The video encoding program according to any one of supplementary notes 13 to 16, which is operated as described above.

Computer
(Appendix 18)
Of the average images of the region in the search range of the first reference image based on the received inherited motion vector and the region in the search range of the second reference image based on the compensation vector, the coding target block is best. Bi-prediction generating means for detecting the average image to be predicted as a third predicted image;
18. The video encoding program according to appendix 17, which is operated as the prediction selection unit that selects one prediction image from the first prediction image, the second prediction image, and the third prediction image.

  The present invention has been described above with reference to the embodiments, but the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Video coding apparatus 1A Video coding apparatus 1C Video coding apparatus 10 Motion vector compensation part 11 Detection part 12 Compensation vector selection part 13 Transmission part 14 Reception part 20 Switch part 30 Refinement part 40 Bi-prediction production | generation part 50 Prediction selection part 60 AMVP generation unit 70 mode determination unit 100 motion compensation unit 101 block division unit 102 pre-analysis unit 103 intra prediction unit 104 switching unit 105 integer conversion unit 106 quantization unit 107 inverse quantization unit 108 inverse integer conversion unit 109 encoding unit 116 filter Unit 117 frame storage unit 118 subtraction unit 119 addition unit 200 motion compensation circuit 210 motion vector compensation circuit 211 detection circuit 212 compensation vector selection circuit 213 transmission circuit 214 reception circuit 216 filter circuit 217 frame buffer 218 subtraction circuit 219 addition Circuit 220 switch circuit 221 first switch circuit 222 second switch circuit 230 refinement circuit 231 first refinement circuit 232 second refinement circuit 240 bi-prediction generation circuit 250 prediction selection circuit 260 AMVP generation circuit 270 mode determination circuit 300 motion compensation circuit 320 switch Circuit 321 First switch circuit 322 Second switch circuit 1000 Computer 1001 Processor 1002 Memory 1003 Storage device 1004 I / O interface 1005 Recording medium

Claims (12)

Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detecting means for detecting;
When the number of inherited motion vectors is one, compensation vector selection means for selecting a compensation motion vector according to a predetermined selection method;
Transmitting means for transmitting the selected compensation motion vector to the refinement means for detecting a predicted motion vector of the processing target block based on the inherited motion vector and the received compensation vector;
A video encoding device comprising: The video encoding apparatus according to claim 1, wherein the compensation vector selection unit selects one of the predicted motion vectors in an adjacent block of the processing target block as the compensation motion vector. The compensation vector selection means, in addition to the predicted motion vector in the adjacent block of the processing target block, any one of the temporal prediction motion vector of the picture immediately before the picture in the encoding target video and a zero vector, The video encoding device according to claim 2, wherein the video encoding device is selected as the compensation motion vector. Receiving means for receiving a compensation mode indicating any of the plurality of selection methods;
4. The video encoding device according to claim 1, wherein the compensation vector selection unit selects the compensation motion vector according to the selection method indicated by the compensation mode. 5. A first prediction image that best predicts the block to be encoded in the search range of the first reference image based on the received inherited motion vector is detected, and the search range of the second reference image based on the compensation vector is detected. The refinement means for detecting a second predicted image that best predicts the block to be encoded in
Prediction selection means for selecting one prediction image from the first prediction image and the second prediction image;
The video encoding device according to any one of claims 1 to 4, further comprising: Of the average images of the region in the search range of the first reference image based on the received inherited motion vector and the region in the search range of the second reference image based on the compensation vector, the coding target block is best. Bi-prediction generating means for detecting the average image to be predicted as a third predicted image;
The video encoding device according to claim 5, wherein the prediction selection unit selects one prediction image from the first prediction image, the second prediction image, and the third prediction image. Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detect
If the number of inherited motion vectors is one, select a compensation motion vector according to a predetermined selection method,
Based on the inherited motion vector and the received compensation vector, the selected compensation motion vector is transmitted to the refinement unit that detects a predicted motion vector of the processing target block.
Video encoding method. The video encoding method according to claim 7, wherein one of the predicted motion vectors in a block adjacent to the processing target block is selected as the compensation motion vector. In addition to the predicted motion vector in the block adjacent to the processing target block, either the temporally predicted motion vector of the picture immediately before the picture in the encoding target video or the zero vector is selected as the supplemental motion vector. The video encoding method according to claim 8. Computer
Whether the number of inherited motion vectors received by the refiner is one or two as a reference for searching for a predicted motion vector representing prediction of motion of a processing target block in a picture included in an encoding target video. Detecting means for detecting;
When the number of inherited motion vectors is one, compensation vector selection means for selecting a compensation motion vector according to a predetermined selection method;
Transmitting means for transmitting the selected compensation motion vector to the refinement means for detecting a predicted motion vector of the processing target block based on the inherited motion vector and the received compensation vector;
Video coding program to be operated. Computer
The video encoding program according to claim 10, wherein the video encoding program is operated as the compensation vector selection unit that selects any one of the predicted motion vectors in a block adjacent to the processing target block as the compensation motion vector. Computer
In addition to the predicted motion vector in the block adjacent to the processing target block, either the temporally predicted motion vector of the picture immediately before the picture in the encoding target video or the zero vector is selected as the supplemental motion vector. 12. The video encoding program according to claim 11, wherein said video encoding program is operated as said supplement vector selection means.

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