JP2016162885A - Electronic component and method of manufacturing electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component superposing semiconductor elements, capable of constituting a compact electronic component, facilitating the connection of the wiring, of one kind of semiconductor element, and to provide a method of manufacturing the electronic component.SOLUTION: In an electronic component superposing one kind of semiconductor elements 11, 12, where first and second surface electrodes are formed on the surface and a back electrode is formed on the back, the second surface electrodes 11G, 12G are formed at positions closer to the marginal part than the central part, and a through hole 12K or a notch is formed in the semiconductor elements, at a position closer to the marginal part than the central part, where neither the first surface electrode 12S nor the second surface electrode 12G are formed. The first and second semiconductor elements 11, 12 are superposed so that the second surface electrode 12G of the first semiconductor element 11 is aligned with the through hole 12K or notch of the second semiconductor element 12.SELECTED DRAWING: Figure 10

Description

  The present invention relates to an electronic component obtained by superimposing two semiconductor elements, and a method for manufacturing the electronic component.

  In recent years, for example, in the case of a vehicle, it is required to reduce the size and weight of parts in order to improve fuel consumption and reduce costs. For example, in order to reduce the size and weight of a control unit (controller) that controls various actuators mounted on a vehicle, it is necessary to reduce the mounting area of an electronic circuit mounted on the control unit. Thus, various techniques for stacking semiconductor elements are being put into practical use in order to reduce the mounting area of electronic circuits.

  For example, Patent Document 1 discloses a semiconductor device (corresponding to an electronic component) in which two semiconductor chips (corresponding to semiconductor elements) are stacked one above the other. An overhang-shaped step portion for forming a gap above the electrode pad on the upper surface of the lower semiconductor chip is located at the position of the upper semiconductor chip, which is a position that covers the electrode pad on the upper surface of the lower semiconductor chip. Is formed.

JP-A-2005-340483

  When stacking semiconductor elements, it is important how to connect the necessary wiring to the electrode formed on the surface covered with the semiconductor element to be stacked. In the invention described in Patent Document 1, a step portion is formed in the upper semiconductor chip so as to cover the electrode pad of the lower semiconductor chip, but no step portion is formed in the lower semiconductor chip. . Therefore, even if the same semiconductor element is formed on either semiconductor chip, the outer shape is different, so two types of semiconductor chips must be formed. When manufacturing two types of semiconductor chips having the same semiconductor element but different external shapes, it may be necessary to configure a dedicated processing device or a dedicated manufacturing line, respectively. . In addition, when semiconductor chips are manufactured in different processes and different production lines, even if the same semiconductor element is intended to be formed, various variations such as variations in characteristics, variations in yield, and variations in production lots may occur. Is not preferable.

  Further, in the manufacturing process of the semiconductor device (electronic component) of Patent Document 1, after mounting the lower semiconductor chip on the mounting substrate, wiring is performed on the electrode pads of the lower semiconductor chip with bonding wires, and then the lower semiconductor chip is mounted. After mounting the upper semiconductor chip on top, wiring is performed to the electrode pads of the upper semiconductor chip with bonding wires. In other words, due to the structure of the semiconductor device, the lower semiconductor chip must be bonded before the upper semiconductor chip is mounted. The bonding of the lower semiconductor chip and the upper semiconductor chip are performed together. I can't do it. Therefore, bonding of the lower semiconductor chip and bonding of the upper semiconductor chip must be performed separately, which increases the manufacturing process and takes time.

  The present invention has been devised in view of the above points, and is an electronic component in which semiconductor elements are overlapped, and a small electronic component in which wiring is easily connected is configured by one type of semiconductor element. It is an object of the present invention to provide an electronic component that can be manufactured and a method for manufacturing the electronic component.

  In order to solve the above problems, an electronic component and a method for manufacturing the electronic component according to the present invention take the following means. First, the first invention of the present invention is an electronic component in which semiconductor elements are overlapped, and is one type in which a first surface electrode and a second surface electrode are formed on the surface and a back electrode is formed on the back surface. The semiconductor elements are overlapped, and the second surface electrode is formed at a position closer to the edge than the center of the semiconductor element. In the semiconductor element, a through hole or a notch is formed at a position closer to the edge than the central portion of the semiconductor element, where neither the first surface electrode nor the second surface electrode is formed. The surface of the first semiconductor element that is one of the stacked semiconductor elements and the back surface of the second semiconductor element that is the other stacked semiconductor element are overlapped with each other. The first surface electrode and the back electrode of the second semiconductor element are electrically connected, and the second surface electrode of the first semiconductor element is connected to the through hole or the second semiconductor element. It is overlaid so as to coincide with the position of the notch.

  Next, a second invention of the present invention is the electronic component according to the first invention, further comprising a mounting substrate, wherein the back electrode of the first semiconductor element is a back surface provided on the mounting substrate. A conductive plate is electrically connected to the electrode conductive portion, and a conductive plate is sandwiched between the first surface electrode of the first semiconductor element and the back electrode of the second semiconductor element, and the first semiconductor element The first surface electrode and the back electrode of the second semiconductor element are electrically connected through the conductive plate. The conductive plate is sandwiched so as not to cover at least a part of the second surface electrode of the first semiconductor element, and is connected to a conductive portion for a conductive plate provided on the mounting substrate. 2 A bonding wire is connected to the second surface electrode of the semiconductor element, and the bonding wire is connected to a surface electrode conductive portion provided on the mounting substrate.

  Next, a third invention of the present invention is a method of manufacturing an electronic component in which semiconductor elements are superposed, and the electronic component has a first surface electrode and a second surface electrode formed on the front surface, and a rear surface on the back surface. One type of the semiconductor element on which a back electrode is formed is superposed, the second surface electrode is formed at a position closer to the edge than the center part in the semiconductor element, and a through hole or notch is formed The semiconductor element is formed at a position closer to the edge than the central portion where neither the first surface electrode nor the second surface electrode is formed. Then, when superimposing the surface of the first semiconductor element that is the one of the superimposed semiconductor elements and the back surface of the second semiconductor element that is the other of the superimposed semiconductor elements, the first semiconductor element of the first semiconductor element The second surface electrode is overlapped so as to coincide with the position of the through hole or the notch of the second semiconductor element, and the first surface electrode of the first semiconductor element and the back electrode of the second semiconductor element Is a method for manufacturing an electronic component.

  According to the first invention, the first semiconductor element and the second semiconductor element are formed as one type of semiconductor element, and a through hole or a notch is formed in advance. And since the 2nd surface electrode of a 1st semiconductor element can be exposed from the through-hole or notch part of a 2nd semiconductor element, the connection of wiring is easy and a small electronic component is comprised with one type of semiconductor element. be able to.

  According to the second invention, it is possible to appropriately stack the first semiconductor element and the second semiconductor element on the mounting substrate. In addition, by using a bonding wire, necessary wiring can be easily connected.

  According to the third invention, the first semiconductor element and the second semiconductor element are formed as one type of semiconductor element, and a through hole or a notch is formed. Then, by carrying out a manufacturing method in which the second surface electrode of the first semiconductor element is exposed from the through hole or notch of the second semiconductor element, wiring necessary for the electrode of the first semiconductor element can be easily connected. Is possible.

It is the perspective view of the external appearance which looked at the semiconductor element from the front side. It is an equivalent circuit of the electronic component shown in FIG. It is a flowchart explaining the example of the mounting process (manufacturing method) of an electronic component. It is a top view explaining the example of the external appearance of a mounting substrate. It is a perspective view explaining a mode that a module which mounted a conductive board on the 1st semiconductor element, and also mounted a 2nd semiconductor element on the conductive board is mounted. FIG. 6 is a view of the module in which the first semiconductor element, the conductive plate, and the second semiconductor element are mounted and integrated in FIG. 5 as viewed from the VI direction. It is a perspective view explaining a mode that a module and a 3rd semiconductor element are mounted on a mounting board. FIG. 8 is a view seen from the VIII direction after mounting the module and the third semiconductor element in FIG. 7. It is a perspective view explaining the state which mounted the module and the 3rd semiconductor element in FIG. FIG. 10 is a perspective view illustrating a state in which bonding wires are connected to the gate electrode of the first semiconductor element, the gate electrode of the second semiconductor element, and the gate electrode of the third semiconductor element from the state illustrated in FIG. 9. It is the figure which looked at the electronic component shown in FIG. 10 from XI direction. It is the perspective view of the external appearance which looked at the semiconductor element from which the notch was formed instead of the through-hole with respect to the semiconductor element shown in FIG. 1 from the front side. FIG. 2 is a perspective view of an external appearance of a semiconductor element in which a defect portion (corresponding to a notch portion) is formed instead of a through hole with respect to the semiconductor element shown in FIG.

● [Appearance and structure of semiconductor element 10 (FIG. 1)]
The appearance of the front surface of the semiconductor element 10 is shown in FIG. In the description of the present embodiment, the semiconductor element 10 in which an n-channel MOSFET is formed will be described as an example.

  A source electrode 10S (corresponding to a first surface electrode) and a gate electrode 10G (corresponding to a second surface electrode) are formed on the surface 10WA of the wafer 10W of the semiconductor element 10 as shown in FIG. A drain electrode 10D (corresponding to the back electrode) is formed on the back surface 10WB of the semiconductor element 10. In the example of FIG. 1, the source electrode 10 </ b> S is formed in a substantially rectangular shape substantially at the center of the surface 10 </ b> WA of the semiconductor element 10, and the gate electrode 10 </ b> G is closer to the edge than the center of the surface 10 </ b> WA of the semiconductor element 10. An example in which the position is formed in a substantially rectangular shape is shown. The position closer to the edge than the center is a position that moves when the semiconductor element 10 is rotated around the central axis C of the semiconductor element 10, and a position where the position before rotation and the position after rotation change. It is. For example, the position of the gate electrode 10G in the example shown in FIG. 1 can be moved to the position of the through hole 10K in FIG. 1 when the semiconductor element 10 is rotated about the central axis C of the semiconductor element 10. The position of the gate electrode 10G is more preferably formed at a position closer to the edge of the semiconductor element 10 on the surface 10WA. In the example of FIG. 1, the drain electrode 10 </ b> D is illustrated as being formed in a substantially circular shape on substantially the entire back surface 10 </ b> WB of the semiconductor element 10. The area of the source electrode 10S through which a large current flows and the area of the drain electrode 10D through which a large current flows are larger than the area of the gate electrode 10G through which almost no current flows.

  Then, at a position closer to the edge than the center of the semiconductor element 10 and where neither the source electrode 10S nor the gate electrode 10G is formed, an area larger than the gate electrode 10G and from the surface 10WA of the semiconductor chip 10 A through hole 10K or a notch (including a defect) that penetrates to the back surface 10WB is formed (see the notch 10L in FIG. 12 and the defect 10M in FIG. 13). In the example shown in FIG. 1, the position of the through-hole 10K with respect to the position of the gate electrode 10G is shown as an example formed at a position rotated 90 ° in the counterclockwise direction. The through-hole 10K or the notch that penetrates from the front surface 10WA to the rear surface 10WB can be formed by etching the wafer 10W. Further, the defect portion can be formed by cutting a part of the wafer 10W, for example.

● [Example of desired electronic circuit (Fig. 2)]
In recent years, an electronic circuit using a MOSFET has been used as a drive circuit for an electric motor that requires a relatively large current. For example, as a drive circuit for each phase of a three-phase motor having a U phase, a V phase, and a W phase, FIG. An electronic circuit composed of three n-channel MOSFETs shown in the example 2 is used. Then, three electronic circuits shown in the example of FIG. 2 are prepared, and each electronic circuit is connected to the U phase, the V phase, and the W phase. The electronic circuit shown in the example of FIG. 2 will be described below as an example of a desired electronic circuit.

  In the electronic circuit shown in the example of FIG. 2, each of Tr1 to Tr3 is composed of an n-channel MOSFET, the source S1 of Tr1 is connected to the drain D2 of Tr2, and the drain D2 of Tr2 is further connected to the drain D3 of Tr3. It is connected. When used as a drive circuit for a three-phase motor, for example, the drain D1 of Tr1 is connected to the power supply Vdd, the source S2 of Tr2 is connected to the ground Vss, and the output Vout that is the source S3 of Tr3 is U-phase (or V-phase, Or W phase). A control signal from a control device such as a CPU that controls the three-phase motor is input to each of the input Vin1 that is the gate G1 of Tr1, the input Vin2 that is the gate G2 of Tr2, and the input Vin3 that is the gate G3 of Tr3. The Next, the mounting process of the electronic component 1 that realizes the electronic circuit shown in FIG. 2 will be described with reference to FIG.

● [Electronic component 1 mounting process (FIGS. 3 to 11)]
3 is a flowchart showing an example of the procedure of the mounting process of the electronic component 1 shown in FIG. 10, FIG. 4 shows an example of the mounting substrate 50, and FIGS. 5 to 11 show the mounting at each step of the mounting process. It is a figure explaining the external appearance of a state. Hereinafter, processing contents in each step of the mounting process shown in FIG. 3 and examples of mounting states in each step will be described in order.

[Step S10: Place the conductive plate 60 on the first semiconductor element 11, and further place the second semiconductor element 12 on the conductive plate 60, and mount (connect) them together (FIGS. 5 and 6)]
In step S10 shown in FIG. 3, the mounting apparatus (not shown) positions the conductive plate 60 on the first semiconductor element 11 and the second semiconductor element on the conductive plate 60, as will be described below. 12 is positioned. Then, the mounting apparatus collectively connects the first semiconductor element 11 and the conductive plate 60 and the conductive plate 60 and the second semiconductor element 12 with solder or the like.

  The mounting apparatus prepares a first semiconductor element 11, a second semiconductor element 12, a third semiconductor element 13, and a conductive plate 60, which are one type of three semiconductor elements 10. The first semiconductor element 11 corresponds to Tr1, the second semiconductor element 12 corresponds to Tr2, and the third semiconductor element 13 corresponds to Tr3. The first semiconductor element 11, the second semiconductor element 12, and the third semiconductor element 13 are all the same as the semiconductor element 10 described above. The first semiconductor element 11 has a source electrode 11S, a gate electrode 11G, a drain electrode 11D, and a through hole 11K. The second semiconductor element 12 has a source electrode 12S, a gate electrode 12G, a drain electrode 12D, and a through hole 12K. The third semiconductor element 13 has a source electrode 13S, a gate electrode 13G, a drain electrode 13D, and a through hole 13K. The third semiconductor element 13 is not used in step S10, but is used for mounting in step S20.

  As shown in FIGS. 5 and 6, the conductive plate 60 has a back surface 60 </ b> B that faces the source electrode 11 </ b> S of the first semiconductor element 11, and a front surface 60 </ b> A that faces the drain electrode 12 </ b> D of the second semiconductor element 12. ing. Further, the conductive plate 60 is a substantially rectangular metal or alloy plate so that the back surface 60B and the substrate connection surface 60C facing the conductive portion 51SP for conductive plate (see FIGS. 4 and 7) form a stepped portion 60D. It has a shape obtained by bending a shaped conductor. The back surface 60B and the front surface 60A of the conductive plate 60 are preferably wider. For example, in FIG. 5, the width in the longitudinal direction of the substrate connection surface 60C of the conductive plate 60 is set to be equal to the outer diameter of the first semiconductor element 11. Has been.

  Then, the mounting apparatus uses a jig or the like to position the conductive plate 60 relative to the first semiconductor element 11 with respect to the source electrode 11S of the first semiconductor element 11 and the back surface of the conductive plate 60, as shown in the perspective view of FIG. In a position (see FIG. 6) that the conductive plate 60 does not cover at least a part of the gate electrode 11G such that the substrate connection surface 60C of the conductive plate 60 faces downward and the conductive plate 60 faces the lower side. Position it. In addition, the mounting apparatus positions the second semiconductor element 12 with respect to the first semiconductor element 11 and the conductive plate 60 so that the surface 60A of the conductive plate 60 and the drain electrode 12D of the second semiconductor element 12 face each other. Positioning is performed so that the position of the gate electrode 11G of the first semiconductor element 11 and the position of the through hole 12K or the notch of the second semiconductor element 12 coincide (see FIG. 7). That is, when viewed from above the second semiconductor element 12, the mounting apparatus can make the gate electrode 11 </ b> G of the first semiconductor element 11 visible (exposed) in the through hole 12 </ b> K or the notch of the second semiconductor element 12. 2), the position of the conductive plate 60 and the position of the second semiconductor element 12 with respect to the first semiconductor element 11 are positioned.

  As shown in the side view of FIG. 6, the mounting apparatus includes the source electrode 11S of the first semiconductor element 11 and the back surface 60B of the conductive plate 60, and the drain electrode 12D of the second semiconductor element 12 and the surface 60A of the conductive plate 60. Are electrically connected together with solder or the like. In addition, an object (FIG. 6) in which the first semiconductor element 11, the conductive plate 60, and the second semiconductor element 12 are mounted and integrated is referred to as a module M1. The module M1 is one of electronic components in which the source electrode 11S of the first semiconductor element 11 and the drain electrode 12D of the second semiconductor element 12 are electrically connected via the conductive plate 60.

[Step S20: Mount the Module M1 and the Third Semiconductor Element 13 on the Mounting Board 50 (FIGS. 4, 7 to 9)]

  In step S <b> 20 shown in FIG. 3, the mounting apparatus positions the module M <b> 1 on the mounting substrate 50 and positions the third semiconductor element 13 on the mounting substrate 50 as described below. Then, the mounting apparatus collectively connects the mounting substrate 50 and the module M1 and the mounting substrate 50 and the third semiconductor element 13 with solder or the like.

  The mounting apparatus prepares the mounting substrate 50, the module M1 created in step S10, and the third semiconductor element 13 already prepared in step S10. FIG. 4 shows an example of the appearance of the mounting substrate 50. The mounting substrate 50 includes a drain conductive portion 51D (corresponding to a back electrode conductive portion) to which the drain electrode 11D (see FIG. 6) of the first semiconductor element 11 of the module M1 is connected, and a drain electrode of the third semiconductor element 13 A drain conductive portion 53D to which 13D (see FIG. 7) is connected and a conductive plate conductive portion 51SP to which the substrate connection surface 60C (see FIG. 6) of the conductive plate 60 is connected are formed.

  On the mounting substrate 50, the conductive portion 51SP for the conductive plate is provided outside the mounting region 50A where the first semiconductor element 11 is mounted and outside the mounting region 50C where the third semiconductor element 13 is mounted. The drain lead portion 51DP, the first electrode pad 51GB, the first gate lead portion 51GP, the second electrode pad 52GB, the second gate lead portion 52GP, the third electrode pad 53GB, and the third gate lead portion 53GP are formed. . The conductive portion 51SP for the conductive plate is connected to the drain conductive portion 53D via the wiring portion 51SH, and the drain lead portion 51DP is connected to the drain conductive portion 51D via the wiring portion 51DH. The first electrode pad 51GB (corresponding to the surface electrode conductive portion for the first semiconductor element 11) is an electrode for connecting to the gate electrode 11G (see FIG. 5) of the first semiconductor element 11 via a bonding wire. The first gate lead part 51GP is connected to an external wiring or the like. The second electrode pad 52GB (corresponding to the surface electrode conductive portion for the second semiconductor element 12) is an electrode for connecting to the gate electrode 12G (see FIG. 5) of the second semiconductor element 12 via a bonding wire. The second gate lead portion 52GP is connected to an external wiring or the like. The third electrode pad 53GB (corresponding to the surface electrode conductive portion for the third semiconductor element 13) is an electrode for connecting to the gate electrode 13G (see FIG. 7) of the third semiconductor element 13 via a bonding wire. The third gate lead portion 53GP is connected to an external wiring or the like.

  The mounting apparatus is configured such that the drain conductive portion 51D of the mounting substrate 50 and the drain electrode 11D of the first semiconductor element 11 in the module M1 face each other, and the conductive plate conductive portion 51SP of the mounting substrate 50 and the module M1. The module M1 is positioned on the mounting substrate 50 so as to face the substrate connection surface 60C. The mounting apparatus positions the third semiconductor element 13 on the mounting substrate 50 so that the drain conductive portion 53D of the mounting substrate 50 and the drain electrode 13D of the third semiconductor element 13 face each other. When positioning the third semiconductor element 13 on the mounting substrate 50, as shown in FIG. 9, the third semiconductor element 13G is arranged such that the gate electrode 13G of the third semiconductor element 13 is closer to the third electrode pad 53GB. It is more preferable to position 13 by appropriately setting the turning angle of 13 because a bonding wire described later can be made shorter. The mounting apparatus electrically combines the drain conductive portion 51D and the drain electrode 11D, the conductive plate conductive portion 51SP and the substrate connection surface 60C, and the drain conductive portion 53D and the drain electrode 13D together with solder or the like. Connecting. As shown in FIG. 8, below the gate electrode 11G of the first semiconductor element 11, the drain electrode 11D, the drain conductive portion 51D, and the substrate portion of the mounting substrate 50 are arranged without gaps, and below the gate electrode 11G. In this way, no cavity is formed. The reason why the hollow portion is not formed will be described in step S30 described later. Further, the state after mounting in step S20 is as shown in FIG.

[Step S30: Connect the gate electrode of each semiconductor element to each electrode pad with a bonding wire (FIGS. 10 and 11)]
In step S30 shown in FIG. 3, the mounting apparatus connects the gate electrode 11G of the first semiconductor element 11 and the first electrode pad 51GB with a bonding wire B as shown in FIGS. The gate electrode 12G of the element 12 and the second electrode pad 52GB are connected by a bonding wire B, and the gate electrode 13G of the third semiconductor element 13 and the third electrode pad 53GB are connected by a bonding wire B. The gate electrode 11G of the first semiconductor element 11 disposed below when the module M1 is formed is bonded to the bonding wire B via the through hole 12K or the notch of the second semiconductor element 12 disposed above when the module M1 is formed. To be connected to the first electrode pad 51GB (see FIG. 11). In the electronic component 1 shown in FIG. 10, the drain lead portion 51DP corresponds to the power supply Vdd in FIG. 2, the source electrode 12S of the second semiconductor element 12 corresponds to the ground Vss in FIG. 2, and the source of the third semiconductor element 13 The electrode 13S corresponds to the output Vout in FIG. In the electronic component 1 shown in FIG. 10, the first gate lead portion 51GP corresponds to the input Vin1 in FIG. 2, the second gate lead portion 52GP corresponds to the input Vin2 in FIG. 2, and the third gate lead portion 53GP is shown in FIG. 2 corresponds to the input Vin3.

  As described above, the electronic component 1 (or the electronic component manufacturing method) of the present invention has the position of the gate electrode 11G of the first semiconductor element 11 disposed below the module M1 and the second semiconductor element 12 disposed above the module M1. The position of the through hole 12K or the notch is made to coincide. Thus, when one type of semiconductor element 10 (the first semiconductor element 11 and the second semiconductor element 12) is overlaid, as shown in FIGS. 10 and 11, the gate of the first semiconductor element 11 disposed below is provided. It is possible to connect the bonding wire B to the electrode 11G via the through hole 12K or the notch of the second semiconductor element 12 disposed above. As described above, the electronic component 1 (or the manufacturing method of the electronic component) in which one type of semiconductor element 10 (the first semiconductor element 11 and the second semiconductor element 12) is overlapped, and the through hole 10K or the notch is formed. The wiring (in this case, bonding wire) necessary for the electrode of the lower first semiconductor element 11 (in this case, the gate electrode 11G) can be easily connected with a very simple structure. is there.

  When connecting the bonding wire, for example, the bonding wire is pressed against the electrode and subjected to ultrasonic vibration. As shown in FIG. 11, the lower side of the gate electrode 11G of the first semiconductor element 11 is the drain electrode 11D, It is preferable that the drain conductive portion 51D and the substrate portion of the mounting substrate 50 are configured so as to be supported without a gap so that no hollow portion is formed below the gate electrode 11G. In this way, by not forming a hollow portion below the electrode to be connected to the bonding wire, it is possible to prevent ultrasonic loss (bonding failure due to ultrasonic vibration). Similarly, the structure below the gate electrode 12G of the second semiconductor element 12 and the gate electrode 13G of the third semiconductor element 13 is also formed so as not to form a cavity, so that the ultrasonic wave is removed (bonding by ultrasonic vibration). Can be prevented. In the electronic circuit shown in FIG. 2, Tr1, Tr2, and Tr3 are preferably n-channel MOSFETs. Moreover, since the electronic component 1 shown in FIGS. 10 and 11 described in the present embodiment uses one type of three semiconductor elements 10, there is no difference in manufacturing process and manufacturing line, and the same manufacturing process. Thus, semiconductor elements manufactured at the same time on the same manufacturing line can be used. Therefore, there is no difference in production lots, and a semiconductor element with very small variation in characteristics can be used, which is very preferable.

  Various changes, additions, and deletions can be made to the configuration, structure, appearance, shape, manufacturing method, and the like of the electronic component 1 of the present invention without departing from the spirit of the present invention. For example, in the description of the present embodiment, an n-channel MOSFET has been described as an example, but a p-channel MOSFET may be used. Further, the mounting process of the electronic component is not limited to the mounting process described in the present embodiment.

  Further, the electronic circuit realized by the electronic component 1 is not limited to the electronic circuit shown in the example of FIG. 2, and various electronic circuits are applied to various electronic components realized by superposing one kind of semiconductor element. It is possible.

  In the description of the present embodiment, as shown in FIGS. 10 and 11, the electronic component 1 is formed by mounting a plurality of semiconductor elements on the mounting board 50, but the mounting board 50 and the third semiconductor element 13 are not used. Omitted, the first semiconductor element 11 and the second semiconductor element 12 which are one kind of semiconductor elements are overlapped, and the first semiconductor element 11 and the second semiconductor element 12 are overlapped with the conductive plate 60 interposed therebetween. Are also included in electronic components.

  Further, the semiconductor element 10 is not limited to the MOSFET, the first surface electrode is not limited to the source electrode, the second surface electrode is not limited to the gate electrode, and the back surface electrode is not limited to the drain electrode. Absent.

  The position where the through hole 10K is formed in the semiconductor element 10 is not limited to the position rotated 90 [°] with respect to the position of the gate electrode 10G, and corresponds to an arbitrary turning angle except 180 [°]. (In the case of 180 [°], a cavity due to a through hole or a notch in the lower semiconductor element is positioned below the gate electrode of the upper semiconductor element when they are overlapped. Therefore, it is not preferable.

  Further, the shape of the notch formed in the semiconductor element 10 may be, for example, a shape like the notch 10L of the semiconductor element 10B shown in FIG. 12, or like the notch 10M of the semiconductor element 10C shown in FIG. It may be a shape. Such a defect part is also included in the notch part. In addition, the shape of the notch and the shape of the defect may be any shape.

DESCRIPTION OF SYMBOLS 1 Electronic component 10, 10B, 10C Semiconductor element 11 1st semiconductor element 12 2nd semiconductor element 13 3rd semiconductor element 10D, 11D, 12D, 13D Drain electrode (back surface electrode)
10G, 11G, 12G, 13G Gate electrode (second surface electrode)
10K, 11K, 12K, 13K Through-hole 10L Notch 10M Notch 10S, 11S, 12S, 13S Source electrode (first surface electrode)
10W Wafer 10WA Front 10WB Back 50 Mounting substrate 50A, 50C Mounting area 51D Drain conductive part (conductive part for back electrode)
51DP Drain lead portion 51DH, 51SH Wiring portion 51GB First electrode pad (conductive portion for surface electrode for first semiconductor element)
51GP 1st gate extraction part 51SP Conductive part for conductive plates 52GB 2nd electrode pad (conductive part for surface electrodes for 2nd semiconductor elements)
52GP 2nd gate extraction part 53D Drain conductive part 53GB 3rd electrode pad (conductive part for surface electrodes for 3rd semiconductor elements)
53GP Third gate lead-out portion 60 Conductive plate 60C Substrate connection surface B Bonding wire M1 module

Claims (3)

An electronic component in which semiconductor elements are stacked,
Overlapping one kind of the semiconductor element in which the first surface electrode and the second surface electrode are formed on the front surface and the back surface electrode is formed on the back surface,
The second surface electrode is formed at a position closer to the edge than the center in the semiconductor element,
In the semiconductor element, a through hole or a notch is formed at a position closer to the edge than the central portion of the semiconductor element and where the first surface electrode and the second surface electrode are not formed. And
The surface of the first semiconductor element that is one of the stacked semiconductor elements and the back surface of the second semiconductor element that is the other stacked semiconductor element are overlapped, and the first surface of the first semiconductor element is overlapped. An electrode and the back surface electrode of the second semiconductor element are electrically connected, and the second surface electrode of the first semiconductor element is connected to the through hole or the notch of the second semiconductor element. Superimposed to match the position,
Electronic components. The electronic component according to claim 1,
In addition, equipped with a mounting board,
The back electrode of the first semiconductor element is electrically connected to a back electrode conductive portion provided on the mounting substrate;
A conductive plate is sandwiched between the first surface electrode of the first semiconductor element and the back electrode of the second semiconductor element, and the first surface electrode of the first semiconductor element and the second semiconductor element The back electrode is electrically connected via the conductive plate,
The conductive plate is sandwiched so as not to cover at least a part of the second surface electrode of the first semiconductor element, and is connected to a conductive portion for a conductive plate provided on the mounting substrate,
A bonding wire is connected to the second surface electrode of the second semiconductor element, and the bonding wire is connected to a surface electrode conductive portion provided on the mounting substrate.
Electronic components. A method of manufacturing an electronic component in which semiconductor elements are superimposed,
In the electronic component, the first surface electrode and the second surface electrode are formed on the front surface, and one kind of the semiconductor element in which the back surface electrode is formed on the back surface is overlaid,
Forming the second surface electrode at a position closer to the edge than the center of the semiconductor element;
A through hole or a notch is formed at a position closer to the edge than the central portion of the semiconductor element and where the first surface electrode and the second surface electrode are not formed,
When the surface of the first semiconductor element that is one of the superimposed semiconductor elements and the back surface of the second semiconductor element that is the other superimposed semiconductor element are overlapped, the second of the first semiconductor element The surface electrode is overlapped so as to coincide with the position of the through hole or the notch of the second semiconductor element, and the first surface electrode of the first semiconductor element and the back electrode of the second semiconductor element are electrically connected. Connect
Manufacturing method of electronic components.

Images