JP2016151914A - Electronic information storage medium, application replacement method, and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic information storage medium configured to analyze and optimize an application in an environment with few resources, to improve performance, an application replacement method, and a program.SOLUTION: When a byte code acquired from a plurality of byte codes described in an application installed is a byte code indicating an inspection instruction, an IC chip 1a determines whether another byte code to be executed following the above byte code in a row is a byte code indicating a non-inspection instruction to be connected to the above inspection instruction, and replaces the byte code indicating the inspection instruction with a byte code indicating a special instruction associated with the byte code indicating the inspection instruction and the byte code indicating the non-inspection instruction, in the application, when the other byte code is a byte code indicating the non-inspection instruction.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a technique of an electronic information storage medium such as an IC chip that includes a virtual machine that acquires identification numbers described in an application in the order of execution and executes processing according to a command indicated by the acquired identification number.

  Many IC chips mounted on recent IC cards are compatible with Java Card. The Java Card is an OS mechanism for downloading an application written in Java (registered trademark) to an IC chip and operating it on the IC chip by an INSTALL command defined in the Global Platform standard. A programming language such as Java is different from the one that is converted from source code to native code (machine language) by compilation like C language in order to absorb the dependency of hardware. Converted to a certain byte code. The byte code is an identification number indicating an instruction such as arithmetic or branch. This bytecode is executed by a virtual machine.

  In the programming language described above, there are approximately 200 types of instructions (in other words, byte codes) defined (that is, supported) for creating an application. Although it depends on the creation of the application, the number of byte codes in one application is often biased. For example, as a result of totaling the byte codes of a certain application, the total number of byte codes (byte codes described in the application) constituting the application is 36015, and the number of used byte codes is 185. Of these, 10 types of byte codes were found to occupy about 50% of the total byte codes constituting the application. This result is only an example, but as a trend, a specific byte code is often called frequently.

  By the way, the speed requirement for the application installed in the IC chip is increasing particularly in the use of the payment processing. On the other hand, the CPU operating clock (generally several MHz to several tens of MHz) mounted on the IC chip is much smaller than the CPU operating clock (several GHz) mounted on a general personal computer. In addition, the amount of memory is much smaller than that of personal computers. Therefore, it is not suitable for installing a compilation function that requires some resources.

  As a general Java high-speed execution method, there is a Just In Time compiler method. However, this method requires processing of compiling in the background while operating with an interpreter, and is not suitable for an IC chip in which the CPU processing is weaker than the CPU of a general personal computer.

  As another high-speed execution method in the interpreter, there is a method of defining an original byte code. For example, Patent Document 1 discloses an IC card system including an IC card including an interpreter that executes a first instruction and a second instruction, and a terminal having a converter that converts the second instruction into the first instruction. It is disclosed.

Japanese Patent No. 3766052

  However, it is not sufficient to assume an actual use case for the converter to perform replacement processing such as renumbering in a terminal facing the IC card as disclosed in Patent Document 1. For example, in a SIM card or the like mounted on a mobile phone, an application that realizes a settlement function may be stored in the SIM card. In this case, applications, mobile phones, SIM cards, and the like are often developed by different companies. Therefore, special optimization cannot be expected for the application at the application development company or the mobile phone manufacturer. As a result, it is desired that the IC chip alone analyze the installed application and optimize it. However, as described above, the conventional Just In Time compiler method is difficult to implement in a fragile CPU such as an IC chip and a small resource environment.

  Therefore, the present invention has been made in view of the above points. An electronic information storage medium, an application replacement method, and a program capable of analyzing and optimizing an application and improving performance in an environment with few resources are provided. The issue is to provide.

  In order to solve the above problem, the invention according to claim 1 stores an application describing an identification number indicating each of a plurality of instructions selected from a plurality of kinds of instructions defined for creating an application. An electronic information storage medium comprising: a nonvolatile memory; and an execution unit that acquires the identification numbers described in the application in the order of execution and executes processing according to the instructions indicated by the acquired identification numbers, The nonvolatile memory includes an identification number indicating a first instruction selected as an inspection target from among the plurality of types of instructions, and an identification number indicating one or more second instructions to be linked to the first instruction. An identification number indicating a third instruction obtained by concatenating the first instruction and the second instruction is stored in association with each other, and a plurality of the identifiers described in the application are stored. When the identification number acquired from among the numbers is an identification number indicating the first instruction, the other identification number in which the execution order is continuous with respect to the identification number is the first instruction Check instruction processing means for determining whether or not the second instruction to be connected is an identification number, and the other identification number is an identification number indicating the second instruction by the inspection instruction processing means. If it is determined, in the application, the identification number indicating the first instruction is changed to the identification number indicating the first instruction and the third instruction associated with the identification number indicating the second instruction. Rewriting means for rewriting the identification number shown.

  According to a second aspect of the present invention, in the electronic information storage medium according to the first aspect, the execution unit sequentially acquires the identification number from the application, and the identification number indicates each time the identification number is acquired. When the identification number acquired during the processing period of the application that executes processing according to the instruction is an identification number indicating the first instruction, the inspection instruction processing means It is characterized in that it is determined whether or not the other identification number having a continuous execution order is an identification number indicating the second instruction to be linked to the first instruction.

  According to a third aspect of the present invention, in the electronic information storage medium according to the second aspect, the electronic information storage medium includes a volatile memory for temporarily storing data, and the volatile memory includes: When the buffer area set to a capacity smaller than the size of the entire application is set, and the inspection instruction processing means determines that the other identification number is an identification number indicating the second instruction, The identification information indicating the first instruction is associated with specific information capable of specifying the position in the application, the identification number indicating the first instruction, and the identification number indicating the second instruction in the nonvolatile memory. In addition, the identification number indicating the third instruction is written in the buffer area, and when the application process is completed, the identification number is written in the buffer area. The specific information and the identification number are written in a predetermined area in the nonvolatile memory, and the rewriting unit is configured to write the specific information and the specific information written in the predetermined area at a reset timing of the electronic information storage medium or an application start timing. Based on an identification number indicating a third instruction, the identification number indicating the first instruction is rewritten to an identification number indicating the third instruction.

  According to a fourth aspect of the present invention, in the electronic information storage medium according to the second aspect, the electronic information storage medium includes a volatile memory for temporarily storing data, and the volatile memory includes: When a buffer area set to a capacity smaller than the size of the entire application is set, and the inspection instruction processing means determines that the other identification number is not an identification number indicating the second instruction, The identification information indicating the first instruction and the identification information indicating the position in the application and the identification number indicating the first instruction and indicating that it has been inspected are written in the buffer area, and the application process Is finished, the specific information written in the buffer area and the identification number are written in a predetermined area in the nonvolatile memory, The rewriting means indicates the specific information and the first instruction written in the predetermined area at the reset timing of the electronic information storage medium or the start timing of the application, and based on an identification number indicating that it has been inspected. Then, the identification number indicating the first instruction is rewritten to an identification number indicating the first instruction and indicating that it has been inspected.

  According to a fifth aspect of the present invention, in the electronic information storage medium according to the third or fourth aspect, the inspection command processing means is configured such that the identification number acquired during the processing period of the application is the first command. If it is determined whether the buffer area is empty, and if it is determined that the buffer area is empty, the other identifications in which the execution order is continuous with respect to the identification number It is determined whether or not the number is an identification number indicating the second instruction to be linked to the first instruction.

  According to a sixth aspect of the present invention, in the electronic information storage medium according to the fourth aspect, the execution means is configured such that the identification number acquired during the second or later processing period of the application is the first command. When the identification number indicates that it has been inspected and the inspection instruction processing means executes processing according to the instruction indicated by the identification number, and the inspection instruction processing means is connected to the first instruction. The execution means acquires the next identification number and executes a process according to the instruction indicated by the identification number without determining whether the identification number indicates an instruction.

  According to a seventh aspect of the present invention, there is provided a non-volatile memory for storing an application describing an identification number indicating each of a plurality of instructions selected from a plurality of kinds of instructions defined for creating an application, and the application. An application replacement method in an electronic information storage medium comprising execution means for acquiring the described identification numbers in execution order and executing processing according to the instructions indicated by the acquired identification numbers, wherein the nonvolatile memory is , An identification number indicating a first instruction selected as an inspection target from among the plurality of types of instructions, an identification number indicating one or more second instructions to be linked to the first instruction, and the first And an identification number indicating a third instruction obtained by concatenating the second instruction and the second instruction, and storing a plurality of instructions described in the application When the identification number acquired from the identification number is an identification number indicating the first instruction, the other identification number in which the execution order is continuous with respect to the identification number is the first identification number. In the application, it is determined whether or not the second instruction to be linked with the instruction is an identification number indicating the second instruction, and when the other identification number is determined to be an identification number indicating the second instruction, The identification number indicating the first instruction is rewritten to an identification number indicating the third instruction associated with an identification number indicating the first instruction and an identification number indicating the second instruction. To do.

  According to an eighth aspect of the present invention, there is provided a non-volatile memory for storing an application describing an identification number indicating each of a plurality of instructions selected from a plurality of kinds of instructions defined for creating an application, and a computer. A program that causes the computer to function as an execution unit that acquires the identification numbers described in the application in the order of execution and executes processing according to the command indicated by the acquired identification number in an electronic information storage medium provided The non-volatile memory indicates an identification number indicating a first instruction selected as an inspection target from the plurality of types of instruction groups, and one or more second instructions to be linked to the first instruction. An identification number and an identification number indicating a third instruction obtained by connecting the first instruction and the second instruction are stored in association with each other. The program further causes the computer to respond to the identification number when the identification number acquired from the plurality of identification numbers described in the application is an identification number indicating the first instruction. It is determined whether or not the other identification number in which the execution order is continuous is an identification number indicating the second instruction to be linked to the first instruction, and the other identification number is the second If it is determined that the identification number indicates an instruction, the identification number indicating the first instruction is associated with the identification number indicating the first instruction and the identification number indicating the second instruction in the application. It is made to function so that it may rewrite to the identification number which shows the said 3rd command.

  According to the present invention, it is possible to analyze and optimize an application and improve performance in an environment with few resources.

(A) is a figure which shows the hardware structural example of IC chip 1a, (B) is a figure which shows the functional block example of IC chip 1a. (A) is a diagram showing an example of the contents of processing corresponding to consecutive instructions “SLOAD_0” and “SLOAD_1”, and (B) is a special instruction “SLOAD_0_1” in which “SLOAD_0” and “SLOAD_1” are concatenated. It is a figure which shows an example of the content of the process according to. (A) is a diagram showing an example of the contents of processing corresponding to consecutive instructions “SLOAD_0” and “IFNE”, and (B) is a special instruction “SLOAD_0_IFNE” in which “SLOAD_0” and “IFNE” are concatenated. It is a figure which shows an example of the content of the process according to. (A) is a diagram showing an example of a table that holds a byte code indicating a check instruction, a byte code indicating a non-check instruction, and a byte code indicating a special instruction in association with each other, and (B) It is a conceptual diagram which shows the buffer area | region of RAM. (A) is a flowchart showing an example of a test instruction process executed during the application processing period, and (B) is a reset timing of the IC chip 1a or an application activation timing after the application processing is completed. It is a flowchart which shows an example of the replacement process performed. It is a conceptual diagram which shows the application before and after the bytecode which shows a test | inspection instruction is replaced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, with reference to FIG. 1 etc., the outline | summary structure and function of IC chip 1a mounted in IC card 1 are demonstrated. 1A is a diagram illustrating a hardware configuration example of the IC chip 1a, and FIG. 1B is a diagram illustrating a functional block example of the IC chip 1a. The IC card 1 is used as a cash card, credit card, employee card or the like. Alternatively, the IC card 1 is incorporated into a communication device such as a smartphone or a mobile phone. The IC chip 1a constitutes an electronic information storage medium in the present invention, but this electronic information storage medium may be directly incorporated on a circuit board of a communication device.

  As shown in FIG. 1A, an IC chip 1a includes a CPU (Central Processing Unit) 10, a ROM (Read Only Memory) 11, and a RAM (Random Access Memory) that is a volatile memory for temporarily storing data. ) 12, a flash memory 13 which is a nonvolatile memory, and an I / O circuit 14. Instead of the flash memory, “Electrically Erasable Programmable Read-Only Memory” may be used. The I / O circuit 14 serves as an interface with the external terminal 2. As a result, the IC chip 1a can communicate with or without contact with the external terminal 2 including the IC reader / writer. In the case of the contact type IC chip 1a, the I / O circuit 14 includes, for example, eight terminals C1 to C8. For example, the C1 terminal communicates with the power supply terminal (terminal for supplying power to the IC chip 1a), the C2 terminal with the reset terminal, the C3 terminal with the clock terminal, the C5 terminal with the ground terminal, and the C7 terminal with the external terminal 2. Terminal. On the other hand, in the case of the non-contact type IC chip 1a, the I / O circuit 14 includes, for example, an antenna and a modulation / demodulation circuit. Examples of the external terminal 2 include an IC card issuing machine, ATM, ticket gate, authentication gate, and the like. Alternatively, when the IC chip 1a is incorporated in a communication device, the external terminal 2 corresponds to a control unit responsible for the function of the communication device.

  The CPU 10 is an example of a computer, and is an arithmetic device that executes various programs stored in the flash memory 13 as hardware illustrated in FIG. The various programs include applications described in a program language such as an OS (Operating System), a virtual machine program, and Java (registered trademark). The OS and the virtual machine program are described by a plurality of native codes (execution code groups). The OS is software that directly controls the operation of the IC chip 1 a and may be stored in the ROM 11.

  The virtual machine program is a program that causes the CPU 10 to function as a virtual machine (an example of execution means of the present invention). A virtual machine operating on the OS interprets and executes a byte code (an example of an identification number, also referred to as an index) that is an intermediate code between a source code and a native code. For example, in the case of Java (registered trademark), the byte code is composed of one byte. For this reason, there are 255 types of instructions that can be defined (in other words, bytecodes), but in practice, about 200 types of instructions are defined, and the others are undefined. The instructions are expressed in source code that is easy to understand for humans, such as “SLOAD — 0”, “SLOAD — 1”, “BSPUSH”, “INVOKESPECIAL”, and “GOTO”. Such an instruction is selected and used by a programmer from a plurality of types of instructions defined (supported) for creating an application. In the application created by the programmer, the above-described source code is described in the order of execution, for example. Such an application is converted into an execution format of the virtual machine by the compiler (that is, converted from the source code to the byte code) and installed (stored in the flash memory 13). For this reason, the application stored in the flash memory 13 describes byte codes indicating each of a plurality of instructions in the order of execution, for example.

  The virtual machine acquires byte codes described in the application in the order of execution, interprets the acquired byte codes, and executes processing according to the instruction indicated by the byte codes. The contents of the processing (processing program) according to the instruction indicated by the bytecode are defined in the virtual machine program. The virtual machine also includes a program counter that indicates specific information that can specify the position of the byte code to be executed next (position in the application) among the plurality of byte codes described in the application. Here, examples of the specific information include a byte code address (an address in the flash memory 13 in which the byte code is stored), a byte code offset, and a byte code label value. For example, in the known computed goto algorithm, it is possible to jump directly to an address as a label value by means of label as value which is an extended function corresponding to GNU C.

  In the present embodiment, a new instruction that has not conventionally been defined among the above-described plural types of instructions is defined as a special instruction (an example of a third instruction). This special instruction is an instruction obtained by concatenating a plurality of existing instructions defined in the above-described plurality of types of instructions. The combination of instructions to be linked is selected by, for example, an IC chip issuer based on, for example, the frequency of appearance of combinations of instructions whose execution order continues in a general application. Examples of special instructions include a special instruction that concatenates "SLOAD_0" and "SLOAD_1" (newly defined as "SLOAD_0_1"), and a special instruction that concatenates "SLOAD_0" and "IFNE" ("SLOAD_0_IFNE" and new Definition). In addition, the special instruction includes a byte code that does not overlap with the byte code indicating the existing instruction defined in the plurality of types of instructions described above (for example, an undefined byte code among 255 types of byte codes). Is assigned, and the assigned byte code indicates the special instruction. Further, the processing content (special command processing program) corresponding to the special command is defined in advance in the above-described virtual machine program (that is, the processing content corresponding to the special command is incorporated in the virtual machine).

  Here, the processing according to the special instruction is, for example, a process that simplifies reading of data, writing of data, updating of a program counter, jump to the next instruction, and the like. Further, the processing corresponding to the special instruction includes processing for updating at least the number of program counters originally updated by the bytecode indicating each linked instruction. For example, if the byte counter indicating instruction A is 1, the byte code indicating instruction B is 2, and the program counter is updated, the byte counter indicating the special instruction AB in which the instruction A and the instruction B are concatenated, Only 3 is updated. FIG. 2 (A) is a diagram showing an example of the contents of processing corresponding to consecutive instructions “SLOAD_0” and “SLOAD_1”, and FIG. 2 (B) is a special case in which “SLOAD_0” and “SLOAD_1” are concatenated. FIG. 11 is a diagram illustrating an example of processing contents according to an instruction “SLOAD_0_1”. FIG. 3A is a diagram showing an example of processing contents corresponding to consecutive instructions “SLOAD_0” and “IFNE”, and FIG. 3B is a special case in which “SLOAD_0” and “IFNE” are connected. FIG. 11 is a diagram illustrating an example of the content of processing according to an instruction “SLOAD_0_IFNE”. As shown in FIGS. 2 and 3, the contents of the process after the connection (FIGS. 2B and 3B) are the contents of the process before the connection (FIGS. 2A and 3A). Although the processing procedure is simplified (optimized) as compared with FIG. That is, in the special instruction, a plurality of instructions are processed as one instruction, and high-speed processing is possible.

  In the present embodiment, in order to realize the simplification (optimization) of the processing procedure, a byte code indicating an inspection instruction (an example of a first instruction) selected as an inspection target from the above-described plural types of instructions; , A byte code indicating one or more non-inspection instructions (an example of a second instruction) to be linked to the inspection instruction, and a byte code indicating a special instruction in which the inspection instruction and the non-inspection instruction are combined And stored in the flash memory 13. FIG. 4A is a diagram illustrating an example of a table that holds a byte code indicating a check instruction, a byte code indicating a non-check instruction, and a byte code indicating a special instruction in association with each other. In the example of FIG. 4A, a case where there are a plurality of instructions to be linked with respect to one inspection instruction is shown. In addition, such a table may be configured such that an address or a label value of a byte code is held as an identification number instead of each byte code.

  Further, the flash memory 13 defines a test instruction processing program that defines a test command process when the test command is acquired from a plurality of byte codes described in the application, and a test command replacement process. A replacement processing program is stored. The inspection instruction processing program and the replacement processing program are programs for optimizing the application. The CPU 10 is replaced with an inspection instruction processing section (an example of inspection instruction processing means in the present invention) and a replacement section (rewriting in the present invention). It is a program that functions as an example of a means. Note that the inspection command processing unit and the replacement unit may be provided in a virtual machine. When the byte code acquired (read) from the plurality of byte codes described in the application stored in the flash memory 13 is a byte code indicating a check instruction, the CPU 10 performs the check instruction process. For example, refer to the table to determine whether or not another bytecode whose execution order is continuous with the bytecode indicating the inspection instruction is a bytecode indicating a non-inspection instruction to be linked to the inspection instruction. Determine by doing. When it is determined that the other byte code is a byte code indicating a non-inspection instruction, the CPU 10 executes a replacement process, whereby the byte code indicating the inspection instruction is changed to, for example, FIG. As shown in (A), the byte code indicating the inspection instruction and the byte code indicating the special instruction associated with the byte code indicating the non-inspection instruction are rewritten.

  On the other hand, if it is determined that the other byte code is not a byte code indicating a non-inspection instruction, the CPU 10 executes a replacement process, whereby the byte code indicating the inspection instruction is converted into the inspected instruction in the application. Rewrite the byte code to indicate. Here, the byte code indicating the inspected instruction means a byte code indicating the acquired inspection instruction and indicating inspection. The byte code indicating the inspected instruction is a byte code that does not overlap with the byte code indicating the existing instruction defined in the plurality of types of instructions as in the case of the byte code indicating the special instruction. Further, the content of the process according to the inspected instruction is the same as the content of the process according to the corresponding inspection instruction. However, when the byte code acquired from the plurality of byte codes described in the application is the byte code indicating the inspected instruction, the inspection instruction processing program is not executed because the inspection has been completed (that is, the processing is not performed) Only normal processing will be performed).

  The inspection command process may be executed outside the application processing period, but is preferably executed during the application processing period (that is, during application execution). Here, the processing period of the application corresponds to an instruction indicated by the byte code every time the byte code is sequentially acquired from the application according to a command received from the external terminal 2 by the virtual machine. The period during which the process is executed. When the inspection instruction process is executed during the processing period of the application, a buffer area set to a capacity (buffer size) smaller than the size of the entire application is set in the RAM. The capacity of the buffer area may be arbitrarily set by an application user.

  FIG. 4B is a conceptual diagram showing a buffer area of the RAM. In the example shown in FIG. 4B, the buffer area includes a set of a byte code address indicating a check instruction and a byte code indicating a special instruction, and a byte code address indicating a check instruction and a checked instruction. A pair with a byte code indicating is written. Instead of the byte code address, a byte code label value may be written. In the inspection instruction processing, when it is determined that another bytecode whose execution order is continuous with the bytecode indicating the inspection instruction is a bytecode indicating a non-inspection instruction to be linked to the inspection instruction, the inspection instruction is indicated. A set of a byte code address and a byte code indicating a special instruction is written in the buffer area. On the other hand, in the inspection instruction processing, when it is determined that the other byte code whose execution order is continuous with the byte code indicating the inspection instruction is not the byte code indicating the non-inspection instruction to be linked to the inspection instruction, the inspection instruction A pair of a byte code indicating the address and a byte code indicating the inspected instruction is written in the buffer area. The data written in the buffer area in this way is used in the replacement process.

  Next, the operation of the IC chip 1a will be described with reference to FIG. FIG. 5A is a flowchart illustrating an example of the inspection command process executed during the processing period of the application. FIG. 5B is a flowchart showing an example of a replacement process executed at the reset timing of the IC chip 1a or the application activation timing after the application process is completed. For example, when a command is received from the external terminal 2, the application is activated and application processing is started. At this time, the buffer area is initialized. As a result, the buffer area becomes empty (for example, all FFs or all 00s). When application processing is started, a table as shown in FIG. 4A is read from the flash memory 13 and stored in the work area of the RAM.

  Then, during the processing period of the application (that is, during execution of the application), the virtual machine acquires the bytecode from the application (for example, reads from the flash memory 13 or the RAM) according to the specific information (for example, address) indicated by the program counter, When the acquired byte code is a byte code indicating a check instruction (that is, a byte code indicating a check instruction stored in a table), the CPU 10 starts a check instruction process shown in FIG. On the other hand, if the acquired byte code is not a byte code indicating an inspection instruction, the virtual machine executes processing (normal processing) according to the instruction indicated by the byte code.

  In the inspection instruction process shown in FIG. 5A, the virtual machine executes a process according to the instruction indicated by the byte code indicating the inspection instruction (step S1). Next, the inspection instruction processing unit determines whether or not there is a vacancy in the buffer area (step S2). For example, if there is free space in the buffer area that is equal to or more than the data amount of the set of the byte code address indicating the inspection instruction and the byte code indicating the special instruction (or the byte code indicating the inspected instruction), the buffer It is determined that there is a space in the area. If the inspection instruction processing unit determines that there is an empty buffer area (step S2: YES), the inspection instruction processing unit proceeds to step S3. On the other hand, when it is determined that there is no space in the buffer area (step S2: NO), the inspection instruction processing unit ends the inspection instruction processing. As a result, the program counter is advanced to proceed to processing of the next byte code.

  In step S3, the inspection instruction processing unit confirms the preceding and following byte codes based on the program counter. Then, the check instruction processing unit determines whether another byte code whose execution order is continuous with respect to the byte code indicating the check instruction is a byte code indicating a non-check instruction to be linked to the check instruction. (Step S4). For example, when the byte code specified by the specific information immediately before or after the specific information indicated by the current program counter is associated in the table as a byte code indicating a non-inspection instruction to be linked to the inspection instruction, It is determined that the byte code indicates a non-inspection instruction to be linked with the inspection instruction.

  When the inspection instruction processing unit determines that another byte code whose execution order is continuous with respect to the byte code indicating the inspection instruction is a byte code indicating a non-inspection instruction to be linked to the inspection instruction (step S4: YES), the byte code address indicating the check instruction, and the byte code indicating the check instruction and the byte code indicating the special instruction associated with the byte code indicating the non-check instruction in the table are written in the buffer area. (In other words, a set of address and byte code is stored) (step S5), and the inspection instruction process is terminated. As a result, the program counter is advanced to proceed to processing of the next byte code. Instead of the byte code address, a byte code label value may be written.

  On the other hand, when the check instruction processing unit determines that the other byte code whose execution order is continuous with the byte code indicating the check instruction is not the byte code indicating the non-check instruction to be linked to the check instruction (step S4). : NO), the address of the byte code indicating the inspection instruction and the byte code indicating the inspected instruction are written in the buffer area (step S6), and the inspection instruction processing is terminated. As a result, the program counter is advanced, and the processing proceeds to the next byte code.

  As described above, the inspection instruction process shown in FIG. 5A is executed every time the byte code indicating the inspection instruction is read. When the processing of the application is completed, the inspection instruction processing unit writes the address of the byte code indicating the inspection instruction and the byte code indicating the special instruction (or inspection) written in the buffer area in step S5 or S6. A set of byte codes indicating a completed instruction) is written in a temporary storage area (an example of a predetermined area) in the flash memory 13. This is to prevent the address / byte code pair from being erased even when the power supply to the IC card 1a is cut off.

  After writing the address / byte code pair into the temporary storage area, the CPU 10 starts the replacement process shown in FIG. 5B at the reset timing of the IC card 1a or the application activation timing. In the replacement process shown in FIG. 5B, the replacement unit checks the temporary storage area in the flash memory 13 (step S11), and determines whether or not the temporary storage area is all empty (step S12). . For example, if all the temporary storage areas are in the FF state or all 00 states, it is determined that the temporary storage areas are all empty. When it is determined that the temporary storage area is all empty (step S12: YES), the replacement unit ends the replacement process. On the other hand, when the replacement unit determines that all the temporary storage areas are not empty (step S12: NO), the replacement unit proceeds to step S13.

  In step S13, the replacement unit executes the inspection instruction based on the byte code address indicating the inspection instruction written in the temporary storage area and the byte code indicating the special instruction (or the byte code indicating the inspected instruction). The indicated byte code is rewritten to a byte code indicating a special instruction (or a byte code indicating an inspected instruction). That is, based on the address of the byte code indicating the inspection instruction, the position of the byte code indicating the inspection instruction in the application is specified, and the byte code indicating the special instruction at the specified position (or the byte code indicating the inspected instruction) ) Is written (written to the flash memory 13), the byte code indicating the inspection instruction is rewritten. Next, the replacement unit performs an erasing process to make the temporary storage area empty (step S14), and ends the replacement process.

  FIG. 6 is a conceptual diagram showing an application before and after the byte code indicating the inspection instruction is replaced. In the example of FIG. 6, for convenience of explanation, it is described in source code, but is actually described in byte code. The example in FIG. 6A shows an initial (installation) application, the example in FIG. 6B shows an application after the first execution, and the example in FIG. 6C shows the second application. Indicates the application after execution. As shown in FIGS. 6A and 6B, in the application after the first execution with respect to the initial stage, the first check instruction (SLOAD_0) is replaced with a special instruction (SLOAD_0_1) (51 copies). The second inspection instruction (SLOAD_0) is replaced with the inspected instruction (SLOAD_0_inspected) (52 copies). As described above, since the upper limit size of the buffer area is set as described above, two sets of data related to the first and second check instructions are written to the buffer area in the first execution of the application. This is because when the third and subsequent inspection instructions are acquired, it is determined that there is no space in the buffer area (step S2: NO). Therefore, as shown in FIGS. 6B and 6C, in the application after the second execution, the third check instruction (SLOAD_0) is replaced with a special instruction (SLOAD_0_1) after the first execution. (53 parts), the fourth inspection instruction (SLOAD_0) is replaced with the inspected instruction (SLOAD_0_inspected) (54 parts). By setting the upper limit size of the buffer area in this way, the upper limit value to be replaced at one time is determined, and updating is performed at a timing such as immediately after reset, so that inspection instructions are concentrated in one application. However, it is possible to avoid slowing down the execution processing speed of the application, and to quickly execute the command processing in the IC chip 1a, and the number of special instructions increases each time the application carnation is executed. The execution processing speed of the application can be increased according to the number of times of execution. However, for example, in an environment where the execution processing speed of the application is not required, the byte code may be sequentially replaced without providing a buffer area.

  Further, as shown in FIGS. 6B and 6C, the non-inspection instruction (SLOAD_1) continued from the inspection instruction (SLOAD_0) remains in the application. However, since the non-inspection instruction (SLOAD_1) is skipped when the program counter of the special instruction is updated as described above, it is not read out thereafter. Although it is possible to pack instructions that are no longer read in the application, according to the above-described embodiment, it is possible to reduce write processing such as processing to pack the commands and processing to reduce the size of the method, and as a result. The processing time can be reduced, and the buffer size of the write guarantee function (Transaction) can be reduced.

  In addition, as shown in FIGS. 6B and 6C, even if the inspection instruction (SLOAD_0) is not replaced with the special instruction (SLOAD_0_1), the inspection instruction (SLOAD_0_inspected) is replaced with the second and subsequent times of the application. When the bytecode obtained during execution of is a bytecode indicating a checked instruction, normal processing is executed according to the checked instruction, but a bytecode indicating a non-check instruction to be linked with the check instruction Without determining whether or not, the process proceeds to processing according to the next instruction. For this reason, it is possible to avoid duplicated replacement processing.

  As described above, according to the above-described embodiment, the IC chip 1a has the byte code acquired from the plurality of byte codes described in the installed application as the byte code indicating the inspection instruction. It is determined whether another byte code whose execution order is continuous with respect to the byte code is a byte code indicating a non-inspection instruction to be linked to the inspection instruction, and the other byte code indicates the non-inspection instruction. If it is a byte code, the application may rewrite the byte code indicating the inspection instruction into a byte code indicating a special instruction associated with the byte code indicating the inspection instruction and the byte code indicating the non-inspection instruction. Now that you have configured your application in a low resource environment, It is possible to improve the scan. Further, as described with reference to FIG. 5A, the configuration is such that the inspection command processing is executed during the processing period of the application (that is, during execution of the application), thereby optimizing the application dynamically and efficiently. be able to.

1 IC Card 2 External Terminal 1a IC Chip 10 CPU
11 ROM
12 RAM
13 Flash memory 14 I / O circuit

Claims (8)

A nonvolatile memory for storing an application describing an identification number indicating each of a plurality of instructions selected from a plurality of types of instructions defined for creating an application, and the identification numbers described in the application in the order of execution An electronic information storage medium comprising: execution means for acquiring and executing processing according to the instruction indicated by the acquired identification number;
The non-volatile memory includes an identification number indicating a first instruction selected as an inspection target from among the plurality of types of instructions, and an identification number indicating one or more second instructions to be linked to the first instruction. And an identification number indicating a third instruction obtained by concatenating the first instruction and the second instruction in association with each other,
When the identification number acquired from among the plurality of identification numbers described in the application is an identification number indicating the first instruction, the other execution sequence that is consecutive with respect to the identification number A test instruction processing means for determining whether the identification number is an identification number indicating the second instruction to be linked to the first instruction;
When it is determined by the inspection instruction processing means that the other identification number is an identification number indicating the second instruction, in the application, an identification number indicating the first instruction is assigned to the first instruction. Rewriting means for rewriting the identification number indicating the third instruction associated with the identification number indicating the second instruction and the identification number indicating the second instruction;
An electronic information storage medium comprising:   The identification number acquired during the processing period of the application in which the execution unit sequentially acquires the identification number from the application and executes the process according to the command indicated by the identification number each time the identification number is acquired. Is the identification number indicating the first instruction, the inspection instruction processing means connects the other identification number in which the execution order continues with respect to the identification number to the first instruction. 2. The electronic information storage medium according to claim 1, wherein it is determined whether or not the identification number indicates a second command. The electronic information storage medium includes a volatile memory for temporarily storing data, and in the volatile memory, a buffer area set to a capacity smaller than the size of the entire application is set,
When the inspection command processing means determines that the other identification number is an identification number indicating the second command, specific information that can identify the position of the identification number indicating the first command in the application And an identification number indicating the third instruction associated with an identification number indicating the first instruction and an identification number indicating the second instruction in the nonvolatile memory, and writing the application to the buffer area When the process is completed, the specific information written in the buffer area and the identification number are written in a predetermined area in the nonvolatile memory,
The rewriting means outputs the first instruction based on the specific information written in the predetermined area and the identification number indicating the third instruction at a reset timing of the electronic information storage medium or an application activation timing. The electronic information storage medium according to claim 2, wherein the identification number indicated is rewritten to an identification number indicating the third instruction. The electronic information storage medium includes a volatile memory for temporarily storing data, and in the volatile memory, a buffer area set to a capacity smaller than the size of the entire application is set,
The inspection command processing means, when it is determined that the other identification number is not an identification number indicating the second command, specific information capable of specifying a position in the application of the identification number indicating the first command; The identification number indicating the first instruction and indicating that it has been inspected is written in the buffer area, and when the processing of the application is completed, the specific information and the identification number written in the buffer area are Writing to a predetermined area in the non-volatile memory;
The rewriting means indicates the specific information and the first instruction written in the predetermined area at the reset timing of the electronic information storage medium or the start timing of the application, and based on an identification number indicating that it has been inspected. The electronic information storage medium according to claim 2, wherein the identification number indicating the first instruction is rewritten to an identification number indicating the first instruction and indicating that the inspection has been completed.   When the identification number acquired during the processing period of the application is an identification number indicating the first instruction, the inspection instruction processing unit determines whether or not the buffer area has a free space, If it is determined that there is a free space in the buffer area, is the other identification number in which the execution order is continuous with respect to the identification number an identification number indicating the second instruction to be linked to the first instruction? The electronic information storage medium according to claim 3, wherein it is determined whether or not.   The execution means indicates the identification number when the identification number acquired during the second and subsequent processing periods of the application is an identification number indicating the first command and indicating that the application has been inspected. The process according to the instruction is executed, and the inspection instruction processing means does not determine whether or not it is an identification number indicating the second instruction to be linked to the first instruction. 5. The electronic information storage medium according to claim 4, wherein the next identification number is acquired and processing corresponding to the command indicated by the identification number is executed. A nonvolatile memory for storing an application describing an identification number indicating each of a plurality of instructions selected from a plurality of types of instructions defined for creating an application, and the identification numbers described in the application in the order of execution An application replacement method in an electronic information storage medium comprising execution means for acquiring and executing processing according to the instruction indicated by the acquired identification number,
The non-volatile memory includes an identification number indicating a first instruction selected as an inspection target from among the plurality of types of instructions, and an identification number indicating one or more second instructions to be linked to the first instruction. And an identification number indicating a third instruction obtained by concatenating the first instruction and the second instruction in association with each other,
When the identification number acquired from among the plurality of identification numbers described in the application is an identification number indicating the first instruction, the other execution sequence that is consecutive with respect to the identification number Determining whether the identification number is an identification number indicating the second instruction to be linked to the first instruction;
When it is determined that the other identification number is an identification number indicating the second instruction, in the application, an identification number indicating the first instruction, an identification number indicating the first instruction, and the An application replacement method comprising rewriting an identification number indicating the third instruction associated with an identification number indicating a second instruction. An electronic information storage medium comprising: a non-volatile memory for storing an application describing an identification number indicating each of a plurality of instructions selected from a plurality of kinds of instructions defined for creating an application; and a computer. A program that acquires the identification numbers described in the application in the order of execution and functions as an execution unit that executes processing according to the command indicated by the acquired identification number,
The nonvolatile memory has an identification number indicating a first instruction selected as an inspection target from the plurality of types of instruction groups, and an identification indicating one or more second instructions to be linked to the first instruction. A number and an identification number indicating a third instruction obtained by concatenating the first instruction and the second instruction in association with each other;
The program further causes the computer to
When the identification number acquired from among the plurality of identification numbers described in the application is an identification number indicating the first instruction, the other execution sequence that is consecutive with respect to the identification number Determining whether the identification number is an identification number indicating the second instruction to be linked to the first instruction;
When it is determined that the other identification number is an identification number indicating the second instruction, in the application, an identification number indicating the first instruction, an identification number indicating the first instruction, and the A program for causing a function to be rewritten to an identification number indicating the third instruction associated with an identification number indicating a second instruction.