JP2016151888A - Communication apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To store dynamic data in a non-volatile memory of a communication apparatus, and properly store fault log necessary for fault analysis.SOLUTION: A communication apparatus 10 includes a control section 100 for controlling a communication apparatus, and a transfer section 200 for controlling data transfer processing. The control section includes an arithmetic processing section 104, a non-volatile memory 106, a volatile memory 105, and a memory area control device 109 for controlling memory areas generated by dividing the non-volatile memory to be accessed by the arithmetic processing section. When the communication apparatus is started and the non-volatile memory is not initialized, the memory area control device divides a part of the non-volatile memory into a plurality of memory areas, including an area where data is to be stored, an area where a protection bit for preventing data overwriting is to be stored, and an area where time stamp is to be stored, to determine a memory area to be used by the arithmetic processing section, from among the memory areas. The arithmetic processing section stores dynamic data in the memory area to be used.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a communication device.

  In a general communication device such as a router and a switch, data such as path information determined at the time of operation of the communication device and dynamically updated during operation is DRAM (Dynamic Random Access) having an excellent write life. Stored in a volatile memory such as Memory. In general communication devices, configuration information and device setting information that are determined during operation of the communication device and are not dynamically updated during operation are temporarily stored in a volatile memory, and the operation from the user is performed. Etc., the data is stored in a non-volatile memory such as a flash memory.

  In this specification, data that is dynamically updated during operation (data that is frequently updated) is also referred to as dynamic data. In addition, data that is not dynamically updated during operation (data with low update frequency) is also described as static data.

  In the operation and management of communication devices, record device information (log) immediately before the occurrence of an incident, and investigate the cause and take countermeasures based on the failure log, which is device and path information when a failure or failure occurs. It is important to stand. In order to retain device information immediately before a failure occurs, it is necessary to always update the log. In addition, even if a fatal failure such as a power failure occurs when the log is updated, a mechanism that can analyze the failure is required.

  Communication device failures include software failures due to routing protocol applications or daemon hang-ups or program runaway, and hardware failures due to failures in CPU, memory, power supply, clock peripheral circuits, etc. .

  When a hardware failure occurs in a general communication device, dynamic data stored in the volatile memory is not left as a log. Therefore, a method for periodically backing up dynamic data stored in a volatile memory to a nonvolatile memory or the like can be considered. In addition, when a software failure occurs in a general communication device, a method of dumping dynamic data stored in a volatile memory as a failure log in a nonvolatile memory can be considered. For example, the invention described in Patent Document 1 is known as an invention relating to a log acquisition method for analyzing a failure.

  Japanese Patent Laid-Open No. 2004-133867 describes that “a transmission device in which a plurality of units packaged for each function are combined and mounted is provided with a log obtained by logging the status information of the unit when a failure occurs in the transmission device. There is described a “transmission apparatus comprising a non-volatile recording unit that sequentially records so that it can be used for the cause analysis of the failure”.

  The transmission device described in Patent Document 1 has a volatile memory and a nonvolatile memory dedicated to logs. The transmission device described in Patent Document 1 performs logging when periodic or change in state information is detected, temporarily stores the collected information in a volatile memory, extracts necessary information, and is extracted. Store information in non-volatile memory. Moreover, the transmission apparatus described in Patent Document 1 stores only a time log in a nonvolatile memory when an overlapping repetition pattern is included. Further, it is described that a loop buffer method is used as a log management method in the nonvolatile memory.

JP 2010-147804 A

  Since the transmission device described in Patent Document 1 temporarily stores collected information in a volatile memory, when a hardware failure occurs, the information stored in the volatile memory disappears. Therefore, log cannot be acquired.

  The transmission device described in Patent Literature 1 extracts only information satisfying a predetermined condition from information stored in a volatile memory, and stores the extracted information in a nonvolatile memory. Therefore, it takes time to move data from the volatile memory to the non-volatile memory, which causes the above-described problem to increase. In addition, various factors need to be considered in order to analyze a failure. However, the transmission device described in Patent Document 1 does not necessarily acquire information necessary for failure analysis as a log.

  Moreover, the transmission apparatus described in Patent Document 1 manages logs in a loop buffer method when storing dynamic data in a nonvolatile memory. For this reason, when the capacity of the nonvolatile memory is insufficient, the failure information of the failure that has occurred for the first time after the start of log acquisition is overwritten with new data. Therefore, information necessary for failure analysis cannot be left as a log. As described in Patent Document 1, since a failure that has occurred once may occur many times, the failure information of a failure that has occurred for the first time becomes important information in failure analysis.

  A typical example of the invention disclosed in the present application is as follows. That is, a communication device that transfers data, the communication device including a control unit that controls the communication device and a transfer unit that controls the transfer of the data, and the control unit is an arithmetic processing unit that executes processing A non-volatile memory, a volatile memory, and a memory area control device that controls a memory area generated by dividing an area of the non-volatile memory accessed by the arithmetic processing unit, and the transfer unit Includes a route search engine for searching for a route for transferring received data, a transfer engine for transferring the received data based on a processing result of the route search engine, and the route search engine for transferring the received data. A memory for storing path information for searching for a path; and an interface connected to a network. When the communication device is activated and the non-volatile memory is not initialized, the device suppresses overwriting of a part of the non-volatile memory area, a data storage area, and the memory area. A memory area that is divided into a plurality of memory areas including an area for storing a protection bit for performing control and an area for storing a time stamp related to the data, and is used by the arithmetic processing unit from among the plurality of memory areas A memory area is determined, and the arithmetic processing unit stores dynamic data that is dynamically updated during operation of the communication apparatus in a use memory area determined by the memory area control device.

  According to the present invention, data necessary for failure analysis is stored as a log in a nonvolatile memory that is divided into a plurality of memory areas and provided with a protection bit for preventing overwriting of data, so that failure analysis by a user is easy. To do. Problems, configurations, and effects other than those described above will become apparent from the description of the following examples.

It is a block diagram which shows an example of a structure of the communication apparatus of an Example. It is a block diagram explaining an example of a structure of the control part of an Example. It is explanatory drawing which shows an example of a structure of the non-volatile memory of an Example. It is explanatory drawing which shows an example of the surface control register of an Example. It is explanatory drawing which shows an example of the surface management table of an Example. It is explanatory drawing which shows the flow of a process of the communication apparatus of an Example. It is a flowchart explaining the outline | summary of the process which the surface control device of an Example performs. It is a flowchart explaining an example of the initial setting process which the surface control device of an Example performs. It is a flowchart explaining an example of the initial setting process which the surface control device of an Example performs. It is a flowchart explaining an example of the utilization surface determination process which the surface control device of an Example performs. It is a flowchart explaining an example of the utilization surface determination process which the surface control device of an Example performs. It is a flowchart explaining an example of the log update surface selection process which the surface control device of an Example performs. It is a flowchart explaining an example of the non-volatile memory consistency confirmation process which the surface control device of an Example performs. It is a flowchart explaining an example of the software normal starting confirmation process which the surface control device of an Example performs. It is a flowchart explaining an example of the process which CPU of an Example performs in a software normal starting confirmation process. It is explanatory drawing which shows an example of the setting method and the update method of the surface in the non-volatile memory of the communication apparatus of an Example. It is explanatory drawing which shows an example of the setting method and the update method of the surface in the non-volatile memory of the communication apparatus of an Example. It is explanatory drawing which shows an example of the setting method and the update method of the surface in the non-volatile memory of the communication apparatus of an Example. It is explanatory drawing which shows an example of the setting method and the update method of the surface in the non-volatile memory of the communication apparatus of an Example. It is a flowchart explaining an example of the acquisition process of the failure log which the communication apparatus of an Example performs.

  Embodiments will be described below with reference to the accompanying drawings.

  FIG. 1 is a block diagram illustrating an example of the configuration of the communication apparatus according to the embodiment.

  The communication device 10 receives a packet (data) from the network 206 and transmits the received packet (data) to a predetermined destination. As shown in FIG. 1, the communication device 10 includes a control unit 100 and a transfer unit 200.

  The control unit 100 controls the communication device 10 as a whole. The control unit 100 includes a central processing unit 104, a flash memory 101, a volatile memory 105, a nonvolatile memory 106, a memory area control device 109, and a transfer device 108. The central processing unit 104 is connected to the flash memory 101, the volatile memory 105, the memory area control device 109, the transfer device 108, the maintenance flash memory 118, and the input / output device 103, and also passes through the memory area control device 109. Then, it is connected to the nonvolatile memory 106.

  The central processing unit 104 performs arithmetic processing using information stored in a storage device such as the flash memory 101, the volatile memory 105, and the nonvolatile memory 106.

  The flash memory 101 is a non-volatile memory in which performance degradation occurs due to data writing, and stores data such as an OS (Operating System) that realizes the function of the control unit 100.

  The volatile memory 105 stores data that is not dynamically updated during operation (data with low update frequency), that is, static data 102. As the volatile memory 105, for example, a DRAM (Dynamic Random Access Memory) can be considered.

  The nonvolatile memory 106 stores data that is dynamically updated during operation (data that is frequently updated), that is, dynamic data 107. The non-volatile memory 106 is a non-volatile memory in which performance degradation due to data writing does not occur. For example, an MRAM (Magnetic Resistive Random Access Memory) or the like can be considered. In this embodiment, the memory area of the nonvolatile memory 106 is divided into a plurality of memory areas, and dynamic data 107 necessary for packet transfer is stored in one memory area. Hereinafter, the memory area is expressed as a two-dimensional “surface”, but the memory area may be three-dimensional. Hereinafter, the memory area control device 109 is expressed as a surface control device 109.

  The surface control device 109 performs control such as addition, deletion, and update of data for each surface of the nonvolatile memory 106. Specific processing of the surface control device 109 will be described later.

  The transfer device 108 transfers data between the control unit 100 and the transfer unit 200.

  The maintenance flash memory 118 temporarily stores the log when acquiring the log from the communication device 10. The maintenance flash memory 118 may be, for example, a USB memory that can be inserted into and removed from the communication device 10.

  The input / output device 103 is a device on which a user such as an administrator of the communication device 10 operates the communication device 10. Examples of the input / output device 103 include a management computer, a keyboard, a mouse, a touch panel, and a display.

  The transfer unit 200 controls packet reception and packet transmission. The transfer unit 200 includes a transfer device 201, a route search engine 202, a table memory 203, a transfer engine 204, and one or more network interfaces 205. The route search engine 202 is connected to the transfer device 201, the table memory 203, and the transfer engine 204. The transfer engine 204 is connected to one or more network interfaces 205. In FIG. 1, the transfer engine 204 is connected to network interfaces 205A, 205B, 205C, 205D, 205E, and 205F.

  The transfer device 201 is the same as the transfer device 108 and transfers data between the control unit 100 and the transfer unit 200. The route search engine 202 determines the transfer destination of the received packet. The table memory 203 stores route information and the like used by the route search engine 202. A network interface 205 is an interface connected to the network 206.

  The network 206 may be, for example, a WAN (Wide Area Network), a LAN (Local Area Network), a SAN (Storage Area Network), and the Internet. Note that the present embodiment is not limited to the type of network 206 connected to the communication device 10.

  The route search engine 202 and the transfer engine 204 are divided in units of functional blocks, but may be realized as one functional block or one device.

  Here, an outline of the operation of the communication apparatus 10 will be described.

  The central processing unit 104 performs route calculation processing based on the dynamic route data collected by the routing protocol and the static route data input by the user operating the input / output device 103. The route calculation process is executed every time the managed network topology is changed.

  The central processing unit 104 extracts the difference of the current route information as update information based on the result of the route calculation processing, and updates it to a part (surface) of the memory area of the nonvolatile memory 106 via the surface control device 109. Information is stored as dynamic data 107. In this embodiment, the update information is stored in the nonvolatile memory 106 via the surface control device 109. Further, the central processing unit 104 transmits update information to the transfer unit 200 via the transfer device 108.

  The transfer device 108 and the transfer device 201 each transfer update information stored in the nonvolatile memory 106 by the bucket relay method. As a result, the update information is written in the table memory 203.

  The route search engine 202 determines a transfer destination of a packet transmitted from the network 206 based on the update information written in the table memory 203.

  Further, the transfer engine 204 transfers a packet received from the network 206 to a predetermined destination via one of the network interfaces 205 based on the destination search result by the route search engine 202. When the transfer destination is unknown or the packet is addressed to the communication apparatus 10, the packet is transmitted to the central processing unit 104 via the transfer device 201 and the transfer device 108, and the central processing unit 104 transmits the packet. Is processed.

  Note that the configuration of the communication apparatus 10 illustrated in FIG. 1 is an example, and the present invention is not limited to this. For example, the control unit 100 and the transfer unit 200 may be configured redundantly.

  FIG. 2 is a block diagram illustrating an example of the configuration of the control unit 100 according to the embodiment.

  The central processing unit 104 includes a CPU 1041 and an I / O (Input / Output) control unit 1042. The CPU 1041 executes various arithmetic processes. The I / O control unit 1042 executes arbitration processing of memory access (DMA: Direct Memory ACCESS) from an I / O device such as the transfer device 108 and memory access (PIO: Programmed I / O) from the CPU 1041.

  The CPU 1041 is connected to the volatile memory 105 and a later-described surface switching control unit 114 via a memory bus 111 typified by DDR3 connected to the I / O control unit 1042. Here, the memory bus 111 is a connection line used for outputting a memory address signal. The CPU 1041 is connected to the transfer device 108 and a surface switching control unit 114 to be described later via a control bus 112 typified by PCIe connected to the I / O control unit 1042. Here, the control bus 112 is a bus for controlling various buses in the communication apparatus 10, and signal input / output timing in the bus such as the memory bus 111, the central processing unit 104, the surface control device 109, and the like. This is a connection line used to output a signal transmitted by control information transmitted / received to / from another device. The CPU 1041 is connected to the flash memory 101 via a storage bus represented by SATA connected to the I / O control unit 1042. The CPU 1041 is connected to the maintenance flash memory 118 via a bus typified by a USB or the like that can be inserted and removed in a live state.

  The surface control device 109 includes a surface switching control unit 114, a surface control register 110, and a surface management table 113. The surface control device 109 includes a surface management table 113, a surface control register 110, and a memory (not shown) that stores temporary data used for processing.

  The surface switching control unit 114 assigns and switches surfaces in the nonvolatile memory 106 and outputs a CPU reset command to the central processing unit 104. The CPU reset command is a command for resetting (stopping) the startup process of the CPU 1041. The surface switching control unit 114 is connected to the surface management table 113 and the surface control register 110 via an internal bus. The surface switching control unit 114 is connected to the nonvolatile memory 106 via the memory bus 111.

  In this embodiment, the central processing unit 104 is not directly connected to the nonvolatile memory 106 via the memory bus 111 but is connected to the nonvolatile memory 106 via the surface switching control unit 114. Thus, the surface switching control unit 114 limits the memory area of the nonvolatile memory 106 that can be recognized by the CPU 1041 to a specific area (surface).

  The surface control register 110 stores information necessary for controlling the surface in the nonvolatile memory 106. Details of the surface control register 110 will be described later with reference to FIG. The surface management table 113 stores information for managing surfaces in the nonvolatile memory 106. Details of the surface management table 113 will be described later with reference to FIG.

  In this embodiment, the central processing unit 104 dynamically determines the volatile memory 105 and the nonvolatile memory 106 as memory areas for storing data. Specifically, the central processing unit 104 stores dynamic data 107 that is frequently updated, such as information deletion and addition, as shown in FIG. 2, in the nonvolatile memory 106, and static data that is not frequently updated. 102 is stored in the volatile memory 105. As the static data 102, for example, information that is appropriately changed according to a user opportunity, such as configuration information, can be considered.

  The route information includes data set based on information periodically collected from peripheral devices, that is, data having the characteristics of the dynamic data 107, and data set by a user opportunity, that is, static information. Data having the characteristics of data 102. Therefore, the central processing unit 104 may store the path information in either the volatile memory 105 or the non-volatile memory 106, and when the data having different characteristics can be divided, the volatile memory Each data may be stored in 105 and the non-volatile memory 106.

  Next, the configuration of the nonvolatile memory 106 of this embodiment will be described with reference to FIG. FIG. 3 is an explanatory diagram illustrating an example of the configuration of the nonvolatile memory 106 according to the embodiment.

  In the present embodiment, the memory area of the nonvolatile memory 106 is managed by being divided into an actual use memory area 1067 and a control flag storage area 1068. The actual use memory area 1067 is a memory area for storing data. The actual use memory area 1067 of this embodiment is divided into a plurality of surfaces, and data is stored in each surface. In the following description, dividing the actual memory area 1067 into a plurality of surfaces having a predetermined size is also referred to as setting a surface. The control flag storage area 1068 is a memory area for storing a flag and information for controlling the surface.

  In this embodiment, it is assumed that the definition information of the control flag storage area 1068 of the nonvolatile memory 106 is set inside the communication apparatus 10 such as the surface control device 109. The definition information includes the start address (for example, 0x0000000) and the size of the control flag storage area 1068 in the nonvolatile memory 106. Note that the control flag storage area 1068 is a memory area in which necessary information can be stored.

  The actual use memory area 1067 includes one or more surfaces. In this embodiment, one surface includes a data area 1062, a protection bit 1063, a magic number 1064, and a time stamp 1065.

  The data area 1062 is a memory area for storing data. The protection bit 1063 is a memory area for setting a protection bit. Here, the protection bit is a bit for realizing control for suppressing overwriting of new data on the surface. The protection bit 1063 stores either “0” indicating that the protection bit is invalid or “1” indicating that the protection bit is valid. The protection bit 1063 stores “0” as an initial value.

  The magic number 1064 is a memory area for storing identification information for confirming the consistency of data stored in the data area 1062. The time stamp 1065 is a memory area for storing the time (time stamp) when data is stored in the data area 1062.

  The control flag storage area 1068 includes a nonvolatile memory initialization pass flag 1066 and a write point storage area 1061.

  The non-volatile memory initialization pass flag 1066 is a memory area for storing a flag indicating whether or not the initialization process needs to be executed. When the nonvolatile memory initialization pass flag 1066 is invalidated, it indicates that it is necessary to execute the initial setting process. The light point storage area 1061 is a memory area for storing identification information of a surface that is a candidate surface to be assigned to the central processing unit 104.

  Next, information held by the surface switching control unit 114 will be described with reference to FIGS. 4 and 5.

  FIG. 4 is an explanatory diagram illustrating an example of the surface control register 110 according to the embodiment.

  The surface control register 110 includes a maximum number of surfaces 1101, a control flag storage area size 1102, an actual use memory capacity 1103, a magic number 1104, a software activation confirmation flag 1105, and a surface selection flag 1106.

  The maximum number of faces 1101 is the number of faces set in the nonvolatile memory 106. The control flag storage area size 1102 is the memory capacity of the control flag storage area 1068. The actual use memory capacity 1103 is the memory capacity of the actual use memory area 1067. The magic number 1104 is identification information for confirming the consistency of data stored on the surface. In the magic number 1104, a unique value of the surface control device 109 is set in advance.

  The software activation confirmation flag 1105 is a flag for confirming completion of activation of software such as an OS. In the software activation confirmation flag 1105 of this embodiment, “0” indicating that the flag is invalid is stored as an initial value. As will be described later, when the activation of the software is completed, the software activation confirmation flag 1105 stores “1” indicating that the flag is valid.

  The surface selection flag 1106 is a flag indicating whether or not data stored in each surface of the nonvolatile memory 106 is acquired as a failure log. There are as many face selection flags 1106 as the values stored in the maximum face number 1101. In the face selection flag 1106, “0” indicating that the data stored in the face is not acquired as a failure log, that is, the flag is invalid, is stored as an initial value. As will be described later, when data stored in an arbitrary surface is acquired as a failure log, “1” indicating that the flag is valid is stored in the surface selection flag 1106 corresponding to the surface.

  FIG. 5 is an explanatory diagram illustrating an example of the surface management table 113 according to the embodiment.

  The surface management table 113 includes a surface ID 1131, a nonvolatile memory storage area 1132, a time stamp 1133, and a failure flag 1134.

  The surface ID 1131 is an identification number for uniquely identifying each surface in the nonvolatile memory 106. The nonvolatile memory storage area 1132 is an address range for specifying a memory area corresponding to a surface. The time stamp 1133 is the time when data is stored in the plane. The failure flag 1134 is a flag indicating whether or not a defect such as data corruption has occurred in the data stored in the surface. The failure flag 1134 stores “0” as an initial value indicating that no failure has occurred, that is, the flag is invalid.

  Next, a flow of a series of processes of the communication apparatus 10 will be described using FIG. FIG. 6 is an explanatory diagram illustrating a processing flow of the communication device 10 according to the embodiment.

  In FIG. 6, the horizontal axis corresponds to the time axis. The triangular symbol represents a change in state in the communication device 10. Hereinafter, the processing flow of the communication apparatus 10 will be described in three cases 300, 400, and 500.

  First, a case 300 showing a flow of activation processing of a normal communication device 10 will be described. When power is first applied to the communication device 10 (step S10), the communication device 10 activates various devices such as the central processing unit 104 and the surface control device 109 (step S11). At this time, the surface control device 109 outputs a CPU reset command to the CPU 1041 of the central processing unit 104, initializes the nonvolatile memory 106, and determines a usage surface (step S12). Here, the usage plane refers to a plane provided as a memory area where the central processing unit 104 stores the dynamic data 107. Also, initialization refers to deleting stored information.

  Specifically, the surface control device 109 sets a surface in the memory area of the nonvolatile memory 106, and determines an initial usage surface from the set surfaces. The memory of the non-volatile memory 106 that the central processing unit 104 assigns to the memory space by the surface control device 109 initializing the non-volatile memory 106 before starting the central processing unit 104 and determining the usage plane You can set the area. Here, the memory space refers to a memory area to which an address for accessing the nonvolatile memory 106 by the central processing unit 104 is assigned.

  The communication device 10 activates the BIOS and releases the reset of the CPU (step S13). The communication device 10 assigns a predetermined usage surface of the nonvolatile memory 106 to the memory space (step S14).

  Specifically, the surface control device 109 stops outputting the CPU reset command to the central processing unit 104. As a result, the central processing unit 104 starts recognition processing of various devices of the communication apparatus 10. In the present embodiment, the surface control device 109 controls the central processing unit 104 to recognize a predetermined memory area of the nonvolatile memory 106, that is, only one surface. Therefore, the central processing unit 104 assigns one surface determined by the surface control device 109 to the memory space.

  Furthermore, the communication device 10 executes OS startup processing (step S15). Thereafter, the communication device 10 starts normal operation of the software (step S16). The surface control device 109 sets “1” to the protection bit 1063 of the assigned surface after the normal operation of the software (step S17).

  Next, a case 400 showing a flow of restart processing of the normal communication device 10 will be described. The communication device 10 has started normal operation of software (step S20). When a restart operation occurs (step S21), the communication apparatus 10 is turned on again for restart (step S22). The surface control device 109 sets “0” in the protection bit 1063 of the assigned surface before the communication apparatus 10 is restarted (step S23).

  When the communication device 10 activates various devices (step S24), the surface control device 109 switches the usage surface (step S25). The use side that has been provided so far is switched to another side upon restart. Since “1” is not set in the protection bit 1063 of the surface before switching, it can be reused as a memory area for storing new data.

  The communication device 10 activates the BIOS and releases the reset of the CPU (step S26). The communication apparatus 10 assigns the usage plane determined by the plane control device 109 to the memory space (step S27). Furthermore, the communication device 10 executes OS startup processing (step S28). Thereafter, the communication device 10 starts normal operation of the software (step S29). The surface control device 109 sets “1” to the protection bit 1063 of the assigned surface after the normal operation of the software.

  Next, a case 500 showing a flow of restart processing of the communication device 10 when a failure occurs will be described.

  The communication device 10 has started normal operation of software (step S30). When a failure occurs (step S31), the communication apparatus 10 is powered on again for restart (step S32). At this time, the protection bit 1063 of the assigned surface is not changed. When the communication device 10 activates various devices (step S33), the surface control device 109 switches the usage surface (step S34).

  At this time, since “1” is set in the protection bit 1063 of the usage surface that has been used so far, the data stored in the data area 1062 of the surface before switching is saved as a failure log.

  The communication device 10 activates the BIOS and releases the reset of the CPU (step S35). The communication device 10 assigns a predetermined usage surface of the nonvolatile memory 106 to the memory space (step S36). Furthermore, the communication device 10 executes an OS activation process (step S37). Thereafter, the communication apparatus 10 starts normal operation of the software (step S38). The surface control device 109 sets “1” to the protection bit 1063 of the assigned surface after the normal operation of the software (step S39).

  The communication apparatus 10 acquires, as a failure log, data stored on a surface in which “1” is set in the protection bit 1063, automatically or according to an instruction from the administrator (step S40).

  As described using the cases 300, 400, and 500, in the communication device 10 according to the present embodiment, the central processing unit 104 stores the dynamic data 107 in a partial memory area (surface) of the nonvolatile memory 106. Provide as a memory area. Further, the communication device 10 switches the surface used by the central processing unit 104 after invalidating the protection bit 1063 in the case of normal restart processing, and protects in the case of restart processing due to the occurrence of a failure. The surface used by the central processing unit 104 is switched while the bit 1063 is enabled. In the following description, the restart process resulting from the occurrence of a failure is also referred to as a failure restart process.

  Conventionally, when a failure occurs, the communication device 10 has been restarted after acquiring a dump of the failure log, and thus there has been a problem that the stop time of the communication device 10 becomes longer. However, since the communication device 10 according to the present embodiment can save the failure log by switching the plane, the stop time can be shortened.

  Further, the surface where the protection bit 1063 is not “1” is controlled so that data can be overwritten newly. Therefore, the memory area of the nonvolatile memory 106 can be used effectively, and only the failure log necessary for failure analysis can be stored in the nonvolatile memory 106.

  It should be noted that the processing time required for starting the surface control device 109, initializing the non-volatile memory 106, and determining the usage surface is shorter than the time required for acquiring the dump of the failure log. The impact is small enough.

  Next, details of the process of the surface control device 109 in the process at the time of starting the communication apparatus 10 will be described.

  FIG. 7 is a flowchart illustrating an outline of processing executed by the surface control device 109 according to the embodiment. After the communication apparatus 10 is turned on and various devices are activated, the surface control device 109 starts processing described below.

  The surface control device 109 executes an initial setting process for the nonvolatile memory 106 (step S100). In the initial setting process, the surface control device 109 sets a plurality of surfaces by dividing the memory area of the nonvolatile memory 106 into memory areas of a predetermined size. Details of the initial setting process will be described later with reference to FIGS. 8A and 8B.

  The surface control device 109 executes a utilization surface determination process in order to determine a utilization surface of the central processing unit 104 from a plurality of surfaces set in the nonvolatile memory 106 (step S200). In the usage plane determination process, a log update plane selection process and a nonvolatile memory consistency check process are executed according to the trigger of the communication device 10 and the state of each plane of the nonvolatile memory 106 (steps S300 and S400). ). Details of the usage plane determination process will be described later with reference to FIGS. 9A and 9B, details of the log update plane selection process with reference to FIG. 10, and details of the nonvolatile memory consistency confirmation process with reference to FIG.

  The surface control device 109 executes the software normal activation confirmation processing after the usage surface determination processing is completed (step S500). Details of the software normal activation confirmation process will be described later with reference to FIGS. 12A and 12B.

  When the software normal activation confirmation process is normally completed, the communication device 10 shifts to a normal operation state. In the normal operation state, as described with reference to FIG. 1, the communication device 10 executes a packet transfer process for the network 206.

  If the software normal activation check process is not completed normally, or if a restart operation or a failure occurs, the communication device 10 returns to step S100, and the surface control device 109 executes the same process.

  As will be described later, in this embodiment, data is updated in a ring buffer format on the surface of the nonvolatile memory 106. In the case of normal restart processing, the protection bit 1063 is invalidated. On the other hand, in the case of failure restart processing, the protection bit 1063 is not invalidated. Therefore, it is possible to leave a failure log in the nonvolatile memory 106 while realizing surface management in a ring buffer format.

  8A and 8B are flowcharts illustrating an example of an initial setting process executed by the surface control device 109 according to the embodiment.

  The surface switching control unit 114 of the surface control device 109 starts the initial setting process after the communication device 10 is powered on. The surface control device 109 may execute the initial setting process when the administrator of the communication apparatus 10 initializes the nonvolatile memory 106, the surface control register 110, and the surface management table 113.

  The surface switching control unit 114 issues a CPU reset command to the central processing unit 104 (step S1001). As a result, the activation of the central processing unit 104 is stopped. This is because the setting of the nonvolatile memory 106 is completed before the central processing unit 104 assigns the memory area of the nonvolatile memory 106 to the memory space.

  A similar procedure may be realized by providing a power management device in the communication apparatus 10 and controlling the activation sequence of the surface control device 109 and the central processing unit 104.

  The surface switching control unit 114 reads the value of the nonvolatile memory initialization pass flag 1066 in the control flag storage area 1068 of the nonvolatile memory 106 (step S1002), and determines whether or not the nonvolatile memory initialization pass flag 1066 is enabled. Determination is made (step S1003). That is, it is determined whether initial setting of the nonvolatile memory 106 is necessary.

  Specifically, the surface switching control unit 114 accesses the nonvolatile memory 106 based on the top address of the memory area in which the control flag storage area 1068 is set, and reads the value of the nonvolatile memory initialization pass flag 1066.

  If the nonvolatile memory initialization pass flag 1066 is validated (YES in step S1003), the surface switching control unit 114 ends the initialization process because the initialization of the nonvolatile memory 106 has already been completed.

  When the nonvolatile memory initialization pass flag 1066 is invalidated (NO in step S1003), the surface switching control unit 114 initializes values set in the surface control register 110 and the surface management table 113 (step S1004). .

  Specifically, the surface switching control unit 114 deletes the values of the maximum number of surfaces 1101, the control flag storage area size 1102 and the actual used memory capacity 1103 of the surface control register 110, and sets “0” in the software activation confirmation flag 1105. Set. The surface switching control unit 114 deletes all surface selection flags 1106 included in the surface control register 110. Further, the surface switching control unit 114 deletes all entries from the surface management table 113.

  The surface switching control unit 114 initializes the nonvolatile memory 106 (step S1005).

  Specifically, the surface switching control unit 114 initializes the actual use memory area 1067 of the nonvolatile memory 106. Further, the surface switching control unit 114 invalidates the non-volatile memory initialization pass flag 1066 in the control flag storage area 1068 and sets an initial value (for example, “1”) in the light point storage area 1061. Further, the surface switching control unit 114 acquires the size of the memory area of the nonvolatile memory 106.

  The surface switching control unit 114 stores values in the control flag storage area size 1102 and the actual used memory capacity 1103 of the surface control register 110 (step S1006).

  Specifically, the surface switching control unit 114 acquires the size of the control flag storage area 1068 from the definition information of the control flag storage area 1068 and stores the acquired value in the control flag storage area size 1102. The surface switching control unit 114 calculates the size of the actual use memory area 1067 by subtracting the size of the control flag storage area 1068 from the size of the memory area of the nonvolatile memory 106. The surface switching control unit 114 stores the calculated value in the actual use memory capacity 1103.

  The surface switching control unit 114 calculates the maximum number of surfaces that can be set in the actual use memory area 1067, and updates the surface control register 110 (step S1007).

  Specifically, the surface switching control unit 114 stores the value calculated in the maximum number of surfaces 1101 of the surface control register 110, and generates the surface selection flags 1106 for the number of values calculated in the surface control register 110. Then, “0” is set to the generated surface selection flag 1106.

  Note that the size of one surface is set in the surface switching control unit 114. For example, a method of inputting surface size information to the surface switching control unit 114 in advance, a method of receiving input from an administrator, or the like can be considered. Further, the size information of one surface may be stored in a part of the control flag storage area 1068 of the nonvolatile memory 106, and the surface switching control unit 114 may read the information.

  The surface switching control unit 114 divides the actual use memory area 1067 based on the calculated maximum number of surfaces, and updates the surface management table 113 (step S1008). Specifically, the following processing is executed.

  The surface switching control unit 114 divides the actual use memory area 1067 into memory areas (surfaces) for the maximum number of surfaces. In addition, the surface switching control unit 114 sets a memory area corresponding to the data area 1062, the protection bit 1063, the magic number 1064, and the time stamp 1065 in each divided memory area. At this time, no data is stored in the data area 1062, the protection bit 1063, the magic number 1064, and the time stamp 1065.

  In addition, the surface switching control unit 114 generates an entry for the maximum number of surfaces in the surface management table 113. The surface switching control unit 114 sets the start address and the end address of the memory region corresponding to each surface in the nonvolatile memory storage region 1132 of each generated entry. The surface switching control unit 114 sets surface identification numbers in descending order to the surface ID 1131 of each generated entry. Further, the surface switching control unit 114 sets “0” in the failure flag 1134 of each generated entry. Note that the surface identification numbers set in the surface ID 1131 may be set in ascending order.

  The surface switching control unit 114 reads the value of the magic number 1104 of the surface control register 110 (step S1009), and sets the read value to the magic number 1064 of each surface of the nonvolatile memory 106 (step S1010).

  The surface switching control unit 114 determines whether or not the values set in the magic numbers 1064 of all the surfaces of the nonvolatile memory match the values of the magic numbers 1104 in the surface control register 110 (step S1011).

  If the values set in the magic numbers 1064 of all the faces coincide with the magic number 1104 in the face control register 110 (YES in step S1011), the face switching control unit 114 proceeds to step S1013.

  When the values set for the magic numbers 1064 of all the faces do not match the magic number 1104 of the face control register 110 (NO in step S1011), the face switching control unit 114 sets the magic number 1104 of the face control register 110. The failure flag 1134 of the entry corresponding to the surface that does not match the value is validated (step S1012).

  Specifically, the surface switching control unit 114 sets “1” in the failure flag 1134. Note that the surface switching control unit 114 may return to step S1002 or step S1009 instead of the process of step S1012. If the value set in the magic number 1064 of the surface does not match the value of the magic number 1104 in the surface control register 110, it indicates that data cannot be correctly stored in the surface due to data loss or data corruption. The surface may be broken. Therefore, “1” is set in the failure flag 1134 of the surface described above.

  After the process of step S1011 or step S1012 is completed, the surface switching control unit 114 accesses the control flag storage area 1068 of the nonvolatile memory 106 and validates the nonvolatile memory initialization pass flag 1066 (step S1013). Thereafter, the surface switching control unit 114 ends the initial setting process.

  FIG. 9A and FIG. 9B are flowcharts for explaining an example of usage surface determination processing executed by the surface control device 109 of the embodiment.

  The surface switching control unit 114 of the surface control device 109 starts a utilization surface determination process described below after the initial setting process is completed.

  The surface switching control unit 114 accesses the nonvolatile memory 106, reads a value from the light point storage area 1061, and holds the read value as a variable WP (step S2001). The surface switching control unit 114 acquires the address of the surface corresponding to the variable WP from the surface management table 113 (step S2002).

  Specifically, the surface switching control unit 114 searches for an entry in which the value of the surface ID 1131 matches the value of the variable WP, and acquires the surface address from the nonvolatile memory storage area 1132 of the searched entry.

  The surface switching control unit 114 accesses the surface corresponding to the value of the variable WP in the nonvolatile memory 106 based on the acquired address, and reads the value of the protection bit 1063 for the surface (step S2003). Further, the surface switching control unit 114 determines whether or not the protection bit 1063 is enabled based on the read value (step S2004). That is, it is determined whether or not the value read from the protection bit 1063 is “1”.

  When the protection bit 1063 is invalidated (NO in step S2004), the surface switching control unit 114 performs non-volatile memory matching in order to determine whether or not a defect has occurred on the surface corresponding to the value of the variable WP. A sex confirmation process is executed (step S400). Further, the surface switching control unit 114 determines whether or not the result of the processing is normal completion (step S2005). In the nonvolatile memory consistency check process, a surface corresponding to the value of the variable WP is input as a processing target surface.

  When the processing result of the nonvolatile memory consistency check processing is normal completion (YES in step S2005), the surface switching control unit 114 determines the surface corresponding to the value of the variable WP as the usage surface of the central processing unit 104. The process proceeds to step S2008.

  If the protection bit 1063 is enabled (YES in step S2004), or if the processing result of the nonvolatile memory consistency check process is not normally completed (NO in step S2005), the surface switching control unit 114 sets the variable WP The surface corresponding to the value of cannot be selected as the usage surface of the central processing unit 104. Therefore, the surface switching control unit 114 reads the values of the protection bits 1063 of all the surfaces that can be used among the surfaces other than the surface corresponding to the value of the variable WP (step S2006). Furthermore, the surface switching control unit 114 determines whether or not the protection bits 1063 for all available surfaces are enabled (step S2007). Here, the usable surface indicates a surface in which the failure flag 1134 is invalidated. Specifically, the following processing is executed.

  The surface switching control unit 114 refers to the surface management table 113 and searches for an entry whose failure flag 1134 is “0” from entries whose surface ID 1131 is different from the value of the variable WP. That is, the surface switching control unit 114 searches all available surfaces from the surfaces of the nonvolatile memory 106.

  The surface switching control unit 114 reads the value of the protection bit 1063 of the surface corresponding to the entry based on the address stored in the nonvolatile memory storage area 1132 of each searched entry. The surface switching control unit 114 determines whether or not the values of the protection bits 1063 for all surfaces are “1”. The above is the description of the processing in step S2006 and step S2007.

  When the protection bits 1063 for all available surfaces are enabled (YES in step S2007), the surface switching control unit 114 selects the central processing unit 104 from the surfaces for which the protection bits 1063 are enabled. An update log selection process is executed to determine the usage surface (step S300). Thereby, the usage surface of the central processing unit 104 is determined.

  The surface switching control unit 114 accesses the surface determined as the usage surface of the central processing unit 104, initializes the data area 1062 and the time stamp 1065 of the surface (step S2008), and sets the value of the variable WP. A value obtained by adding “1” is set in the light point storage area 1061 (step S2009).

  Specifically, the surface switching control unit 114 deletes data from the data area 1062 and deletes the time stamp from the time stamp 1065.

  The surface switching control unit 114 prohibits the operation of the surface selection flag 1106 corresponding to the determined surface of the surface control register 110 (step S2010). For example, the surface switching control unit 114 sets the access attribute to the surface selection flag 1106 to read only. Thereafter, the surface switching control unit 114 ends the usage surface determination process. The process of step S2010 is for prohibiting an operation on the determined plane in the fault log acquisition process executed as a process different from the activation process of the communication apparatus 10.

  When the protection bit 1063 of at least one available surface is invalidated in step S2007 (step S2007 is NO), the surface switching control unit 114 newly sets a value obtained by adding “1” to the value of the variable WP. Is set as a variable WP (step S2011).

  The surface switching control unit 114 compares the value of the variable WP with the maximum number of surfaces (step S2012), and determines whether or not the value of the variable WP matches the maximum number of surfaces (step S2013). For example, when the maximum number of surfaces is “N−1”, the surface switching control unit 114 determines whether or not the value of the variable WP is “N−1”.

  If the value of the variable WP does not match the maximum number of faces (NO in step S2013), the face switching control unit 114 returns to step S2002 and executes the same process.

  If the value of the variable WP matches the maximum number of faces (YES in step S2013), the face switching control unit 114 sets the value of the variable WP to “1” (step S2014), and then returns to step S2002 to perform the same processing. Execute.

  In step S2009, after the face is determined, the face switching control unit 114 sets the identification number of the face next to the face in the light point storage area 1061 on the nonvolatile memory 106, so that the power supply during normal operation is set. Even when a hardware failure such as a failure occurs, it becomes possible to specify candidates for the usage surface of the central processing unit 104 after the restart, and the function as a ring buffer can be maintained.

  Note that the surface switching control unit 114 reads the values of the protection bits 1063 of all available surfaces before the determination processing in step S2007, but the following processing may be performed. That is, the surface switching control unit 114 holds a variable that counts the number of executions of the determination process in step S2007, and counts up the value of the variable WP until the count value matches the maximum number of surfaces. At this time, the surface switching control unit 114 executes the process of step S2006 only once, and temporarily holds the value of the read protection bit 1063. As a result, the number of accesses to the nonvolatile memory 106 can be reduced.

  As described above, in this embodiment, when data is newly stored in a state where data is stored in all the surfaces, the surface for storing the data is selected according to a predetermined control policy. As a result, data on the surface of the nonvolatile memory 106 can be updated in a ring buffer format, and data satisfying a predetermined condition remains in the nonvolatile memory 106 as a failure log.

  FIG. 10 is a flowchart illustrating an example of a log update surface selection process executed by the surface control device 109 according to the embodiment.

  The surface switching control unit 114 of the surface control device 109 starts the log update surface selection processing described below when the protection bits 1063 of all the surfaces that can be used in the usage surface determination processing are enabled.

  The surface switching control unit 114 reads the values of the time stamps 1065 of all the surfaces of the nonvolatile memory 106 (step S3001), and updates the surface management table 113 based on the read values (step S3002).

  Specifically, the surface switching control unit 114 sets the value acquired from the time stamp 1065 of each surface to the time stamp 1133 of the entry corresponding to each surface.

  Based on the updated surface management table 113, the surface switching control unit 114 identifies the surface in which the failure log with the oldest time stamp is stored (step S3003). Specifically, the following processing is executed.

  The surface switching control unit 114 refers to the updated surface management table 113 and extracts all entries whose failure flag 1134 is “0”. The face switching control unit 114 selects an entry having the oldest value of the time stamp 1133 from the extracted entries. Based on the selected entry, the surface switching control unit 114 reads the value of the protection bit 1063 of the surface corresponding to the entry.

  The surface switching control unit 114 determines whether or not the value of the read protection bit 1063 is “1”. When the value of the read protection bit 1063 is “1”, the surface switching control unit 114 specifies the surface corresponding to the selected entry as the surface in which the oldest failure log is stored.

  If the value of the read protection bit 1063 is not “1”, the surface switching control unit 114 selects the entry having the second oldest value of the time stamp 1133 from the extracted entries, and performs the above-described processing. Run. The surface switching control unit 114 repeatedly executes the above-described processing until the surface storing the oldest failure log is specified. The surface switching control unit 114 temporarily holds the surface ID 1131 of the specified surface. The above is the description of the process in step S3003.

  The surface switching control unit 114 sets “1” to the variable J (step S3004). In addition, the surface switching control unit 114 refers to the surface management table 113 and extracts all available surfaces from surfaces other than the surface storing the oldest failure log (step S3005). The face with the oldest time stamp is selected from all available faces (step S3006).

  Specifically, the surface switching control unit 114 excludes the entry corresponding to the surface storing the oldest failure log from the search target. The surface switching control unit 114 extracts all entries whose failure flag 1134 is “0” from the remaining surfaces, and holds the temporarily extracted entries. The surface switching control unit 114 refers to the value of the time stamp 1133 of the extracted entry and identifies the Jth oldest time stamp.

  Further, the surface switching control unit 114 executes a nonvolatile memory consistency confirmation process to determine whether or not a defect has occurred in the selected surface (step S400). Further, the surface switching control unit 114 determines whether or not the result of the processing is normal completion (step S3007). In the nonvolatile memory consistency check process, the value of the surface ID 1131 of the entry corresponding to the selected surface is input as the surface to be processed. That is, the surface switching control unit 114 sets the surface ID 1131 of the entry corresponding to the selected surface as the variable WP, and executes the nonvolatile memory consistency confirmation process.

  If the processing result of the nonvolatile memory consistency check processing is normal completion (YES in step S3007), the surface switching control unit 114 invalidates the J-th oldest surface protection bit 1063 of the nonvolatile memory 106 (step S3007). S3008). The surface switching control unit 114 sets the value of the surface ID 1131 of the entry corresponding to the Jth oldest surface as a variable WP (step S3009), and ends the log update surface selection process.

  In step S3007, when the processing result of the nonvolatile memory consistency check process is not normally completed (NO in step S3007), the surface switching control unit 114 determines whether there is a selectable surface among the extracted surfaces. Is determined (step S3010). That is, it is determined whether or not there is an unprocessed surface.

  If there is a selectable surface among the extracted surfaces (YES in step S3010), the surface switching control unit 114 sets a value obtained by adding “1” to the value of the variable J as a new variable J. (Step S3011), the process returns to Step S3006, and the same processing is executed. On the other hand, when there is no selectable surface among the extracted surfaces (NO in step S3010), the surface switching control unit 114 interrupts the activation of the communication device 10 and stops the communication device 10.

  Data updates to the surface of the nonvolatile memory 106 are managed in a ring buffer format. Therefore, the surface switching control unit 114 normally overwrites new data on the surface storing the oldest data when data is stored in all the surfaces. In this case, it is not possible to save a failure log relating to a failure that has occurred for the first time after the communication device 10 is activated.

  In this embodiment, when a user acquires a failure log in order to analyze a failure of the communication device 10, the oldest failure log (from the time when the communication device 10 is normally started until the failure log is acquired) It is assumed that the first failure log) and the latest failure log (immediate failure log) are always left in the nonvolatile memory 106. This can be used for failure analysis such as problem isolation between primary failure and secondary failure. Accordingly, the surface switching control unit 114 needs to prevent new data from being overwritten on the surface where the first failure log is stored when the communication apparatus 10 repeatedly restarts due to a user operation or a failure. There is.

  Therefore, when the protection bit 1063 is enabled for all available surfaces, the surface switching control unit 114 selects a surface overwriting new data from the surfaces excluding the surface storing the first failure log. select. The control as described above realizes ring buffer type log update in the nonvolatile memory 106 and storage of a failure log necessary for failure analysis.

  Note that the surface switching control unit 114 according to the present embodiment performs control so that the first failure log and the previous failure log are always left in the nonvolatile memory 106, but is not limited thereto. It is conceivable to set a control policy that defines log updating in advance in the surface switching control unit 114. For example, the surface switching control unit 114 may control the communication device 10 to restart after the occurrence of the first failure based on the control policy so that a failure log relating to the failure that has occurred again remains in the nonvolatile memory 106. Good. In addition, the number of failure logs that remain in the nonvolatile memory 106 can be set as a control policy.

  FIG. 11 is a flowchart illustrating an example of a nonvolatile memory consistency check process executed by the surface control device 109 according to the embodiment.

  The surface switching control unit 114 of the surface control device 109 starts a non-volatile memory consistency confirmation process described below when a use surface candidate is selected (YES in step S2004 or after step S3006). At the start of the process, the value of the variable WP is input.

  The surface switching control unit 114 refers to the surface management table 113 and determines whether or not the surface failure flag 1134 corresponding to the value of the variable WP is enabled (step S4001).

  Specifically, the surface switching control unit 114 searches for an entry in which the value of the surface ID 1131 matches the value of the variable WP, and determines whether or not the failure flag 1134 of the searched entry is “1”. When the failure flag 1134 of the retrieved entry is “1”, the surface switching control unit 114 determines that the surface failure flag 1134 corresponding to the value of the variable WP is enabled.

  When the failure flag 1134 of the surface corresponding to the value of the variable WP is validated (YES in step S4001), the surface switching control unit 114 ends the nonvolatile memory consistency confirmation process on the assumption that the processing result is failure. To do.

  When the surface failure flag 1134 corresponding to the value of the variable WP is invalidated (NO in step S4001), the surface switching control unit 114 acquires the address of the surface corresponding to the value of the variable WP from the surface management table 113. (Step S4002). Further, the surface switching control unit 114 reads a value from the magic number 1064 of the surface corresponding to the value of the variable WP in the nonvolatile memory 106 based on the acquired address (step S4003).

  Specifically, the surface switching control unit 114 acquires the address of the surface corresponding to the value of the variable WP from the nonvolatile memory storage area 1132 of the entry searched in step S4001. Further, the surface switching control unit 114 accesses the surface corresponding to the value of the variable WP based on the acquired address, and reads the value of the magic number 1064 of the surface.

  The surface switching control unit 114 compares the value of the magic number 1104 of the surface control register 110 with the value of the magic number 1064 of the surface corresponding to the variable WP (step S4004), and determines whether or not both magic numbers match. Determination is made (step S4005).

  If the two magic numbers match (YES in step S4005), the surface switching control unit 114 ends the nonvolatile memory consistency checking process on the assumption that the processing result is normal completion. If the two magic numbers do not match (NO in step S4005), the surface switching control unit 114 enables the surface failure flag 1134 corresponding to the value of the variable WP (step S4006), and the processing result is failure. As a result, the nonvolatile memory consistency check process is terminated.

  Specifically, the surface switching control unit 114 refers to the surface management table 113 to search for an entry whose surface ID 1131 value matches the value of the variable WP, and sets “1” in the failure flag 1134 of the searched entry. Set.

  FIG. 12A is a flowchart illustrating an example of a normal software activation confirmation process executed by the surface control device 109 according to the embodiment. FIG. 12B is a flowchart illustrating an example of processing executed by the CPU 1041 according to the embodiment in software normal activation confirmation processing.

  The surface switching control unit 114 of the surface control device 109 starts a software normal activation confirmation process described below after the use surface determination process is completed. After the software is activated and the software starts to use the memory, information stored in the surface where the protection bit 1063 is activated is meaningful as a failure log. Therefore, software normal activation confirmation processing is executed in order to save the information stored on the surface as a failure log.

  The surface switching control unit 114 stops issuing the CPU reset command output to the central processing unit 104 (step S5001), and controls the memory area and the surface control register 110 of the non-volatile memory 106 based on the determined usage surface. The CPU 1041 is notified to assign it as a memory space for use (step S5002). Further, the surface switching control unit 114 refers to the surface control register 110 and determines whether or not the software activation confirmation flag 1105 is enabled (step S5003).

  Specifically, the surface switching control unit 114 periodically determines whether or not the software activation confirmation flag 1105 of the surface control register 110 is “1”. When the software activation confirmation flag 1105 of the surface control register 110 is “1”, the surface switching control unit 114 determines that the software activation confirmation flag 1105 is enabled.

  If the software activation confirmation flag 1105 is activated (YES in step S5003), the surface switching control unit 114 accesses the nonvolatile memory 106 to activate the use surface protection bit 1063 (step S5004). The usage time stamp 1065 is updated (step S5005). Specifically, the following processing is executed.

  The surface switching control unit 114 searches the entry corresponding to the usage surface with reference to the surface management table 113, and acquires the address of the usage surface from the nonvolatile memory storage area 1132 of the searched entry. The surface switching control unit 114 accesses the nonvolatile memory 106 based on the acquired address, and sets “1” in the protection bit 1063 for the usage surface. As a result, information stored in the usage area can be saved as a failure log. In addition, after the processing in step S5004 and step S5005, the communication apparatus 10 is shifted to normal operation.

  Further, the surface switching control unit 114 sets a predetermined time stamp in the time stamp 1065 of the accessed usage surface. The time set in the time stamp 1065 may be the time when the use-side protection bit 1063 is validated, the time when the software normal activation confirmation process is started, and the like. Note that this embodiment is not limited to the time stored in the time stamp 1065. The above is the description of the processing in steps S5004 and S5005.

  When the software activation confirmation flag 1105 is invalidated (NO in step S5003), the surface switching control unit 114 determines whether or not a predetermined time has elapsed since the monitoring of the software activation confirmation flag 1105 was started (step S5003). S5008).

  If the predetermined time has not elapsed since the monitoring of the software activation confirmation flag 1105 was started (NO in step S5008), the surface switching control unit 114 returns to step S5003 and executes the same processing.

  If a certain time has elapsed since the monitoring of the software activation confirmation flag 1105 was started (YES in step S5008), the surface switching control unit 114 starts failure restart processing as a failure has occurred.

  After the process of step S5005, the communication apparatus 10 shifts to a normal operation state. In the normal operation state, the surface switching control unit 114 determines whether a restart command issued by the CPU 1041 has been detected (step S5006).

  When the restart command issued by the CPU 1041 has not been detected (NO in step S5006), the surface switching control unit 114 determines whether or not a failure has been detected (step S5007). As a method for detecting the occurrence of a failure, for example, a method in which the OS detects a software failure or a hardware failure, a method in which a restart processing failure is detected, or the like can be considered.

  When the occurrence of a failure is not detected (NO in step S5007), the surface switching control unit 114 returns to step S5006 and executes the same processing. On the other hand, when occurrence of a failure is detected (YES in step S5007), the surface switching control unit 114 starts a failure restart process.

  In step S5006, when a restart command issued by the CPU 1041 is detected (YES in step S5006), the surface switching control unit 114 invalidates the use surface protection bit 1063 (step S5009), and performs a normal restart process. Start.

  Specifically, the surface switching control unit 114 searches the surface management table 113 for an entry whose surface ID 1131 matches the value of the variable WP, and uses the retrieved entry from the nonvolatile memory storage area 1132. Get the face address. The surface switching control unit 114 accesses the usage surface of the nonvolatile memory 106 based on the acquired address, and sets “0” in the protection bit 1063.

  As described with reference to FIG. 12A, in the case of failure restart processing, since the usage protection bit 1063 is not invalidated, the information stored in the usage is not initialized but is saved as a failure log.

  Next, processing executed by the CPU 1041 will be described with reference to FIG. 12B.

  When the CPU reset is released by stopping the issuance of the CPU reset command issued from the surface switching control unit 114 (step S5101), the CPU 1041 of the nonvolatile memory 106 notified from the surface switching control unit 114 The memory area (usage plane) is assigned to the memory space (step S5102), and the plane control register 110 is assigned to the memory space (step S5103). As a result, the CPU 1041 can access the usage plane and the plane control register 110 of the nonvolatile memory 106.

  The CPU 1041 initializes and diagnoses the device (step S5104). At this time, the CPU 1041 confirms the size of the memory area on the usage surface of the nonvolatile memory 106 and diagnoses the nonvolatile memory 106 (use surface). The CPU 1041 reads out a program for realizing the OS from the flash memory 101 and loads the program into the volatile memory 105 to start the OS (step S5105). As a result, the software of the communication device 10 starts normally. The CPU 1041 validates the software activation confirmation flag 1105 of the surface control register 110 after the activation of the OS (step S5106).

  Specifically, the CPU 1041 accesses the surface control register 110 assigned to the memory space, and sets “1” in the software activation confirmation flag 1105 of the surface control register 110. After the processing in step S5106, the communication apparatus 10 is shifted to normal operation.

  The CPU 1041 determines whether a restart operation has been accepted (step S5107). For example, a restart operation caused by an instruction from the administrator or a restart operation caused by maintenance or update of the communication device 10 can be considered.

  If the restart operation has not been received (NO in step S5107), the CPU 1041 returns to step S5107 and executes the same processing.

  When a restart operation is accepted (YES in step S5107), the CPU 1041 issues a restart command (step S5108), and after the startup processing of software such as the OS is completed, the software startup confirmation flag 1105 is invalidated ( Step S5109). Thereafter, a normal restart process is started.

  It should be noted that if a hardware failure occurs between the initial setting process and the value of the write point storage area 1061 of the nonvolatile memory 106 in step S2014 of the usage plane determination process, or nonvolatile memory consistency When the diagnosis result of step S5104 by the CPU 1041 becomes invalid after the confirmation process is completed, the failure restart process is repeatedly executed. In this case, a method in which the CPU 1041 or the like stops the communication apparatus 10 by counting the number of reboots using a reboot counter or the like can be considered.

  Here, the operation of the communication device 10 during normal operation will be described.

  The central processing unit 104 stores static data 102 such as configuration information and device setting information in the volatile memory 105 in accordance with the administrator's operation received from the input / output device 103. Further, the central processing unit 104 copies information of the static data 102 from the volatile memory 105 to the flash memory 101 in accordance with a storage operation from the administrator.

  The central processing unit 104 grasps the network topology of all the networks 206 connected to the communication device 10, that is, each network interface 205, RIP (Routing Information Protocol), OSPF (Open Shortest Path). First, route information is collected periodically, for example, according to a routing protocol such as GRP (Gateway Routing Protocol).

  The central processing unit 104 determines addition, deletion, change, etc. of a route necessary for transferring a packet based on the result of route calculation using the collected peripheral route information. The central processing unit 104 writes the information of the dynamic data 107 in the nonvolatile memory 106 by the update unit in the route information via the surface control device 109. The central processing unit 104 notifies the transfer device 108 of the storage address of the dynamic data 107 stored in the nonvolatile memory 106 when the route information is updated.

  The transfer device 108 accesses the notified storage address of the nonvolatile memory 106 to read the updated dynamic data 107, and transfers the updated dynamic data 107 to the transfer device 201 included in the transfer unit 200.

  The transfer device 201 receives the updated dynamic data 107 from the transfer device 108 and updates the path information by transferring the updated dynamic data 107 to the table memory 203.

  When the transfer engine 204 receives a packet via the network interface 205 connected to each network 206, the route search engine 202 refers to the table memory 203 based on the route information reflecting the received dynamic data 107. To identify the destination of the packet. Further, the transfer engine 204 transfers the packet to the network 206 via the network interface 205 based on the destination result specified by the route search engine 202.

  When the transfer destination of the received packet is unknown, or when the received packet is a packet addressed to the communication device 10, the received packet is transmitted to the central processing unit 104 via the transfer device 201 and the transfer device 108, The central processing unit 104 executes predetermined processing.

  Here, the surface setting method and the updating method of the present embodiment will be described with reference to FIGS. 13A, 13B, 13C, and 13D.

  13A, 13B, 13C, and 13D are explanatory diagrams illustrating an example of a method for setting and updating a surface in the nonvolatile memory 106 of the communication device 10 according to the embodiment.

  13A, 13B, 13C, and 13D, it is assumed that three surfaces are generated in the actual use memory area 1067 of the nonvolatile memory 106. The surface ID 1131 of the lower surface is “1”, the surface ID 1131 of the middle surface is “2”, and the surface ID 1131 of the upper surface is “3”. In addition, it is assumed that the values of the failure flags 1134 of the three surfaces are “0”. The time series of the time stamps are assumed to be older in the order of “A: A: A”, “B: B: B”, “C: C: C”, and “D: D: D”.

  FIG. 13A will be described. When the normal activation process of the communication apparatus 10 is started, the surface switching control unit 114 initializes the actual use memory area 1067, invalidates the nonvolatile memory initialization pass flag 1066, and sets an initial value in the light point storage area 1061. Is set (step S1005). The surface switching control unit 114 calculates the maximum number of surfaces as “3” (step S1007), and divides the actual use memory area 1067 into three (step S1008). At this time, the state of the surface is as in state 1.

  The surface switching control unit 114 reads the value of the magic number 1104 of the surface control register 110 (step S1009), and sets the read value to the magic number 1064 of each surface of the nonvolatile memory 106 (step S1010). As a result, the surface state transitions from state 1 to state 2.

  The surface switching control unit 114 holds the value “1” stored in the light point storage area 1061 as the variable WP (step S2001). Further, the surface switching control unit 114 determines whether or not the protection bit 1063A for the lower surface is enabled (step S2004).

  The surface switching control unit 114 determines that the protection bit 1063A on the lower surface has been invalidated (NO in step S2004), and executes a nonvolatile memory consistency check process for the lower surface (step S400). Since the failure flag 1134 on the lower surface is invalidated, the surface switching control unit 114 determines that the normal completion has been completed (YES in step S2005).

  The surface switching control unit 114 determines the lower surface as the usage surface and initializes the usage surface (step S2008). The surface switching control unit 114 writes “2” in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the protection bit 1063A for the lower surface (step S5004) and updates the time stamp 1065A (step S5005).

  The CPU 1041 assigns the lower surface to the memory space (step S5102), and stores the dynamic data 107 on the lower surface. With the above processing, the surface state transitions from state 2 to state 3.

  In this way, the surface control device 109 can provide a part of the memory area (surface) of the nonvolatile memory 106 as a memory area used by the CPU 1041.

  Next, FIG. 13B will be described. Data is stored in the data area 1062A on the lower side of FIG. 13B and the protection bit 1063A is “0”, and data is stored in the data area 1062B on the middle side and the protection bit 1063B. Is “1”. Therefore, after executing the normal startup process, the normal restart process is performed once, indicating that the current middle plane is the usage plane. At this time, “3” is stored in the light point storage area 1061.

  When the normal restart process is started when using the middle surface, the surface switching control unit 114 changes the protection bit 1063B of the middle surface from “1” to “0” (step S5009). Furthermore, “3” stored in the light point storage area 1061 is held as a variable WP (step S2001). The surface switching control unit 114 determines whether the protection bit 1063C for the upper surface is enabled (step S2004).

  The surface switching control unit 114 determines that the protection bit 1063C for the upper surface has been invalidated (NO in step S2004), and executes a nonvolatile memory consistency check process for the upper surface (step S400). Since the failure flag 1134 for the upper surface is invalidated, the surface switching control unit 114 determines that the operation has been completed normally (YES in step S2005).

  Therefore, the surface switching control unit 114 determines the upper surface as the usage surface and initializes the usage surface (step S2008). The surface switching control unit 114 writes “1” in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the upper surface protection bit 1063C (step S5004) and updates the time stamp 1065C (step S5005).

  The CPU 1041 assigns the upper surface to the memory space (step S5102), and stores the dynamic data 107 on the upper surface. With the above processing, the surface state transitions from state 1 to state 2.

  Thereafter, when normal restart processing is started again, the surface switching control unit 114 invalidates the protection bit 1063C for the upper surface (step S5009), and executes the same processing as described above. As a result, the lower surface is initialized (step S2008), and “2” is stored in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the protection bit 1063A for the lower surface (step S5004) and updates the time stamp 1065A (step S5005). The CPU 1041 assigns the lower surface to the memory space (step S5102), and stores the dynamic data 107 on the lower surface. With the above processing, the surface state transitions from state 2 to state 3.

  In this manner, in this embodiment, information is overwritten in the ring buffer format on the surface of the nonvolatile memory 106. In addition, the usage surface is switched along with the restart process.

  Next, FIG. 13C will be described. Data is stored in the data areas 1062A and 106B on the lower surface and the middle surface in FIG. 13C, and the protection bits 1063A and B are “1”. For this reason, the failure restart process is performed once, indicating that the current middle surface is a usage surface. At this time, “3” is stored in the light point storage area 1061.

  When the normal restart process is started when the middle plane is used, the plane switching control unit 114 invalidates the protection bit 1063B of the middle plane by executing the same process as in FIG. 13B. (Step S5009). Further, the surface switching control unit 114 initializes the upper surface (step S2008), and stores “1” in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the upper surface protection bit 1063C (step S5004) and updates the time stamp 1065C (step S5005). The CPU 1041 assigns the upper surface to the memory space (step S5102), and stores the dynamic data 107 on the upper surface. With the above processing, the surface state transitions from state 1 to state 2.

  Thereafter, when normal restart processing is started again, the surface switching control unit 114 invalidates the protection bit 1063C for the upper surface (step S5009). The surface switching control unit 114 reads the value of the protection bit 1063A for the lower surface (step S2003), and determines that the protection bit 1063A for the lower surface is enabled (YES in step S2004). Therefore, the surface switching control unit 114 reads the values of the protection bits 1063B and C of the middle surface and the upper surface as all available surfaces (step S2006).

  Since at least one usable surface protection bit 1063 is invalidated (NO in step S2007), the surface switching control unit 114 updates the value of the variable WP to “2” (step S2011). Since the protection bit 1063B for the middle surface is invalidated (NO in step S2004), the surface switching control unit 114 executes a nonvolatile memory consistency check process for the middle surface (step S400). The failure flag 1134 of the middle surface is invalidated, and the surface switching control unit 114 confirms the consistency of the magic number and determines that it is normally completed (YES in step S2005).

  The surface switching control unit 114 determines the middle surface as the usage surface and initializes the usage surface (step S2008). The surface switching control unit 114 writes “3” in the light point storage area 1061 (step S2009). Further, in the software normal activation confirmation process, the surface switching control unit 114 validates the protection bit 1063B of the middle surface (step S5004), and updates the time stamp 1065B (step S5005). Further, the CPU 1041 assigns the middle surface to the memory space (step S5104), and stores the dynamic data 107 in the middle surface. With the above processing, the surface state transitions from state 2 to state 3.

  As described above, in this embodiment, when information is overwritten in the ring buffer format on the surface of the nonvolatile memory 106, control is performed so that information is not overwritten on the surface to be stored as a failure log.

  Next, FIG. 13D will be described. Data is stored in the data areas 1062A and B in the lower surface and the middle surface in FIG. 13D, and the protection bits 1063A and B are “1”. For this reason, the failure restart process is performed once, indicating that the current middle surface is a usage surface. At this time, “3” is stored in the light point storage area 1061.

  If a restart due to the occurrence of a failure occurs while using the middle surface, the surface switching control unit 114 initializes the upper surface by executing the same processing as in FIG. 13B (step S2008). ), “1” is stored in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the protection bit 1063C for the upper surface (step S5004). Further, the surface switching control unit 114 updates the time stamp 1065C (step S5005). At this time, the protection bit 1063B of the middle surface is not invalidated.

  The CPU 1041 assigns the upper surface to the memory space (step S5104), and stores the dynamic data 107 on the upper surface. With the above processing, the surface state transitions from state 1 to state 2.

  Thereafter, when the failure restart process is started again, the surface switching control unit 114 reads the value of the protection bit 1063A for the lower surface (step S2003), and the protection bit 1063A for the lower surface is enabled. Determination is made (step S2004 is YES). At this time, the protection bit 1063C on the upper surface is not invalidated.

  The surface switching control unit 114 reads out the values of the protection bits 1063B and C of the middle surface and the upper surface as all available surfaces (step S2006). The surface switching control unit 114 determines that the protection bits 1063B and C are valid for all available surfaces (YES in step S2007), and executes log update surface selection processing (step S300).

  In the log update surface selection process, the surface switching control unit 114 specifies the lower surface as the surface for storing the oldest failure log (step S3003), and can use the upper surface and the middle surface except the lower surface. It is extracted as a correct surface (step S3005). The surface switching control unit 114 selects the surface having the oldest time stamp, that is, the middle surface (step S3006), and executes the nonvolatile memory consistency check process for the middle surface (step S400). The failure flag 1134 for the middle surface is invalidated, and the surface switching control unit 114 confirms the consistency of the magic number and determines that it is normally completed (YES in step S3007).

  The surface switching control unit 114 invalidates the protection bit 1063B of the middle surface (step S3008), and sets “2” as the value of the variable WP (step S3009). The surface switching control unit 114 determines the middle surface as the usage surface and initializes the usage surface (step S2008). The surface switching control unit 114 writes “3” in the light point storage area 1061 (step S2009). In the normal software activation confirmation process, the surface switching control unit 114 validates the protection bit 1063B for the middle surface (step S5004). Further, the surface switching control unit 114 updates the time stamp 1065B (step S5005).

  Further, the CPU 1041 assigns the middle surface to the memory space (step S5104), and stores the dynamic data 107 in the middle surface. With the above processing, the surface state transitions from state 2 to state 3.

  As described above, in this embodiment, when the protection bits 1063 of all the surfaces of the nonvolatile memory 106 are enabled, the surface to be saved as the failure log is determined based on the predetermined control policy, and the usage surface Is determined. In the present embodiment, control is performed so that the failure log (the oldest failure log) related to the first failure that has occurred since the communication device 10 started up is stored in the nonvolatile memory 106.

  Next, failure log acquisition processing will be described.

  FIG. 14 is a flowchart illustrating an example of a failure log acquisition process executed by the communication apparatus 10 according to the embodiment.

  The failure log is acquired after a failure has occurred in the communication device 10, and the failure log acquisition method includes the following. One method is a method of acquiring a failure log by inputting a command by an administrator or the like after the activation of software is completed by restart processing of the communication device 10 and the communication device 10 shifts to normal operation. In another method, when the software cannot be started even by the restart process of the communication device 10, the software activation is interrupted, the communication device 10 is stopped, and the nonvolatile memory 106 in which the failure log is stored from the communication device 10 is stored. It is a method to collect.

  After a failure has occurred in the communication device 10, processing described below is executed.

  The CPU 1041 starts processing described below in parallel with the OS startup processing (restart processing) in step S5105 (step S6001). First, the CPU 1041 determines whether or not the software activation confirmation flag 1105 is activated (step S6002).

  Specifically, the CPU 1041 acquires the value of the software activation confirmation flag 1105 by instructing the surface switching control unit 114 to read the value of the software activation confirmation flag 1105 of the surface control register 110 via the control bus 112. . The CPU 1041 determines whether or not the value of the software activation confirmation flag 1105 is “1”. When the value of the software activation confirmation flag 1105 is “1”, it is determined that the software activation confirmation flag 1105 is enabled.

  When the software activation confirmation flag 1105 is validated (YES in step S6002), the CPU 1041 accepts a failure log acquisition command input by the administrator via the input / output device 103 (step S6003), and stores the failure log. The surface selection flag 1106 of the surface to be acquired is validated (step S6004). There are various types of acquisition commands. For example, a command including an identification number of a surface from which a failure log is acquired, a command for designating a surface for which the protection bit 1063 is activated from surfaces other than the current usage surface, and the like can be considered.

  Specifically, the CPU 1041 specifies a surface from which a failure log is acquired based on the input acquisition command. The CPU 1041 accesses the surface control register 110 and sets “1” to the surface selection flag 1106 corresponding to the specified surface. Note that the CPU 1041 operates the surface selection flag 1106 via the control bus 112 in order to refer to the failure log stored in the surface.

  If the received command is a command for designating a surface for which the protection bit 1063 is valid among the surfaces other than the current usage surface, the CPU 1041 requests the surface control device 109 to search for a surface satisfying the condition. To do. As a result, the CPU 1041 can specify the surface from which the failure log is acquired.

  Note that the CPU 1041 acquires a failure log from the nonvolatile memory 106 via the control bus 112. Therefore, it is necessary to read out the failure log from a predetermined surface of the nonvolatile memory 106 when the data stored in the usage surface is not used.

  The surface switching control unit 114 monitors the state of the surface selection flag 1106, and when detecting that the surface selection flag 1106 has been operated by the CPU 1041, refers to the surface management table 113 and sets the operated surface selection flag 1106. The address of the corresponding surface is acquired (step S6005). The surface switching control unit 114 performs access setting for the surface from which the failure log is acquired based on the acquired address (step S6006).

  Specifically, the surface switching control unit 114 searches for an entry whose surface ID 1131 matches the surface identification number indicated by the surface selection flag 1106, and acquires a failure log from the nonvolatile memory storage area 1132 of the searched entry. Get the face address. Further, the surface switching control unit 114 assigns a memory area (surface) corresponding to the address to the memory area of the CPU 1041, thereby performing access setting to the surface from which the failure log is acquired. At this time, the surface switching control unit 114 may be set to permit only reading of data from the surface. As a result, the CPU 1041 can acquire the failure log from the surface assigned via the control bus 112.

  The surface switching control unit 114 executes an arbitration process for access to the nonvolatile memory 106 via each of the memory bus 111 and the control bus 112 (step S6007). In the arbitration process, the surface switching control unit 114 performs access to the nonvolatile memory 106 via the control bus 112, that is, acquisition of a failure log while accessing the nonvolatile memory 106 via the memory bus 111. Control so as not to break.

  When the CPU 1041 receives a command for instructing copying of the failure log to the maintenance flash memory 118 from the administrator, the CPU 1041 copies the failure log to the maintenance flash memory 118 (step S6008).

  Specifically, the CPU 1041 stores the failure log read from the surface via the control bus 112 in the maintenance flash memory 118.

  The surface switching control unit 114 invalidates the surface selection flag 1106 corresponding to the surface for which the failure log is acquired (step S6009), and invalidates the protection bit 1063 for the surface (step S6010). Thereafter, the communication device 10 ends the failure log acquisition process.

  Specifically, the surface switching control unit 114 refers to the surface control register 110 and sets “0” to the surface selection flag 1106 of the surface from which the failure log is acquired, and the surface of the nonvolatile memory 106 “0” is set in the protection bit 1063 of the above.

  In step S6002, when the software activation confirmation flag 1105 is invalidated (NO in step S6002), the CPU 1041 determines whether or not the number of restarts is equal to or greater than a predetermined threshold (step S6011). For example, a method using a reboot counter can be considered.

  When the number of restarts is smaller than the predetermined threshold (NO in step S6011), the communication device 10 returns to step S6001 and executes the same process.

  If the number of restarts is equal to or greater than the predetermined threshold (YES in step S6011), the CPU 1041 notifies the administrator that the restart cannot be performed via the input / output device 103 (step S6012). Thereafter, the CPU 1041 stops the communication device 10. At this time, when receiving a notification from the communication device 10, the administrator confirms the stop of the communication device 10 and removes the nonvolatile memory 106 from the communication device 10.

  As described above, the administrator can read out the failure log from the nonvolatile memory 106 without being aware of the timing of acquiring the failure log by the arbitration process or the like executed by the surface switching control unit 114. In step S2010, since the operation of the surface selection flag 1106 for the current usage surface is prohibited, the CPU 1041 can be prevented from erroneously acquiring the failure log from the current usage surface in the failure log acquisition process.

  Conventionally, there are the following problems.

  In the transmission device described in Patent Document 1, it is difficult to save an appropriate log in a nonvolatile memory when a hardware failure occurs. Moreover, the transmission apparatus described in Patent Document 1 manages logs in a loop buffer method when storing dynamic data in a nonvolatile memory. For this reason, when the capacity of the nonvolatile memory is insufficient, the failure information of the failure that has occurred for the first time after the start of log acquisition is overwritten with new data. Therefore, information necessary for failure analysis cannot be left as a log. As described in Patent Document 1, since a failure that has occurred once may occur many times, the failure information of a failure that has occurred for the first time becomes important information in failure analysis.

  Further, in the transmission device described in Patent Document 1, when a software failure occurs, dump processing is executed in the same manner as a general communication device. Since the transmission apparatus is restarted after the dump process is completed, early recovery is difficult.

  In addition, since the transmission apparatus described in Patent Literature 1 needs to set in advance definition information for extracting information stored in the nonvolatile memory, the management cost increases. Furthermore, since the transmission apparatus described in Patent Document 1 requires a volatile memory and a non-volatile memory that are used only for log storage, the cost of the apparatus increases.

  As described with reference to FIGS. 1 to 14, according to the present embodiment, the communication device 10 divides the nonvolatile memory into a plurality of surfaces, and protects the bits 1063 that are left as a failure log according to a predetermined control policy. By enabling, a failure log necessary for failure analysis can be left in the nonvolatile memory. As a result, it can be used for failure analysis such as separation of primary failure and secondary failure problems.

  In addition, during the operation of the communication device 10, a backup process that is not related to the original processing is unnecessary, so that the processing performance of the communication device 10 does not deteriorate. Since the communication apparatus 10 of this embodiment switches the usage plane at the time of restart, that is, the log acquisition is realized at the same time as the startup process, the dump process of the dynamic data 107 becomes unnecessary. Therefore, early recovery of the communication device 10 is possible.

  In addition, the communication device 10 according to the present embodiment stores the dynamic data 107 used during operation in one aspect of the nonvolatile memory, and therefore does not need a nonvolatile memory dedicated to logs. Therefore, the cost of the apparatus can be kept low. In addition, management costs can be reduced because no information extraction processing is required.

  Further, the surface control device divides the nonvolatile memory into a plurality of memory areas, and the arithmetic unit provides one memory area divided as an area for storing dynamic data. Other divided memory areas can be used as log storage areas. In addition, by providing a protection bit that suppresses overwriting of data in the divided memory area, even if new data is overwritten, data required as a log is saved in the nonvolatile memory, so that the user can Facilitates failure analysis.

  In addition, this invention is not limited to an above-described Example, Various modifications are included. Further, for example, the above-described embodiments are described in detail for easy understanding of the present invention, and are not necessarily limited to those provided with all the described configurations. Further, a part of the configuration of each embodiment can be added to, deleted from, or replaced with another configuration.

  Each of the above-described configurations, functions, processing units, processing means, and the like may be realized by hardware by designing a part or all of them with, for example, an integrated circuit. The present invention can also be realized by software program codes that implement the functions of the embodiments. In this case, a storage medium in which the program code is recorded is provided to the computer, and a CPU included in the computer reads the program code stored in the storage medium. In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the program code itself and the storage medium storing it constitute the present invention. As a storage medium for supplying such a program code, for example, a flexible disk, a CD-ROM, a DVD-ROM, a hard disk, an SSD (Solid State Drive), an optical disk, a magneto-optical disk, a CD-R, a magnetic tape, A non-volatile memory card, ROM, or the like is used.

  The program code for realizing the functions described in the present embodiment can be implemented by a wide range of programs or script languages such as assembler, C / C ++, perl, Shell, PHP, Java (registered trademark).

  Furthermore, by distributing the program code of the software that implements the functions of the embodiments via a network, the program code is stored in a storage means such as a hard disk or memory of a computer or a storage medium such as a CD-RW or CD-R. The CPU included in the computer may read and execute the program code stored in the storage unit or the storage medium.

  In the above-described embodiments, the control lines and information lines indicate what is considered necessary for the explanation, and not all control lines and information lines on the product are necessarily shown. All the components may be connected to each other.

DESCRIPTION OF SYMBOLS 10 Communication apparatus 100 Control part 101 Flash memory 102 Static data 103 I / O device 104 Central processing part 105 Volatile memory 106 Non-volatile memory 107 Dynamic data 108 Transfer device 109 Surface control device 110 Surface control register 111 Memory bus 112 Control Bus 113 Surface management table 114 Surface switching control unit 118 Maintenance flash memory 200 Transfer unit 201 Transfer device 202 Path search engine 203 Table memory 204 Transfer engine 205 Network interface 206 Network 1041 CPU
1042 I / O control unit 1061 Write point storage area 1062 Data area 1063 Protection bit 1064 Magic number 1065 Time stamp 1066 Non-volatile memory initialization pass flag 1067 Actual use memory area 1068 Control flag storage area 1101 Maximum number of faces 1102 Control flag storage area size 1103 Actual memory capacity 1104 Magic number 1105 Software activation confirmation flag 1106 Surface selection flag 1131 Surface ID
1132 Non-volatile memory storage area 1133 Time stamp 1134 Failure flag

Claims (9)

A communication device for transferring data,
The communication device includes a control unit that controls the communication device and a transfer unit that controls transfer of the data,
The control unit controls a memory region generated by dividing a region of the arithmetic processing unit that executes processing, a nonvolatile memory, a volatile memory, and the nonvolatile memory accessed by the arithmetic processing unit. A memory area control device, and
The transfer unit includes a route search engine for searching for a route for transferring received data, a transfer engine for transferring the received data based on a processing result of the route search engine, and the data received by the route search engine. A memory for storing route information for searching for a route for transferring the data, and an interface connected to the network.
The memory area control device is:
When the communication device is activated and the nonvolatile memory is not initialized, a part of the area of the nonvolatile memory is controlled to suppress data overwriting to an area for storing data and the memory area. Divided into a plurality of memory areas including an area for storing protection bits to be performed and an area for storing time stamps related to the data;
Determining a use memory area that is a memory area to be used by the arithmetic processing unit from the plurality of memory areas;
The communication processing apparatus, wherein the arithmetic processing unit stores dynamic data dynamically updated during operation of the communication apparatus in a use memory area determined by the memory area control device. The communication device according to claim 1,
The non-volatile memory is a non-volatile memory in which performance degradation due to writing of the data does not occur,
The memory area control device is:
When the communication device is restarted, a new use memory area is determined from the plurality of memory areas based on the protection bit and the time stamp,
A communication apparatus that switches a memory area used by the arithmetic processing unit from the currently used memory area to the new used memory area. The communication device according to claim 2,
A part of the area of the non-volatile memory includes a first storage area that stores identification information of a memory area that is a candidate for the use memory area,
The memory area control device is:
Obtaining identification information of a memory area that is a candidate for the used memory area from the first storage area;
Based on the acquired identification information of the memory area, to obtain the protection bit from a memory area that is a candidate for the use memory area of the nonvolatile memory, to determine whether the protection bit is enabled,
When the protection bit is invalidated, a memory area that is a candidate for the use memory area is selected as the new use memory area, and a memory area adjacent to the memory area selected as the new use memory area Is stored in the first storage area,
If the protection bit is enabled, determine whether there is a memory area where the protection bit is disabled;
When it is determined that there is a memory area in which the protection bit is invalidated, the new usage memory area is selected from the memory areas in which the protection bit is invalidated, and is selected as the new usage memory area. The communication apparatus stores identification information of a memory area adjacent to the memory area in the first storage area. The communication device according to claim 3,
The memory area control device is:
Determining whether the activation of the software for realizing the function of the communication device is completed;
If it is determined that the activation of the software is completed, the protection bit of the used memory area is enabled,
When the start of restart of the communication device is a restart based on an operation of an administrator or a maintenance plan, the current use is performed after invalidating the protection bit of the currently used memory area. Switch from the used memory area to the new used memory area,
When the start of restart of the communication device is a restart due to a failure of the communication device, the currently used usage is performed without changing the protection bit of the currently used memory area. A communication apparatus that switches from a memory area to the newly used memory area. The communication device according to claim 3,
The arithmetic processing unit, when receiving a failure log acquisition request stored in the non-volatile memory, selects a memory region for acquiring the failure log from memory regions in which the protection bit is enabled,
The memory area control device arbitrates access from the arithmetic processing unit to the currently used memory area and access from the arithmetic processing unit to the selected memory area,
The arithmetic processing unit obtains data stored in the memory area from the selected memory area as the failure log,
The communication apparatus, wherein the memory area control device invalidates the protection bit of the memory area after the data is acquired from the selected memory area. The communication device according to claim 3,
When the communication device is restarted, obtain the time stamp of each of the plurality of memory areas,
Obtaining the protection bit of each of the plurality of memory areas, and extracting the memory area in which the protection bit is invalidated;
The communication apparatus, wherein the new use memory area is selected from the extracted memory areas based on the time stamp of the extracted memory area. The communication device according to claim 6,
The memory area control device is:
If there is no memory area in which the protection bit is invalidated, the memory area storing the fault log with the oldest time stamp is specified;
The memory area selected by selecting the memory area having the oldest time stamp as the new used memory area from all the memory areas excluding the memory area storing the fault log having the oldest time stamp. The communication device is invalidated. The communication device according to claim 3,
A part of the area of the nonvolatile memory includes a second storage area for storing information indicating that the nonvolatile memory has been initialized,
The memory area control device is:
After a part of the area of the nonvolatile memory is divided into the plurality of memory areas, information indicating that the nonvolatile memory is initialized is set in the second storage area,
After the communication device is activated, refer to the second storage area,
The communication apparatus, wherein information indicating that the nonvolatile memory is initialized is set in the second storage area, and determines that the nonvolatile memory is initialized. The communication device according to claim 3,
The said memory area control device initializes the area | region which stores the said data in the said used memory area, and the area which stores the time stamp regarding the said data after the said used memory area is determined.

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