JP2016139691A - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP2016139691A
JP2016139691A JP2015013355A JP2015013355A JP2016139691A JP 2016139691 A JP2016139691 A JP 2016139691A JP 2015013355 A JP2015013355 A JP 2015013355A JP 2015013355 A JP2015013355 A JP 2015013355A JP 2016139691 A JP2016139691 A JP 2016139691A
Authority
JP
Japan
Prior art keywords
heat transfer
semiconductor device
electrode
transfer member
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015013355A
Other languages
Japanese (ja)
Inventor
寺井 護
Mamoru Terai
護 寺井
穂隆 六分一
Hotaka Rokubuichi
穂隆 六分一
啓行 原田
Hiroyuki Harada
啓行 原田
哲 根岸
Akira Negishi
哲 根岸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2015013355A priority Critical patent/JP2016139691A/en
Publication of JP2016139691A publication Critical patent/JP2016139691A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having improved reliability in a power semiconductor device using a semiconductor element which operates at high temperature by inhibiting generation of air bubbles at boundaries between an encapsulation member and various components which contact the encapsulation member.SOLUTION: A semiconductor device comprises a substrate 3, a semiconductor element 5, electrode members 7, an encapsulation member 9 and heat transfer members 11. The substrate 3 is arranged in a case 1. The semiconductor element 5 is placed on one principal surface of the substrate 3. The electrode members 7 are connected to the substrate 3 for conduction with the outside of the semiconductor element 5. The encapsulation member 9 is a member to fill the inside of the case 1. The heat transfer members 11 are connected with part of the substrate 3 or some of the electrode members 7 and are members different from the electrode members 7.SELECTED DRAWING: Figure 1

Description

本発明は半導体装置に関し、特に、樹脂ケース内にパワー半導体素子を封止したパワー半導体装置に関するものである。   The present invention relates to a semiconductor device, and more particularly to a power semiconductor device in which a power semiconductor element is sealed in a resin case.

従来、たとえば特開2010−130015号公報(特許文献1)に示すような、半導体素子をケースに収め、ケースにゲル状の合成樹脂を充填して封止した樹脂封止型のパワー半導体装置が知られている。この種のパワー半導体装置は、電車、ハイブリッドカー、または電気自動車などの電力変換を行なうインバータ装置に好適に用いられている。モータの相数に応じた数のパワー半導体装置を含むことにより、インバータ装置が構成されている。   2. Description of the Related Art Conventionally, for example, a resin-sealed power semiconductor device in which a semiconductor element is housed in a case and filled with a gel-like synthetic resin and sealed as shown in, for example, Japanese Patent Laid-Open No. 2010-130015 (Patent Document 1). Are known. This type of power semiconductor device is suitably used for an inverter device that performs power conversion, such as a train, a hybrid car, or an electric vehicle. By including the number of power semiconductor devices corresponding to the number of phases of the motor, an inverter device is configured.

また、たとえば特開2008−98584号公報(特許文献2)においては、半導体チップを収納したプラスチックケース内に、半導体チップの駆動時の発熱温度より高い温度において十分な耐熱性を有する液体の絶縁油を充填して封止することにより形成されたパワー半導体装置が開示されている。さらにここでは、当該絶縁油として、吸湿剤および、絶縁油より熱伝導率が高い伝熱粒子が混入されたものが用いられている。この構成により、当該パワー半導体装置は、熱衝撃に強くなり、良好な放熱特性が得られ、信頼性が向上されるとしている。   Also, for example, in Japanese Patent Application Laid-Open No. 2008-98584 (Patent Document 2), a liquid insulating oil having sufficient heat resistance at a temperature higher than a heat generation temperature at the time of driving a semiconductor chip is placed in a plastic case housing a semiconductor chip. A power semiconductor device formed by filling and sealing is disclosed. Furthermore, here, as the insulating oil, a mixture of a hygroscopic agent and heat transfer particles having higher thermal conductivity than the insulating oil is used. With this configuration, the power semiconductor device is resistant to thermal shock, good heat dissipation characteristics are obtained, and reliability is improved.

特開2010−130015号公報JP 2010-130015 A 特開2008−98584号公報JP 2008-98584 A

たとえば特開2010−130015号公報および特開2008−98584号公報に示す半導体装置においては、使用時の発熱により絶縁基板および電極などの各種部材とこれに触れる封止部材との界面の水分が気化してガスが発生しやすくなる。このガスは絶縁基板などの沿面絶縁耐圧を低下させ、半導体装置の信頼性を低下させる恐れがある。   For example, in the semiconductor devices disclosed in Japanese Patent Application Laid-Open Nos. 2010-130015 and 2008-98584, moisture at the interface between various members such as an insulating substrate and an electrode and a sealing member that touches the member due to heat generation during use is removed. It becomes easy to generate gas. This gas may reduce the creeping withstand voltage of an insulating substrate or the like and may reduce the reliability of the semiconductor device.

このような不具合を抑制する観点から、特開2008−98584号公報においては半導体素子が吸湿剤および伝熱粒子を含む絶縁油に充填されるが、伝熱粒子が絶縁油内で沈降することにより放熱効果が弱まる可能性がある。なお特開2010−130015号公報に示す構成においては、使用時の内部発熱によるガスの抑制に関する対策が何らなされていない。   From the viewpoint of suppressing such inconveniences, in Japanese Patent Application Laid-Open No. 2008-98584, the semiconductor element is filled with an insulating oil containing a hygroscopic agent and heat transfer particles, but the heat transfer particles settle in the insulating oil. The heat dissipation effect may be weakened. In the configuration shown in Japanese Patent Application Laid-Open No. 2010-130015, no measures are taken regarding suppression of gas due to internal heat generation during use.

本発明は、上記の課題に鑑みてなされたものであり、その目的は、高温動作する半導体素子を用いたパワー半導体装置において、封止部材と、封止部材に触れる各種部材との界面で生じる気泡の発生を抑制することにより、その信頼性が向上された半導体装置を提供することである。   The present invention has been made in view of the above problems, and an object thereof is generated at an interface between a sealing member and various members that touch the sealing member in a power semiconductor device using a semiconductor element that operates at a high temperature. It is an object of the present invention to provide a semiconductor device whose reliability is improved by suppressing the generation of bubbles.

本発明の半導体装置は、基板と、半導体素子と、電極部材と、封止部材と、伝熱部材とを備えている。基板はケース内に配置されている。半導体素子は基板の一方の主表面上に載置されている。電極部材は基板に接続され、半導体素子の外部と導電するためのものである。封止部材はケース内を充填するものである。伝熱部材はケース内において基板の一部または電極部材の一部と接続される、電極部材とは別の部材である。   The semiconductor device of the present invention includes a substrate, a semiconductor element, an electrode member, a sealing member, and a heat transfer member. The substrate is disposed in the case. The semiconductor element is mounted on one main surface of the substrate. The electrode member is connected to the substrate and conducts with the outside of the semiconductor element. The sealing member fills the case. The heat transfer member is a member different from the electrode member connected to a part of the substrate or a part of the electrode member in the case.

本発明によれば、電極部材および伝熱部材の双方が、半導体素子の動作時に生じる熱を封止部材に伝えて封止部材を温める。封止部材を温めれば封止部材内のガスを封止部材外に排出させる効果が高められるため、封止部材と、封止部材に触れる各種部材との界面で生じる気泡に起因する信頼性の低下を抑制することができる。   According to the present invention, both the electrode member and the heat transfer member transmit heat generated during operation of the semiconductor element to the sealing member to warm the sealing member. Since the effect of exhausting the gas in the sealing member to the outside of the sealing member is enhanced by warming the sealing member, the reliability due to bubbles generated at the interface between the sealing member and various members that touch the sealing member Can be suppressed.

実施の形態1のパワー半導体装置の構成を示す概略平面図(A)と、図1(A)の点線L1から見た透視図(B)と、図1(A)の点線L2から見た透視図(C)とである。Schematic plan view (A) showing the configuration of the power semiconductor device of the first embodiment, a perspective view (B) seen from a dotted line L1 in FIG. 1 (A), and a perspective seen from a dotted line L2 in FIG. 1 (A) It is a figure (C). 比較例のパワー半導体装置の構成を示す概略平面図(A)と、図2(A)の点線L1から見た透視図(B)とである。It is the schematic plan view (A) which shows the structure of the power semiconductor device of a comparative example, and the perspective view (B) seen from the dotted line L1 of FIG. 2 (A). 比較例のパワー半導体装置を示す図2(A)の点線L3から見た透視図上に表したガスの移動態様(A)と、比較例のパワー半導体装置を示す図2(A)の点線L3から見た透視図上に表した気泡の発生態様(B)とである。The gas movement mode (A) shown on the perspective view seen from the dotted line L3 in FIG. 2A showing the power semiconductor device of the comparative example, and the dotted line L3 in FIG. 2A showing the power semiconductor device of the comparative example It is the generation | occurrence | production aspect (B) of the bubble represented on the perspective view seen from. 実施の形態1のパワー半導体装置を示す図1(A)の点線L3から見た透視図(A)と、図4(A)の透視図上に表したガスの移動態様(B)とである。FIG. 4 is a perspective view (A) viewed from a dotted line L3 in FIG. 1 (A) showing the power semiconductor device of Embodiment 1, and a gas movement mode (B) shown on the perspective view in FIG. 4 (A). . 実施の形態2のパワー半導体装置の構成を示す概略平面図(A)と、図5(A)の点線L1から見た透視図(B)と、図5(A)の点線L2から見た透視図(C)とである。Schematic plan view (A) showing the configuration of the power semiconductor device of the second embodiment, perspective view (B) seen from the dotted line L1 in FIG. 5 (A), and perspective seen from the dotted line L2 in FIG. 5 (A) It is a figure (C). 実施の形態3のパワー半導体装置の構成を示す概略平面図(A)と、図6(A)の点線L4から見た透視図(B)と、図6(A)の点線L5から見た透視図(C)と、図6(A)の点線L6から見た透視図(D)とである。6 is a schematic plan view (A) showing the configuration of the power semiconductor device of the third embodiment, a perspective view (B) seen from a dotted line L4 in FIG. 6 (A), and a perspective seen from a dotted line L5 in FIG. 6 (A). FIG. 7C is a perspective view viewed from a dotted line L6 in FIG. 実施の形態4のパワー半導体装置の構成を示す概略平面図(A)と、図7(A)の点線L7から見た透視図(B)と、図7(A)の点線L8から見た透視図(C)と、図7(A)の点線L9から見た透視図(D)とである。7 is a schematic plan view (A) showing the configuration of the power semiconductor device of the fourth embodiment, a perspective view (B) seen from a dotted line L7 in FIG. 7 (A), and a perspective seen from a dotted line L8 in FIG. 7 (A). FIG. 8C is a perspective view viewed from a dotted line L9 in FIG. 実施の形態5のパワー半導体装置の構成を示す概略平面図(A)と、図8(A)の点線L10から見た透視図(B)と、図8(A)の点線L11から見た透視図(C)と、図8(A)の点線L12から見た透視図(D)とである。Schematic plan view (A) showing the configuration of the power semiconductor device of the fifth embodiment, perspective view (B) seen from dotted line L10 in FIG. 8 (A), and perspective seen from dotted line L11 in FIG. 8 (A) FIG. 9C is a perspective view as seen from the dotted line L12 in FIG. 実施例1のサンプル1のパワー半導体装置の構成を示す概略平面図(A)と、実施例1のサンプル2のパワー半導体装置の構成を示す概略平面図(B)と、実施例1のサンプル3のパワー半導体装置の構成を示す概略平面図(C)と、実施例1のサンプル4のパワー半導体装置の構成を示す概略平面図(D)と、実施例1のサンプル5のパワー半導体装置の構成を示す概略平面図(E)と、図9(A)〜(E)をY方向から見た、各部の寸法を示す透視図(F)と、封止部材の最上面の温度を測定した点および各部の寸法を示す概略平面図(G)とである。Schematic plan view (A) showing the configuration of the power semiconductor device of Sample 1 of Example 1, Schematic plan view (B) showing the configuration of the power semiconductor device of Sample 2 of Example 1, and Sample 3 of Example 1 A schematic plan view (C) showing the configuration of the power semiconductor device of FIG. 1, a schematic plan view (D) showing the configuration of the power semiconductor device of sample 4 of Example 1, and the configuration of the power semiconductor device of sample 5 of Example 1 A schematic plan view (E) showing, a perspective view (F) showing the dimensions of each part when FIGS. 9 (A) to (E) are viewed from the Y direction, and a point at which the temperature of the uppermost surface of the sealing member is measured And a schematic plan view (G) showing dimensions of each part. 実施例2のサンプル6のパワー半導体装置の構成を示す概略平面図および透視図(A)と、実施例2のサンプル7のパワー半導体装置の構成を示す概略平面図および透視図(B)と、実施例2のサンプル8,9,10のパワー半導体装置の構成を示す概略平面図および透視図(C)とである。Schematic plan view and perspective view (A) showing the configuration of the power semiconductor device of sample 6 of Example 2, and schematic plan view and perspective view (B) showing the configuration of the power semiconductor device of sample 7 of Example 2. FIG. 6 is a schematic plan view and a perspective view (C) showing a configuration of a power semiconductor device of Samples 8, 9, and 10 of Example 2. FIG. 実施例3のサンプル11のパワー半導体装置の構成を示す概略平面図(A)と、図11(A)の点線L10から見た透視図(B)と、図11(A)の点線L11から見た透視図(C)と、図11(A)の点線L12から見た透視図(D)とである。A schematic plan view (A) showing the configuration of the power semiconductor device of the sample 11 of Example 3, a perspective view (B) seen from the dotted line L10 in FIG. 11 (A), and a view from the dotted line L11 in FIG. 11 (A) They are a perspective view (C) and a perspective view (D) viewed from a dotted line L12 in FIG. 11 (A). 実施例3のサンプル12のパワー半導体装置の構成を示す概略平面図(A)と、図12(A)の点線L10から見た透視図(B)と、図12(A)の点線L11から見た透視図(C)と、図12(A)の点線L12から見た透視図(D)とである。A schematic plan view (A) showing the configuration of the power semiconductor device of the sample 12 of Example 3, a perspective view (B) seen from a dotted line L10 in FIG. 12 (A), and a dotted line L11 in FIG. 12 (A) They are a perspective view (C) and a perspective view (D) viewed from a dotted line L12 in FIG. 12 (A). 実施例3のサンプル13のパワー半導体装置の構成を示す概略平面図(A)と、図13(A)の点線L10から見た透視図(B)と、図13(A)の点線L11から見た透視図(C)と、図13(A)の点線L12から見た透視図(D)とである。The schematic plan view (A) showing the configuration of the power semiconductor device of the sample 13 of Example 3, the perspective view (B) seen from the dotted line L10 in FIG. 13 (A), and the dotted line L11 in FIG. 13 (A) They are a perspective view (C) and a perspective view (D) viewed from a dotted line L12 in FIG. 13 (A).

以下、本発明の実施の形態について図に基づいて説明する。
(実施の形態1)
まず本実施の形態の半導体装置の構成としてパワー半導体装置の構成について図1を用いて説明する。なお、説明の便宜のため、X方向、Y方向、Z方向が導入されている。X方向およびY方向はそれぞれ平面視における横方向および縦方向を意味し、Z方向はX方向およびY方向に交差する、厚み(高さ)方向を意味するものとする。
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
First, a configuration of a power semiconductor device will be described with reference to FIG. 1 as a configuration of the semiconductor device of the present embodiment. For convenience of explanation, an X direction, a Y direction, and a Z direction are introduced. The X direction and the Y direction mean the horizontal direction and the vertical direction in a plan view, respectively, and the Z direction means a thickness (height) direction that intersects the X direction and the Y direction.

図1(A)は後述するフタ13を含まない本実施の形態のパワー半導体装置の内部の構成を示す平面図であり、図1(B)は当該フタ13を含めた本実施の形態のパワー半導体装置の内部の構成を、図1(A)中の点線L1から図の上側向きに見た透視図(側面図)である。また図1(C)は当該フタ13を含めた本実施の形態のパワー半導体装置の内部の構成を、図1(A)中の点線L2から図の上側向きに見た透視図(側面図)である。なお各透視図においては、見える部材の一部を省略し主要な部材(要部)のみを抜きとって図示している場合があるとともに、図の理解を容易にするために一部において平面図と整合しない箇所が存在する場合がある(以下の各図においても同じ)。   FIG. 1A is a plan view showing the internal configuration of the power semiconductor device of the present embodiment that does not include a lid 13 described later, and FIG. 1B shows the power of the present embodiment including the lid 13. It is the perspective view (side view) which looked at the internal structure of the semiconductor device from the dotted line L1 in FIG. FIG. 1C is a perspective view (side view) of the internal configuration of the power semiconductor device of the present embodiment including the lid 13 as viewed upward from the dotted line L2 in FIG. It is. In each perspective view, a part of the visible member may be omitted and only a main member (main part) may be extracted, and a plan view may be partly shown for easy understanding of the drawing. There are cases where there is a location that does not match (the same applies to the following figures).

図1(A),(B),(C)を参照して、本実施の形態のパワー半導体装置は、ケース1と、基板3と、半導体素子5と、電極部材7と、封止部材9と、伝熱部材11とを主に有している。   1A, 1B, 1C, the power semiconductor device of the present embodiment includes a case 1, a substrate 3, a semiconductor element 5, an electrode member 7, and a sealing member 9. And the heat transfer member 11 is mainly included.

ケース1は、パワー半導体装置を構成する基板3などの各種部材をその内部に収納可能な形状を有する、たとえば直方体状の部材である。ケース1は、たとえばポリ・フェニレン・スルファイドなどの樹脂材料により形成されている。   The case 1 is, for example, a rectangular parallelepiped member having a shape capable of accommodating various members such as the substrate 3 constituting the power semiconductor device. Case 1 is formed of a resin material such as poly-phenylene sulfide, for example.

基板3は、パワー半導体装置の土台となる構成部材であり、ケース1内に配置されている。特に図1(B),(C)を参照して、基板3は、絶縁基板3aと、裏面電極3bと、表面電極3cとを含んでいる。   The substrate 3 is a constituent member that is a base of the power semiconductor device, and is disposed in the case 1. Referring particularly to FIGS. 1B and 1C, the substrate 3 includes an insulating substrate 3a, a back electrode 3b, and a front electrode 3c.

絶縁基板3aは、たとえばセラミックスなどの絶縁性の材料からなる平板形状の部材であり、たとえば平面視において矩形状を有しており、Z方向に一定の厚みを有している。より具体的には、絶縁基板3aを構成するセラミックス材料として、たとえば窒化アルミニウム(AlN)、窒化珪素(Si34)、酸化アルミニウム(Al23)、酸化ベリリウム(BeO)、酸化珪素(SiO2)、ガラスセラミックスからなる群から選択されるいずれか1つが用いられることが好ましい。ただし絶縁基板3aは、これを含むパワー半導体装置が求める絶縁特性、放熱性、線膨張率などの特性を満たす任意の材質およびZ方向厚みとすることができる。 The insulating substrate 3a is a flat plate member made of an insulating material such as ceramics, and has a rectangular shape in plan view, for example, and has a constant thickness in the Z direction. More specifically, as the ceramic material constituting the insulating substrate 3a, for example, aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), aluminum oxide (Al 2 O 3 ), beryllium oxide (BeO), silicon oxide ( Any one selected from the group consisting of SiO 2 ) and glass ceramics is preferably used. However, the insulating substrate 3a can be made of any material and Z-direction thickness satisfying characteristics such as insulation characteristics, heat dissipation, and linear expansion coefficient required by a power semiconductor device including the same.

裏面電極3bは、絶縁基板3aのZ方向下側の主表面の少なくとも一部に、たとえばろう付けにより貼り合わせられるように形成されており、たとえば平面視において矩形状を有し、Z方向に一定の厚みを有する薄膜のパターンである。同様に表面電極3cは、絶縁基板3aのZ方向上側の主表面の少なくとも一部に、たとえばろう付けにより貼り合わせられるように(絶縁基板3aの上記上側の主表面を直接覆うように)形成されており、たとえば平面視において矩形状を有し、Z方向に一定の厚みを有する薄膜のパターンである。裏面電極3bおよび表面電極3cは、一般公知のアルミニウム、銅、またはこれらを組み合わせた金属材料により形成される。なお裏面電極3bおよび表面電極3cを構成する金属材料は、酸化防止のためその表面にニッケルめっきなどの処理がなされてもよい。   The back electrode 3b is formed so as to be bonded to at least a part of the main surface on the lower side in the Z direction of the insulating substrate 3a, for example, by brazing, and has, for example, a rectangular shape in a plan view and constant in the Z direction. It is the pattern of the thin film which has the thickness of. Similarly, the surface electrode 3c is formed on at least a part of the upper main surface in the Z direction of the insulating substrate 3a so as to be bonded by, for example, brazing (so as to directly cover the upper main surface of the insulating substrate 3a). For example, it is a thin film pattern having a rectangular shape in a plan view and a constant thickness in the Z direction. The back electrode 3b and the front electrode 3c are formed of generally known aluminum, copper, or a metal material combining these. In addition, the metal material which comprises the back surface electrode 3b and the surface electrode 3c may be processed by nickel plating etc. on the surface for oxidation prevention.

半導体素子5を構成する材料は、シリコン、炭化珪素(SiC)、窒化ガリウム(GaN)、ダイヤモンド、からなる群から選択されるいずれか1つであるが、あるいは炭化珪素と窒化ガリウムとダイヤモンドとの複合材料であってもよい。これにより半導体素子5を、高電圧を印加するパワー半導体素子として用いることができる。   The material constituting the semiconductor element 5 is any one selected from the group consisting of silicon, silicon carbide (SiC), gallium nitride (GaN), and diamond, or a combination of silicon carbide, gallium nitride, and diamond. It may be a composite material. Thereby, the semiconductor element 5 can be used as a power semiconductor element to which a high voltage is applied.

半導体素子5は、上記の材料からなるチップ状(薄板形)を有しており、基板3の一方の主表面(Z方向上側の主表面)上に、たとえば互いに間隔をあけて複数(図1(A)においてはX方向およびY方向のそれぞれに関して2列ずつ、合計4つ)載置されている。すなわち半導体素子5は、そのZ方向下側の主表面が基板3のZ方向上側の主表面(表面電極3cの表面)と互いに接するように、図示されないはんだなどの接合材料により接合されるように搭載されている。   The semiconductor element 5 has a chip shape (thin plate shape) made of the above-described material, and a plurality of semiconductor elements 5 (see FIG. 1) are spaced apart from each other on one main surface (main surface on the upper side in the Z direction) of the substrate 3, for example. In (A), two rows in each of the X direction and the Y direction, a total of four) are placed. That is, the semiconductor element 5 is bonded by a bonding material such as solder (not shown) such that the main surface on the lower side in the Z direction is in contact with the main surface on the upper side in the Z direction (the surface of the surface electrode 3c). It is installed.

半導体素子5は、シリコンまたは炭化珪素(SiC)からなる半導体チップの(図1のZ方向上側の)表面上に微細な素子が複数形成されることにより集積回路を構成する部材である。ここでの微細な素子として、たとえばMOSFET(Metal Oxide Semiconductor Field Effect Transistor)およびIGBT(Insulated Gate Bipolar Transistor)などの電力制御用半導体素子、または還流ダイオードなどのいわゆるパワー半導体素子が用いられる。しかしこれに限らず、微細な素子として、動作時の温度が125℃を超える数々の半導体素子のうちのいずれかが少なくとも1つ以上用いられればよい。   The semiconductor element 5 is a member constituting an integrated circuit by forming a plurality of fine elements on the surface (upper Z direction in FIG. 1) of a semiconductor chip made of silicon or silicon carbide (SiC). As the fine elements here, for example, power control semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and IGBTs (Insulated Gate Bipolar Transistors), or so-called power semiconductor elements such as freewheeling diodes are used. However, the present invention is not limited to this, and as a fine element, at least one or more of a number of semiconductor elements whose operating temperature exceeds 125 ° C. may be used.

電極部材7は、当該パワー半導体装置(半導体素子5)とその外部の配線などとを電気的に接続(導電)するために配置されている。電極部材7は、ソース電極7aと、ドレイン電極7bと、ゲート電極7cとを含んでいる。   The electrode member 7 is disposed in order to electrically connect (conduct) the power semiconductor device (semiconductor element 5) and the external wiring thereof. The electrode member 7 includes a source electrode 7a, a drain electrode 7b, and a gate electrode 7c.

ソース電極7aは、半導体素子5に含まれる微細な素子を構成するソース電極と電気的に接続されており、かつ当該基板3を含む半導体素子5の外部と電気的に接続するためのものであり、当該パワー半導体装置の全体に対する1つの大きなソース電極に相当する。同様に、ドレイン電極7b(ゲート電極7c)は、半導体素子5に含まれる微細な素子を構成するドレイン電極(ゲート電極)と電気的に接続されており、かつ当該基板3を含む半導体素子5の外部と電気的に接続するためのものであり、当該パワー半導体装置の全体に対する1つの大きなドレイン電極(ゲート電極)に相当する。   The source electrode 7 a is electrically connected to the source electrode that constitutes a fine element included in the semiconductor element 5 and is electrically connected to the outside of the semiconductor element 5 including the substrate 3. This corresponds to one large source electrode for the entire power semiconductor device. Similarly, the drain electrode 7 b (gate electrode 7 c) is electrically connected to the drain electrode (gate electrode) constituting a fine element included in the semiconductor element 5, and the semiconductor element 5 including the substrate 3 is connected to the drain electrode 7 b (gate electrode 7 c). This is for electrical connection to the outside, and corresponds to one large drain electrode (gate electrode) for the entire power semiconductor device.

図1においては基板3の表面電極3cは、X方向に関して互いに間隔をあけて複数(3つ)配置されている。そのうち最も左側の表面電極3cにソース電極7aが、中央の表面電極3cにドレイン電極7bが、最も右側の表面電極3cにゲート電極7cが、それぞれ接続されている。したがって当該3つの表面電極3cのそれぞれは、電極部材7のそれぞれと同電位になっている。しかしここでは当該3つの表面電極3cのそれぞれは基板3を構成するものとし、電極部材7は基板3(3つの表面電極3cのそれぞれ)に接続された各電極7a,7b,7cを意味するものとする。   In FIG. 1, a plurality (three) of surface electrodes 3 c of the substrate 3 are arranged at intervals with respect to the X direction. The source electrode 7a is connected to the leftmost surface electrode 3c, the drain electrode 7b is connected to the central surface electrode 3c, and the gate electrode 7c is connected to the rightmost surface electrode 3c. Therefore, each of the three surface electrodes 3 c has the same potential as each of the electrode members 7. However, here, each of the three surface electrodes 3c constitutes the substrate 3, and the electrode member 7 means each electrode 7a, 7b, 7c connected to the substrate 3 (each of the three surface electrodes 3c). And

図1に示すように、ソース電極7a、ドレイン電極7bおよびゲート電極7cのそれぞれは、表面電極3cと接続される領域(Z方向最下部)において、基板3(表面電極3c)上からZ方向上側に延びるようにほぼ直角に屈曲した形状を有していてもよい。これにより、ソース電極7a、ドレイン電極7bおよびゲート電極7cのそれぞれは、その大半の領域がZ方向上側に延びる構成を有している。   As shown in FIG. 1, each of the source electrode 7a, the drain electrode 7b, and the gate electrode 7c is located above the substrate 3 (surface electrode 3c) from the upper side in the Z direction in the region connected to the surface electrode 3c (lowermost portion in the Z direction). It may have a shape bent at a substantially right angle so as to extend. Thereby, each of the source electrode 7a, the drain electrode 7b, and the gate electrode 7c has a configuration in which most of the regions extend upward in the Z direction.

ソース電極7a、ドレイン電極7bおよびゲート電極7cは、たとえば銅の土台の表面にニッケルめっきなどの処理がなされた構成を有しており、たとえば超音波接合により基板3の表面電極3cと互いに接続される。ただしソース電極7a、ドレイン電極7bおよびゲート電極7cは電気伝導性が高い任意の材質により形成可能であり、また超音波接合の他、はんだまたはかしめ接合などにより基板3の表面電極3cと互いに接続されてもよい。   The source electrode 7a, the drain electrode 7b, and the gate electrode 7c have a structure in which, for example, nickel plating or the like is performed on the surface of a copper base, and are connected to the surface electrode 3c of the substrate 3 by, for example, ultrasonic bonding. The However, the source electrode 7a, the drain electrode 7b, and the gate electrode 7c can be formed of any material having high electrical conductivity, and are connected to the surface electrode 3c of the substrate 3 by soldering or caulking bonding in addition to ultrasonic bonding. May be.

また各電極7a,7b,7cのサイズおよび位置についても特に限定されるものではなく、所望の電流を流すことが出来るだけのサイズを有していればよい。なお、図1における電極7a〜7cの名称は装置構成の説明の便宜上名付けられたもので、用いる素子によってたとえばソース電極とドレイン電極の位置および機能などが図1の構成と入れ替わったり、たとえばソース電極とドレイン電極との双方の機能を有するように共用された電極が配置されたりしてもよい。   Further, the size and position of each electrode 7a, 7b, 7c are not particularly limited, and it is sufficient that the electrodes 7a, 7b, and 7c have a size that allows a desired current to flow. Note that the names of the electrodes 7a to 7c in FIG. 1 are named for convenience of description of the device configuration. For example, the positions and functions of the source electrode and the drain electrode may be replaced with those in FIG. A common electrode may be arranged so as to have both functions of the drain electrode and the drain electrode.

封止部材9は、特に図1(B),(C)に示すようにケース1内を充填するように配置されており、そのZ方向上側の最上面がケース1内の封止部材最上面9aとなっている。封止部材9はたとえば一般公知の封止用の樹脂材料が硬化したものであるが、必ずしも樹脂材料でなくてもよい。したがって封止部材9は、ケース1内に配置される基板3、半導体素子5、電極部材7などの各部材の表面の少なくとも一部と互いに接しながらこれらの各部材を覆うように配置されている。   As shown in FIGS. 1B and 1C, the sealing member 9 is disposed so as to fill the inside of the case 1, and the uppermost surface on the upper side in the Z direction is the uppermost surface of the sealing member in the case 1. 9a. For example, the sealing member 9 is formed by curing a generally known resin material for sealing, but may not necessarily be a resin material. Accordingly, the sealing member 9 is disposed so as to cover at least a part of the surface of each member such as the substrate 3, the semiconductor element 5, and the electrode member 7 disposed in the case 1 while being in contact with each other. .

封止部材9としての樹脂材料は、成形性、硬化性、貯蔵安定性、特に長期耐熱性に優れ、良好な耐クラック性を有する材料を用いることが好ましい。具体的には封止部材9として、たとえば熱硬化性オルガノポリシロキサンを主成分としたシリコーン系の樹脂(シリコーンゲルなどの2液混合型の反応材料)が一般的に用いられる。また封止部材9として、エポキシ系またはフッ素系などの樹脂材料が用いられてもよいし、上記の成形性などの特性を損なわない範囲で硬化促進剤や消泡剤、無機充填剤などを添加して用いることもできる。   The resin material as the sealing member 9 is preferably a material having excellent moldability, curability, storage stability, particularly long-term heat resistance, and good crack resistance. Specifically, as the sealing member 9, for example, a silicone-based resin (a two-component mixed reaction material such as silicone gel) mainly including a thermosetting organopolysiloxane is generally used. Further, as the sealing member 9, an epoxy-based or fluorine-based resin material may be used, and a curing accelerator, an antifoaming agent, an inorganic filler, or the like is added as long as the above-described properties such as moldability are not impaired. It can also be used.

封止部材9は、複数種類(2液)の所定量が計量されたものが混合され、それが約13.3Paの真空状態下で10分間一次脱泡された後にケース1内に注型されることにより形成(ケース1内に供給)される。その後当該封止部材9は、13.3Paの真空状態下で10分間二次脱泡され、70℃で1時間加熱硬化される。   A plurality of types (two liquids) of which a predetermined amount is weighed are mixed, and the sealing member 9 is first defoamed for 10 minutes under a vacuum of about 13.3 Pa, and then cast into the case 1. Is formed (supplied in the case 1). Thereafter, the sealing member 9 is subjected to secondary degassing for 10 minutes under a vacuum state of 13.3 Pa, and is cured by heating at 70 ° C. for 1 hour.

伝熱部材11は、ケース1内において基板3(表面電極3c)の一部と接続されている。具体的には図1においては、2つの伝熱部材11が配置されており、そのうちの一方は3つの表面電極3cのうち最も左側の表面電極3cに、他方は3つの表面電極3cのうち最も右側の表面電極3cに、それぞれ接続されている。しかし伝熱部材11は電極部材7とは別の部材である。つまり基本的に本実施の形態の伝熱部材11は当該パワー半導体装置(半導体素子5)とその外部の配線などとを電気的に接続(導電)していない。伝熱部材11は、電極部材7などと同様に封止部材9と接触するように封止されるが、伝熱部材11は半導体素子5の動作時に生じる熱をその接触する封止部材9に伝える機能を有している。   The heat transfer member 11 is connected to a part of the substrate 3 (surface electrode 3 c) in the case 1. Specifically, in FIG. 1, two heat transfer members 11 are arranged, one of which is the leftmost surface electrode 3c of the three surface electrodes 3c and the other is the most of the three surface electrodes 3c. Each is connected to the right surface electrode 3c. However, the heat transfer member 11 is a member different from the electrode member 7. That is, basically, the heat transfer member 11 according to the present embodiment does not electrically connect (conduct) the power semiconductor device (semiconductor element 5) and its external wiring. The heat transfer member 11 is sealed so as to be in contact with the sealing member 9 similarly to the electrode member 7 or the like. However, the heat transfer member 11 transfers heat generated during operation of the semiconductor element 5 to the sealing member 9 that is in contact with the heat transfer member 11. Has the ability to communicate.

図1に示すように、伝熱部材11は、表面電極3cと接続される領域(Z方向最下部)において、基板3(表面電極3c)上からZ方向上側(基板3のたとえばZ方向上側の主表面である一方の主表面に交差する方向)に延びるようにほぼ直角に屈曲した形状を有していてもよい。また伝熱部材11はZ方向上側に延びる領域を有するが、そのZ方向最上部において再度ほぼ直角に屈曲することにより、平面層11aを有するように形成されてもよい。平面層11aは、図1(A)において矩形状に見える伝熱部材11のZ方向最上部の領域である。平面層11aは、封止部材9における、基板3の一方の主表面(Z方向上側の主表面)に沿うようにX方向およびY方向に広がる平面(表面)に沿うように広がっている。このような形状を有する伝熱部材11は、たとえば金型を用いた成形により形成される。   As shown in FIG. 1, the heat transfer member 11 is located on the substrate 3 (surface electrode 3 c) above the Z direction (on the substrate 3, for example, on the Z direction upper side) in a region connected to the surface electrode 3 c (lowermost in the Z direction). You may have the shape bent at right angle so that it might extend in the direction which cross | intersects one main surface which is a main surface. The heat transfer member 11 has a region extending upward in the Z direction. However, the heat transfer member 11 may be formed so as to have the planar layer 11a by being bent at a substantially right angle again at the uppermost portion in the Z direction. The flat layer 11a is an uppermost region in the Z direction of the heat transfer member 11 that looks rectangular in FIG. The planar layer 11a extends along a plane (surface) extending in the X direction and the Y direction so as to extend along one main surface (main surface on the upper side in the Z direction) of the substrate 3 in the sealing member 9. The heat transfer member 11 having such a shape is formed by molding using a mold, for example.

これにより、図1のX方向左側の伝熱部材11は、左側の表面電極3cの真上から中央の表面電極3cの真上に達するように、X方向右側に延びる平面層11aを有している。また図1のX方向右側の伝熱部材11は、右側の表面電極3cの真上から中央の表面電極3cの真上に達するように、X方向左側に延びる平面層11aを有している。   Accordingly, the heat transfer member 11 on the left side in the X direction in FIG. 1 has the planar layer 11a extending rightward in the X direction so as to reach right above the central surface electrode 3c from right above the left surface electrode 3c. Yes. Further, the heat transfer member 11 on the right side in the X direction in FIG. 1 has a planar layer 11a extending to the left side in the X direction so as to reach right above the central surface electrode 3c from right above the right surface electrode 3c.

特に図1(C)に示すように、本実施の形態においては、伝熱部材11は、その少なくとも一部が、封止部材9の表面から露出している。具体的には、伝熱部材11のZ方向上側の領域、特に平面層11aの少なくとも一部が、封止部材最上面9aよりもZ方向上側に配置されることにより、封止部材9に接することなくその外側に露出する態様となっている。   In particular, as shown in FIG. 1C, at least a part of the heat transfer member 11 is exposed from the surface of the sealing member 9 in the present embodiment. Specifically, the region on the upper side in the Z direction of the heat transfer member 11, particularly at least a part of the planar layer 11 a, is disposed on the upper side in the Z direction with respect to the uppermost surface 9 a of the sealing member, thereby contacting the sealing member 9. Without being exposed to the outside.

伝熱部材11を構成する材料は、たとえばアルミニウム、銅、アルミニウムと銅との合金、からなる群から選択されるいずれか1つであることが好ましい。すなわち伝導部材11は、たとえばアルミニウムまたは銅などからなる金属板により形成される。このようにすれば、伝熱部材11による伝熱性をより高めることができる。   The material constituting the heat transfer member 11 is preferably any one selected from the group consisting of aluminum, copper, and an alloy of aluminum and copper, for example. That is, conductive member 11 is formed of a metal plate made of, for example, aluminum or copper. If it does in this way, the heat-transfer property by the heat-transfer member 11 can be improved more.

伝熱部材11は、たとえば超音波接合により基板3の表面電極3cと互いに接続される。ただし伝熱部材11は電気伝導性が高い任意の材質により形成可能であり、また超音波接合の他、はんだまたはかしめ接合などにより基板3の表面電極3cと互いに接続されてもよい。   The heat transfer member 11 is connected to the surface electrode 3c of the substrate 3 by, for example, ultrasonic bonding. However, the heat transfer member 11 can be formed of any material having high electrical conductivity, and may be connected to the surface electrode 3c of the substrate 3 by soldering or caulking bonding, in addition to ultrasonic bonding.

本実施の形態のパワー半導体装置は、上記の各部材の他にも、たとえばフタ13と、ベース板15と、ワイヤ17とを有している。   The power semiconductor device of the present embodiment includes, for example, a lid 13, a base plate 15, and a wire 17 in addition to the above-described members.

フタ13は、ケース1の内部の、封止部材9により充填された領域がケース1の外側に露出しないようにするように、ケース1のZ方向最上部の開口部を塞ぐように設置される。フタ13は基本的にケース1と同様の樹脂材料により形成される平板形状の部材であることが好ましい。   The lid 13 is installed so as to block the uppermost opening in the Z direction of the case 1 so that the region filled with the sealing member 9 inside the case 1 is not exposed to the outside of the case 1. . The lid 13 is preferably a flat plate member basically formed of the same resin material as the case 1.

ここで、特に図1(B),(C)に示すように、封止部材9はケース1内の全体を充填するわけではなく、ケース1内の最上部よりもZ方向のやや下方にその最上面9aを有するように供給されている。すなわちケース1内において、封止部材最上面9aとフタ13との間には空隙14(空気などによる隙間)が存在している。   Here, in particular, as shown in FIGS. 1B and 1C, the sealing member 9 does not fill the entire case 1 and is slightly below the uppermost portion in the case 1 in the Z direction. It is supplied so as to have an uppermost surface 9a. That is, in the case 1, a gap 14 (a gap due to air or the like) exists between the sealing member uppermost surface 9 a and the lid 13.

フタ13によるケース1内の密閉は、封止部材9が加熱硬化された後に取り付けられ、それによりパワー半導体装置として完成する。   Sealing in the case 1 by the lid 13 is attached after the sealing member 9 is heated and cured, thereby completing a power semiconductor device.

なお図1においては、伝熱部材11はその全体がケース1内(フタ13の下側)に収まっており、フタ13からケース1の外部に露出していない構成を有している。しかし図示されないが、たとえばパワー半導体装置の放熱性をより向上させる観点から、伝熱部材11はその一部(Z方向上部の領域)がフタ13から(たとえばフタ13の一部を突き破ることにより)ケース1の外部に露出した構成であってもよい。   In FIG. 1, the entire heat transfer member 11 is housed in the case 1 (below the lid 13) and is not exposed to the outside of the case 1 from the lid 13. However, although not shown, for example, from the viewpoint of further improving the heat dissipation of the power semiconductor device, a part of the heat transfer member 11 (region in the upper part of the Z direction) is from the lid 13 (for example, by breaking through a part of the lid 13). The structure exposed to the outside of case 1 may be sufficient.

ベース板15は、ケース1を構成する外枠およびその内部の、Z方向下側を塞ぐように配置されることによりケース1の底部を構成する部材である。つまりベース板15は、基板3の、上記一方の主表面とは反対側の他方の主表面(Z方向下側の主表面)に接続されるように配置されている。より具体的にはベース板15は、そのZ方向上側の主表面が基板3のZ方向下側の主表面(裏面電極3bの表面)と互いに接するように、図示されないはんだなどの接合材料により接合されるように搭載されている。ベース板15はたとえば平面視において矩形状を有する平板形状の部材であり、ケース1の底部に、図示されない接着剤等で貼り付けられている。   The base plate 15 is a member that constitutes the bottom of the case 1 by being disposed so as to close the outer frame constituting the case 1 and the lower side in the Z direction inside the case. That is, the base plate 15 is disposed so as to be connected to the other main surface (the main surface on the lower side in the Z direction) of the substrate 3 opposite to the one main surface. More specifically, the base plate 15 is bonded with a bonding material such as solder (not shown) such that the main surface on the upper side in the Z direction contacts the main surface on the lower side in the Z direction of the substrate 3 (the surface of the back electrode 3b). It is mounted to be. The base plate 15 is a flat plate-like member having a rectangular shape in plan view, for example, and is attached to the bottom of the case 1 with an adhesive or the like (not shown).

ベース板15は、半導体素子5の駆動時に発する熱をそのZ方向下側からパワー半導体装置の外側へ放熱する機能を有している。ベース板15は、これを含むパワー半導体装置が求める電気特性、放熱性、線膨張率などの特性を満たす任意のZ方向厚み、および材質とすることができる。   The base plate 15 has a function of radiating heat generated when the semiconductor element 5 is driven from the lower side in the Z direction to the outside of the power semiconductor device. The base plate 15 can have any Z-direction thickness and material satisfying characteristics such as electrical characteristics, heat dissipation, and linear expansion coefficient required by a power semiconductor device including the base plate 15.

たとえば、一般的にベース板15は銅により形成されるが、たとえばモリブデンまたはタングステンにより形成されてもよいし、銅とタングステンとの合金、または銅とモリブデンとの合金(銅モリブデン:CuMo)により形成されてもよい。あるいはベース板15はアルミニウムと炭化珪素(SiC)との合成材料(アルミニウム炭化珪素:AlSiC)、珪素と炭化珪素(SiC)との合成材料などのセラミック金属系の材料により形成されてもよいし、さらに合成ダイヤモンド、あるいはダイヤモンドと銅との複合材料により形成されてもよい。またベース板15は裏面電極3bと電気的に接続されることにより、半導体素子5などと電気的に接続されてもよい。このような材質により形成されたベース板15は、放熱性などの特性を十分に満たすことができる。   For example, the base plate 15 is generally formed of copper, but may be formed of, for example, molybdenum or tungsten, or an alloy of copper and tungsten, or an alloy of copper and molybdenum (copper molybdenum: CuMo). May be. Alternatively, the base plate 15 may be formed of a ceramic metal material such as a synthetic material of aluminum and silicon carbide (SiC) (aluminum silicon carbide: AlSiC), a synthetic material of silicon and silicon carbide (SiC), Further, it may be formed of synthetic diamond or a composite material of diamond and copper. Further, the base plate 15 may be electrically connected to the semiconductor element 5 or the like by being electrically connected to the back electrode 3b. The base plate 15 formed of such a material can sufficiently satisfy characteristics such as heat dissipation.

以上により、当該パワー半導体装置におけるケース1内を充填する上記の封止部材9は、ケース1の側面と、フタ13と、ベース板15とで囲まれた空間内の一部を充填している。これにより封止部材9は、当該空間内に配置された半導体素子5などを外部の汚染等から保護する機密性を確保したり、パワー半導体装置全体の成型による形状精度を高めたりしている。また特にベース板15により半導体素子5などの発生する熱が高効率に外部に放熱される。   As described above, the sealing member 9 filling the case 1 in the power semiconductor device fills a part of the space surrounded by the side surface of the case 1, the lid 13, and the base plate 15. . Thereby, the sealing member 9 ensures the confidentiality which protects the semiconductor element 5 etc. which are arrange | positioned in the said space from external contamination, etc., or improves the shape precision by the shaping | molding of the whole power semiconductor device. In particular, the heat generated by the semiconductor element 5 and the like is radiated to the outside with high efficiency by the base plate 15.

ワイヤ17は、たとえば複数の半導体素子5同士を電気的に接続したり、半導体素子5と、半導体素子5が載置される表面電極3c以外の(たとえば当該表面電極3cに隣り合う)表面電極3cとを電気的に接続したりするために半導体素子5の表面などに接続された細い配線である。   For example, the wire 17 electrically connects the semiconductor elements 5 to each other, or the surface electrode 3c other than the semiconductor element 5 and the surface electrode 3c on which the semiconductor element 5 is placed (for example, adjacent to the surface electrode 3c). Are thin wirings connected to the surface of the semiconductor element 5 and the like.

ワイヤ17は、これにより接続される2つの領域間を電気的に接続することが可能な任意の材質により形成され得る。具体的にはワイヤ17は、通常はアルミニウム、銅、金などの金属材料の細線により形成されるが、たとえばアルミニウムによりその表面が被覆された銅からなるワイヤ17が用いられてもよい。   The wire 17 can be formed of any material that can electrically connect the two regions to be connected. Specifically, the wire 17 is usually formed of a thin wire made of a metal material such as aluminum, copper, or gold. For example, a wire 17 made of copper whose surface is covered with aluminum may be used.

ワイヤ17の表面電極3cなどへの接続に用いる材料は、図示しないがたとえばはんだまたは銀などの熱溶融部材であることが好ましい。なおワイヤ17の表面電極3cなどへの接続方法は、ワイヤ17と表面電極3cなどとの電気的な接続を可能とする任意の方法によりなされる。たとえば表面電極3cとワイヤ17とが超音波接合により互いに接続されてもよい。   Although the material used for connecting the wire 17 to the surface electrode 3c or the like is not shown, it is preferably a heat melting member such as solder or silver. The connection method of the wire 17 to the surface electrode 3c and the like is performed by an arbitrary method that enables electrical connection between the wire 17 and the surface electrode 3c and the like. For example, the surface electrode 3c and the wire 17 may be connected to each other by ultrasonic bonding.

以上の構成を有する本実施の形態のパワー半導体装置は冷却装置などに取り付けて用いられる場合がある。その場合、当該冷却装置などへの設置のために、たとえばケース1に取付ネジ穴19が加工されてもよい。なお図1(A)においてはX方向の一方および他方の端部に1つずつの取付ネジ穴19が形成されているが、その形状および数には特に制限は無く、必要な取付け強度や製品規格などを考慮のうえ形状および数を適宜決定することができる。   The power semiconductor device of the present embodiment having the above configuration may be used by being attached to a cooling device or the like. In that case, for example, the mounting screw hole 19 may be machined in the case 1 for installation in the cooling device or the like. In FIG. 1A, one mounting screw hole 19 is formed at one end and the other end in the X direction, but there is no particular limitation on the shape and number, and the required mounting strength and product The shape and number can be appropriately determined in consideration of standards and the like.

より具体的には、パワー半導体装置は図示しない冷却フィンの上に載置され、取付ネジ穴19内に挿入されるネジなどにより、冷却フィンの上に固定される。このとき、パワー半導体装置と冷却フィンとの間には図示しない放熱グリースなどの放熱部材が介在することが好ましい。   More specifically, the power semiconductor device is placed on a cooling fin (not shown) and fixed on the cooling fin by a screw or the like inserted into the mounting screw hole 19. At this time, it is preferable that a heat radiating member such as a heat radiating grease (not shown) is interposed between the power semiconductor device and the cooling fin.

次に、図2〜図4の比較例の構成、動作および課題等を説明しながら、本実施の形態の作用効果、およびより好ましい構成等について説明する。   Next, while explaining the configuration, operation, problem, and the like of the comparative example of FIGS.

図2(A)はフタ13を含まない比較例のパワー半導体装置の内部の構成を示す平面図であり、図2(B)は当該フタ13を含めた本実施の形態のパワー半導体装置の内部の構成を、図2(A)中の点線L1から図の上側向きに見た透視図(側面図)である。   2A is a plan view showing the internal configuration of a comparative power semiconductor device that does not include the lid 13, and FIG. 2B shows the internal configuration of the power semiconductor device according to the present embodiment including the lid 13. As shown in FIG. 3 is a perspective view (side view) of the configuration of FIG. 2 viewed from the dotted line L1 in FIG.

図2(A),(B)を参照して、比較例のパワー半導体装置は、基本的に図1の本実施の形態のパワー半導体装置と同様の構成を有しているが、伝熱部材11を有さない点において図2は図1と異なっている。これ以外の比較例(図2)の構成は、実施の形態1(図1)の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。   2A and 2B, the power semiconductor device of the comparative example has basically the same configuration as the power semiconductor device of the present embodiment of FIG. 2 differs from FIG. 1 in that it does not have 11. Since the configuration of the other comparative example (FIG. 2) is almost the same as that of the first embodiment (FIG. 1), the same elements are denoted by the same reference numerals, and the description thereof will not be repeated.

パワー半導体装置の動作時は、半導体素子5および基板3(表面電極3c)で形成される回路パターンには高電圧が印加される。図2の比較例のパワー半導体装置においては、シリコーンゲルにより封止部材9が形成されるため、このような高電圧が印加されても、短い沿面長で基板3などの高い沿面絶縁耐圧を確保することができる。また当該封止部材9により、たとえば半導体素子5と電極部材7とワイヤ17との間を互いに電気的に絶縁することができる。   During the operation of the power semiconductor device, a high voltage is applied to the circuit pattern formed by the semiconductor element 5 and the substrate 3 (surface electrode 3c). In the power semiconductor device of the comparative example of FIG. 2, since the sealing member 9 is formed of silicone gel, a high creeping withstand voltage such as the substrate 3 is secured with a short creeping length even when such a high voltage is applied. can do. In addition, the sealing member 9 can electrically insulate the semiconductor element 5, the electrode member 7, and the wire 17 from each other, for example.

図2に示す比較例のパワー半導体装置の半導体素子5などに高電圧が印加されて半導体素子5が高温になれば、基板3および電極部材7と、これらに接するように覆う封止部材9との界面にて気泡が発生し、その結果として基板3などの沿面絶縁耐圧が低下し、パワー半導体装置の信頼性が低下する不具合を起こす場合がある。これは、封止部材9の内部、および封止部材9とこれに接する基板3などの各部材との界面に存在する水分が、半導体素子5の動作時の熱で気化し、封止部材9内へのガス拡散速度よりも発生ガス量が増大した場合に生じるものと考えられる。このような現象は、特に炭化珪素からなる半導体素子5(チップ)を用いて、当該半導体素子5の最大接合温度(Tjmax)が150℃を超える動作を行なった場合に顕著に生じる。   When a high voltage is applied to the semiconductor element 5 or the like of the power semiconductor device of the comparative example shown in FIG. 2 and the semiconductor element 5 becomes high temperature, the substrate 3 and the electrode member 7, and the sealing member 9 that covers and contacts these As a result, bubbles may be generated at the interface, and as a result, the creeping withstand voltage of the substrate 3 or the like may be reduced, causing a problem that the reliability of the power semiconductor device is reduced. This is because moisture present inside the sealing member 9 and at the interface between the sealing member 9 and each member such as the substrate 3 in contact with the sealing member 9 is vaporized by heat during operation of the semiconductor element 5. This is considered to occur when the amount of gas generated is greater than the gas diffusion rate inside. Such a phenomenon occurs remarkably when a semiconductor element 5 (chip) made of silicon carbide is used and an operation in which the maximum junction temperature (Tjmax) of the semiconductor element 5 exceeds 150 ° C. is performed.

このような現象を抑制するために、たとえば半導体素子5を収納したケース1内に高耐熱性を有する液体の絶縁油を充填することが考えられるが、液体の絶縁油を用いるためケース1内の密封が難しく製品の歩留りが向上できないという不具合を来す可能性がある。   In order to suppress such a phenomenon, for example, it is conceivable to fill a liquid insulating oil having high heat resistance into the case 1 in which the semiconductor element 5 is housed. There is a possibility that it is difficult to seal and the yield of the product cannot be improved.

そこで、このような現象を抑制するために、本願発明の発明者は鋭意研究を行った結果、昇温による上記気泡の発生は封止部材9を構成するシリコーンゲルの透湿度がシリコーンゲルの温度によって変化することに着目した。   Therefore, in order to suppress such a phenomenon, the inventors of the present invention have conducted extensive research. As a result, the generation of the bubbles due to the temperature rise is caused by the moisture permeability of the silicone gel constituting the sealing member 9 being the temperature of the silicone gel. We paid attention to change depending on.

ここで図3(A),(B)は図2(A)中の点線L3から図の左側向きに見た透視図(側面図)である。図3(A)を参照して、たとえば図の比較的右側の領域は、高温となる半導体素子5の真上に相当するため、封止部材9が比較的高温となる(このことを図中「H」で示している)。これに対して、たとえば図の比較的左側の領域には半導体素子5が配置されないため、封止部材9が比較的低温となる(このことを図中「L」で示している)。   3A and 3B are perspective views (side views) seen from the dotted line L3 in FIG. 2A toward the left side of the figure. Referring to FIG. 3A, for example, the region on the relatively right side of the drawing corresponds to a position directly above the semiconductor element 5 that is at a high temperature, so that the sealing member 9 is at a relatively high temperature (this is shown in the figure "H"). On the other hand, for example, since the semiconductor element 5 is not arranged in the region on the left side of the drawing, the sealing member 9 becomes relatively low temperature (this is indicated by “L” in the drawing).

封止部材9が十分温められている領域Hにおいては、封止部材9のガス拡散速度が大きいため、矢印で示すようにガスGs(水蒸気)が盛んに半導体素子5上から封止部材9内をZ方向上側へ移動する。つまり半導体素子5の高温動作により水分が気化して発生したガスGsは、盛んに封止部材9の上方へ移動して封止部材9の外部に排出される。   In the region H in which the sealing member 9 is sufficiently warmed, the gas diffusion rate of the sealing member 9 is large, so that the gas Gs (water vapor) actively flows from above the semiconductor element 5 into the sealing member 9 as indicated by arrows. Is moved upward in the Z direction. That is, the gas Gs generated by the vaporization of moisture due to the high-temperature operation of the semiconductor element 5 actively moves above the sealing member 9 and is discharged to the outside of the sealing member 9.

一方、封止部材9が冷えた領域Lにおいては、封止部材9のガス拡散速度が小さく、半導体素子5の高温動作により水分が気化して発生したガスGsは封止部材9内を移動してその外部に排出されにくい。このことから図3(B)に示すように、封止部材9の低温領域21においては、特に封止部材9と基板3との界面などに気泡25が発生しやすくなる。   On the other hand, in the region L where the sealing member 9 is cooled, the gas diffusion rate of the sealing member 9 is small, and the gas Gs generated by the vaporization of moisture due to the high temperature operation of the semiconductor element 5 moves in the sealing member 9. It is hard to be discharged outside. Therefore, as shown in FIG. 3B, bubbles 25 are likely to be generated particularly in the interface between the sealing member 9 and the substrate 3 in the low temperature region 21 of the sealing member 9.

そこで図3(A),(B)と同様に図1(A)中の点線L3から図の左側向きに見た透視図(側面図)である図4(A),(B)を参照して、本実施の形態(図1)に示すように、ケース1内において(つまり封止部材9に接するように)、基板3の一部に伝熱部材11(ここでは電極部材7のように電気伝導に寄与しない)が接続されるように配置される。   Therefore, as in FIGS. 3A and 3B, see FIGS. 4A and 4B which are perspective views (side views) seen from the dotted line L3 in FIG. Then, as shown in the present embodiment (FIG. 1), in the case 1 (that is, in contact with the sealing member 9), the heat transfer member 11 (here, like the electrode member 7) is partially attached to the substrate 3. Are arranged so as to be connected.

これにより、ケース1内の半導体素子5の動作時に生じる熱が伝熱部材11に伝わり、伝熱部材11から高効率に封止部材9に伝わることにより封止部材9が温められる。このため封止部材9と基板3などの各種部材との界面において加熱により気泡25が発生したとしても、速やかにZ方向上方に拡散移動し、図4(B)中に太い矢印で示すように、低温領域21においてもガスGsが封止部材9の外部に排出される。したがって低温領域21においても気泡25が上記界面の近傍に滞留することによる基板3などの沿面絶縁耐圧の低下を抑制することができ、パワー半導体装置の信頼性を高めることができる。   Thereby, heat generated during operation of the semiconductor element 5 in the case 1 is transmitted to the heat transfer member 11, and the sealing member 9 is warmed by being transferred from the heat transfer member 11 to the sealing member 9 with high efficiency. For this reason, even if bubbles 25 are generated by heating at the interface between the sealing member 9 and various members such as the substrate 3, it quickly diffuses and moves upward in the Z direction, as shown by the thick arrows in FIG. Even in the low temperature region 21, the gas Gs is discharged to the outside of the sealing member 9. Accordingly, it is possible to suppress a decrease in creeping withstand voltage of the substrate 3 or the like due to the bubbles 25 staying in the vicinity of the interface even in the low temperature region 21 and to improve the reliability of the power semiconductor device.

本実施の形態においては、半導体素子5の駆動により発生する熱を利用して封止部材9を温めるため、たとえば外部から封止部材9を加熱するための電力等を供給する必要がない。このため低コストで高効率に封止部材9を温め、気泡25の滞留による不具合の発生を抑制することができる。   In the present embodiment, since the sealing member 9 is heated using the heat generated by driving the semiconductor element 5, it is not necessary to supply, for example, power for heating the sealing member 9 from the outside. For this reason, it is possible to warm the sealing member 9 at a low cost and with high efficiency, and to suppress the occurrence of problems due to the retention of the bubbles 25.

伝熱部材11は基板3の表面上からZ方向上側に延びている。このため封止部材9内をZ方向の下側から最上部まで均一に温めることができ、気泡25をより高効率に封止部材9の最上面にまで導くことができる。   The heat transfer member 11 extends upward from the surface of the substrate 3 in the Z direction. For this reason, the inside of the sealing member 9 can be uniformly warmed from the lower side to the uppermost part in the Z direction, and the bubbles 25 can be guided to the uppermost surface of the sealing member 9 with higher efficiency.

また伝熱部材11は、その少なくとも一部(Z方向に関する最上部)が封止部材9の表面である封止部材最上面9aから露出している。これは封止部材9を構成する樹脂材料は熱伝導性が低いため、封止部材9の温度が伝熱部材11の近傍において最も高くなるという特性を最大限に生かす目的でなされた構成である。   Further, at least a part of the heat transfer member 11 (the uppermost portion in the Z direction) is exposed from the sealing member uppermost surface 9 a which is the surface of the sealing member 9. This is because the resin material constituting the sealing member 9 has a low thermal conductivity, so that the temperature of the sealing member 9 is maximized in the vicinity of the heat transfer member 11 to maximize the characteristics. .

つまり、伝熱部材11を封止部材9の封止部材最上面9aから露出させれば、封止部材最上面9aの近傍に伝熱部材11が存在することになるため、封止部材最上面9aの近傍における封止部材9の温度が高くなる。特に図4(A),(B)を参照して、これにより伝熱部材11の近傍に発生する水蒸気などのガスの封止部材9内の透過率がいっそう高められ、より高効率に封止部材最上面9aに達するようにガスを移動させることができる。言い換えれば、伝熱部材11の近傍の封止部材9を高効率なガス放出経路として機能させることができる。   That is, if the heat transfer member 11 is exposed from the sealing member uppermost surface 9a of the sealing member 9, the heat transfer member 11 is present in the vicinity of the sealing member uppermost surface 9a. The temperature of the sealing member 9 in the vicinity of 9a increases. In particular, referring to FIGS. 4A and 4B, the transmittance of gas such as water vapor generated in the vicinity of the heat transfer member 11 in the sealing member 9 is further increased, and the sealing is performed with higher efficiency. The gas can be moved to reach the member uppermost surface 9a. In other words, the sealing member 9 in the vicinity of the heat transfer member 11 can function as a highly efficient gas discharge path.

さらに、本実施の形態においては伝熱部材11がX方向およびY方向に広がる平面層11aを有することにより、これが存在しない場合に比べて伝熱部材11の体積が大きくなり、その熱容量が大きくなる。このため伝熱部材11による放熱効果が高められる。したがって、加熱による水分の気化を抑制するとともに、駆動時の昇温によるパワー半導体装置の信頼性の低下を抑制することができる。   Further, in the present embodiment, the heat transfer member 11 has the planar layer 11a that extends in the X direction and the Y direction, so that the volume of the heat transfer member 11 is increased and the heat capacity thereof is increased as compared with the case where it does not exist. . For this reason, the heat dissipation effect by the heat transfer member 11 is enhanced. Therefore, it is possible to suppress the vaporization of moisture due to heating, and it is possible to suppress a decrease in reliability of the power semiconductor device due to a temperature rise during driving.

なお電極部材7にも伝熱部材11と同様に熱を封止部材9に伝える機能を有するが、それとは別に(電気伝導に寄与しない)伝熱部材11を有することにより、封止部材9へ熱を拡散させる効率をいっそう高めることができる。   The electrode member 7 also has a function of transferring heat to the sealing member 9 in the same manner as the heat transfer member 11, but by having the heat transfer member 11 (which does not contribute to electrical conduction) separately from the heat transfer member 11, The efficiency of diffusing heat can be further increased.

ただし以上の本実施の形態のパワー半導体装置においては、電極部材7としてソース電極7a、ドレイン電極7b、ゲート電極7cなど複数の部材を有している。そして伝熱部材11は、それら複数の電極部材7(7a,7b,7c)のうち当該伝熱部材11との距離が最も短いものとの最短距離が25mm以下の位置に配置されることが好ましい。   However, in the power semiconductor device of the present embodiment as described above, the electrode member 7 has a plurality of members such as the source electrode 7a, the drain electrode 7b, and the gate electrode 7c. And it is preferable that the heat transfer member 11 is arrange | positioned in the position where the shortest distance with the shortest distance with the said heat transfer member 11 is 25 mm or less among these several electrode members 7 (7a, 7b, 7c). .

なおここでは伝熱部材11が複数存在する場合、それぞれの伝熱部材11と、当該伝熱部材11からの距離が最も短いものとの最短距離が複数存在することになるが、その複数の最短距離のなかで最長のものについても当該最短距離が25mm以下であることがより好ましい。またここで最短距離とは、X方向、Y方向およびZ方向の3方向(3次元)で考えた最短距離を意味する。   Here, when there are a plurality of heat transfer members 11, there are a plurality of shortest distances between each heat transfer member 11 and the shortest distance from the heat transfer member 11. Of the longest distances, the shortest distance is more preferably 25 mm or less. Here, the shortest distance means the shortest distance considered in the three directions (three dimensions) of the X direction, the Y direction, and the Z direction.

つまり図1(A)を再度参照して、たとえば図1の右側の伝熱部材11は、これに最も近い位置に配置される電極部材7であるゲート電極7cとの距離Dが25mm以下であることが好ましい。同様に、たとえば図1(A)の左側の伝熱部材11は、これに最も近い位置に配置される電極部材7であるソース電極7aとの最短距離が25mm以下であることが好ましい。これにより伝熱部材11は、これと同じ機能を有する電極部材7と共同して熱を封止部材9に伝える効果が高められる。したがって基板3の沿面絶縁耐圧の低下を抑制する効果および、伝熱部材11が封止部材9を温めることによるガスGsの排出効果がいっそう高められる。   That is, referring to FIG. 1A again, for example, the right heat transfer member 11 in FIG. 1 has a distance D of 25 mm or less with respect to the gate electrode 7c which is the electrode member 7 disposed at the closest position. It is preferable. Similarly, for example, the heat transfer member 11 on the left side of FIG. 1A preferably has a shortest distance of 25 mm or less from the source electrode 7a, which is the electrode member 7 disposed at the closest position. Thereby, the heat transfer member 11 enhances the effect of transferring heat to the sealing member 9 in cooperation with the electrode member 7 having the same function. Therefore, the effect of suppressing the decrease in creeping withstand voltage of the substrate 3 and the effect of discharging the gas Gs due to the heat transfer member 11 warming the sealing member 9 are further enhanced.

さらに、本実施の形態のパワー半導体装置においては、その駆動時において、半導体素子5(チップ)の動作時における(Z方向上側の)表面の温度と、封止部材9における基板3の一方の主表面と同じ側(Z方向上側)の表面(すなわち封止部材最上面9a)の温度の最小値との差が120℃以下であることが好ましい。つまり図1(B)を再度参照して、半導体素子5の(微細な素子が多数実装された)Z方向上側の表面の温度T1と、封止部材最上面9aの温度の最小値T2(T1>T2)との差が120℃以下である。このようにすれば、伝熱部材11が封止部材9を加熱する機能が十分に整っていることになるため、パワー半導体装置の信頼性を高めることができるといえる。なお、これらの特徴については後に実施例として詳述する。   Furthermore, in the power semiconductor device according to the present embodiment, the temperature of the surface (upper side in the Z direction) during the operation of the semiconductor element 5 (chip) and one main surface of the substrate 3 in the sealing member 9 are driven. It is preferable that the difference from the minimum value of the temperature of the surface on the same side as the surface (upper side in the Z direction) (that is, the sealing member uppermost surface 9a) is 120 ° C. or less. In other words, referring again to FIG. 1B, the temperature T1 of the upper surface of the semiconductor element 5 (on which many fine elements are mounted) in the Z direction and the minimum value T2 (T1) of the uppermost surface 9a of the sealing member. > T2) is 120 ° C. or less. In this way, the heat transfer member 11 is sufficiently equipped with a function of heating the sealing member 9, so that it can be said that the reliability of the power semiconductor device can be improved. These features will be described later in detail as examples.

なお上記のパワー半導体装置は、ベース板15および、その上の絶縁基板3aを含む基板3により形成された、いわゆるケース型パワー半導体装置である。しかしこれに限らず、たとえばベース板15に有機絶縁膜を介在して金属性の基板が載置された構成のいわゆるケース型パワーモジュール構造についても、上記の本実施の形態と同様の効果を得ることができる。   The power semiconductor device described above is a so-called case type power semiconductor device formed by the base plate 15 and the substrate 3 including the insulating substrate 3a thereon. However, the present invention is not limited to this. For example, a so-called case-type power module structure in which a metallic substrate is placed on the base plate 15 with an organic insulating film interposed therebetween also achieves the same effect as the above-described embodiment. be able to.

(実施の形態2)
図5(A),(B),(C)は本実施の形態2のパワー半導体装置を、それぞれ実施の形態1の図1(A),(B),(C)と同じように(同じ場所で、かつ同じ方向から)見た態様を示している。図5(A),(B),(C)を参照して、本実施の形態のパワー半導体装置は、基本的に図1の実施の形態1のパワー半導体装置と同様の構成を有しているが、伝熱部材11が封止部材9の最上面9aからまったく露出しておらず、平面層11aを含めその全体が封止部材9内に埋もれるように配置されている。この点において図5は図1と異なっているが、これ以外の本実施の形態(図5)の構成は、実施の形態1(図1)の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。
(Embodiment 2)
FIGS. 5A, 5B, and 5C show the power semiconductor device of the second embodiment in the same manner as in FIGS. 1A, 1B, and 1C of the first embodiment (same as in FIGS. It shows an aspect as seen from the location and from the same direction. Referring to FIGS. 5A, 5B, and 5C, the power semiconductor device of the present embodiment has basically the same configuration as the power semiconductor device of the first embodiment of FIG. However, the heat transfer member 11 is not exposed at all from the uppermost surface 9 a of the sealing member 9, and the entire surface including the flat layer 11 a is buried in the sealing member 9. In this respect, FIG. 5 is different from FIG. 1, but the configuration of the present embodiment (FIG. 5) other than this is almost the same as the configuration of the first embodiment (FIG. 1). The same reference numerals are given and description thereof will not be repeated.

上記のように伝熱部材11はその一部が封止部材9の表面から露出する方が封止部材9を最上部まで均一に温める効果が大きくなり、封止部材9内などに発生する気泡25(図3(B)参照)の拡散性を高めることができる。しかし伝熱部材11を封止部材9の表面9a上に露出することは必須条件ではなく、半導体装置に必要なガス拡散性を有していれば、本実施の形態のように、伝熱部材11を封止部材9内に埋没させる構造を有していてもよい。   As described above, when the heat transfer member 11 is partially exposed from the surface of the sealing member 9, the effect of uniformly heating the sealing member 9 to the uppermost portion is increased, and bubbles generated in the sealing member 9 and the like are generated. 25 (see FIG. 3B) can be enhanced. However, it is not an essential condition to expose the heat transfer member 11 on the surface 9a of the sealing member 9. As long as the heat transfer member 11 has gas diffusibility necessary for the semiconductor device, the heat transfer member as in the present embodiment. 11 may be embedded in the sealing member 9.

(実施の形態3)
図6(A)は図1(A)と同様の平面図であり、図6(B)は図6(A)中の点線L4から図の上側向きに見た透視図である。また図6(C)は図6(A)中の点線L5から図の上側向きに、図6(D)は図6(A)中の点線L6から図の左側向きに見た透視図である。
(Embodiment 3)
6A is a plan view similar to FIG. 1A, and FIG. 6B is a perspective view seen from the dotted line L4 in FIG. 6A upward. 6C is a perspective view seen from the dotted line L5 in FIG. 6A toward the upper side of the figure, and FIG. 6D is a perspective view seen from the dotted line L6 in FIG. 6A toward the left side of the figure. .

図6(A),(B),(C),(D)を参照して、本実施の形態のパワー半導体装置は、基本的に図1の実施の形態1のパワー半導体装置と同様の構成を有しているが、実施の形態1のように金属板を屈曲させた伝熱部材11ではなく、リボンワイヤである伝熱部材12が用いられている。この点において図6は図1と異なっているが、これ以外の本実施の形態(図6)の構成は、実施の形態1(図1)の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。   Referring to FIGS. 6A, 6B, 6C, and 6D, the power semiconductor device of the present embodiment is basically similar in configuration to the power semiconductor device of the first embodiment of FIG. However, instead of the heat transfer member 11 in which the metal plate is bent as in the first embodiment, a heat transfer member 12 that is a ribbon wire is used. In this respect, FIG. 6 differs from FIG. 1, but the configuration of this embodiment (FIG. 6) other than this is almost the same as the configuration of Embodiment 1 (FIG. 1). The same reference numerals are given and description thereof will not be repeated.

伝熱部材12は、半導体装置が必要な熱伝達性を有していれば特に材質や形状に限定はない。つまり伝熱部材12としてワイヤ配線等を代用することもできる。一例として図6の伝熱部材12はアルミニウム製のリボンワイヤが用いられている。しかし伝熱部材12としてはそのほかにたとえばアルミニウム、銅、または金により形成された円形の断面形状を有する金属ワイヤが用いられてもよいし、アルミニウムによりその表面が被覆された銅製のワイヤが用いられてもよい。あるいは伝熱部材12は、たとえばカーボンナノチューブなど、カーボン系の複合材料(カーボンを主な構成材料にしている)により形成されてもよい。たとえばカーボンナノチューブは熱伝導性に異方性を有するため、これを用いれば、伝熱部材12は必要な方向の封止部材9をより優先的に加熱させるなど、封止部材9の温度分布をより精密に制御することができる。   The heat transfer member 12 is not particularly limited in material and shape as long as the semiconductor device has heat transfer properties required by the semiconductor device. That is, wire wiring or the like can be substituted for the heat transfer member 12. As an example, the ribbon member made of aluminum is used for the heat transfer member 12 of FIG. However, as the heat transfer member 12, a metal wire having a circular cross section formed of, for example, aluminum, copper, or gold may be used, or a copper wire whose surface is covered with aluminum may be used. May be. Alternatively, the heat transfer member 12 may be formed of a carbon-based composite material (carbon is a main constituent material) such as a carbon nanotube. For example, since the carbon nanotube has anisotropy in thermal conductivity, if this is used, the heat transfer member 12 can preferentially heat the sealing member 9 in a necessary direction, and the temperature distribution of the sealing member 9 can be increased. It can be controlled more precisely.

図6(C)に示すように、図6(A)のY方向の下側に配置される伝熱部材12は、その両端部が、基板3の上側の表面電極3c上においてX方向に関して互いに間隔をあけた2か所の点に接続されることにより、伝熱部材12は、基板3(表面電極3c)との間にループを構成している。   As shown in FIG. 6C, both ends of the heat transfer member 12 arranged on the lower side in the Y direction in FIG. 6A are mutually on the X direction on the surface electrode 3c on the upper side of the substrate 3. The heat transfer member 12 forms a loop between the substrate 3 (surface electrode 3c) by being connected to two points spaced apart.

図6(D)に示すように、図6(A)のX方向の左右側に配置される伝熱部材12についても基本的に上記と同様である。しかし図6(D)においては伝熱部材12としてのリボンワイヤが2本、Z方向に関して互いに少なくとも部分的にほぼ重なるように配置されており、それぞれが基板3とY方向に関して互いに間隔をあけた2か所の点に接続されることでループを構成している。2つの伝熱部材12の間にはZ方向に関してある程度の間隔が保たれており、2つの伝熱部材12の間は電気的に絶縁されている。   As shown in FIG. 6D, the heat transfer members 12 arranged on the left and right sides in the X direction in FIG. 6A are basically the same as described above. However, in FIG. 6D, two ribbon wires as the heat transfer members 12 are arranged so as to at least partially overlap each other in the Z direction, and are spaced from each other in the Y direction. A loop is formed by being connected to two points. A certain amount of space is maintained between the two heat transfer members 12 in the Z direction, and the two heat transfer members 12 are electrically insulated.

図6(D)のように伝熱部材12のリボンワイヤがZ方向に関して2重になれば、伝熱部材12の伝熱効率をさらに高めることができる。さらに、図示しないが半導体装置が必要な熱伝達性を有していれば、伝熱部材12に用いるリボンワイヤはループ状となるように基板3(表面電極3c)上に接続される必要はなく、1対の端部のうち一方のみ基板3(表面電極3c)に接続される態様であってもよい。また、図示はしていないが、本実施の形態のようにリボンワイヤ状の伝熱部材12を用いた場合においても、実施の形態1の伝熱部材11のように、その一部を封止部材9の表面よりもZ方向上方に露出した構造をとることもできる。   If the ribbon wire of the heat transfer member 12 is doubled in the Z direction as shown in FIG. 6D, the heat transfer efficiency of the heat transfer member 12 can be further increased. Furthermore, although not shown, if the semiconductor device has a necessary heat transfer property, the ribbon wire used for the heat transfer member 12 does not need to be connected to the substrate 3 (surface electrode 3c) so as to form a loop. Only one of the pair of end portions may be connected to the substrate 3 (surface electrode 3c). Although not shown, even when a ribbon wire-shaped heat transfer member 12 is used as in the present embodiment, a part of the heat transfer member 11 is sealed as in the heat transfer member 11 of the first embodiment. It is also possible to take a structure exposed above the surface of the member 9 in the Z direction.

さらに本実施の形態の伝熱部材12についても、実施の形態1の伝熱部材11と同様に、複数の電極部材7のうち伝熱部材12との距離が最も短い電極部材7との最短距離が25mm以下の位置に配置されることが好ましい。また本実施の形態においても、半導体素子5の表面の温度T1と、封止部材最上面9aの最小温度T2との差が120℃以下であることが好ましい。   Furthermore, also about the heat transfer member 12 of this Embodiment, the shortest distance with the electrode member 7 with the shortest distance with the heat transfer member 12 among the several electrode members 7 similarly to the heat transfer member 11 of Embodiment 1. FIG. Is preferably disposed at a position of 25 mm or less. Also in the present embodiment, it is preferable that the difference between the surface temperature T1 of the semiconductor element 5 and the minimum temperature T2 of the sealing member uppermost surface 9a is 120 ° C. or less.

次に、本実施の形態の作用効果について説明する。
本実施の形態のリボンワイヤとしての伝熱部材12は、金属板としての伝熱部材11のようにその形成時に金型を用いる必要がないため、工期を短縮することができる。また安価で熱伝導率の高いアルミニウムのリボンワイヤを伝熱部材12として用いることにより、封止部材9をより高効率に加温することができる。さらに伝熱部材12は、伝熱部材11よりも容易に必要な部分に設置できるため、パワー半導体装置全体の設計の自由度を増加させることができる。
Next, the effect of this Embodiment is demonstrated.
The heat transfer member 12 as a ribbon wire of the present embodiment does not require the use of a mold at the time of formation unlike the heat transfer member 11 as a metal plate, and therefore the construction period can be shortened. Moreover, the sealing member 9 can be heated more efficiently by using inexpensive and high thermal conductivity aluminum ribbon wire as the heat transfer member 12. Furthermore, since the heat transfer member 12 can be installed in a necessary part more easily than the heat transfer member 11, the degree of freedom in designing the entire power semiconductor device can be increased.

また伝熱部材12により基板3との間にループを構成させれば、伝熱部材12をより安定に基板3に固定させることができる。   In addition, if a loop is formed between the heat transfer member 12 and the substrate 3, the heat transfer member 12 can be more stably fixed to the substrate 3.

(実施の形態4)
図7(A)は図1(A)と同様の平面図であり、図7(B)は図7(A)中の点線L7から図の上側向きに見た透視図である。また図7(C)は図7(A)中の点線L8から図の上側向きに、図7(D)は図7(A)中の点線L9から図の左側向きに見た透視図である。
(Embodiment 4)
FIG. 7A is a plan view similar to FIG. 1A, and FIG. 7B is a perspective view seen from the dotted line L7 in FIG. 7A upward. 7C is a perspective view seen from the dotted line L8 in FIG. 7A toward the upper side of the figure, and FIG. 7D is a perspective view seen from the dotted line L9 in FIG. 7A toward the left side of the figure. .

図7(A),(B),(C),(D)を参照して、本実施の形態のパワー半導体装置は、基本的に図1の実施の形態1のパワー半導体装置と同様の構成を有しているが、伝熱部材11が実施の形態1のように平面層11aを有さない実施の形態1よりも小型の形状であり、これが1つの基板3上に多数配置されている。この点において図7は図1と異なっているが、これ以外の本実施の形態(図7)の構成は、実施の形態1(図1)の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。   Referring to FIGS. 7A, 7B, 7C, and 7D, the power semiconductor device of the present embodiment is basically similar in configuration to the power semiconductor device of the first embodiment of FIG. However, the heat transfer member 11 has a smaller shape than the first embodiment in which the heat transfer member 11 does not have the planar layer 11 a as in the first embodiment, and a large number of these are arranged on one substrate 3. . In this respect, FIG. 7 differs from FIG. 1, but the configuration of the present embodiment (FIG. 7) other than this is substantially the same as the configuration of the first embodiment (FIG. 1). The same reference numerals are given and description thereof will not be repeated.

図7(A),(C)を参照して、伝熱部材11は、Y方向に2列並ぶ半導体素子5の一方と他方との間の領域に4つ、X方向に関して互いに間隔をあけて配置されている。また図7(A),(D)を参照して、上記4つの伝熱部材11のうちX方向の最も左側および最も右側の伝熱部材11は、これらとY方向に関して互いに間隔をあけて(Y方向下方に)さらに他の伝熱部材11を有している。このため図7のパワー半導体装置は、1つの基板3上に合計6つの伝熱部材11を有している。   7A and 7C, four heat transfer members 11 are provided in a region between one and the other of the semiconductor elements 5 arranged in two rows in the Y direction, and are spaced from each other in the X direction. Has been placed. 7A and 7D, among the four heat transfer members 11, the leftmost and rightmost heat transfer members 11 in the X direction are spaced apart from each other in the Y direction ( There is a further heat transfer member 11 (downward in the Y direction). Therefore, the power semiconductor device of FIG. 7 has a total of six heat transfer members 11 on one substrate 3.

本実施の形態の伝熱部材11は、実施の形態1の伝熱部材11と同様に、表面電極3cと接続される領域(Z方向最下部)において、基板3(表面電極3c)上からZ方向上側(基板3のたとえばZ方向上側の主表面である一方の主表面に交差する方向)に延びるようにほぼ直角に屈曲した形状を有している。しかし当該伝熱部材11は、Z方向最上部に屈曲部を有さず、平面層11aを有していない。このため当該伝熱部材11は、全体としてほぼ柱状の形状を有している。なお本実施の形態の伝熱部材11についても、実施の形態1と同様に、その一部が、封止部材最上面9aの外側に露出していることが好ましい。   Similarly to the heat transfer member 11 of the first embodiment, the heat transfer member 11 of the present embodiment has a Z-direction from the top of the substrate 3 (surface electrode 3c) in the region (the lowest part in the Z direction) connected to the surface electrode 3c. It has a shape bent substantially at right angles so as to extend in the upper direction (the direction intersecting one main surface, for example, the main surface on the upper side in the Z direction) of the substrate 3. However, the heat transfer member 11 does not have a bent portion at the top in the Z direction and does not have a flat layer 11a. For this reason, the heat transfer member 11 has a substantially columnar shape as a whole. In addition, it is preferable that a part of the heat transfer member 11 of the present embodiment is exposed outside the sealing member uppermost surface 9a as in the first embodiment.

次に、本実施の形態の作用効果について説明する。
たとえばレイアウト上の理由等により、実施の形態1のように平面層11aを有する大型の(大きな熱容量を有する)伝熱部材11を設置できない場合においても、本実施の形態のように、柱状の伝熱部材11を複数(たとえば1つの基板3に対して6つ)、互いに間隔をあけて配置することにより、実施の形態1の伝熱部材11と同様に熱を封止部材9に供給する作用効果を得ることができる。
Next, the effect of this Embodiment is demonstrated.
For example, even when a large heat transfer member 11 having a flat layer 11a (having a large heat capacity) cannot be installed as in the first embodiment due to layout reasons, etc., as in the present embodiment, a columnar transfer is not possible. A function of supplying heat to the sealing member 9 in the same manner as the heat transfer member 11 of the first embodiment by disposing a plurality of the heat members 11 (for example, six for one substrate 3) spaced apart from each other. An effect can be obtained.

本実施の形態においても、他の実施の形態と同様に、複数の電極部材7のうち伝熱部材12との距離が最も短い電極部材7との最短距離が25mm以下の位置に配置されることが好ましい。また本実施の形態においても、半導体素子5の表面の温度T1と、封止部材最上面9aの最小温度T2との差が120℃以下であることが好ましい。   Also in this embodiment, as in the other embodiments, the shortest distance from the electrode member 7 having the shortest distance to the heat transfer member 12 among the plurality of electrode members 7 is arranged at a position of 25 mm or less. Is preferred. Also in the present embodiment, it is preferable that the difference between the surface temperature T1 of the semiconductor element 5 and the minimum temperature T2 of the sealing member uppermost surface 9a is 120 ° C. or less.

なお本実施の形態の伝熱部材11は、他の実施の形態と同様にソース電極7aなどの電極部材7とは別の部材である。しかし本実施の形態のように単一のパワー半導体装置内に多数配置される伝熱部材11は、パワー半導体素子(半導体素子5)の外部と導電可能な部材であってもよい。ただし上記のように、本実施の形態の伝熱部材11は、電極部材7との最短距離が25mm以下などの制約を有することが好ましい。このため、たとえば複数の電極部材7を有する通常の(比較例としての)半導体装置の、一の電極部材7から見た他の電極部材7は、本実施の形態の伝熱部材11には含まれないものとする。   The heat transfer member 11 of the present embodiment is a member different from the electrode member 7 such as the source electrode 7a as in the other embodiments. However, as in the present embodiment, a large number of heat transfer members 11 arranged in a single power semiconductor device may be members that can conduct electricity to the outside of the power semiconductor element (semiconductor element 5). However, as described above, the heat transfer member 11 according to the present embodiment preferably has a restriction such that the shortest distance from the electrode member 7 is 25 mm or less. Therefore, for example, another electrode member 7 as viewed from one electrode member 7 of a normal semiconductor device (as a comparative example) having a plurality of electrode members 7 is included in the heat transfer member 11 of the present embodiment. Shall not.

上記のように伝熱部材11がパワー半導体素子(半導体素子5)の外部と導電可能な部材とすることにより、パワー半導体装置の電極の設計の自由度を増加させることができる。   As described above, when the heat transfer member 11 is a member that can conduct electricity with the outside of the power semiconductor element (semiconductor element 5), the degree of freedom in designing the electrode of the power semiconductor device can be increased.

(実施の形態5)
図8(A)は図1(A)と同様の平面図であり、図8(B)は図8(A)中の点線L10から図の上側向きに見た透視図である。また図8(C)は図8(A)中の点線L11から図の左側向きに、図8(D)は図8(A)中の点線L12から図の左側向きに見た透視図である。
(Embodiment 5)
FIG. 8A is a plan view similar to FIG. 1A, and FIG. 8B is a perspective view seen from the dotted line L10 in FIG. 8A upward. 8C is a perspective view seen from the dotted line L11 in FIG. 8A toward the left side of the figure, and FIG. 8D is a perspective view seen from the dotted line L12 in FIG. 8A toward the left side of the figure. .

図8(A),(B),(C),(D)を参照して、本実施の形態のパワー半導体装置の基本構成は図1の実施の形態1のパワー半導体装置と同様である。しかし本実施の形態においては、ケース1が大型になっており、ケース1内に収納される基板3および半導体素子5の数が実施の形態1に比べて増えている。   Referring to FIGS. 8A, 8B, 8C, and 8D, the basic configuration of the power semiconductor device of the present embodiment is the same as that of the power semiconductor device of the first embodiment shown in FIG. However, in the present embodiment, the case 1 is large, and the number of substrates 3 and semiconductor elements 5 housed in the case 1 is increased compared to the first embodiment.

具体的には、図8においては1つの大きなケース1の内部の収納スペースに、互いに間隔をあけて複数(たとえばここでは合計8つ)の基板3が配置されている。つまりX方向に4列、Y方向に2列の基板3が行列状に並んでおり、図8(A)のY方向上段の4つの基板3は左側から順に基板31、基板32、基板33、基板34となっており、図8(A)のY方向下段の4つの基板3は左側から順に基板35、基板36、基板37、基板38となっている。   Specifically, in FIG. 8, a plurality of (for example, a total of eight) substrates 3 are arranged in a storage space inside one large case 1 at intervals. That is, four rows 3 in the X direction and two rows in the Y direction are arranged in a matrix, and the four substrates 3 on the upper side in the Y direction in FIG. 8A are the substrate 31, the substrate 32, the substrate 33, The four substrates 3 on the lower stage in the Y direction in FIG. 8A are a substrate 35, a substrate 36, a substrate 37, and a substrate 38 in this order from the left side.

図8(B),(C),(D)に示すように、基板31〜38は、基板3と同様に、絶縁基板31a〜38aと、そのZ方向下側の主表面上の裏面電極31b〜38bと、絶縁基板31a〜38aのZ方向上側の主表面上の表面電極31c〜38cとにより構成されている。   As shown in FIGS. 8B, 8 </ b> C, and 8 </ b> D, similarly to the substrate 3, the substrates 31 to 38 include the insulating substrates 31 a to 38 a and the back electrode 31 b on the main surface on the lower side in the Z direction. To 38b and surface electrodes 31c to 38c on the main surface on the upper side in the Z direction of the insulating substrates 31a to 38a.

なお基板31〜38のそれぞれは、実施の形態1などの基板3と同様に、たとえば4つの半導体素子5が搭載され、ワイヤ17を用いた電気的接続がなされている。これらの基板31〜38のすべての裏面電極31b〜38bと互いに接するように、単一の大型のベース板15が接合されることにより、大型のケース1を含むパワー半導体装置が構成されている。図8においては実施の形態4と同様の小型の伝熱部材11が互いに間隔をあけて複数配置されているが、この態様に限らず、レイアウト上可能であれば、本実施の形態においても実施の形態1と同様の平面層11aを有する大型の伝熱部材11が接続されてもよい。   Each of the substrates 31 to 38 is mounted with, for example, four semiconductor elements 5 and electrically connected using the wires 17 in the same manner as the substrate 3 in the first embodiment. A single large base plate 15 is bonded so as to be in contact with all the back electrodes 31b to 38b of these substrates 31 to 38, whereby a power semiconductor device including the large case 1 is configured. In FIG. 8, a plurality of small heat transfer members 11 similar to those in the fourth embodiment are arranged with a space therebetween, but this is not restrictive, and the present embodiment is also implemented as long as layout is possible. A large heat transfer member 11 having the same flat layer 11a as in the first embodiment may be connected.

図8においては、単一のソース電極7aおよびドレイン電極7bが、各基板31〜38(の表面電極3c)と接続されている。そしてソース電極7aはそれに接続されるたとえば3つのソース端子7a1,7a2,7a3により、当該パワー半導体装置の外部と導電可能となっている。同様に、ドレイン電極7bはそれに接続されるたとえば3つのドレイン端子7b1,7b2,7b3により、当該パワー半導体装置の外部と導電可能となっている。ソース端子7a1,7a2,7a3およびドレイン端子7b1,7b2,7b3は、ケース1外に露出するように配置されている。一方、ゲート電極7cについては基板31〜38のそれぞれに対して1本ずつ、ケース1外に露出するようにZ方向上部に延びるように接続、配置されている。   In FIG. 8, a single source electrode 7a and drain electrode 7b are connected to the respective substrates 31 to 38 (surface electrodes 3c thereof). The source electrode 7a can be electrically connected to the outside of the power semiconductor device by, for example, three source terminals 7a1, 7a2 and 7a3 connected thereto. Similarly, the drain electrode 7b can be electrically connected to the outside of the power semiconductor device by, for example, three drain terminals 7b1, 7b2, and 7b3 connected thereto. The source terminals 7a1, 7a2, 7a3 and the drain terminals 7b1, 7b2, 7b3 are arranged so as to be exposed to the outside of the case 1. On the other hand, one gate electrode 7c is connected to each of the substrates 31 to 38 so as to extend upward in the Z direction so as to be exposed outside the case 1.

以上の点において図8は図1と異なっているが、これ以外の本実施の形態(図8)の構成は、実施の形態1(図1)の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。   FIG. 8 is different from FIG. 1 in the above points, but the configuration of the present embodiment (FIG. 8) other than this is substantially the same as the configuration of Embodiment 1 (FIG. 1), and therefore the same elements are used. Are denoted by the same reference numerals, and the description thereof will not be repeated.

次に、本実施の形態の作用効果について説明する。
大電流が流れるインバータを駆動させるための、たとえば電車向けパワーモジュールにおいては、本実施の形態のように大きなパワー半導体装置(大きなケース1を有するパッケージ)を用いる場合がある。この場合、封止部材9内の温度分布のばらつきが、実施の形態1などよりもさらに大きくなり、図3および図4の低温領域21のようなガスの拡散が困難な領域が拡大する可能性がある。このため、本実施の形態のように大型のパワー半導体装置に対して伝熱部材11を用いて封止部材9を加温すれば、伝熱部材11が存在しない場合に比べていっそう大きな作用効果を得ることができる。
Next, the effect of this Embodiment is demonstrated.
In a power module for trains, for example, for driving an inverter through which a large current flows, a large power semiconductor device (package having a large case 1) may be used as in this embodiment. In this case, the variation in the temperature distribution in the sealing member 9 becomes even larger than that in the first embodiment, and a region where gas diffusion is difficult such as the low temperature region 21 in FIGS. 3 and 4 may be expanded. There is. For this reason, if the sealing member 9 is heated using the heat transfer member 11 for a large-sized power semiconductor device as in the present embodiment, the effect is much greater than when the heat transfer member 11 is not present. Can be obtained.

本実施の形態においても、他の実施の形態と同様に、複数の電極部材7のうち伝熱部材12との距離が最も短い電極部材7との最短距離が25mm以下の位置に配置されることが好ましい。また本実施の形態においても、半導体素子5の表面の温度T1と、封止部材最上面9aの最小温度T2との差が120℃以下であることが好ましい。   Also in this embodiment, as in the other embodiments, the shortest distance from the electrode member 7 having the shortest distance to the heat transfer member 12 among the plurality of electrode members 7 is arranged at a position of 25 mm or less. Is preferred. Also in the present embodiment, it is preferable that the difference between the surface temperature T1 of the semiconductor element 5 and the minimum temperature T2 of the sealing member uppermost surface 9a is 120 ° C. or less.

なお本実施の形態の伝熱部材11は、実施の形態1〜3と同様にソース電極7aなどの電極部材7とは別の部材である。しかし本実施の形態のように単一のパワー半導体装置内に多数配置される伝熱部材11は、(実施の形態4と同様に)パワー半導体素子(半導体素子5)の外部と導電可能な部材であってもよい。ただし上記のように、本実施の形態の伝熱部材11は、電極部材7との最短距離が25mm以下などの制約を有することが好ましい。このため、たとえば複数の電極部材7を有する通常の(比較例としての)半導体装置の、一の電極部材7から見た他の電極部材7は、本実施の形態の伝熱部材11には含まれないものとする。   The heat transfer member 11 according to the present embodiment is a member different from the electrode member 7 such as the source electrode 7a as in the first to third embodiments. However, as in the present embodiment, a large number of heat transfer members 11 arranged in a single power semiconductor device are members that can be electrically connected to the outside of the power semiconductor element (semiconductor element 5) (similar to the fourth embodiment). It may be. However, as described above, the heat transfer member 11 according to the present embodiment preferably has a restriction such that the shortest distance from the electrode member 7 is 25 mm or less. Therefore, for example, another electrode member 7 as viewed from one electrode member 7 of a normal semiconductor device (as a comparative example) having a plurality of electrode members 7 is included in the heat transfer member 11 of the present embodiment. Shall not.

上記のように伝熱部材11がパワー半導体素子(半導体素子5)の外部と導電可能な部材とすることにより、パワー半導体装置の電極の設計の自由度を増加させることができる。   As described above, when the heat transfer member 11 is a member that can conduct electricity with the outside of the power semiconductor element (semiconductor element 5), the degree of freedom in designing the electrode of the power semiconductor device can be increased.

本実施例においては、特に実施の形態4に示すような小型の(平面層11aを有さない)伝熱部材11を有するパワー半導体装置を駆動させたときの封止部材9内の熱拡散、および沿面絶縁耐性(パワー半導体装置の信頼性)を調べている。まず図9(A)〜(E)を用いて、本実施例の調査に用いたサンプルについて説明する。   In this example, thermal diffusion in the sealing member 9 when the power semiconductor device having the small heat transfer member 11 (not having the planar layer 11a) as shown in the fourth embodiment is driven, We are also investigating creepage insulation resistance (reliability of power semiconductor devices). First, the sample used for the investigation of this example will be described with reference to FIGS.

図9(A)〜(E)を参照して、これらはそれぞれ調査用のパワー半導体装置のサンプル1,2,3,4,5に相当する。具体的には、図9(A)のサンプル1は、図2(A)に示す比較例のパワー半導体装置であり、伝熱部材11を有さない構成である。図9(B)のサンプル2は、サンプル1に対して図に示す位置(表面電極3c上)に、実施の形態4に示す小型の伝熱部材11が2本接続されている。ここでは(複数の下記最短距離Dのうち当該距離が最も長くなる:以下の各サンプルについて同じ)電極部材7としてのゲート電極7cの、これとの距離が最も近い(図の右側の)伝熱部材11との最短距離Dが40mmとなっている。   Referring to FIGS. 9A to 9E, these correspond to samples 1, 2, 3, 4, and 5 of the power semiconductor device for investigation, respectively. Specifically, Sample 1 in FIG. 9A is a power semiconductor device of a comparative example shown in FIG. 2A and has a configuration without the heat transfer member 11. In the sample 2 of FIG. 9B, two small heat transfer members 11 shown in the fourth embodiment are connected to the position shown in the drawing (on the surface electrode 3c) with respect to the sample 1. Here, the distance is the longest among a plurality of the shortest distances D described below (the same applies to the following samples). The heat transfer of the gate electrode 7c as the electrode member 7 is the shortest (on the right side in the figure). The shortest distance D with the member 11 is 40 mm.

同様に、図9(C)のサンプル3は、サンプル1に対して図に示す位置(表面電極3c上)に、実施の形態4に示す小型の伝熱部材11が2本接続されている。ここでは電極部材7としてのゲート電極7cの、これとの距離が最も近い(図の右側の)伝熱部材11との最短距離Dが25mmとなっている。図9(D)のサンプル4は、サンプル1に対して図に示す位置(表面電極3c上)に、実施の形態4に示す小型の伝熱部材11が4本接続されている。ここでは電極部材7としてのゲート電極7cの、これとの距離が最も近い(図の右上の)伝熱部材11との最短距離Dが20mmとなっている。図9(E)のサンプル5は、サンプル1に対して図に示す位置(表面電極3c上)に、実施の形態4に示す小型の伝熱部材11が6本接続されている。ここでは電極部材7としてのゲート電極7cの、これとの距離が最も近い(図の右上の)伝熱部材11との最短距離Dが20mmとなっている。   Similarly, in the sample 3 of FIG. 9C, two small heat transfer members 11 shown in the fourth embodiment are connected to the sample 1 at the position shown on the drawing (on the surface electrode 3c). Here, the shortest distance D between the gate electrode 7c as the electrode member 7 and the heat transfer member 11 with the shortest distance (on the right side in the drawing) is 25 mm. In the sample 4 in FIG. 9D, four small heat transfer members 11 shown in the fourth embodiment are connected to the sample 1 at the position shown on the drawing (on the surface electrode 3c). Here, the shortest distance D between the gate electrode 7c as the electrode member 7 and the heat transfer member 11 with the shortest distance (upper right in the drawing) is 20 mm. In the sample 5 of FIG. 9E, six small heat transfer members 11 shown in the fourth embodiment are connected to the sample 1 at the position shown on the drawing (on the surface electrode 3c). Here, the shortest distance D between the gate electrode 7c as the electrode member 7 and the heat transfer member 11 with the shortest distance (upper right in the drawing) is 20 mm.

図9(F)を参照して、サンプル1〜5のいずれについても、ワイヤ17のZ方向最上部から封止部材最上面9aまでのZ方向に関する高さ(距離)を25mmとしている。またサンプル1〜5のいずれについても、表面電極3cのZ方向最上部から封止部材最上面9aまでのZ方向に関する高さ(距離)を28mmとしている。   With reference to FIG. 9 (F), the height (distance) regarding the Z direction from the Z direction uppermost part of the wire 17 to the sealing member uppermost surface 9a is set to 25 mm in any of the samples 1 to 5. In any of Samples 1 to 5, the height (distance) in the Z direction from the uppermost portion in the Z direction of the surface electrode 3c to the uppermost surface 9a of the sealing member is set to 28 mm.

各サンプル1〜5の基板3は、絶縁基板3aが窒化珪素(Si34)により、裏面および表面電極3b,3cが銅のパターンとして形成された。表面電極3cに接するように接合される半導体素子5(チップ)は炭化珪素(SiC)により形成されており、その表面上にはMOSFETおよびショットキーバリアダイオードが多数実装された。また裏面電極3bに接するように接合されるベース板15は、アルミニウム炭化珪素により形成された。また電極部材7は超音波接合により表面電極3c上に接続された。ワイヤ17は超音波接合により表面電極3c上および半導体素子5上などに接続された。 In the substrates 3 of the samples 1 to 5, the insulating substrate 3a was formed of silicon nitride (Si 3 N 4 ), and the back surface and the surface electrodes 3b and 3c were formed as a copper pattern. The semiconductor element 5 (chip) bonded so as to be in contact with the surface electrode 3c is formed of silicon carbide (SiC), and a number of MOSFETs and Schottky barrier diodes are mounted on the surface thereof. Base plate 15 joined so as to be in contact with back electrode 3b was formed of aluminum silicon carbide. The electrode member 7 was connected on the surface electrode 3c by ultrasonic bonding. The wire 17 was connected to the surface electrode 3c and the semiconductor element 5 by ultrasonic bonding.

ベース板15の平面視における周囲を囲むように形成されたポリフェニレンサルファイド製のケース1が、ベース板15に接着されることにより、基板3および半導体素子5などがケース1内に配置された態様となった。なおベース板15とケース1との接着は、シリコーン系の接着剤によりなされた。ここへニッケルめっきがなされた銅製の伝熱部材11が超音波接合により各サンプル1〜5の通りに基板3に接続された後、封止部材9の供給により基板3および半導体素子5などがケース1内にて封止された。   A case in which the case 1 made of polyphenylene sulfide formed so as to surround the periphery of the base plate 15 in plan view is bonded to the base plate 15 so that the substrate 3 and the semiconductor element 5 are arranged in the case 1 became. The base plate 15 and the case 1 were bonded with a silicone adhesive. Here, after the nickel-plated copper heat transfer member 11 is connected to the substrate 3 as in each of the samples 1 to 5 by ultrasonic bonding, the substrate 3 and the semiconductor element 5 are cased by the supply of the sealing member 9. 1 was sealed.

本実施例において封止部材9としての封止樹脂としてはベースポリマー(重量平均分子量38700)が用いられ、これに白金とジビニルテトラメチルジシロキサンとの錯体(本組成物中の白金金属が重量単位で5ppmとなる量)を均一に混合してシリコーンゲル組成物を調製したものが用いられた。このシリコーンゲル組成物が真空脱泡された後に、当該シリコーンゲル組成物を、上記のベース板15とケース1とが接着された中間段階のパワー半導体装置に流し込み、70℃で60分間加熱した。   In this embodiment, a base polymer (weight average molecular weight 38700) is used as the sealing resin as the sealing member 9, and a complex of platinum and divinyltetramethyldisiloxane (the platinum metal in the composition is expressed in weight units). A silicone gel composition was prepared by uniformly mixing (amount of 5 ppm). After the silicone gel composition was vacuum degassed, the silicone gel composition was poured into an intermediate power semiconductor device in which the base plate 15 and the case 1 were bonded, and heated at 70 ° C. for 60 minutes.

なお、このシリコーンゲルの針入度は40、tanδ(0.1Hz)は0.30であった。ここでのtanδとは損失係数と呼ばれ、レオメータにより測定できる値である。この値が小さいほど衝撃吸収性に優れることを意味している。   This silicone gel had a penetration of 40 and tan δ (0.1 Hz) of 0.30. Here, tan δ is called a loss factor and is a value that can be measured by a rheometer. The smaller this value, the better the shock absorption.

以上の中間段階のパワー半導体装置にフタ13を取り付けることにより、パワー半導体装置のサンプル1〜5が形成され、当該サンプル1〜5に対して信頼性試験がなされた。次に、当該信頼性試験の手法について説明する。   By attaching the lid 13 to the power semiconductor device in the above intermediate stage, samples 1 to 5 of the power semiconductor device were formed, and a reliability test was performed on the samples 1 to 5. Next, the reliability test method will be described.

パワー半導体装置の信頼性試験は、サンプル1〜5を恒温恒湿槽に投入した後、パワーサイクル試験を実施し、その後のサンプル1〜5の絶縁耐性を評価することにより行なわれた。恒温恒湿槽内においては85℃85%の温湿度条件下に16時間、パワー半導体装置を投入し、その後85℃60分で結露水を乾燥除去する。結露水を除去後、室温までパワー半導体装置を冷却し、パワーサイクル試験を実施した。パワーサイクル試験中の規定回数おきに基板3とベース板15との間に8000Vの高電圧を印加し、絶縁耐性を測定した。パワーサイクル試験は300kサイクルまで実施し、上記の高電圧の印加時に絶縁耐性の劣化に起因する沿面の絶縁破壊の有無を確認することによって、サンプル1〜5の信頼性を確認した。   The reliability test of the power semiconductor device was performed by putting the samples 1 to 5 into a constant temperature and humidity chamber, and then performing a power cycle test and evaluating the insulation resistance of the samples 1 to 5 thereafter. In the constant temperature and humidity chamber, the power semiconductor device is loaded for 16 hours under a temperature and humidity condition of 85 ° C. and 85%, and then the condensed water is dried and removed at 85 ° C. for 60 minutes. After removing condensed water, the power semiconductor device was cooled to room temperature and a power cycle test was performed. A high voltage of 8000 V was applied between the substrate 3 and the base plate 15 every specified number of times during the power cycle test, and the insulation resistance was measured. The power cycle test was conducted up to 300 k cycles, and the reliability of Samples 1 to 5 was confirmed by confirming the presence or absence of creeping breakdown due to the deterioration of the insulation resistance when the high voltage was applied.

図9(G)を参照して、封止部材9の温度は、図9(G)に示すX座標が1〜4の4点のいずれかであり、かつY座標が1〜3の3点のいずれかである合計12点(12か所)における封止部材最上面9aの温度として、熱電対を用いて測定した。互いに隣り合うX座標1,2,3,4の間隔、および互いに隣り合うY座標1,2,3の間隔は25mmとなっている。以下においては、封止部材9の最上面の温度を測定する点のうち、たとえばX座標が1、Y座標が2の点を(1,2)と表記することにする。   With reference to FIG. 9 (G), the temperature of the sealing member 9 is one of four points where the X coordinate shown in FIG. 9 (G) is 1 to 4, and the Y coordinate is 3 points. The temperature of the sealing member uppermost surface 9a at a total of 12 points (12 places) was measured using a thermocouple. The distance between adjacent X coordinates 1, 2, 3, 4 and the distance between adjacent Y coordinates 1, 2, 3 are 25 mm. In the following, among the points at which the temperature of the uppermost surface of the sealing member 9 is measured, for example, a point having an X coordinate of 1 and a Y coordinate of 2 will be expressed as (1, 2).

また、連続動作時温度(Tj(op))の測定は、MOSFETの温度センサを用いて実施した。定格の6500Vでモジュールを動作させ、このときの半導体素子5の表面温度(チップ温度)を測定し、定格動作時のチップ温度(TOPmax)が175℃を超えないように動作制御した。またこのように高電圧の6500Vでモジュールを動作させたときの封止部材9の各点の温度を調べた。したがって基本的に、封止部材最上面9aの温度を測定する時点における半導体素子5の表面の温度は175℃であり、この温度と封止部材最上面9aの各点(12点)の温度との差を調べた。その結果を以下の表1に示す。 The temperature during continuous operation (Tj (op)) was measured using a MOSFET temperature sensor. The module was operated at the rated 6500 V, the surface temperature (chip temperature) of the semiconductor element 5 at this time was measured, and the operation was controlled so that the chip temperature (T OPmax ) at the rated operation did not exceed 175 ° C. Further, the temperature of each point of the sealing member 9 when the module was operated at a high voltage of 6500 V was examined. Therefore, basically, the temperature of the surface of the semiconductor element 5 at the time of measuring the temperature of the sealing member uppermost surface 9a is 175 ° C., and this temperature and the temperature of each point (12 points) of the sealing member uppermost surface 9a I examined the difference. The results are shown in Table 1 below.

Figure 2016139691
Figure 2016139691

表1における「熱電対温度」は封止部材最上面9aの各点(12点)の温度を熱電対で測定した値を示しており、「チップとの温度差」は上記封止部材最上面9aの各点(12点)の温度と半導体素子5の表面(175℃)との温度差を示している。また表中の下線は、各サンプルにて計測された最低温度を示している。   “Thermocouple temperature” in Table 1 indicates a value obtained by measuring the temperature at each point (12 points) of the sealing member uppermost surface 9a with a thermocouple, and “temperature difference from the chip” is the uppermost surface of the sealing member. A temperature difference between each point 9a (12 points) and the surface of the semiconductor element 5 (175 ° C.) is shown. The underline in the table indicates the minimum temperature measured for each sample.

表1を参照して、比較例(図2)に相当する、すなわち伝熱部材11を設けないサンプル1においては(4,3)における温度が47℃となり、チップとの温度差が128℃となった。またパワーサイクル試験を120kサイクル行なった時点で、ちょうど(4,3)の位置のZ方向真下の基板3の部分に気泡の発生および絶縁破壊痕を確認した。   Referring to Table 1, in sample 1 corresponding to the comparative example (FIG. 2), that is, in which no heat transfer member 11 is provided, the temperature in (4, 3) is 47 ° C., and the temperature difference from the chip is 128 ° C. became. When the power cycle test was performed for 120 k cycles, generation of bubbles and traces of dielectric breakdown were confirmed in the portion of the substrate 3 just below the Z direction at the position (4, 3).

サンプル1のパワー半導体装置は、半導体素子5の加熱によりその周囲の水分が気化するが、伝熱部材11が配置されず封止部材9の温度が上がっていないためにこの気化速度よりも周囲のシリコーンゲルの拡散速度が小さいために気泡が発生していると考えられる。またその結果、その後の絶縁耐性評価の際に気泡の発生した部位において絶縁破壊を生じたものと考えられる。また、気泡の発生した部位はシリコーンゲルの表面温度が低いことから、この領域のシリコーンゲルの透湿度が他のエリアよりも特に低かったこともこの部分で気泡発生した要因であると思われる。   In the power semiconductor device of sample 1, the surrounding moisture is vaporized by heating of the semiconductor element 5, but since the heat transfer member 11 is not arranged and the temperature of the sealing member 9 is not raised, the surroundings are faster than the vaporization rate. It is considered that bubbles are generated because the diffusion rate of the silicone gel is small. As a result, it is considered that dielectric breakdown occurred at the site where bubbles were generated during the subsequent evaluation of insulation resistance. Moreover, since the surface temperature of the silicone gel is low at the site where the bubbles are generated, it is considered that the moisture permeability of the silicone gel in this region is particularly lower than that in other areas, which is also a factor in generating bubbles in this portion.

サンプル2は、本発明の伝熱部材11が2本接続された例であるが、この例においては、サンプル1に比べて絶縁破壊までのパワーサイクルのサイクル数が210kサイクルにまで増加し、チップとの温度差が123℃にまで減少している。つまり伝熱部材11の配置により、サンプル1に比べて封止部材9の温度が上昇し、気泡が封止部材9内などに滞留しにくくなった結果、絶縁破壊を生じにくくなったものと考えられる。つまりサンプル2においてはサンプル1に比べて信頼性が向上したものといえる。   Sample 2 is an example in which two heat transfer members 11 of the present invention are connected. In this example, the number of power cycles until breakdown is increased to 210 k cycles as compared to sample 1, and the chip And the temperature difference is reduced to 123 ° C. That is, the arrangement of the heat transfer member 11 raises the temperature of the sealing member 9 as compared to the sample 1, and the bubbles are less likely to stay in the sealing member 9 or the like. It is done. In other words, it can be said that the reliability of Sample 2 is improved as compared to Sample 1.

一方、サンプル3,4,5については、伝熱部材11を配置しているが、これとゲート電極7cとの距離をサンプル2(40mm)よりも短く(25mm以下)している。このようにすれば、所定のパワーサイクル回数を経た後でなお絶縁破壊が起きておらず、サンプル2よりも信頼性がいっそう向上している。またこのときのチップとの温度差はすべて120℃以下になっており、封止部材9の温度がサンプル2よりもさらに上昇したことから、低温領域21(図3参照)においても封止部材9内での気泡の拡散がいっそう進み、絶縁破壊が抑制されたものと考えられる。   On the other hand, the samples 3, 4 and 5 are provided with the heat transfer member 11, but the distance between the heat transfer member 11 and the gate electrode 7c is shorter than the sample 2 (40 mm) (25 mm or less). In this way, dielectric breakdown does not occur after a predetermined number of power cycles, and the reliability is further improved as compared with sample 2. In addition, the temperature difference with the chip at this time is all 120 ° C. or less, and the temperature of the sealing member 9 is further increased from that of the sample 2, so that the sealing member 9 is also in the low temperature region 21 (see FIG. 3). It is thought that the diffusion of bubbles in the interior further progressed and the dielectric breakdown was suppressed.

以上の結果より、伝熱部材11とこれに最も近い電極7(ここではゲート電極7c)との距離を25mm以下にすれば、パワー半導体装置の駆動時に昇温してもその信頼性を確保できることが明らかとなった。また、封止部材9を構成するシリコーンゲルの表面温度とチップ温度との差が120℃以下であればパワー半導体装置の信頼性を確保できることも明らかとなった。   From the above results, if the distance between the heat transfer member 11 and the nearest electrode 7 (here, the gate electrode 7c) is 25 mm or less, the reliability can be ensured even if the temperature is raised during driving of the power semiconductor device. Became clear. It has also been clarified that the reliability of the power semiconductor device can be ensured if the difference between the surface temperature of the silicone gel constituting the sealing member 9 and the chip temperature is 120 ° C. or less.

なおここでは複数の電極部材7のうち、特にゲート電極7cと伝熱部材11との距離を25mm以下にすることにより所望の作用効果を奏している。ここでゲート電極7cに着目した理由は、ゲート電極7cはソース電極7aなどよりも断面積が小さく流れる電流値が小さいことから温度上昇が起こりにくいためである。したがってゲート電極7cの近くにおいては他の電極7a,7bの近くに比べて、封止部材9が低温領域になりやすく気泡が生じやすいと考えられる。   Here, among the plurality of electrode members 7, a desired effect is achieved particularly by setting the distance between the gate electrode 7 c and the heat transfer member 11 to 25 mm or less. The reason why the gate electrode 7c is focused here is that the gate electrode 7c has a smaller cross-sectional area than the source electrode 7a and the like, and the current value flowing therethrough is small. Therefore, it is considered that the sealing member 9 tends to be in a low temperature region near the gate electrode 7c, and bubbles are likely to be generated, as compared with the vicinity of the other electrodes 7a and 7b.

そこで、他の電極7a,7bに比べて温度が上昇しにくいゲート電極7cの近く(25mm以下の位置)に伝熱部材11を配置することにより、ゲート電極7cの近くにおける封止部材9の温度をより効率的に上昇させることができるため、信頼性を向上させることができたと考えられる。   Therefore, the temperature of the sealing member 9 near the gate electrode 7c is arranged by arranging the heat transfer member 11 near the gate electrode 7c (position of 25 mm or less) where the temperature is less likely to rise compared to the other electrodes 7a and 7b. It can be considered that the reliability can be improved because it can be increased more efficiently.

また上記と異なる考え方として、電極部材7の近く(25mm以下)の、比較的に封止部材9が温まりやすい領域に伝熱部材11を設けることにより、当該電極部材7からの熱を伝熱部材11からより効率的に封止部材9に伝えることができるといえる。この観点からも、電極部材7の近く(25mm以下)に伝熱部材11を設けることが好ましいともいえる。   Further, as a different idea from the above, by providing the heat transfer member 11 in a region near the electrode member 7 (25 mm or less) where the sealing member 9 is relatively easy to warm, heat from the electrode member 7 is transferred. 11 can be transmitted to the sealing member 9 more efficiently. From this point of view, it can be said that it is preferable to provide the heat transfer member 11 near the electrode member 7 (25 mm or less).

本実施の形態においては、特に実施の形態1〜3に示すような、平面層11aを有する大型の伝熱部材11、またはリボンワイヤとしての伝熱部材12を有するパワー半導体装置を駆動させた時の封止部材9内の熱拡散、および沿面絶縁耐性を調べている。まず図10(A)〜(C)を用いて、本実施例の調査に用いたサンプルについて説明する。   In the present embodiment, when a large-sized heat transfer member 11 having a flat layer 11a or a power semiconductor device having a heat transfer member 12 as a ribbon wire is driven as shown in the first to third embodiments. The heat diffusion in the sealing member 9 and the creeping insulation resistance are examined. First, a sample used for the investigation of this example will be described with reference to FIGS.

図10(A)〜(C)を参照して、これらはそれぞれ調査用のパワー半導体装置のサンプル6,7,8〜10に相当する。具体的には、図10(A)のサンプル6は、図1(A),(C)に示す実施の形態1のパワー半導体装置であり、封止部材最上面9aから露出する伝熱部材11を有する構成である。図10(B)のサンプル7は、図5(A),(C)に示す実施の形態2のパワー半導体装置であり、封止部材最上面9aから露出しない伝熱部材11を有する構成である。図10(C)のサンプル8,9,10は、図6(A),(C),(D)に示す実施の形態3のパワー半導体装置であり、リボンワイヤとしての伝熱部材12を有する構成である。   Referring to FIGS. 10A to 10C, these correspond to samples 6, 7, 8 to 10 of the power semiconductor device for investigation, respectively. Specifically, the sample 6 in FIG. 10A is the power semiconductor device of the first embodiment shown in FIGS. 1A and 1C, and the heat transfer member 11 exposed from the sealing member uppermost surface 9a. It is the structure which has. A sample 7 in FIG. 10B is the power semiconductor device of the second embodiment shown in FIGS. 5A and 5C, and has a configuration having the heat transfer member 11 that is not exposed from the sealing member uppermost surface 9a. . Samples 8, 9, and 10 in FIG. 10C are the power semiconductor device of Embodiment 3 shown in FIGS. 6A, 6C, and 6D, and have a heat transfer member 12 as a ribbon wire. It is a configuration.

なおサンプル6,7においては、ゲート電極7cとこれに最も近い伝熱部材11との最短距離Dは25mmとしており、サンプル8においては、隣り合う2つの伝熱部材12間の最短距離Dを35mm、サンプル9においては当該Dを25mm、サンプル10においては当該Dを15mmとしている。   In samples 6 and 7, the shortest distance D between the gate electrode 7c and the closest heat transfer member 11 is 25 mm, and in sample 8, the shortest distance D between two adjacent heat transfer members 12 is 35 mm. In the sample 9, the D is 25 mm, and in the sample 10, the D is 15 mm.

これらのサンプルを構成する各種部材の材質、各サンプルの製造方法、および信頼性試験の方法は、サンプル8〜10の伝熱部材12がアルミニウムにより形成される点を除き、実施例1と同様であるため、その説明を繰り返さない。サンプル6〜10に対してサンプル1〜5と同様の調査を行なった結果を以下の表2に示す。   The materials of the various members constituting these samples, the method for producing each sample, and the method for reliability testing are the same as in Example 1 except that the heat transfer members 12 of samples 8 to 10 are formed of aluminum. Therefore, the description will not be repeated. Table 2 below shows the results of the same investigation as Samples 1 to 5 for Samples 6 to 10.

Figure 2016139691
Figure 2016139691

表2を参照して、サンプル6〜8のいずれについても、所定のパワーサイクル回数を経た後でなお絶縁破壊が起きておらず、信頼性を確保していた。またこれらのチップとの温度差はいずれも、実施例1と同様に120℃以下となっている。   Referring to Table 2, in all of Samples 6 to 8, dielectric breakdown did not occur after a predetermined number of power cycles, and reliability was ensured. In addition, the temperature difference between these chips is 120 ° C. or less as in the first embodiment.

以上の結果より、特に伝熱部材とこれに最も近い電極7(ここではゲート電極7c)との距離を25mm以下にすれば、たとえ伝熱部材11に平面層11aが設けられても、実施例1の特にサンプル3〜5と同様に高い信頼性を確保できることが明らかとなった。また特に伝熱部材とこれに最も近い電極7(ここではゲート電極7c)との距離を25mm以下にすれば、たとえ伝熱部材の種類を伝熱部材11から伝熱部材12に変更しても(すなわちリボンワイヤを伝熱部材として用いたサンプル9,10においても)、実施例1の特にサンプル3〜5と同様に高い信頼性を確保できることが明らかとなった。また、封止部材9を構成するシリコーンゲルの表面温度とチップ温度との差が120℃以下であればパワー半導体措置の信頼性を確保できることも明らかとなった。   From the above results, in particular, if the distance between the heat transfer member and the closest electrode 7 (here, the gate electrode 7c) is 25 mm or less, even if the heat transfer member 11 is provided with the flat layer 11a, the embodiment It became clear that high reliability can be ensured similarly to Samples 3 to 5 of 1. In particular, if the distance between the heat transfer member and the closest electrode 7 (here, the gate electrode 7c) is 25 mm or less, even if the type of the heat transfer member is changed from the heat transfer member 11 to the heat transfer member 12. (In other words, in the samples 9 and 10 using the ribbon wire as the heat transfer member), it became clear that high reliability can be ensured similarly to the samples 3 to 5 of the first embodiment. It has also been clarified that the reliability of the power semiconductor measures can be ensured if the difference between the surface temperature of the silicone gel constituting the sealing member 9 and the chip temperature is 120 ° C. or less.

サンプル6においてチップ温度との差が最も小さくなっているのは、伝熱部材11が封止部材9の表面から露出しているために、封止部材9の表面がより暖められやすかったためであると考えられる。伝熱部材11の全体が封止部材9の内部に埋め込まれるサンプル7(実施の形態2)のような構成でもよいが、伝熱部材11の一部が封止部材9の表面から露出するサンプル6(実施の形態1)の構成を用いることにより、封止部材9の表面まで十分に温められ、封止部材9の透湿度が向上する。このため、気泡を抑制する観点からはサンプル7よりもサンプル6の方がより好ましいといえる。   The difference between the chip temperature and the sample 6 is the smallest in the sample 6 because the heat transfer member 11 is exposed from the surface of the sealing member 9 and thus the surface of the sealing member 9 is more easily heated. it is conceivable that. Although the structure like the sample 7 (Embodiment 2) in which the entirety of the heat transfer member 11 is embedded in the sealing member 9 may be used, a sample in which a part of the heat transfer member 11 is exposed from the surface of the sealing member 9 By using the configuration of 6 (Embodiment 1), the surface of the sealing member 9 is sufficiently warmed, and the moisture permeability of the sealing member 9 is improved. For this reason, it can be said that the sample 6 is more preferable than the sample 7 from the viewpoint of suppressing bubbles.

本実施の形態においては、特に実施の形態5に示すような1つのケース1内に複数(たとえば8つ)の基板3を有する大型のパワー半導体装置を駆動させた時の封止部材9内の熱拡散、および沿面絶縁耐性について調べている。まず図11〜13を用いて、本実施例の調査に用いたサンプルについて説明する。   In the present embodiment, in particular, in a sealing member 9 when a large-sized power semiconductor device having a plurality of (for example, eight) substrates 3 is driven in one case 1 as shown in the fifth embodiment. Investigating thermal diffusion and creeping insulation resistance. First, the sample used for the investigation of this example will be described with reference to FIGS.

図11(A)〜(D)を参照して、これは調査用のパワー半導体装置のサンプル11に相当する。図11(A)〜(D)は図8(A)〜(D)に示す実施の形態5のパワー半導体装置と基本的に同様の構成を有しているが、伝熱部材11を有さない点において図11は図8と異なっている。この意味で図11のサンプル11は実施の形態5に対する比較例のサンプルとなっている。これ以外の図11(A)〜(D)のサンプル11(比較例)の構成は、図8(A)〜(D)の実施の形態5の構成とほぼ同じであるため同一の要素については同一の符号を付し、その説明は繰り返さない。   Referring to FIGS. 11A to 11D, this corresponds to a sample 11 of the power semiconductor device for investigation. 11A to 11D have basically the same configuration as the power semiconductor device of the fifth embodiment shown in FIGS. 8A to 8D, but have a heat transfer member 11. FIG. 11 differs from FIG. 8 in that there is no point. In this sense, the sample 11 in FIG. 11 is a sample for comparison with the fifth embodiment. Other than this, the configuration of the sample 11 (comparative example) in FIGS. 11A to 11D is almost the same as the configuration of the fifth embodiment in FIGS. The same reference numerals are given and description thereof will not be repeated.

図12(A)〜(D)を参照して、これは調査用のパワー半導体装置のサンプル12に相当する。図12(A)〜(D)は図8(A)〜(D)に示す実施の形態5のパワー半導体装置と基本的に同様の構成を有しており、図8と同様に実施の形態4と同様の小型の伝熱部材11が複数配置されている。   Referring to FIGS. 12A to 12D, this corresponds to the sample 12 of the power semiconductor device for investigation. 12A to 12D have basically the same configuration as the power semiconductor device of the fifth embodiment shown in FIGS. 8A to 8D, and the embodiment is similar to FIG. A plurality of small heat transfer members 11 similar to 4 are arranged.

図13(A)〜(D)を参照して、これは調査用のパワー半導体装置のサンプル13に相当する。図13(A)〜(D)においても伝熱部材11が複数配置されているが、その形状および態様が図12(サンプル12:実施の形態5)とは異なっている。   Referring to FIGS. 13A to 13D, this corresponds to the sample 13 of the power semiconductor device for investigation. 13A to 13D, a plurality of heat transfer members 11 are arranged, but their shapes and modes are different from those in FIG. 12 (sample 12: Embodiment 5).

このことを説明するために、特に図11(A),図13(A)においては、電極部材7のソース電極7a、ドレイン電極7b、ゲート電極7cのいずれからの最短距離もが25mmを超える領域を、領域51として示している。   In order to explain this, particularly in FIGS. 11A and 13A, the shortest distance from any of the source electrode 7a, the drain electrode 7b, and the gate electrode 7c of the electrode member 7 exceeds 25 mm. Is shown as region 51.

サンプル13の伝熱部材11は、電極部材7のいずれか(ソース電極7aまたはドレイン電極7b)の一部と接続されて両者が一体となるような態様となっており、そこから上記の領域51に達するように、基板3の主表面に沿って延びている。そして伝熱部材11は、領域51の全体において実施の形態1の平面層11aと同様の態様の平面層11aを有するように、たとえばX方向の左右側(Y方向の上下側)双方に広がっている。その結果、サンプル13の伝熱部材11および複数の電極部材7のすべてのうちいずれかとの最短距離が必ず25mmを超える領域がサンプル13内に存在しなくなる。   The heat transfer member 11 of the sample 13 is connected to a part of any one of the electrode members 7 (the source electrode 7a or the drain electrode 7b) so that both are integrated, and from there, the region 51 described above is formed. To extend along the main surface of the substrate 3. The heat transfer member 11 spreads on both the left and right sides in the X direction (up and down sides in the Y direction), for example, so that the entire region 51 has the flat layer 11a in the same manner as the flat layer 11a in the first embodiment. Yes. As a result, a region in which the shortest distance between any one of the heat transfer member 11 and the plurality of electrode members 7 of the sample 13 exceeds 25 mm does not always exist in the sample 13.

つまり領域51はもともと、いずれの電極部材7から見ても最短距離が25mmを超える領域である。しかしこの領域51に電極部材7に接続されそこから延びる伝熱部材11が配置されることにより、当該伝熱部材11を電極部材7と同等の機能を有する(電極部材7として)見ることができるため、領域51も当該(伝熱部材11としての)電極部材7からの距離が25mm以下となる。これにより領域51も、他の領域と同様に、いずれかの電極部材7からの距離が25mm以下であることになる。   That is, the region 51 is originally a region where the shortest distance exceeds 25 mm when viewed from any electrode member 7. However, by arranging the heat transfer member 11 connected to and extending from the electrode member 7 in this region 51, the heat transfer member 11 can be seen to have the same function as the electrode member 7 (as the electrode member 7). Therefore, the distance from the electrode member 7 (as the heat transfer member 11) is also 25 mm or less in the region 51. Thereby, similarly to the other areas, the distance from any one of the electrode members 7 is 25 mm or less in the area 51 as well.

平面層11aは電気伝導を目的として取り付けられたものであり、ソース電極7aなどと連続しているため、平面層11aにも通電がなされている。しかし平面層11aを含む伝熱部材11からパワー半導体装置の外部への導電はなされていない。   The planar layer 11a is attached for the purpose of electrical conduction, and is continuous with the source electrode 7a and the like, and therefore, the planar layer 11a is also energized. However, there is no electrical conduction from the heat transfer member 11 including the flat layer 11a to the outside of the power semiconductor device.

これらのサンプルを構成する各種部材の材質、各サンプルの製造方法、および信頼性試験の方法は、実施例1と同様であるため、その説明を繰り返さない。なお再度図11(A)を参照して、サンプル11〜13のいずれについても、封止部材9の温度は、図11(A)に示すA,B,Cの3点における封止部材最上面9aの温度として、熱電対を用いて測定した。   Since the materials of the various members constituting these samples, the method of manufacturing each sample, and the method of reliability testing are the same as those in Example 1, the description thereof will not be repeated. Referring to FIG. 11A again, the temperature of the sealing member 9 is the top surface of the sealing member at three points A, B, and C shown in FIG. The temperature of 9a was measured using a thermocouple.

サンプル11〜13に対してサンプル1〜10と同様の調査を行なった結果を以下の表3に示す。   Table 3 below shows the results obtained by conducting the same investigation as Samples 1 to 10 on Samples 11 to 13.

Figure 2016139691
Figure 2016139691

表3を参照して、比較例(図11)に相当するサンプル11のパワー半導体装置は、点Bにおける温度が45℃となり、チップとの温度差が130℃となった。またパワーサイクル試験を60kサイクル行なった時点で絶縁破壊痕が確認された。   Referring to Table 3, in the power semiconductor device of Sample 11 corresponding to the comparative example (FIG. 11), the temperature at point B was 45 ° C., and the temperature difference from the chip was 130 ° C. Also, dielectric breakdown marks were confirmed when the power cycle test was performed for 60 k cycles.

これに対してサンプル12,13のように伝熱部材11を設けることにより、チップとの温度差が小さくなり、かつ所定のパワーサイクル回数を経た後でなお絶縁破壊が起きなかった。本実施例においても、実施例1,2と同様の理論に基づき、伝熱部材11の設置によりパワー半導体装置の信頼性を向上させることができた。   On the other hand, by providing the heat transfer member 11 as in samples 12 and 13, the temperature difference from the chip was reduced, and dielectric breakdown did not occur after a predetermined number of power cycles. Also in the present embodiment, the reliability of the power semiconductor device could be improved by installing the heat transfer member 11 based on the same theory as in the first and second embodiments.

領域51はいずれの電極部材7からも離れた領域であり、封止部材9の低温領域21(図3、図4参照)になりやすい領域である。そこで電極部材7の一部から、この領域51にまで延びる伝熱部材11を設けることにより、領域51の封止部材9を高効率に温めることができ、気泡の発生の抑制等の作用効果を奏することができる。   The region 51 is a region away from any of the electrode members 7 and is a region that tends to become the low temperature region 21 (see FIGS. 3 and 4) of the sealing member 9. Therefore, by providing the heat transfer member 11 extending from a part of the electrode member 7 to the region 51, the sealing member 9 in the region 51 can be warmed with high efficiency, and effects such as suppression of the generation of bubbles can be obtained. Can play.

このサンプル13の伝熱部材11の理論を応用すれば、たとえば電極部材7自体を領域51にまで延長させ、その領域51内における電極部材7を伝熱部材11として用いることもできる。つまり領域51内の伝熱部材11は、伝熱部材11としての機能と電極部材7としての機能との双方を兼ね合わせることができる。このようにすれば、伝熱部材11を別途取り付ける必要がなく、また基板3(表面電極3c)の表面上に伝熱部材11を接続するためのスペースを確保する必要がなくなる。このため、伝熱部材11をより簡単に形成することができる。この方法は、特に実装部品が多数配置されるパワー半導体装置などにとって有効な方法である。   If the theory of the heat transfer member 11 of the sample 13 is applied, for example, the electrode member 7 itself can be extended to the region 51 and the electrode member 7 in the region 51 can be used as the heat transfer member 11. That is, the heat transfer member 11 in the region 51 can have both the function as the heat transfer member 11 and the function as the electrode member 7. In this way, it is not necessary to attach the heat transfer member 11 separately, and it is not necessary to secure a space for connecting the heat transfer member 11 on the surface of the substrate 3 (surface electrode 3c). For this reason, the heat transfer member 11 can be formed more easily. This method is particularly effective for a power semiconductor device in which many mounting components are arranged.

なおこの場合、領域51は、(伝熱部材11として用いられる電極部材7を除く)いずれの電極部材7からも最短距離が25mmを超える領域であると定義される。この意味では(電極部材7と伝熱部材11とは一体ではあるものの)伝熱部材11として機能するように電極部材7から延長された部分は、それ以外の領域の電極部材7とは別の部材であると考えることもできる。   In this case, the region 51 is defined as a region having a shortest distance exceeding 25 mm from any electrode member 7 (excluding the electrode member 7 used as the heat transfer member 11). In this sense, the portion extended from the electrode member 7 so as to function as the heat transfer member 11 (although the electrode member 7 and the heat transfer member 11 are integrated) is different from the electrode member 7 in other regions. It can also be considered a member.

今回開示された実施の形態はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。   The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 ケース、3,31,32,33,34,35,36,37,38 基板、3a,31a,32a,33a,34a,35a,36a,37a,38a 絶縁基板、3b,31b,32b,33b,34b,35b,36b,37b,38b 裏面電極、3c,31c,32c,33c,34c,35c,36c,37c,38c 表面電極、5 半導体素子、7 電極部材、7a ソース電極、7a1,7a2,7a3 ソース端子、7b ドレイン電極、7b1,7b2,7b3 ソース端子、7c ゲート電極、9 封止部材、9a 封止部材最上面、11 伝熱部材、11a 平面層、13 フタ、14 空隙、15 ベース板、17 ワイヤ、19 取付ネジ穴、21 低温領域、25 気泡、Gs ガス。   1 case, 3, 31, 32, 33, 34, 35, 36, 37, 38 substrate, 3a, 31a, 32a, 33a, 34a, 35a, 36a, 37a, 38a insulating substrate, 3b, 31b, 32b, 33b, 34b, 35b, 36b, 37b, 38b Back electrode, 3c, 31c, 32c, 33c, 34c, 35c, 36c, 37c, 38c Surface electrode, 5 Semiconductor element, 7 Electrode member, 7a Source electrode, 7a1, 7a2, 7a3 Source Terminal, 7b drain electrode, 7b1, 7b2, 7b3 source terminal, 7c gate electrode, 9 sealing member, 9a top surface of sealing member, 11 heat transfer member, 11a plane layer, 13 lid, 14 gap, 15 base plate, 17 Wire, 19 mounting screw holes, 21 low temperature region, 25 bubbles, Gs gas.

Claims (15)

ケース内に配置された基板と、
前記基板の一方の主表面上に載置された半導体素子と、
前記基板に接続される、前記半導体素子の外部と導電するための電極部材と、
前記ケース内を充填する封止部材と、
前記ケース内において前記基板の一部または前記電極部材の一部と接続される、前記電極部材とは別の伝熱部材とを備える、半導体装置。
A substrate placed in the case;
A semiconductor element mounted on one main surface of the substrate;
An electrode member connected to the substrate and electrically conductive with the outside of the semiconductor element;
A sealing member filling the case;
A semiconductor device comprising: a heat transfer member different from the electrode member connected to a part of the substrate or a part of the electrode member in the case.
前記基板の、前記一方の主表面とは反対側の他方の主表面に、ベース板が接続される、請求項1に記載の半導体装置。   The semiconductor device according to claim 1, wherein a base plate is connected to the other main surface of the substrate opposite to the one main surface. 前記ベース板を構成する材料は、銅、アルミニウム炭化珪素および銅モリブデンからなる群から選択されるいずれか1つである、請求項2に記載の半導体装置。   The semiconductor device according to claim 2, wherein the material constituting the base plate is any one selected from the group consisting of copper, aluminum silicon carbide, and copper molybdenum. 前記封止部材はシリコーン系の樹脂である、請求項1〜3のいずれか1項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the sealing member is a silicone-based resin. 前記電極部材を複数備え、
前記伝熱部材は、複数の前記電極部材のうち前記伝熱部材との距離が最も短い前記電極部材との最短距離が25mm以下の位置に配置される、請求項1〜4のいずれか1項に記載の半導体装置。
A plurality of the electrode members;
5. The heat transfer member according to claim 1, wherein the heat transfer member is disposed at a position where the shortest distance from the electrode member of the plurality of electrode members is 25 mm or less. A semiconductor device according to 1.
前記電極部材を複数備え、
前記伝熱部材は、複数の前記電極部材のうちいずれかの一部に接続されており、前記伝熱部材および複数の前記電極部材のすべてのうちいずれかとの最短距離が25mmを超える領域が存在しないように配置される、請求項1〜5のいずれか1項に記載の半導体装置。
A plurality of the electrode members;
The heat transfer member is connected to a part of any one of the plurality of electrode members, and there is a region where the shortest distance between the heat transfer member and all of the plurality of electrode members exceeds 25 mm. The semiconductor device according to claim 1, wherein the semiconductor device is arranged so as not to occur.
前記半導体素子の駆動時における表面の温度と、前記封止部材における前記一方の主表面と同じ側の表面の温度の最小値との差が120℃以下である、請求項1〜6のいずれか1項に記載の半導体装置。   The difference between the temperature of the surface during driving of the semiconductor element and the minimum value of the temperature of the surface on the same side as the one main surface of the sealing member is 120 ° C. or less. 2. A semiconductor device according to item 1. 前記半導体素子を構成する材料は、炭化珪素、窒化ガリウム、ダイヤモンド、炭化珪素と窒化ガリウムとダイヤモンドとの複合材料、からなる群から選択されるいずれか1つである、請求項1〜7のいずれか1項に記載の半導体装置。   The material constituting the semiconductor element is any one selected from the group consisting of silicon carbide, gallium nitride, diamond, and a composite material of silicon carbide, gallium nitride, and diamond. 2. The semiconductor device according to claim 1. 前記伝熱部材を構成する材料は、アルミニウム、銅、アルミニウムと銅との合金、からなる群から選択されるいずれか1つである、請求項1〜8のいずれか1項に記載の半導体装置。   9. The semiconductor device according to claim 1, wherein the material constituting the heat transfer member is any one selected from the group consisting of aluminum, copper, and an alloy of aluminum and copper. . 前記伝熱部材は、前記一方の主表面に交差する方向に延びる、請求項1〜9のいずれか1項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the heat transfer member extends in a direction intersecting with the one main surface. 前記伝熱部材の少なくとも一部は前記封止部材の表面から露出する、請求項1〜10のいずれか1項に記載の半導体装置。   The semiconductor device according to claim 1, wherein at least a part of the heat transfer member is exposed from a surface of the sealing member. 前記伝熱部材は、前記封止部材における前記一方の主表面に沿う表面に沿うように広がる平面層を有する、請求項1〜11のいずれか1項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the heat transfer member includes a planar layer that extends along a surface along the one main surface of the sealing member. 前記伝熱部材がリボンワイヤである、請求項1〜8のいずれか1項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the heat transfer member is a ribbon wire. 前記伝熱部材は、カーボン系の複合材料により形成される、請求項13に記載の半導体装置。   The semiconductor device according to claim 13, wherein the heat transfer member is formed of a carbon-based composite material. 前記リボンワイヤは、前記基板の前記一方の主表面上の互いに間隔をあけた2か所と接続されることにより、前記基板との間にループを構成する、請求項13または14に記載の半導体装置。   15. The semiconductor according to claim 13, wherein the ribbon wire forms a loop between the ribbon wire and the substrate by being connected to two spaced apart locations on the one main surface of the substrate. apparatus.
JP2015013355A 2015-01-27 2015-01-27 Semiconductor device Pending JP2016139691A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2015013355A JP2016139691A (en) 2015-01-27 2015-01-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015013355A JP2016139691A (en) 2015-01-27 2015-01-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2016139691A true JP2016139691A (en) 2016-08-04

Family

ID=56560441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015013355A Pending JP2016139691A (en) 2015-01-27 2015-01-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2016139691A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11233037B2 (en) 2017-04-20 2022-01-25 Rohm Co., Ltd. Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11233037B2 (en) 2017-04-20 2022-01-25 Rohm Co., Ltd. Semiconductor device
US11776936B2 (en) 2017-04-20 2023-10-03 Rohm Co., Ltd. Semiconductor device

Similar Documents

Publication Publication Date Title
EP2600399A2 (en) Power semiconductor device
US9355930B2 (en) Semiconductor device
US9891247B2 (en) U-shaped vertical shunt resistor for Power Semiconductor module
US10163752B2 (en) Semiconductor device
US8546926B2 (en) Power converter
US8897015B2 (en) Base plate
US9466542B2 (en) Semiconductor device
US20170018495A1 (en) Semiconductor device for electric power
JP6849660B2 (en) Semiconductor device
US20120235293A1 (en) Semiconductor device including a base plate
CN106920783A (en) Semiconductor device with improved heat and electrical property
JP6250691B2 (en) Semiconductor device
JP2022160154A (en) Semiconductor device
JPWO2019117107A1 (en) Semiconductor device
JP2009246063A (en) Cooling structure of power module and semiconductor device using same
JPWO2008035614A1 (en) Semiconductor module and method for manufacturing semiconductor module
US20220051960A1 (en) Power Semiconductor Module Arrangement and Method for Producing the Same
JP6381453B2 (en) Semiconductor device
CN112331632B (en) Semiconductor device with a semiconductor device having a plurality of semiconductor chips
CN107210273B (en) Power module
JP2010177619A (en) Semiconductor module
JP2016139691A (en) Semiconductor device
CN114080672A (en) Semiconductor device with a plurality of semiconductor chips
JP4375299B2 (en) Power semiconductor device
US20240087984A1 (en) Semiconductor module assembly having a cooling body and at least one semiconductor module