JP2016126424A - Multitask processing method, multitask processing program, and multitask processing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve high-speed multitask processing.SOLUTION: In a multitask processing method, data is copied between a plurality of tasks with a dependence on input-output data, by means of DMA copy. A multitask processing program includes: a receiving step in which a CPU receives copying data between a plurality of tasks with a dependence on input-output data; and a copy step of causing a DMA controller to execute copying. A multitask processing apparatus includes the DMA controller that copies data between a plurality of tasks with a dependence on input-output data by means of DMA copy.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a multitask processing method, a multitask processing program, and a multitask processing apparatus.

  Currently, with the widespread use of processors with multi-cores, research is being conducted on efficient use of processors in parallel processing and distributed processing.

  For example, prior art documents 1 and 2 describe that parallel distributed processing and DMA (Direct Memory Access) transfer are used when a transfer packet of a network computer for distributed processing is used.

  Prior art document 3 describes DMA transfer for double buffering in an example using a CELL processor. In these prior art documents, the processing is speeded up by using a DMA copy in the kernel.

JP-A-8-147250 JP-A-8-87479 JP 2012-141852 A

However, the conventional multitask processing method has a problem in that it takes time to copy data between multitasks in an application and the multitask processing is slow.
An object of the present invention is to speed up multitask processing.

  According to the multitask processing method of the present invention, data copying between a plurality of tasks having dependency relations with input / output data is performed by DMA copying for a plurality of tasks.

  According to the multitask processing method of the present invention, DMA copying is performed from a buffer storing task output data to a task input buffer having a dependency relationship with the task output data.

  According to such a configuration, it is possible to speed up multitask processing by copying data between tasks having dependencies with DMA copy.

  In the multitask processing method of the present invention, a copy of data between a plurality of tasks having dependency relations with input / output data is received by an application, and execution of the copy by DMA copy is instructed from the kernel.

  According to such a configuration, it is possible to speed up multitask processing by outputting an application DMA DMA instruction from the CPU to the DMA controller and executing the DMA copy in the DMA controller.

  In the multitask processing method of the present invention, DMA copy destination areas are continuously secured on the physical memory.

  According to such a configuration, by securing a continuous physical memory, it is possible to achieve a data size that allows DMA copying to be processed at high speed, and to speed up multitask processing.

  In the multitask processing method of the present invention, a plurality of DMA channels access different continuous physical memories to execute the copy.

  According to such a configuration, a plurality of DMA channels can be prevented from accessing the same physical memory, so that multitask processing can be speeded up.

  In the multitask processing method of the present invention, when the DMA copy is earlier than the CPU copy based on the amount of data to be copied and the bandwidth, the copy is executed by the DMA copy.

  According to such a configuration, when the DMA copy is faster than the CPU copy based on the amount of data to be copied, the DMA copy, and the CPU copy bandwidth, the copy can be performed with the optimum copy method by executing the DMA copy. Multi-task processing can be accelerated.

  The multitask processing program of the present invention includes a reception step in which a CPU receives a copy of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks, and a copy for causing the DMA controller to execute the copy Steps are provided.

  In the multitask processing program of the present invention, the copying step performs DMA copying from a buffer storing task output data to a task input buffer having a dependency relationship with the task output data.

  According to such a configuration, it is possible to speed up multitask processing by copying data between tasks having dependencies with DMA copy.

  In the multitask processing program of the present invention, the accepting step accepts a copy of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks in an application, and the copying step is performed by a kernel. The copy is executed by DMA copy.

  According to such a configuration, it is possible to speed up multitask processing by outputting an application DMA DMA instruction from the CPU to the DMA controller and executing the DMA copy in the DMA controller.

  The multitask processing program of the present invention has a securing step for continuously securing the DMA copy destination area on the physical memory.

  According to such a configuration, by securing a continuous physical memory, it is possible to achieve a data size that allows DMA copying to be processed at high speed, and to speed up multitask processing.

  In the multitask processing program of the present invention, in the copying step, a plurality of DMA channels access different physical memories and execute the copying.

  According to such a configuration, a plurality of DMA channels can be prevented from accessing the same physical memory, so that multitask processing can be speeded up.

  In the multitask processing program of the present invention, the copy step executes the copy by the DMA copy when the DMA copy is earlier than the CPU copy based on the amount of data to be copied and the bandwidth.

  According to such a configuration, when the DMA copy is faster than the CPU copy based on the amount of data to be copied, the DMA copy, and the CPU copy bandwidth, the copy can be performed with the optimum copy method by executing the DMA copy. Multi-task processing can be accelerated.

  The multitask processing apparatus of the present invention is provided with a DMA controller that performs DMA copying of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks.

  In the multitask processing device of the present invention, the DMA controller performs DMA copying from a buffer storing task output data to an input buffer of a task having a dependency relationship with the task output data.

  According to such a configuration, it is possible to speed up multitask processing by copying data between tasks having dependencies with DMA copy.

  The multitask processing device of the present invention includes a CPU that accepts, in an application, data copy between a plurality of tasks having dependency relations with input / output data, and the DMA controller causes the kernel to execute the copy by DMA copy. I made it.

  According to such a configuration, it is possible to speed up multitask processing by outputting an application DMA DMA instruction from the CPU to the DMA controller and executing the DMA copy in the DMA controller.

  In the multitask processing apparatus of the present invention, the CPU continuously secures DMA copy destination areas on the physical memory.

  According to such a configuration, by securing a continuous physical memory, it is possible to achieve a data size that allows DMA copying to be processed at high speed, and to speed up multitask processing.

  In the multitask processing apparatus of the present invention, a plurality of DMA channels access different continuous physical memories to execute the copying.

  According to such a configuration, a plurality of DMA channels can be prevented from accessing the same physical memory, so that multitask processing can be speeded up.

  In the multitask processing device of the present invention, when the DMA copy is earlier than the CPU copy based on the amount of data to be copied and the bandwidth, the DMA controller executes the copy by the DMA copy.

  According to such a configuration, when the DMA copy is faster than the CPU copy based on the amount of data to be copied, the DMA copy, and the CPU copy bandwidth, the copy can be performed with the optimum copy method by executing the DMA copy. Multi-task processing can be accelerated.

  The processing method of the present invention uses DMA copy for memory initialization.

  The processing program of the present invention comprises a step of accepting initialization of the memory and a step of executing DMA copy from the address for storing the initial value to the address to be initialized.

  The processing apparatus of the present invention is provided with a DMA controller that performs initial value DMA copy for memory initialization.

  According to such a configuration, the processing speed can be increased by using the DMA copy for the initialization of the memory.

  The multitask processing of the present invention can speed up the multitask processing by executing data copy in the multitask processing by DMA copy in the application.

6 is a diagram showing an example of a multitask processing method according to Embodiment 1. FIG. 6 is a diagram showing an example of a multitask processing method according to Embodiment 1. FIG. FIG. 3 is a diagram illustrating a hierarchy of a multitask processing program according to the first embodiment. 1 is a block diagram illustrating a configuration of a multitask processing device according to a first embodiment. It is a figure of the comparison of the required time of DMA copy and CPU copy. It is a figure which shows the example of DMA copy. FIG. 10 is a diagram showing an example of DMA copy in the multitask processing method according to the second embodiment. It is a figure of the comparison of the bandwidth according to data size of DMA copy and CPU copy. 10 is a diagram illustrating an example of a processing method according to Embodiment 2. FIG.

(Embodiment 1)
Embodiments of the present invention will be described below with reference to the drawings.
First, the relationship between each task and the buffer will be described. FIG. 1 is a diagram illustrating an example of a multitask processing method according to the first embodiment. FIG. 1 shows an example in which two tasks, task 0 and task 1, each process data. In the buffer A, an area for data before processing is SrcA, and an area for data after processing is DstA. Similarly, in the buffer B, an area for data before processing is SrcB, and an area for data after processing is DstB.

  Task 0 reads the data in SrcA in buffer A and performs processing. Then, the data obtained in task 0 is written to DstA of buffer A.

  Similarly, task 1 reads the data in SrcB in buffer B and performs processing. Then, the data obtained in task 1 is written into DstB of buffer B.

  Thus, tasks 0 and 1 have buffers A and B for reading and writing data, respectively, read data before processing into SrcA and B of buffers A and B, and data after processing as buffers A and B. Write to DstA, B.

  Here, if the output of task 0 has a dependency relationship that becomes the input of task 1, task 0 and task 1 have individual buffers, so that the data after processing of task 0 is transferred from the task 0 buffer to the task 1 buffer. Need to copy. In the multitask processing method of the present invention, DMA copy is performed in the copy between the buffer A of task 0 and the buffer B of task 1.

  FIG. 2 is a diagram illustrating an example of the multitask processing method according to the first embodiment. In FIG. 2, task 0 writes the data obtained by the processing to DstA of buffer A. Here, task 1 is a task that performs processing using the result of processing of task 0. That is, task 0 and task 1 are in a dependency relationship.

  After the data obtained by the processing is written to DstA of buffer A, the contents of DstA of buffer A are DMA copied to SrcB of buffer B.

  After the DMA copy, task 0 reads the data written in SrcB of buffer B and performs processing.

  As described above, the multitask processing method according to the first embodiment can speed up multitask processing by copying data between tasks having a dependency relationship by DMA copy.

  Incidentally, the DMA copy is generally used in an OS (Operating System) kernel, and cannot be used as it is in an application.

  Therefore, it is necessary to prepare an interface for using DMA copy in the application. FIG. 3 is a diagram showing a hierarchy of the multitask processing program according to the first embodiment.

  In FIG. 3, the application layer includes an application, a task, an NDK (Native development Kit), and a DMA interface. The kernel layer is composed of an OS, a DMA engine, and a DMA driver. A general application is executed as a native application in the OS via NDK.

  The DMA interface is an interface that accepts execution of DMA copy in the application layer. When the DMA interface receives a DMA copy execution request from an application or task, the DMA interface sends information necessary for the DMA copy together with a DMA copy instruction to the DMA interface.

  The DMA engine is an engine that accepts a DMA copy instruction from the application side on the kernel side, and sends information necessary for the DMA copy together with the DMA copy instruction to the DMA driver.

  The DMA driver is a driver that controls a DMA controller that is hardware, and instructs DMA copy with instructions corresponding to the DMA controller from a DMA copy instruction from the DMA engine and information necessary for the DMA copy.

  As described above, in the multitask processing program of the first embodiment, a DMA interface is provided in the application layer, and the application executes the DMA copy by communicating between the DMA interface in the application layer and the DMA engine in the kernel layer. it can.

  Next, the hardware configuration will be described. FIG. 4 is a block diagram showing the configuration of the multitask processing apparatus according to the first embodiment.

  In FIG. 4, the multitask processing apparatus 10 includes a CPU (Central Processing Unit) 11, a memory 12, and a DMA controller 13.

  The CPU 11 is a processor that processes multitasking. The CPU 11 preferably has a multi-core. Specifically, the CPU 11 is a processor that executes tasks 0 and 1 in FIGS. Further, the CPU 11 executes each program of the application layer and the kernel layer shown in FIG.

  The memory 12 is a memory that stores data and programs. Specifically, the areas of buffers A and B in FIGS.

  The DMA controller 13 is a controller that accesses the memory 12 without using the CPU and copies data in the memory 12. Specifically, the DMA controller 13 executes the DMA copy shown in FIG.

  Hereinafter, the operation of the multitask processing apparatus shown in FIG. 4 will be described. First, the CPU 11 processes an application task and writes the data obtained by the processing to the memory 12.

  When the CPU 11 accepts execution of data copying between tasks in the application, the CPU 11 outputs a command for DMA copying data to the DMA controller 13.

  The DMA controller 13 executes data copy between tasks in accordance with instructions from the CPU.

  Thus, according to the multitask processing method of the first embodiment, the DMA copy instruction of the application is output from the CPU to the DMA controller, and the DMA copy is executed in the DMA controller.

Next, a comparison of required time between DMA copy and CPU copy will be described.
FIG. 5 is a diagram for comparing the required time between the DMA copy and the CPU copy. In FIG. 5, the horizontal axis indicates the data size to be copied, and the vertical axis indicates the time required for copying. In FIG. 5, the solid line indicates the DMA copy, and the broken line indicates the CPU copy.

  In FIG. 5, a comparison is made when data is copied between tasks in the SPMesh (SimPlificationMeshes) process.

  As shown in FIG. 5, as the data size increases, the DMA copy is completed in a shorter time than the CPU copy.

  As described above, the multitask processing apparatus according to the first embodiment can speed up multitask processing by outputting a DMA copy instruction of an application from the CPU to the DMA controller and executing the DMA copy in the DMA controller.

  In addition, the multitask processing apparatus according to the first embodiment performs copying with a DMA controller that consumes less power than the CPU by copying data between a plurality of dependent tasks using DMA copying. The amount can be reduced. In addition, the multitask processing device according to the first embodiment can suppress an increase in the temperature of the CPU as the power consumption is reduced.

  Next, a specific example of DMA copying to the physical memory will be described. FIG. 6 is a diagram illustrating an example of a DMA copy. As shown in FIG. 6, the DMA controller accesses a divided area on the memory to perform copying.

  FIG. 7 is a diagram illustrating an example of a DMA copy in the multitask processing method according to the second embodiment. As shown in FIG. 7, the multitask processing apparatus secures continuous physical memory, and the DMA controller accesses continuous areas on the memory to perform copying.

  The DMA copy by the DMA controller has a property that the speed is particularly high when the size of data to be copied is a certain size or more. Therefore, it is possible to further speed up the multitasking process by securing physical memory continuous to the copy source or the copy destination, or the copy source and the copy destination, assigning them as the copy source and the copy destination, and executing the DMA copy.

  As described above, according to the multitask processing method of the first embodiment, by securing a continuous physical memory, it is possible to achieve a data size that allows DMA copy to be processed at high speed, and to speed up multitask processing. .

  It is desirable that the size of the area continuously secured in the physical memory is larger than the data size that can be copied at one time by the DMA controller.

  Next, an example in which DMA copy is executed when a predetermined condition is satisfied will be described. FIG. 8 is a comparison of bandwidths according to data size between DMA copy and CPU copy. In FIG. 8, the horizontal axis indicates the size of data to be copied, and the vertical axis indicates the bandwidth. In FIG. 8, the solid line indicates DMA copy, and the broken line indicates CPU copy.

  As shown in FIG. 8, when the size of data to be copied is small, the CPU copy has a larger bandwidth than the DMA copy. On the other hand, when the size of data to be copied is large, the bandwidth of the DMA copy is larger than that of the CPU copy.

  The magnitude relationship between the CPU copy bandwidth and the DMA copy bandwidth varies depending on the specifications of the CPU and the DMA controller. Therefore, based on the specifications of the CPU and the DMA controller and the size of the data, the multitask processing device performs the DMA copy when the DMA copy satisfies the condition that the bandwidth is larger than the CPU copy.

  This condition can be determined by a calculation formula or simulation from the specifications of CPU and DMA controller and the size of data.

  Whether to perform DMA copying may be determined in advance based on the data size to be copied, the specifications of the CPU and the DMA controller, or may be determined by an application or a DMA interface.

  As described above, the multitask processing method according to the first embodiment is executed by the DMA copy when the DMA copy is earlier than the CPU copy based on the data amount to be copied and the DMA copy and the CPU copy bandwidth. Multi-task processing can be sped up because it can be copied with an optimal copy method.

(Embodiment 2)
In the second embodiment, an example in which the initial value is DMA copied when the memory is initialized will be described. The processing apparatus and processing program for performing the DMA copy are the same as those in the first embodiment.

  FIG. 9 is a diagram illustrating an example of a processing method according to the second embodiment. In FIG. 9, the initial value is DMA copied to SrcA of buffer A. Specifically, the initial value stored in the memory 12 of FIG. 4 is DMA copied to the SrcA of the buffer A secured in the memory 12 by the DMA controller 13.

  When the initial value is data that repeats the same value, the initial value of the minimum unit may be repeatedly DMA copied. For example, the initial value of task 0 can be set by performing DMA copying to SrcA of buffer A a plurality of times according to the size of the initial value to be written, assuming that the initial value is 0 in one digit. Alternatively, an initial value that has been DMA copied to SrcA of buffer A once may be used as a copy source, and DMA copied to SrcA of buffer A multiple times to SrcA of buffer A.

  Generally, since the initial value of a task is determined by an application, it is preferable to implement DMA copy using the DMA interface described in the first embodiment.

  As described above, the processing method according to the second embodiment can increase the processing speed by using the DMA copy for the initialization of the memory.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention.

  For example, the multitask processing apparatus may include a plurality of DMA controllers, and each of the plurality of DMA controllers may have a different DMA channel and access a different continuous physical memory to execute the DMA copy. According to such a configuration, a plurality of DMA channels can be prevented from accessing the same physical memory, so that multitask processing can be speeded up.

  The multitask processing apparatus of the present invention can be applied to any apparatus that can perform multitask processing. For example, it can be applied to a smartphone equipped with a multi-core processor.

  In addition, the multitask processing program of the present invention can be applied as long as it can be applied to an application having a dependency relationship between tasks. For example, it can be applied to the Smoothed Particle Hydrodynamics “SPH” algorithm as Fluid Simulation () which is one of physical engines. In this physical engine, there are four important and long processing functions SPHupdate, calculatePoints, generateMarchingSquares, and Draw. It can also be applied to these function processes.

  Further, the present invention can be implemented by hardware such as ASIC (Application Specific Integrated Circuit) or software. Further, part of the processing may be performed by software, and the rest may be performed by hardware. When implemented by software, a computer system having one or a plurality of CPUs (Central Processing Units) such as a microprocessor may be caused to execute a program related to processing of functional blocks. These programs can be stored using various types of non-transitory computer readable media and supplied to a computer. Non-transitory computer readable media include various types of tangible storage media. Examples of non-transitory computer-readable media include magnetic recording media (for example, flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (for example, magneto-optical disks), CD-ROMs (Compact Disc Read Only Memory), CD- R, CD-R / W, DVD-ROM (Digital Versatile Disc Read Only Memory), DVD-R (DVD Recordable), DVD-R DL (DVD-R Dual Layer), DVD-RW (DVD ReWritable), DVD- RAM, DVD + R, DVR + R DL, DVD + RW, BD-R (Blu-ray (registered trademark) Disc Rewritable), BD-RE (Blu-ray (registered trademark) Disc Rewritable), BD-ROM, semiconductor memory (for example, mask ROM) , PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (random access memory)). The program may also be supplied to the computer by various types of transitory computer readable media. Examples of transitory computer readable media include electrical signals, optical signals, and electromagnetic waves. The temporary computer-readable medium can supply the program to the computer via a wired communication path such as an electric wire and an optical fiber, or a wireless communication path.

Multitask processing device 10
CPU 11
Memory 12
DMA controller 13

Claims (21)

  A multitask processing method characterized in that, for a plurality of tasks, data copying between a plurality of tasks having dependency relations with input / output data is performed by DMA copy.   The multitask processing method according to claim 1, wherein a DMA copy is performed from a buffer storing task output data to a task input buffer having a dependency relationship with the task output data.   The multitask processing method according to claim 1 or 2, wherein a copy of data between a plurality of tasks having dependency relations with input / output data is received by an application, and execution of the copy by DMA copy is instructed from a kernel.   The multitask processing method according to claim 1, wherein areas for DMA copy destinations are continuously secured on a physical memory.   The multitask processing method according to claim 1, wherein a plurality of DMA channels access different continuous physical memories to execute the copy.   6. The multitask processing method according to claim 1, wherein when the DMA copy is earlier than the CPU copy based on the amount of data to be copied and the bandwidth, the copy is executed by the DMA copy.   A multi-step comprising: a receiving step in which a CPU receives a copy of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks; and a copy step in which the DMA controller executes the copy. Task processing program.   8. The multitask processing program according to claim 7, wherein the copy step performs DMA copy from a buffer storing task output data to a task input buffer having a dependency relationship with the task output data. The accepting step accepts a copy of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks,
The multitask processing program according to 7 or 8, wherein the copy step causes the kernel to execute the copy by DMA copy.   The multitask processing program according to any one of claims 7 to 9, further comprising a securing step for continuously securing a DMA copy destination area on a physical memory.   The multitask processing program according to any one of claims 7 to 10, wherein in the copying step, copying is performed by accessing consecutive physical memories having different DMA channels.   The multitask processing program according to any one of 7 to 11, wherein the copy step executes the copy by the DMA copy when the DMA copy is earlier than the CPU copy based on a data amount to be copied and a bandwidth.   A multitask processing apparatus comprising a DMA controller that performs DMA copying of data between a plurality of tasks having dependency relations with input / output data for a plurality of tasks.   The multitask processing apparatus according to claim 13, wherein the DMA controller performs DMA copy from a buffer storing task output data to a task input buffer having a dependency relationship with the task output data.   15. The multitask according to claim 13, further comprising: a CPU that accepts, in an application, data copy between a plurality of tasks having dependency relations with input / output data, wherein the DMA controller causes the kernel to execute the copy by DMA copy. Processing equipment.   The multitask processing device according to claim 13, wherein the CPU continuously secures DMA copy destination areas on a physical memory.   The multitask processing device according to claim 13, wherein a plurality of DMA channels access different continuous physical memories to execute copying.   The multitask processing device according to claim 13, wherein when the DMA copy is earlier than the CPU copy based on the amount of data to be copied and the bandwidth, the DMA controller executes the copy by the DMA copy.   A processing method using DMA copy for memory initialization. Accepting memory initialization; and
Executing a DMA copy from an address for storing an initial value to an address to be initialized.   A processing apparatus comprising a DMA controller that performs initializing a DMA copy to initialize a memory.

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