JP2016105183A - Substrate for thin film element, thin film element, organic electroluminescence display device, and electronic paper - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a thin film element including conduction parts that penetrate the substrate, the substrate for a thin film element capable of suppressing a deterioration in characteristics of the thin film element.SOLUTION: The present invention is a substrate for a thin film element that is used for a thin film element, the substrate for a thin film element including: an insulating layer that has insulating layer through holes and has a surface roughness Ra of 5 nm or less; first conduction parts that fill the insulating layer through holes; and conduction parts that are formed in the thickness direction of the substrate for a thin film element, conduct the front and back of the substrate for a thin film element, and have at least the first conduction parts.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a substrate for a thin film element used for a thin film element such as an organic electroluminescence element, electronic paper, and a thin film transistor element.

  Conventionally, thin film elements such as organic electroluminescence elements (hereinafter, electroluminescence may be referred to as EL), electronic paper, thin film transistor elements (hereinafter, thin film transistors may be referred to as TFT), and thin film solar cells are formed. As the substrate to be used, a glass substrate, a plastic film provided with a gas barrier property, a metal substrate, and the like have been proposed. It has also been proposed to use these substrates as a sealing substrate for sealing the thin film element from above.

A glass substrate is excellent in smoothness and heat resistance, but lacks flexibility, is unsuitable for thinning and weight reduction, and has a disadvantage that it is inferior in impact resistance.
A plastic film with gas barrier properties has the advantages of flexibility, light weight, and impact resistance, but it is not sufficient in heat resistance and has a large coefficient of linear thermal expansion. There is a disadvantage that it is inferior and has high hygroscopicity.
On the other hand, various types of metal substrates and thicknesses are available and can be selected as appropriate, and the metal substrate can satisfy heat resistance, light weight, and flexibility. However, the metal substrate tends to be inferior in surface flatness to the glass substrate and has electrical conductivity. Therefore, in order to form a thin film element on the metal substrate, it is necessary to provide an insulating layer.

  In recent years, in a display device such as an active matrix driving organic EL element or electronic paper, a method of using a transparent substrate as a sealing substrate for sealing the element from above and observing an image from the top has been attracting attention. In such a display device, since it is not shielded by the TFT element which is an active drive element, the aperture ratio can be increased. In the above display device, the metal substrate cannot be used as a transparent sealing substrate because it does not have transparency. However, since the metal substrate has the above-described advantages, it can be preferably used as a support substrate for supporting the element. In the case of the above method, a metal substrate can be used as a support substrate for supporting the element in the display device such as a passive matrix driving organic EL element or electronic paper, or an organic EL element for illumination.

In addition, organic EL elements have been actively developed for use in large-sized TVs, indoor lighting, etc. In order to increase the size, organic EL elements are caused by deterioration of the elements due to heat generated during light emission and in-plane temperature unevenness. It is necessary to suppress uneven brightness. Since a metal substrate is excellent also in heat conductivity, it is suitable as a substrate for an organic EL element.
Further, for example, when it is not necessary to form a TFT element, such as an organic EL element that emits light entirely for illumination, after forming the organic EL element on the substrate, it is sealed from above with a transparent substrate, Not only a method of taking out light from the upper part, but also a method of taking out light from the lower part after forming the organic EL element on the transparent substrate and sealing it with a sealing substrate from the upper part is suitably used. In the latter case, the sealing substrate is not required to be transparent, but in the case of an organic EL element that emits light entirely, in the case of a partial light emission organic EL element such as an active matrix driving or passive matrix driving organic EL element. Since a larger amount of heat is generated than that, high heat dissipation is required. Since the metal substrate is excellent in thermal conductivity as described above, it can be said that it is suitable as a sealing substrate for organic EL elements.

  Recently, organic EL elements and electronic paper are required to be lighter, thinner, and have a narrow frame. The demand for these performances is further increased in organic EL elements and electronic paper for display applications.

  In recent years, as a substrate on which such a thin film element is formed, a substrate having a conduction portion that penetrates the substrate has been proposed.

  For example, Patent Document 1 aims to reduce non-display areas such as electric circuits and sealing frames in a display device including a display panel such as a liquid crystal display panel, an organic EL display panel, an inorganic EL display panel, and an electronic paper. Forming a via hole in the resin substrate, electrically connecting the drive electrode formed on the surface of the resin substrate with the via hole and the electrode pad formed on the back surface of the resin substrate, and through-holes in the gas barrier film Forming an electrical connection portion in the through-hole, and the electrode pad disposed on the inner side of the gas barrier film by the electrical connection portion and the electrode of the display driving circuit mounting substrate disposed on the outer side of the gas barrier film. It has been proposed to connect electrically.

  In Patent Document 2, in an organic semiconductor element used for a display such as a liquid crystal display, an electrophoretic display, and an organic EL display, an organic transistor is formed on an insulating film for the purpose of high aperture ratio and high density. It has been proposed that a display electrode is formed on the surface of the film opposite to the surface on which the organic transistor is formed, a through hole is formed in the insulating film, and the organic transistor and the display electrode are connected through the through hole. Yes.

  Patent Document 3 discloses a method of obtaining a large-area transistor array by connecting (tiling) a plurality of transistor arrays with respect to transistor arrays used in displays such as liquid crystal displays, electrophoretic displays, and organic EL displays. . According to Patent Document 3, in the tiling transistor array, the TFT and the wiring are formed on the insulating substrate, and the connecting electrode is formed on the surface of the insulating substrate opposite to the surface on which the TFT and the wiring are formed. Then, by forming a through hole in the insulating substrate and connecting the wiring and the connecting electrode through the through hole, the connecting portion when the transistor array is tiled can be flattened, and the transistor array Can be connected by a simple method.

  In Patent Document 4, in an organic thin film solar cell, a first auxiliary electrode is formed on one surface of a transparent substrate for the purpose of suppressing a decrease in power generation efficiency due to the electric resistance of the electrode, and the other surface of the transparent substrate. It is proposed that a second auxiliary electrode and a transparent electrode are formed on the substrate, a connection conductive portion penetrating the transparent substrate is formed, and the first auxiliary electrode and the second auxiliary electrode are electrically connected by the connection conductive portion. .

  Further, although it is not an organic EL element or electronic paper, with regard to a liquid crystal display, Patent Document 5 discloses a display device in which a light control panel having a light control layer such as a polymer liquid crystal is tiling, and improvement in yield of a driving circuit and display For the purpose of improving characteristics (reducing seams), it has been proposed to form a through electrode on a ceramic substrate on which a light control panel is formed, and to mount a drive circuit on the back surface of the ceramic substrate.

  By the way, in the board | substrate with which a thin film element is formed, since a thin film element is very thin, there exists a possibility that the fine unevenness | corrugation of the substrate surface may deteriorate the characteristic of a thin film element. Therefore, it is required to improve the surface smoothness of the substrate. For example, in the case of a TFT element, if there are fine irregularities on the semiconductor layer that constitutes the TFT, especially the base of the channel formation region, that is, if there are fine irregularities on the substrate surface, the mobility of the TFT element is significantly reduced or leakage occurs. When current flows, it significantly affects the characteristics of the TFT element. In addition, the yield decreases depending on the surface state of the substrate.

For example, as described in the example of Patent Document 4, when forming a conductive portion that penetrates a plastic film, the plastic film usually contains particles for the purpose of improving blocking resistance. There is a possibility that fine irregularities exist on the surface and the electrical performance of the TFT element is lowered.
In addition, as described in the examples of Patent Document 2, in a substrate in which an insulating layer is formed on a metal foil, when a through hole is formed in the insulating layer, on the surface when the metal foil is a rolled foil, Since there are fine irregularities due to rolling stripes and there are fine irregularities on the surface even when the metal foil is an electrolytic foil, the electrical performance of the TFT element may be reduced.

By the way, in a multilayer printed wiring board, it is common to perform roughening (for example, desmear treatment) to increase the unevenness of the surface of the insulating layer and to secure the adhesion between the insulating layer and the wiring by the anchor effect. However, when miniaturizing the wiring, if the roughness of the insulating layer surface is large, the fine wiring may be damaged. Therefore, it has been proposed that the surface of the insulating layer has a low roughness (see, for example, Patent Documents 6 to 8).
In the multilayer printed wiring board, it is sufficient that the surface roughness Ra is about several hundred nanometers as described in Patent Documents 6 to 8. On the other hand, in the thin film element substrate, since the thin film element is very thin as described above, there is a problem of fine irregularities smaller than several hundred nanometers that affect the thin film element.

JP 2008-33095 A JP 2009-244338 A JP 2010-79196 A JP 2010-141250 A JP 2001-305999 A JP 2010-157590 A International Publication No. 2008/090835 Pamphlet JP 2010-56274 A

  The present invention has been made in view of the above circumstances, and provides a thin film element substrate including a conductive portion penetrating the substrate and capable of suppressing deterioration in characteristics of the thin film element. The main purpose.

  In order to achieve the above object, the present invention is a substrate for a thin film element used for a thin film element, having an insulating layer through-hole, an insulating layer having a surface roughness Ra of 5 nm or less, and the insulating layer through-hole. And a conductive portion that is formed in the thickness direction of the thin film element substrate, conducts the front and back of the thin film element substrate, and has at least the first conductive portion. A thin film element substrate is provided.

  According to the present invention, since the insulating layer is excellent in surface smoothness, it is possible to prevent deterioration of characteristics of the thin film element due to fine unevenness. According to the present invention, since the conductive portion is formed, the wiring can be taken out from the front surface to the back surface through the conductive portion. When the thin film element substrate of the present invention is used for a thin film element, a narrow frame, A high aperture ratio, high density, etc. can be realized. In addition, normally, a metal is used for the first conductive portion, and since the metal is generally excellent in thermal conductivity, heat can be released from the front surface to the back surface through the conductive portion. When the substrate is used for an organic EL element, it is possible to suppress performance deterioration due to heat generation of the organic EL element.

  In the said invention, it is preferable that the said insulating layer contains a polyimide. In this case, it is preferable that the insulating layer contains polyimide as a main component. It is because it can be set as the insulating layer excellent in insulation, heat resistance, and dimensional stability. Further, by using polyimide as a main component, it is possible to reduce the thickness of the insulating layer, improve the thermal conductivity of the insulating layer, and further improve the heat dissipation.

  In the present invention, the hygroscopic expansion coefficient of the insulating layer is preferably in the range of 0 ppm /% RH to 15 ppm /% RH. The hygroscopic expansion coefficient is an index of water absorption, and the smaller the hygroscopic expansion coefficient, the smaller the water absorption. Therefore, if the hygroscopic expansion coefficient is in the above range, high reliability can be realized in the presence of moisture. In addition, the smaller the hygroscopic expansion coefficient of the insulating layer, the better the dimensional stability of the insulating layer.

  Furthermore, in this invention, it is preferable that the linear thermal expansion coefficient of the said insulating layer exists in the range of 0 ppm / degrees C-30 ppm / degrees C. This is because, if the linear thermal expansion coefficient of the insulating layer is within the above range, warpage of the thin film element substrate can be suppressed.

  The thin film element substrate of the present invention preferably further includes a metal layer formed in a pattern on the insulating layer and having an opening disposed on the first conductive portion. In this case, the conductive portion is The metal layer is not electrically connected. Since the metal layer is generally excellent in thermal conductivity, it can conduct or radiate heat quickly. When the thin film element substrate of the present invention is used for an organic EL element, the light emission characteristics are improved for a long time. In addition, it is possible to maintain stable over a long period of time, to achieve uniform light emission without light emission unevenness, and to shorten the lifetime and reduce element destruction. Moreover, since the conducting portion is not conducted with the metal layer, it is possible to take out the wiring from the front surface to the back surface.

  Moreover, in this invention, it is preferable that the difference of the linear thermal expansion coefficient of the said insulating layer and the linear thermal expansion coefficient of the said metal layer is 15 ppm / degrees C or less. This is because as the linear thermal expansion coefficients of the insulating layer and the metal layer are closer, the warpage of the thin film element substrate can be suppressed and the adhesion between the insulating layer and the metal layer can be increased.

  Furthermore, in this invention, it is preferable that the linear thermal expansion coefficient of the said metal layer exists in the range of 0 ppm / degrees C-25 ppm / degrees C. If the linear thermal expansion coefficient of the metal layer is within the above range, the linear thermal expansion coefficient of the electrode of the metal layer and the thin film element portion can be made close, and the warpage of the substrate for the thin film element can be suppressed, and the thin film element portion It is because it can suppress that peeling and a crack arise in an electrode of this.

  Moreover, in this invention, it is preferable that the edge part of the said pattern of the metal layer is insulated with the coating layer. It is because the metal layer and the conductive portion can be insulated by the end portions of the metal layer pattern being insulated by the covering layer, and the wiring can be taken out from the front surface to the back surface.

  The thin film element substrate of the present invention may further include a conductive portion metal portion formed in the opening of the metal layer, disposed on the first conductive portion, and made of the same material as the metal layer. In this case, the conductive part has the first conductive part and the conductive part metal part. Since the metal part for the conductive part is formed in the opening of the metal layer and is formed independently of the metal layer, the metal layer and the conductive part can be insulated, and the wiring can be taken out from the front surface to the back surface. It becomes possible. Moreover, since the metal part for conduction | electrical_connection parts consists of the same material as a metal layer, the metal part for conduction | electrical_connection parts can be formed simultaneously with patterning of a metal layer, and the formation process of a conduction | electrical_connection part can be shortened.

  In the above case, it is preferable that the thin film element substrate of the present invention further includes a second insulating layer formed on the metal layer and having a second insulating layer through-hole disposed on the conductive part metal part. . This is because by forming the second insulating layer on the metal layer, an electrode, a wiring, or the like can be formed on the second insulating layer so as to be electrically connected to the conductive portion, and the wiring can be easily formed.

  In the above case, the thin film element substrate of the present invention may further include a second conductive portion filled in the second insulating layer through-hole. In this case, the conductive portion is connected to the first conductive portion. The conductive portion metal portion and the second conductive portion are included.

  The thin film element substrate of the present invention is formed on the metal layer and filled in the second insulating layer having the second insulating layer through hole disposed on the first conductive portion and the second insulating layer through hole. The second conductive part may further be included, and in this case, the conductive part includes the first conductive part and the second conductive part.

  Moreover, in this invention, it is preferable that the edge part of the pattern of the said metal layer is insulated by the said insulating layer or the said 2nd insulating layer. That is, the covering layer is preferably an insulating layer or a second insulating layer. This is because the manufacturing process of the thin film element substrate can be simplified.

  Furthermore, in this invention, it is preferable that the said 2nd insulating layer contains a polyimide. In this case, it is preferable that the second insulating layer contains polyimide as a main component. It is because it can be set as the 2nd insulating layer excellent in insulation, heat resistance, and dimensional stability.

  Moreover, in this invention, the contact | adherence layer containing an inorganic compound may be formed in the surface on the opposite side to the said metal layer side surface of the said insulating layer. By forming the adhesion layer, when the thin film element substrate of the present invention is used for a thin film element, the thin film element portion formed on the thin film element substrate of the present invention is prevented from peeling or cracking. Because it can. For example, when the thin film element substrate of the present invention is used for a TFT element, the adhesion between the thin film element substrate and the TFT element portion can be improved, and the TFT element can be prevented from peeling or cracking.

  The present invention also includes the above thin film element substrate, and a thin film element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate. Is connected to the conductive portion of the substrate for a thin film element.

  According to the present invention, since the insulating layer of the above-described thin film element substrate is excellent in surface smoothness, it is possible to suppress the performance deterioration of the thin film element portion due to fine unevenness and realize good element characteristics. Further, according to the present invention, since the thin film element substrate described above is provided, the wiring can be taken out on the surface opposite to the surface on which the thin film element portion of the thin film element substrate is disposed, and the narrow frame, high aperture ratio It is possible to achieve high density, etc.

  Moreover, the thin film element of this invention may further have the transparent sealing substrate arrange | positioned on the said thin film element part. This is because the element is sealed by the transparent sealing substrate, and entry of moisture and oxygen from the outside can be prevented.

  In the present invention, the thin film element portion may be a TFT element portion.

  Furthermore, in the present invention, the thin film element portion is formed on the back electrode layer formed on the insulating layer, the EL layer formed on the back electrode layer and including at least the organic light emitting layer, and the EL layer. A transparent electrode layer, wherein the conductive portion of the thin film element substrate is connected to the transparent electrode layer and the back electrode layer is connected to the back electrode layer. You may have the electroconductive part for electrode layers.

  In the present invention, the thin film element portion includes a back electrode layer formed on the insulating layer, a display medium layer formed on the back electrode layer, and a transparent electrode formed on the display medium layer. A conductive portion for the transparent electrode layer connected to the transparent electrode layer, and a conductive portion for the back electrode layer connected to the back electrode layer. May have a part.

  The present invention includes a thin film element substrate, a TFT element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate, and a surface of the insulating layer of the thin film element substrate. Formed on a surface having a roughness Ra of 5 nm or less and connected to the TFT element part, formed on the back electrode layer, an EL layer including at least an organic light emitting layer, and the EL layer It has an organic EL element part having a formed transparent electrode layer and a transparent sealing substrate disposed on the organic EL element part, and the electrode of the TFT element part is connected to the conduction part of the thin film element substrate An organic EL display device is provided.

  The present invention also provides a thin film element substrate, a TFT element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate, and the insulating layer of the thin film element substrate. Formed on a surface having a surface roughness Ra of 5 nm or less, connected to the TFT element portion, a display medium layer formed on the back electrode layer, and formed on the display medium layer It has an electronic paper element part having a transparent electrode layer and a transparent sealing substrate disposed on the electronic paper element part, and an electrode of the TFT element part is connected to a conduction part of the thin film element substrate. An electronic paper characterized by the above is provided.

  According to the present invention, since the insulating layer of the thin film element substrate described above is excellent in surface smoothness, it is possible to suppress the deterioration of the performance of the TFT element due to fine unevenness and realize good element characteristics. Further, according to the present invention, since the thin film element substrate described above is provided, the wiring can be taken out on the surface opposite to the surface on which the elements of the thin film element substrate are arranged, and the narrow frame, high aperture ratio, high Density and the like can be achieved.

  In the present invention, since the insulating layer is excellent in surface smoothness, it is possible to prevent deterioration of the characteristics of the thin film element due to fine irregularities, and a narrow frame, high aperture ratio, high density, etc. are realized by the conductive portion. There is an effect that is possible.

It is the schematic sectional drawing and top view which show an example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows an example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is the schematic sectional drawing and the top view which show the other example of the board | substrate for thin film elements of this invention. It is the schematic sectional drawing and the top view which show the other example of the board | substrate for thin film elements of this invention. It is the schematic sectional drawing and the top view which show the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic plan view which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic plan view which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic plan view which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention. It is process drawing which shows an example of the manufacturing method of the board | substrate for thin film elements of this invention. It is process drawing which shows the other example of the manufacturing method of the board | substrate for thin film elements of this invention. It is process drawing which shows the other example of the manufacturing method of the board | substrate for thin film elements of this invention. It is process drawing which shows the other example of the manufacturing method of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic sectional drawing which shows the other example of the thin film element (when a thin film element part is an organic EL element part) of this invention. It is a schematic plan view which shows the other example of the board | substrate for thin film elements of this invention. It is a schematic sectional drawing which shows the other example of the board | substrate for thin film elements of this invention.

  Hereinafter, the substrate for a thin film element, the thin film element, the organic EL display device, and the electronic paper of the present invention will be described in detail.

A. First, a thin film element substrate of the present invention will be described.
The thin film element substrate of the present invention is a thin film element substrate used for a thin film element, has an insulating layer through hole, and has an insulating layer with a surface roughness Ra of 5 nm or less, and the insulating layer through hole is filled. The first conductive portion is formed in the thickness direction of the thin film element substrate, is electrically connected to the front and back of the thin film element substrate, and has at least the first conductive portion. is there.

The thickness direction of the thin film element substrate refers to a direction perpendicular to the surface on which the thin film element portion is disposed when the thin film element substrate of the present invention is used for a thin film element.
The front and back of the thin film element substrate refers to a surface on which the thin film element portion is disposed when the thin film element substrate of the present invention is used for a thin film element, and a surface opposite to this surface.

The thin film element substrate of the present invention will be described with reference to the drawings.
1A and 1B are a schematic cross-sectional view and a plan view showing an example of the substrate for a thin film element of the present invention, and FIG. 1A is a cross-sectional view taken along line AA in FIG. is there. A thin film element substrate 1 illustrated in FIGS. 1A and 1B includes an insulating layer 2 having an insulating layer through hole 12h, a first conductive portion 3 filled in the insulating layer through hole 12h, and a thin film element substrate. The conductive part 10 is formed in the thickness direction of the substrate 1, conducts the front and back of the thin film element substrate 1, and has the first conductive part 3. In the thin film element substrate 1, the wiring can be taken out from the front surface to the back surface through the conducting portion 10. In the thin film element substrate 1, the surface roughness Ra of at least one surface of the insulating layer 2 is within a predetermined range, and the surface roughness Ra of the insulating layer 2 is within a predetermined range. An element is formed and used.

FIG. 2 is a schematic cross-sectional view showing an example of an organic EL device including the thin film element substrate of the present invention. The organic EL device 20 illustrated in FIG. 2 includes the thin film element substrate 1 illustrated in FIGS. The organic EL device 20 includes a thin film element substrate 1, an organic EL element portion 21 formed on a surface where the surface roughness Ra of the insulating layer 2 of the thin film element substrate 1 is within a predetermined range, and an organic EL element portion And a sealing portion 26 for sealing the element by bonding the thin film element substrate 1 and the transparent sealing substrate 25 to each other. The organic EL element unit 21 includes a back electrode layer 22, an EL layer 23 formed on the back electrode layer 22 and including an organic light emitting layer, and a transparent electrode layer 24 formed on the EL layer 23. . Of the two conducting portions 10 a and 10 b of the thin film element substrate 1, one back electrode layer conducting portion 10 a is connected to the back electrode layer 22, and the other transparent electrode layer conducting portion 10 b is connected to the transparent electrode layer 24. Has been. This organic EL device 20 is a top emission type in which light emission L is extracted from the transparent electrode layer 24 side.
In addition, the board | substrate for thin film elements of this invention can be used for thin film elements, such as electronic paper, a TFT element, and a thin film solar cell, including an organic EL element.

As described above, the thin film element substrate according to the present invention is used with elements formed on the surface where the surface roughness Ra of the insulating layer is within a predetermined range. According to the present invention, since the insulating layer is excellent in surface smoothness on the surface on which the element is formed, it is possible to prevent deterioration in characteristics of the thin film element due to fine unevenness.
Here, conventionally, in a wiring board used for an electronic device such as a semiconductor device, an adhesion strength between an insulating layer and a layer (mainly a metal wiring layer) formed on the insulating layer is regarded as important. If the surface smoothness of the insulating layer is high, the adhesion with the layer formed on the insulating layer tends to be lowered. Therefore, it is desirable that the surface smoothness of the insulating layer is not too high in order to improve the adhesion. On the other hand, in the present invention, in order to prevent deterioration of the electrical performance of the TFT element due to fine unevenness, the surface roughness of the insulating layer is set within a predetermined range and has surface smoothness.

  Further, when the thin film element substrate of the present invention is used for a thin film element, it is possible to take out the wiring on the surface opposite to the surface on which the element of the thin film element substrate is disposed. In particular, when the thin film element substrate of the present invention is used for an organic EL element or electronic paper, the light emitting area and the display area can be sufficiently enlarged. Thereby, a narrow frame, a high aperture ratio, a high density, and the like can be realized. This is particularly advantageous when taking multiple surfaces. Furthermore, it is possible to dispose the TFT element portion on one surface of the thin film element substrate and the organic EL element portion or the electronic paper element portion on the other surface.

  In the present invention, a metal is usually used for the first conduction part, and since the metal is generally excellent in thermal conductivity, the surface on which the element of the thin film element substrate is disposed through the conduction part; Can also release heat to the opposite side. Therefore, when the thin film element substrate of the present invention is used for an organic EL element, it is possible to suppress performance deterioration due to heat generation of the organic EL element.

3A to 3C are a schematic cross-sectional view and a plan view showing another example of the substrate for a thin film element of the present invention, and FIG. 3A is a view in B of FIGS. 3B and 3C. FIGS. 3B and 3C are cross-sectional views taken along line -B, and are plan views viewed from the surface of the thin film element substrate 1 on the metal layer 4 side.
The thin film element substrate 1 illustrated in FIGS. 3A to 3C includes an insulating layer 2 having an insulating layer through-hole 12h, a first conductive portion 3 filled in the insulating layer through-hole 12h, and an insulating layer 2. Formed in a pattern on the metal layer 4 having an opening 14h disposed on the first conductive portion 3 and formed on the surface opposite to the surface on the metal layer 4 side of the insulating layer 2 in a pattern. And a second metal layer 5 a disposed on the first conduction part 3. And the conduction | electrical_connection part 10 is comprised by the 1st conduction | electrical_connection part 3 with which the insulating layer through-hole 12h was filled. In FIG. 3 (b), the opening 14 h of the metal layer 4 is provided such that a plurality of first conductive parts 3 (insulating layer through-holes 12 h) are disposed in the opening 14 h of one metal layer 4. Yes. On the other hand, in FIG.3 (c), the opening part 14h of the metal layer 4 is provided for every 1st conduction | electrical_connection part 3 (insulating layer through-hole 12h).
In the thin film element substrate 1, since the opening 14 h of the metal layer 4 is disposed on the first conductive portion 3, the metal layer 4 and the conductive portion 10 are not conductive. Therefore, it is possible to take out the wiring from the surface on the second metal layer 5a side to the surface on the metal layer 4 side through the conducting portion 10.
In the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 on the second metal layer 5a side is within a predetermined range, and the surface of the insulating layer 2 on the second metal layer 5a side. An element is formed and used.

4 (a) to 4 (c) are a schematic cross-sectional view and a plan view showing another example of the thin film element substrate of the present invention, and FIG. 4 (a) is a diagram of C in FIGS. 4 (b) and 4 (c). FIGS. 4B and 4C are cross-sectional views taken along line -C, and are plan views viewed from the surface of the thin film element substrate 1 on the second insulating layer 6 side. 4B and 4C, a part of the second insulating layer 6 is omitted.
The thin film element substrate 1 illustrated in FIGS. 4A to 4C includes an insulating layer 2 having an insulating layer through-hole 12h, a first conductive portion 3 filled in the insulating layer through-hole 12h, and an insulating layer 2. A metal layer 4 having an opening 14h disposed on the first conductive portion 3 and formed in a pattern on the second conductive layer, and a second insulating layer formed on the metal layer 4 and disposed on the first conductive portion 3 It has the 2nd insulating layer 6 which has the through-hole 16h, and the 2nd conduction | electrical_connection part 7 with which the 2nd insulating-layer through-hole 16h was filled. And the conduction | electrical_connection part 10 is comprised by the 1st conduction | electrical_connection part 3 with which the insulating layer through-hole 12h was filled, and the 2nd conduction | electrical_connection part 7 with which the 2nd insulation layer through-hole 16h was filled. In FIG. 4B, the opening 14 h of the metal layer 4 is provided so that a plurality of first conductive portions 3 (insulating layer through holes 12 h) are disposed in the opening 14 h of one metal layer 4. Yes. On the other hand, in FIG.4 (c), the opening part 14h of the metal layer 4 is provided for every 1st conduction | electrical_connection part 3 (insulating layer through-hole 12h). Moreover, the edge part 14s of the pattern of the metal layer 4 is insulated with the coating layer (in FIG. 4A, 2nd insulating layer 6), and parts other than the conduction | electrical_connection part 10 in the opening part 14h of the metal layer 4 are coating layers. (The second insulating layer 6 in FIG. 4A) is filled.
In the thin film element substrate 1, the opening portion 14 h of the metal layer 4 is disposed on the first conduction portion 3, the second conduction portion 7 is disposed on the first conduction portion 3, and the opening portion 14 h of the metal layer 4 is within the opening portion 14 h. Since the portion other than the conductive portion 10 is filled with the coating layer (second insulating layer 6 in FIG. 4A), the metal layer 4 and the conductive portion 10 are not conductive. Therefore, it is possible to take out the wiring from the surface on the insulating layer 2 side to the surface on the second insulating layer 6 side through the conducting portion 10.
Further, in the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 opposite to the surface of the metal layer 4 is within a predetermined range, and the metal layer 4 side of the insulating layer 2 An element is formed on the surface opposite to the surface of the device.

5 (a) and 5 (b) are a schematic cross-sectional view and a plan view showing another example of the thin film element substrate of the present invention, and FIG. 5 (a) is a cross-sectional view taken along the line DD in FIG. 5 (b). FIG. 5B is a plan view of the thin film element substrate 1 as viewed from the surface on the metal layer 4 side.
The thin film element substrate 1 illustrated in FIGS. 5A and 5B includes an insulating layer 2 having an insulating layer through-hole 12h, a first conductive portion 3 filled in the insulating layer through-hole 12h, and an insulating layer 2. The metal layer 4 is formed in a pattern on the first conductive portion 3 and has an opening 14 h disposed on the first conductive portion 3. The metal layer 4 is formed in the opening 14 h of the metal layer 4 and disposed on the first conductive portion 3. And a conductive portion metal portion 8. And the conduction | electrical_connection part 10 is comprised by the 1st conduction | electrical_connection part 3 with which the insulating layer through-hole 12h was filled, and the metal part 8 for conduction | electrical_connection parts arrange | positioned on the 1st conduction | electrical_connection part 3. FIG.
In the thin film element substrate 1, the opening portion 14 h of the metal layer 4 is disposed on the first conduction portion 3, and the conduction portion metal portion 8 is independent of the metal layer 4 in the opening portion 14 h of the metal layer 4. Therefore, the metal layer 4 and the conductive portion 10 are not conductive. Therefore, it is possible to take out the wiring from the surface on the insulating layer 2 side to the surface on the metal layer 4 side through the conductive portion 10.
Further, in the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 opposite to the surface of the metal layer 4 is within a predetermined range, and the metal layer 4 side of the insulating layer 2 An element is formed on the surface opposite to the surface of the device.

FIG. 6 is a schematic sectional view showing another example of the thin film element substrate of the present invention. The thin film element substrate 1 illustrated in FIG. 6 is the same as the thin film element substrate 1 shown in FIGS. 5A and 5B, but the end 14 s of the pattern of the metal layer 4 is insulated by the covering layer 15. A portion other than the conductive portion metal portion 8 in the opening 14 h is filled with the coating layer 15.
In the thin film element substrate 1, the opening portion 14 h of the metal layer 4 is disposed on the first conduction portion 3, and the conduction portion metal portion 8 is independent of the metal layer 4 in the opening portion 14 h of the metal layer 4. Since the portion other than the conductive portion metal portion 8 in the opening 14h of the metal layer 4 is filled with the coating layer 15, the metal layer 4 and the conductive portion 10 are not conductive. Therefore, it is possible to take out the wiring from the surface on the insulating layer 2 side to the surface on the metal layer 4 side through the conductive portion 10.
Further, in the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 opposite to the surface of the metal layer 4 is within a predetermined range, and the metal layer 4 side of the insulating layer 2 An element is formed on the surface opposite to the surface of the device.

FIG. 7 is a schematic sectional view showing another example of the thin film element substrate of the present invention. The thin film element substrate 1 illustrated in FIG. 7 includes a thin film element substrate 1 shown in FIGS. 5A and 5B formed on the metal layer 4 and disposed on the conductive portion metal portion 8. The second insulating layer 6 further includes two insulating layer through holes 16h. The end portion 14s of the pattern of the metal layer 4 is insulated by a covering layer (second insulating layer 6 in FIG. 7), and the portion other than the conductive portion metal portion 8 in the opening 14h of the metal layer 4 is covered with the covering layer (see FIG. 7 is filled with a second insulating layer 6).
In the thin film element substrate 1, the opening portion 14 h of the metal layer 4 is disposed on the first conduction portion 3, and the conduction portion metal portion 8 is independent of the metal layer 4 in the opening portion 14 h of the metal layer 4. Since the portion other than the conductive portion metal portion 8 in the opening 14h of the metal layer 4 is filled with the coating layer (second insulating layer 6 in FIG. 7), the metal layer 4 and the conductive portion are formed. 10 is not conducting. Therefore, it is possible to take out the wiring from the surface on the insulating layer 2 side to the surface on the second insulating layer 6 side through the conducting portion 10.
Further, in the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 opposite to the surface of the metal layer 4 is within a predetermined range, and the metal layer 4 side of the insulating layer 2 An element is formed on the surface opposite to the surface of the device.

FIG. 8 is a schematic cross-sectional view showing another example of the thin film element substrate of the present invention. The thin film element substrate 1 illustrated in FIG. 8 further includes the second conductive portion 7 in which the thin film element substrate 1 illustrated in FIG. 7 is filled in the second insulating layer through hole 16h. The conducting portion 10 is filled in the first conducting portion 3 filled in the insulating layer through-hole 12h, the conducting portion metal portion 8 disposed on the first conducting portion 3, and the second insulating layer through-hole 16h. It is comprised by the 2nd conduction | electrical_connection part 7. FIG.
In the thin film element substrate 1, the opening portion 14 h of the metal layer 4 is disposed on the first conduction portion 3, and the conduction portion metal portion 8 is independent of the metal layer 4 in the opening portion 14 h of the metal layer 4. Since the portion other than the conductive portion metal portion 8 in the opening 14h of the metal layer 4 is filled with the coating layer (second insulating layer 6 in FIG. 8), the metal layer 4 and the conductive portion are formed. 10 is not conducting. Therefore, it is possible to take out the wiring from the surface on the insulating layer 2 side to the surface on the second insulating layer 6 side through the conducting portion 10.
Further, in the thin film element substrate 1, the surface roughness Ra of the surface of the insulating layer 2 opposite to the surface of the metal layer 4 is within a predetermined range, and the metal layer 4 side of the insulating layer 2 An element is formed on the surface opposite to the surface of the device.

As illustrated in FIGS. 3 to 8, the thin film element substrate 1 of the present invention is formed in a pattern on the insulating layer 2 and has a metal layer 4 having an opening 14 h disposed on the first conduction portion 3. Can further be included. In this case, the metal layer 4 and the conducting part 10 are not conducting.
When the metal layer is thus formed, the thin film element substrate of the present invention can be divided into two modes.

The first mode includes an insulating layer 2 having an insulating layer through-hole 12h, a first conductive portion 3 filled in the insulating layer through-hole 12h, and an insulating layer as illustrated in FIGS. 5 (a) and 5 (b). 2 is formed in a pattern on the first conductive portion 3 and has an opening 14 h disposed on the first conductive portion 3. The metal layer 4 is formed in the opening 14 h of the metal layer 4 and disposed on the first conductive portion 3. The conductive layer metal portion 8 made of the same material as the metal layer 4 is formed in the thickness direction of the thin film element substrate 1 and is electrically connected to the front and back of the thin film element substrate 1. At least for the first conductive portion 3 and the conductive portion The thin film element substrate 1 includes a conductive portion 10 having a metal portion 8, and the conductive portion 10 is not conductive to the metal layer 4.
In the first embodiment, as illustrated in FIG. 7, the thin film element substrate 1 is formed on the metal layer 4 and has a second insulating layer through-hole 16 h disposed on the conductive portion metal portion 8. Two insulating layers 6 can be further provided.
In the first mode, as illustrated in FIG. 8, the thin film element substrate 1 can further include a second conduction portion 7 filled in the second insulating layer through-hole 16 h.

The second mode includes an insulating layer 2 having an insulating layer through hole 12h, a first conductive portion 3 filled in the insulating layer through hole 12h, and an insulating layer as illustrated in FIGS. 3 (a) to 3 (c). 2 is formed in a pattern shape on the first conductive portion 3 and has an opening 14h disposed on the first conductive portion 3, and is formed in the thickness direction of the thin film element substrate 1, and is electrically connected to the front and back of the thin film element substrate 1. In addition, the thin film element substrate 1 includes at least the conductive portion 10 having the first conductive portion 3, and the conductive portion 10 is not conductive to the metal layer 4.
In the second mode, as illustrated in FIGS. 4A to 4C, a second insulating layer through-hole 16 h is formed on the metal layer 4 and disposed on the first conduction part 3. The insulating layer 6 and the second conductive portion 7 filled in the second insulating layer through-hole 16h can be further included.

  Hereinafter, each structure in the board | substrate for thin film elements of this invention is demonstrated.

1. Insulating layer The insulating layer in this invention has an insulating-layer through-hole, and surface roughness Ra is 5 nm or less.

  When the thin film element substrate of the present invention is used for a thin film element, since the thin film element portion is formed on the insulating layer, the insulating layer has surface smoothness. The surface roughness Ra of the insulating layer is 5 nm or less, preferably 2 nm or less. When the thin film element substrate of the present invention is used for, for example, a TFT element, if the surface roughness Ra of the insulating layer is too large, the electrical performance of the TFT element may be deteriorated due to fine irregularities.

  The surface roughness Ra is a value measured using an atomic force microscope (AFM). For example, when measuring using AFM, using Nanoscope V multimode (Veeco), in tapping mode, cantilever: MPP11100, scanning range: 10 μm × 10 μm, scanning speed: 0.5 Hz, surface shape Ra can be obtained by taking an image and calculating an average deviation from the center line of the roughness curve calculated from the obtained image.

  The surface on which the surface roughness Ra of the insulating layer is within a predetermined range is a surface on which an element is formed. As will be described later, when the metal layer is formed in a pattern on the insulating layer, the surface of the insulating layer opposite to the surface on the metal layer side is the surface on which the element is formed, and the metal of the insulating layer The surface roughness Ra of the surface opposite to the layer side surface is set within a predetermined range. On the other hand, when an arbitrary layer such as a metal layer is not formed on the insulating layer, one surface of the insulating layer is a surface on which an element is formed, and the surface of at least one surface of the insulating layer The roughness Ra is set within a predetermined range. In this case, the surface roughness Ra of at least one surface of the insulating layer only needs to be within a predetermined range, and the surface roughness Ra of only one surface of the insulating layer may be within the predetermined range. The surface roughness Ra on both sides may be within a predetermined range. In this case, when the TFT element part is formed on one surface of the thin film element substrate and the organic EL element part or the electronic paper element part is formed on the other surface, the surface roughness of both surfaces of the insulating layer is formed. Ra is within a predetermined range.

When the metal layer is formed in a pattern on the insulating layer, the difference between the linear thermal expansion coefficient of the insulating layer and the linear thermal expansion coefficient of the metal layer is 15 ppm / ° C. or less from the viewpoint of dimensional stability. It is preferably 10 ppm / ° C. or less, more preferably 5 ppm / ° C. or less. The closer the linear thermal expansion coefficient between the insulating layer and the metal layer, the more the warpage of the thin film element substrate is suppressed, and the stress at the interface between the insulating layer and the metal layer when the thermal environment of the thin film element substrate changes. Becomes smaller and adhesion is improved. In addition, it is preferable that the thin film element substrate of the present invention does not warp in a temperature environment in the range of 0 ° C. to 100 ° C. for handling, but since the linear thermal expansion coefficient of the insulating layer is large, If the difference in coefficient of linear thermal expansion from the metal layer is greatly different, the thin film element substrate will be warped due to changes in the thermal environment.
The thin film element substrate is not warped when the thin film element substrate is cut into a strip shape having a width of 10 mm and a length of 50 mm, and one short side of the obtained sample is placed on a horizontal and smooth table. When fixed, it means that the flying distance from the surface of the other short side of the sample is 1.0 mm or less.
For example, when electric conductivity and thermal conductivity are important, it is desirable to use copper, silver, and aluminum for the metal layer. In this case, the linear thermal expansion coefficient of the insulating layer is that of copper, silver, and aluminum. It is desirable that the difference from the expansion coefficient is small.

  In addition, the coefficient of linear thermal expansion of the insulating layer is not limited to the metal layer, but the second metal layer, the third metal layer, the thin film element portion, the adhesion layer, the electrode and the wiring formed on the insulating layer such as the wiring described later. It is desirable to be close to the linear thermal expansion coefficient. This is because if the linear thermal expansion coefficient of the insulating layer is different from the linear thermal expansion coefficient of the layer formed on the insulating layer, the dimensional stability is lowered and warping or cracking is caused. The layer formed on the insulating layer is an oxide of metals such as Zn, In, Ga, Cd, Ti, St, Sn, Te, Mg, W, Mo, Cu, Al, Fe, Sr, Ni, Ir, and Mg. And non-metallic oxides such as Si, Ge, B, and nitrides, sulfides, selenides, and mixtures of the above elements (mixed at the atomic level like multi-element ceramics) In the case where the main component is an inorganic material such as an inorganic layer, the linear thermal expansion coefficient of the insulating layer is also smaller because these inorganic materials include those having a linear thermal expansion coefficient of 10 ppm / ° C. or less. Is desirable.

  Specifically, the linear thermal expansion coefficient of the insulating layer is preferably in the range of 0 ppm / ° C. to 30 ppm / ° C., more preferably in the range of 0 ppm / ° C. to 25 ppm / ° C., from the viewpoint of dimensional stability. More preferably, it is in the range of 0 ppm / ° C to 18 ppm / ° C, particularly preferably in the range of 0 ppm / ° C to 12 ppm / ° C, and most preferably in the range of 0 ppm / ° C to 7 ppm / ° C.

The linear thermal expansion coefficient is measured as follows. First, a film having only an insulating layer is produced. The method for producing the insulating layer film is as follows. The insulating layer film is prepared on a heat-resistant film (Upilex S 50S (manufactured by Ube Industries)) or a glass substrate, and then the insulating layer film is peeled off or the insulating layer is formed on the metal substrate. There is a method of obtaining an insulating layer film by etching a metal after producing a film. Next, the obtained insulating layer film is cut into a width of 5 mm and a length of 20 mm to obtain an evaluation sample. The linear thermal expansion coefficient is measured by a thermomechanical analyzer (for example, Thermo Plus TMA8310 (manufactured by Rigaku Corporation)). The measurement conditions were a heating rate of 10 ° C./min, a tensile load of 1 g / 25,000 μm ² so that the weight per cross-sectional area of the evaluation sample was the same, and an average linear thermal expansion within the range of 100 ° C. to 200 ° C. The coefficient is the linear thermal expansion coefficient (CTE).

The insulating layer has an insulating property. Specifically, the volume resistance of the insulating layer is preferably 1.0 × 10 ⁹ Ω · m or more, more preferably 1.0 × 10 ¹⁰ Ω · m or more, and 1.0 × 10 ^11. More preferably, it is Ω · m or more.
The volume resistance can be measured by a method based on standards such as JIS K6911, JIS C2318, and ASTM D257.

  The material used for the insulating layer is not particularly limited as long as the insulating layer through-hole can be formed and satisfies the above-described characteristics. For example, polyimide, phenol resin, PPS (polyphenylene sulfide), PPE ( Polyphenylene ether), PEK (polyetherketone), PEEK (polyetheretherketone), polyphthalamide, PTFE (polyethylene terephthalate), acrylic resin, polycarbonate, polystyrene, polypropylene, polycyclooxide, epoxy resin and the like. Among these, polyimide, PPS (polyphenylene sulfide), PPE (polyphenylene ether), and epoxy resin are preferably used from the viewpoints of heat resistance and insulation.

  Especially, it is preferable that an insulating layer contains a polyimide, and it is preferable to have a polyimide as a main component especially. It is because it can be set as the insulating layer excellent in insulation, heat resistance, and dimensional stability. In addition, by using polyimide as a main component, the insulating layer can be thinned, the thermal conductivity of the insulating layer is improved, and a thin film element substrate having excellent thermal conductivity can be obtained. Furthermore, as will be described later, in order to reduce the diameter of the insulating layer through-hole, the insulating layer is preferably thin. When the insulating layer is thin, it is desirable to use polyimide from the viewpoint of insulation.

  In addition, that an insulating layer has a polyimide as a main component means that an insulating layer contains a polyimide to the extent which satisfies the above-mentioned characteristic. Specifically, the content of the polyimide in the insulating layer is 75% by mass or more, preferably 90% by mass or more, and it is particularly preferable that the insulating layer is made of only polyimide. If the content of the polyimide in the insulating layer is in the above range, it is possible to exhibit sufficient characteristics to achieve the object of the present invention. The higher the content of the polyimide, the higher the inherent heat resistance and insulation of the polyimide. The characteristics such as property are improved.

  In general, polyimide has water absorption. Many semiconductor materials used for thin film elements such as organic EL elements, electronic paper, and TFT elements are vulnerable to moisture, and electronic paper requires that the humidity inside the element be kept constant. In order to reduce and achieve high reliability in the presence of moisture, the insulating layer preferably has a relatively low water absorption. One index of water absorption is the hygroscopic expansion coefficient. Therefore, the smaller the hygroscopic expansion coefficient of the insulating layer, the better. Specifically, it is preferably in the range of 0 ppm /% RH to 15 ppm /% RH, more preferably 0 ppm /% RH to 12 ppm /% RH. Within the range, more preferably within the range of 0 ppm /% RH to 10 ppm /% RH. The smaller the hygroscopic expansion coefficient, the smaller the water absorption. Further, if the hygroscopic expansion coefficient of the insulating layer is in the above range, the water absorption of the insulating layer can be sufficiently reduced, and the thin film element substrate can be easily stored. When producing, the process becomes simple. Furthermore, the smaller the hygroscopic expansion coefficient, the better the dimensional stability. If the hygroscopic expansion coefficient of the insulating layer is large, the substrate for the thin film element warps as the humidity increases due to the difference in expansion coefficient from the metal layer whose hygroscopic expansion coefficient is almost zero. It may decrease. Therefore, it is preferable that the hygroscopic expansion coefficient is small even when a wet process is performed in the manufacturing process.

The hygroscopic expansion coefficient is measured as follows. First, a film having only an insulating layer is produced. The method for producing the insulating layer film is as described above. Next, the obtained insulating layer film is cut into a width of 5 mm and a length of 20 mm to obtain an evaluation sample. The hygroscopic expansion coefficient is measured by a humidity variable mechanical analyzer (Thermo Plus TMA8310 (manufactured by Rigaku Corporation)). For example, the temperature is kept constant at 25 ° C., the humidity is first set to a stable state in an environment of 15% RH, the state is maintained for about 30 minutes to 2 hours, and the humidity of the measurement site is set to 20%. RH and hold for 30 minutes to 2 hours until the sample is stable. Thereafter, the humidity is changed to 50% RH, and the difference between the sample length when the humidity becomes stable and the sample length when the humidity becomes stable at 20% RH is expressed as a change in humidity (in this case, 50-20). 30) and the value divided by the sample length is the hygroscopic expansion coefficient (CHE). At the time of measurement, the tensile weight is set to 1 g / 25000 μm ² so that the weight per cross-sectional area of the evaluation sample becomes the same.

  The polyimide constituting the insulating layer is not particularly limited as long as it satisfies the above characteristics. For example, it is possible to control the hygroscopic expansion coefficient and the linear thermal expansion coefficient by appropriately selecting the structure of polyimide.

  The polyimide is preferably a polyimide containing an aromatic skeleton from the viewpoint of making the linear thermal expansion coefficient and hygroscopic expansion coefficient of the insulating layer suitable for the thin film element substrate of the present invention. Among polyimides, a polyimide containing an aromatic skeleton is derived from the rigid and highly planar skeleton, and is excellent in heat resistance, insulation in a thin film, and has a low coefficient of linear thermal expansion. It is preferably used for an insulating layer of a substrate for use.

  A general polyimide has a repeating unit represented by the following formula (1).

(In Formula (1), R ¹ is a tetravalent organic group, R ² is a divalent organic group, and R ¹ and R ² that are repeated may be the same or different. n is a natural number of 1 or more.)
In the formula (1), generally, R ¹ is a structure derived from tetracarboxylic dianhydride, and R ² is a structure derived from diamine.

  Examples of tetracarboxylic dianhydrides applicable to polyimide include ethylene tetracarboxylic dianhydride, butane tetracarboxylic dianhydride, cyclobutane tetracarboxylic dianhydride, methylcyclobutane tetracarboxylic dianhydride, cyclohexane Aliphatic tetracarboxylic dianhydrides such as pentanetetracarboxylic dianhydride; pyromellitic dianhydride, 3,3 ′, 4,4′-benzophenone tetracarboxylic dianhydride, 2,2 ′, 3 3′-benzophenone tetracarboxylic dianhydride, 2,3 ′, 3,4′-benzophenone tetracarboxylic dianhydride, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 2,2 ', 3,3'-biphenyltetracarboxylic dianhydride, 2,3', 3,4'-biphenyltetracarboxylic dianhydride, 2,2 , 6,6'-biphenyltetracarboxylic dianhydride, 2,2-bis (3,4-dicarboxyphenyl) propane dianhydride, 2,2-bis (2,3-dicarboxyphenyl) propane dianhydride , Bis (3,4-dicarboxyphenyl) ether dianhydride, bis (3,4-dicarboxyphenyl) sulfone dianhydride, 1,1-bis (2,3-dicarboxyphenyl) ethane dianhydride Bis (2,3-dicarboxyphenyl) methane dianhydride, bis (3,4-dicarboxyphenyl) methane dianhydride, 2,2-bis (3,4-dicarboxyphenyl) -1,1, 1,3,3,3-hexafluoropropane dianhydride, 2,2-bis (2,3-dicarboxyphenyl) -1,1,1,3,3,3-hexafluoropropane dianhydride, , 3-bis [( , 4-Dicarboxy) benzoyl] benzene dianhydride, 1,4-bis [(3,4-dicarboxy) benzoyl] benzene dianhydride, 2,2-bis {4- [4- (1,2- Dicarboxy) phenoxy] phenyl} propane dianhydride, 2,2-bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} propane dianhydride, bis {4- [4- (1, 2-dicarboxy) phenoxy] phenyl} ketone dianhydride, bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride, 4,4′-bis [4- (1, 2-dicarboxy) phenoxy] biphenyl dianhydride, 4,4′-bis [3- (1,2-dicarboxy) phenoxy] biphenyl dianhydride, bis {4- [4- (1,2-dicarboxy) ) Phenoxy] phenyl} ke Ton dianhydride, bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} ketone dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} sulfone Anhydride, bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} sulfone dianhydride, bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} sulfide dianhydride Bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} sulfide dianhydride, 2,2-bis {4- [4- (1,2-dicarboxy) phenoxy] phenyl} -1 , 1,1,3,3,3-hexafluoropropane dianhydride, 2,2-bis {4- [3- (1,2-dicarboxy) phenoxy] phenyl} -1,1,1,3 3,3-hexafluoropropane 2,3,6,7-naphthalenetetracarboxylic dianhydride, 1,1,1,3,3,3-hexafluoro-2,2-bis (2,3- or 3,4-dicarboxyl Phenyl) propane dianhydride, 1,4,5,8-naphthalenetetracarboxylic dianhydride, 1,2,5,6-naphthalenetetracarboxylic dianhydride, 1,2,3,4-benzenetetracarboxylic Acid dianhydride, 3,4,9,10-perylenetetracarboxylic dianhydride, 2,3,6,7-anthracenetetracarboxylic dianhydride, 1,2,7,8-phenanthrenetetracarboxylic acid Dianhydride, pyridinetetracarboxylic dianhydride, sulfonyldiphthalic anhydride, m-terphenyl-3,3 ', 4,4'-tetracarboxylic dianhydride, p-terphenyl-3,3' , 4,4'-Tetracarboxylic Dianhydride, 9,9-bis- (trifluoromethyl) xanthenetetracarboxylic dianhydride, 9-phenyl-9- (trifluoromethyl) xanthenetetracarboxylic dianhydride, 12,14-diphenyl-12, 14-bis (trifluoromethyl) -12H, 14H-5,7-dioxapentacene-2,3,9,10-tetracarboxylic dianhydride, 1,4-bis (3,4-dicarboxytrifluoro) Phenoxy) tetrafluorobenzene dianhydride, 1,4-bis (trifluoromethyl) -2,3,5,6-benzenetetracarboxylic dianhydride, 1- (trifluoromethyl) -2,3,5, 6-benzenetetracarboxylic dianhydride, p-phenylenebistrimellitic acid monoester dianhydride, p-biphenylenebistrimellitic acid monoester dianhydride Which aromatic tetracarboxylic dianhydride, and the like. These may be used alone or in combination of two or more.

On the other hand, a diamine component applicable to the polyimide component can also be used alone or in combination of two or more diamines. The diamine component used is p-phenylenediamine, m-phenylenediamine, o-phenylenediamine, 3,3′-diaminodiphenyl ether, 3,4′-diaminodiphenyl ether, 4,4′-diaminodiphenyl ether, 3,3′- Diaminodiphenyl sulfide, 3,4'-diaminodiphenyl sulfide, 4,4'-diaminodiphenyl sulfide, 3,3'-diaminodiphenyl sulfone, 3,4'-diaminodiphenyl sulfone, 4,4'-diaminodiphenyl sulfone, 3, , 3′-diaminobenzophenone, 4,4′-diaminobenzophenone, 3,4′-diaminobenzophenone, 3,3′-diaminodiphenylmethane, 4,4′-diaminodiphenylmethane, 3,4′-diaminodiphenylmethane, 2,2 -Di (3-aminophenyl) Propane, 2,2-di (4-aminophenyl) propane, 2- (3-aminophenyl) -2- (4-aminophenyl) propane, 2,2-di (3-aminophenyl) -1,1, 1,3,3,3-hexafluoropropane, 2,2-di (4-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 2- (3-aminophenyl) -2 -(4-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 1,1-di (3-aminophenyl) -1-phenylethane, 1,1-di (4-amino) Phenyl) -1-phenylethane, 1- (3-aminophenyl) -1- (4-aminophenyl) -1-phenylethane, 1,3-bis (3-aminophenoxy) benzene, 1,3-bis ( 4-aminophenoxy) benzene, 1, -Bis (3-aminophenoxy) benzene, 1,4-bis (4-aminophenoxy) benzene, 1,3-bis (3-aminobenzoyl) benzene, 1,3-bis (4-aminobenzoyl) benzene, , 4-bis (3-aminobenzoyl) benzene, 1,4-bis (4-aminobenzoyl) benzene, 1,3-bis (3-amino-α, α-dimethylbenzyl) benzene, 1,3-bis ( 4-amino-α, α-dimethylbenzyl) benzene, 1,4-bis (3-amino-α, α-dimethylbenzyl) benzene, 1,4-bis (4-amino-α, α-dimethylbenzyl) benzene 1,3-bis (3-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,3-bis (4-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,4- Bis (3-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,4-bis (4-amino-α, α-ditrifluoromethylbenzyl) benzene, 2,6-bis (3-aminophenoxy) benzo Nitrile, 2,6-bis (3-aminophenoxy) pyridine, 4,4′-bis (3-aminophenoxy) biphenyl, 4,4′-bis (4-aminophenoxy) biphenyl, bis [4- (3- Aminophenoxy) phenyl] ketone, bis [4- (4-aminophenoxy) phenyl] ketone, bis [4- (3-aminophenoxy) phenyl] sulfide, bis [4- (4-aminophenoxy) phenyl] sulfide, bis [4- (3-Aminophenoxy) phenyl] sulfone, bis [4- (4-aminophenoxy) phenyl] sulfone, bis [4- (3-aminophenoxy) phenyl] ether, bis [4- (4-aminophenoxy) phenyl] ether, 2,2-bis [4- (3-aminophenoxy) phenyl] propane, 2,2-bis [4- (4-Aminophenoxy) phenyl] propane, 2,2-bis [3- (3-aminophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 2,2-bis [4 -(4-aminophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane, 1,3-bis [4- (3-aminophenoxy) benzoyl] benzene, 1,3-bis [ 4- (4-aminophenoxy) benzoyl] benzene, 1,4-bis [4- (3-aminophenoxy) benzoyl] benzene, 1,4-bis [4- (4-aminophenoxy) benzo L] benzene, 1,3-bis [4- (3-aminophenoxy) -α, α-dimethylbenzyl] benzene, 1,3-bis [4- (4-aminophenoxy) -α, α-dimethylbenzyl] Benzene, 1,4-bis [4- (3-aminophenoxy) -α, α-dimethylbenzyl] benzene, 1,4-bis [4- (4-aminophenoxy) -α, α-dimethylbenzyl] benzene, 4,4′-bis [4- (4-aminophenoxy) benzoyl] diphenyl ether, 4,4′-bis [4- (4-amino-α, α-dimethylbenzyl) phenoxy] benzophenone, 4,4′-bis [4- (4-Amino-α, α-dimethylbenzyl) phenoxy] diphenylsulfone, 4,4′-bis [4- (4-aminophenoxy) phenoxy] diphenylsulfone, 3,3′-dia Mino-4,4′-diphenoxybenzophenone, 3,3′-diamino-4,4′-dibiphenoxybenzophenone, 3,3′-diamino-4-phenoxybenzophenone, 3,3′-diamino-4-biphenoxy Benzophenone, 6,6′-bis (3-aminophenoxy) -3,3,3 ′, 3′-tetramethyl-1,1′-spirobiindane, 6,6′-bis (4-aminophenoxy) -3, Aromatic amines such as 3,3 ′, 3′-tetramethyl-1,1′-spirobiindane; 1,3-bis (3-aminopropyl) tetramethyldisiloxane, 1,3-bis (4-aminobutyl) ) Tetramethyldisiloxane, α, ω-bis (3-aminopropyl) polydimethylsiloxane, α, ω-bis (3-aminobutyl) polydimethylsiloxane, bis (aminomethyl) A Bis (2-aminoethyl) ether, bis (3-aminopropyl) ether, bis (2-aminomethoxy) ethyl] ether, bis [2- (2-aminoethoxy) ethyl] ether, bis [2- ( 3-aminoprotoxy) ethyl] ether, 1,2-bis (aminomethoxy) ethane, 1,2-bis (2-aminoethoxy) ethane, 1,2-bis [2- (aminomethoxy) ethoxy] ethane, 1,2-bis [2- (2-aminoethoxy) ethoxy] ethane, ethylene glycol bis (3-aminopropyl) ether, diethylene glycol bis (3-aminopropyl) ether, triethylene glycol bis (3-aminopropyl) ether , Ethylenediamine, 1,3-diaminopropane, 1,4-diaminobutane, 1,5-diamino Of 1,6-diaminohexane, 1,7-diaminoheptane, 1,8-diaminooctane, 1,9-diaminononane, 1,10-diaminodecane, 1,11-diaminoundecane, 1,12-diaminododecane Such aliphatic amines; 1,2-diaminocyclohexane, 1,3-diaminocyclohexane, 1,4-diaminocyclohexane, 1,2-di (2-aminoethyl) cyclohexane, 1,3-di (2-aminoethyl) ) Cyclohexane, 1,4-di (2-aminoethyl) cyclohexane, bis (4-aminocyclohexyl) methane, 2,6-bis (aminomethyl) bicyclo [2.2.1] heptane, 2,5- And alicyclic diamines such as bis (aminomethyl) bicyclo [2.2.1] heptane. Examples of guanamines include acetoguanamine, benzoguanamine, and the like, and some or all of the hydrogen atoms on the aromatic ring of the diamine are fluoro group, methyl group, methoxy group, trifluoromethyl group, or trifluoromethoxy group. Diamines substituted with substituents selected from the group can also be used.
Furthermore, depending on the purpose, any one or two or more of the ethynyl group, benzocyclobuten-4′-yl group, vinyl group, allyl group, cyano group, isocyanate group, and isopropenyl group serving as a crosslinking point, Even if it introduce | transduces into some or all of the hydrogen atoms on the aromatic ring of diamine as a substituent, it can be used.

In order to improve the heat resistance and insulation of the insulating layer, it is preferable that the polyimide contains an aromatic skeleton as described above. Since the polyimide containing an aromatic skeleton is derived from its rigid and highly planar skeleton, it is excellent in heat resistance and insulation in a thin film, and is low outgas, so it is preferably used for the insulating layer in the present invention. It is.
In polyimide, it is desirable that the part derived from acid dianhydride has an aromatic structure, and the part derived from diamine also contains an aromatic structure. Therefore, the structure derived from diamine is preferably a structure derived from aromatic diamine. In particular, it is preferable that all of the part derived from acid dianhydride and the part derived from diamine are fully aromatic polyimides containing an aromatic structure.

Here, the wholly aromatic polyimide is obtained by copolymerization of an aromatic acid component and an aromatic amine component, or polymerization of an aromatic acid / amino component. The aromatic acid component is a compound in which all four acid groups forming the polyimide skeleton are substituted on the aromatic ring, and the aromatic amine component is the two amino groups forming the polyimide skeleton. Both are compounds substituted on the aromatic ring, and the aromatic acid / amino component is a compound in which both the acid group and amino group forming the polyimide skeleton are substituted on the aromatic ring. However, as is clear from the specific examples of the above-mentioned aromatic dianhydride and aromatic diamine, it is not necessary for all acid groups or amino groups to be present on the same aromatic ring.
For the above reasons, it is preferable that the polyimide has a copolymerization ratio of the aromatic acid component and / or aromatic amine component as large as possible when heat resistance and dimensional stability are required. Specifically, the proportion of the aromatic acid component in the acid component constituting the repeating unit of the imide structure is preferably 50 mol% or more, particularly preferably 70 mol% or more, and the amine component constituting the repeating unit of the imide structure The proportion of the aromatic amine component in the total is preferably 40 mol% or more, particularly preferably 60 mol% or more, and is preferably a wholly aromatic polyimide.

Among them, it is preferable that 33 mol% or more of R ¹ in the formula (1) is any structure represented by the following formula. This is because there is a merit that the polyimide has excellent heat resistance and exhibits a low linear thermal expansion coefficient.

(In the formula (2), a is a natural number of 0 or 1 or more, A is a single bond (biphenyl structure), an oxygen atom (ether bond), or an ester bond. The linking group is bonded to the 2, 3 or 3, 4 position of the aromatic ring as viewed from the bonding site of the aromatic ring.)

  In particular, when the polyimide having the structure represented by the above (1) includes the structure represented by the above formula (2), low hygroscopic expansion is exhibited. Furthermore, there is also an advantage that it is easily available on the market and is low cost.

The polyimide having the above structure can be a polyimide having high heat resistance and a low linear thermal expansion coefficient. Therefore, the content of the structure represented by the above formula is preferably closer to 100 mol% of R ^{1 in} the above formula (1), but at least 33% of R ^{1 in} the above formula (1) is contained. do it. Among them, the content of the structure represented by the above formula is preferably 50 mol% or more, and more preferably 70 mol% or more of R ^{1 in} the above formula (1).

  As a structure of the acid dianhydride which makes polyimide low moisture absorption, what is represented by following formula (3) is mentioned.

(In Formula (3), a is a natural number of 0 or 1 or more, A is any one of a single bond (biphenyl structure), an oxygen atom (ether bond), and an ester bond. (The acid anhydride skeleton (—CO—O—CO—) is bonded to the 2, 3 or 3, 4 position of the aromatic ring as viewed from the bonding site of the adjacent aromatic ring.)

  In the above formula (3), the acid dianhydride in which A is a single bond (biphenyl structure) or an oxygen atom (ether bond) includes 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 2 , 3,3 ′, 4′-biphenyltetracarboxylic dianhydride, 2,3,2 ′, 3′-biphenyltetracarboxylic dianhydride, bis (3,4-dicarboxyphenyl) ether dianhydride, etc. Is mentioned. These are preferable from the viewpoint of reducing the hygroscopic expansion coefficient and from the viewpoint of expanding the selectivity of the diamine.

  In the above formula (3), a phenyl ester acid dianhydride in which A is an ester bond is particularly preferable from the viewpoint of reducing moisture absorption of the polyimide. For example, an acid dianhydride represented by the following formula may be mentioned. Specific examples include p-phenylenebistrimellitic acid monoester dianhydride, p-biphenylenebistrimellitic acid monoester dianhydride, and the like. These are particularly preferable from the viewpoint of reducing the hygroscopic expansion coefficient and from the viewpoint of expanding the selectivity of the diamine.

(Wherein, a is a natural number of 0 or 1 or more. The acid anhydride skeleton (—CO—O—CO—) is a 2, 3-position or 3 of the aromatic ring as viewed from the bonding site of the adjacent aromatic ring. , Binds to position 4.)

  In the case of the tetracarboxylic dianhydride having a small hygroscopic expansion coefficient as described above, a wide variety of diamines to be described later can be selected.

  As the tetracarboxylic dianhydride used in combination, a tetracarboxylic dianhydride having at least one fluorine atom as represented by the following formula can be used. When tetracarboxylic dianhydride into which fluorine is introduced is used, the hygroscopic expansion coefficient of the finally obtained polyimide is lowered. The tetracarboxylic dianhydride having at least one fluorine atom preferably has a fluoro group, a trifluoromethyl group, or a trifluoromethoxy group. Specific examples include 2,2-bis (3,4-dicarboxyphenyl) -1,1,1,3,3,3-hexafluoropropane dianhydride. However, when the polyimide precursor contained as the polyimide component has a skeleton containing fluorine, the polyimide precursor tends to be difficult to dissolve in a basic aqueous solution, and a resist or the like is used in the state of the polyimide precursor. When patterning is performed, it may be necessary to perform development with a mixed solution of an organic solvent such as alcohol and a basic aqueous solution.

  Here, the selected diamine is preferably an aromatic diamine from the viewpoint of heat resistance, that is, low outgassing, but in a range not exceeding 60 mol%, preferably 40 mol% of the total of the diamine depending on the desired physical properties. A non-aromatic diamine such as an aliphatic diamine or a siloxane diamine may be used.

Moreover, in the said polyimide component, it is preferable that 33 mol% or more among R < ² > in the said Formula (1) is either structure represented by a following formula.

(R ³ is a divalent organic group, an oxygen atom, a sulfur atom, or a sulfone group, and R ⁴ and R ⁵ are a monovalent organic group or a halogen atom.)

When the polyimide contains any structure of the above formula, it is derived from these rigid skeletons and exhibits low linear thermal expansion and low hygroscopic expansion. Furthermore, there is also an advantage that it is easily available on the market and is low cost.
When it has the above structure, the heat resistance of the polyimide is improved and the linear thermal expansion coefficient is reduced. Therefore, the closer to 100 mol% of R ^{2 in} the above formula (1), the better, but it is sufficient to contain at least 33% or more of R ^{2 in} the above formula (1). Among them, the content of the structure represented by the above formula is preferably 50 mol% or more, more preferably 70 mol% or more, of R ^{2 in} the above formula (1).

  From the viewpoint of making the polyimide have a lower hygroscopic expansion, those represented by the following formulas (4-1) to (4-3) and (5) are preferable as the structure of the diamine.

(In the formulas (4-2) to (4-3), two amino groups may be bonded to the same aromatic ring. In the formula (5), a is 0 or a natural number of 1 or more, and the amino group is Bonded at the meta position or para position with respect to the bond between benzene rings, and part or all of the hydrogen atoms on the aromatic ring are fluoro, methyl, methoxy, trifluoromethyl, or trifluoromethoxy. And may be substituted with a substituent selected from the group)

  Specific examples of diamines represented by the above formulas (4-1) to (4-3) include p-phenylenediamine, m-phenylenediamine, 1,4-diaminonaphthalene, 1,5-diaminonaphthalene, 2,6-diaminonaphthalene, 2,7-diaminonaphthalene, 1,4-diaminoanthracene and the like can be mentioned.

  Specific examples of the diamine represented by the above formula (5) include 2,2′-dimethyl-4,4′-diaminobiphenyl, 2,2′-ditrifluoromethyl-4,4′-diaminobiphenyl, 3 3,3′-dichloro-4,4′-diaminobiphenyl, 3,3′-dimethoxy-4,4′-diaminobiphenyl, 3,3′-dimethyl-4,4′-diaminobiphenyl, and the like.

  Moreover, when fluorine is introduced as a substituent of the aromatic ring, the hygroscopic expansion coefficient of the polyimide can be reduced. For example, examples of the structure in which fluorine is introduced in the diamine represented by the above formula (5) include those represented by the following formula. However, polyimide precursors containing fluorine, particularly polyamic acid, are difficult to dissolve in a basic aqueous solution, and when forming an insulating layer of a low-outgas photosensitive polyimide, an organic material such as alcohol is used during the processing of the insulating layer. It may be necessary to develop with a mixed solution with a solvent.

  When polyimide is given photosensitivity and used as a photosensitive polyimide or photosensitive polyimide precursor, it is exposed at a film thickness of 1 μm in order to increase the sensitivity and obtain a pattern shape that accurately reproduces the mask pattern. It is preferable that the transmittance is at least 5% or more with respect to the wavelength, and it is more preferable that the transmittance is 15% or more.

In addition, when exposure is performed using a high-pressure mercury lamp, which is a general exposure light source, a transmittance with respect to an electromagnetic wave having a wavelength of at least 436 nm, 405 nm, and 365 nm is formed on a film having a thickness of 1 μm. Is preferably 5% or more, more preferably 15%, and still more preferably 50% or more.
The fact that the transmittance of polyimide with respect to the exposure wavelength is high means that there is less light loss, and a highly sensitive photosensitive polyimide or photosensitive polyimide precursor can be obtained.

In order to increase the transmittance of the polyimide, it is desirable to use an acid dianhydride having fluorine introduced as the acid dianhydride or an acid dianhydride having an alicyclic skeleton. However, if an acid dianhydride having an alicyclic skeleton is used, the heat resistance may be lowered and the low outgassing property may be impaired.
In the present invention, in order to increase the transmittance, the use of an aromatic acid dianhydride into which fluorine is introduced as the acid dianhydride reduces the hygroscopic expansion while maintaining heat resistance (because it is aromatic). It is further preferable because it can be performed.

As the tetracarboxylic dianhydride having at least one fluorine atom used in the present invention, the above-mentioned tetracarboxylic dianhydride having a fluorine atom can be used, among which a fluoro group, a trifluoromethyl group, or It preferably has a trifluoromethoxy group. Specific examples include 2,2-bis (3,4-dicarboxyphenyl) -1,1,1,3,3,3-hexafluoropropane dianhydride.
However, a polyimide precursor having a skeleton containing fluorine tends to be difficult to dissolve in a basic aqueous solution, and when patterning using a resist or the like in the state of the polyimide precursor, an organic solvent such as alcohol and the like It may be necessary to perform development with a mixed solution with a basic aqueous solution.

  Also, rigid acid dianhydrides such as pyromellitic acid anhydride, 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride, 1,4,5,8-naphthalenetetracarboxylic dianhydride, etc. If used, the linear thermal expansion coefficient of the finally obtained polyimide becomes small, but it tends to inhibit the improvement of transparency, so it may be used in combination while paying attention to the copolymerization ratio.

In order to increase the transmittance of the polyimide, it is desirable to use a diamine introduced with fluorine as a diamine or a diamine having an alicyclic skeleton. However, when a diamine having an alicyclic skeleton is used, the heat resistance may be lowered and the low outgassing property may be impaired. Therefore, the diamine may be used in combination while paying attention to the copolymerization ratio.
In order to increase the transmittance, it is more preferable to use an aromatic diamine into which fluorine is introduced as the diamine from the viewpoint that the hygroscopic expansion can be reduced while maintaining the heat resistance (being aromatic).

Specific examples of the aromatic diamine into which fluorine has been introduced include those having the above-mentioned structure into which fluorine has been introduced. More specifically, 2,2′-ditrifluoromethyl-4 , 4'-diaminobiphenyl, 2,2-di (3-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 2,2-di (4-aminophenyl) -1,1 , 1,3,3,3-hexafluoropropane, 2- (3-aminophenyl) -2- (4-aminophenyl) -1,1,1,3,3,3-hexafluoropropane, 1,3 -Bis (3-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,3-bis (4-amino-α, α-ditrifluoromethylbenzyl) benzene, 1,4-bis (3-amino-α , Α-Ditrifluoromethylbenzyl Benzene, 1,4-bis (4-amino-α, α-ditrifluoromethylbenzyl) benzene, 2,2-bis [3- (3-aminophenoxy) phenyl] -1,1,1,3,3 Examples include 3-hexafluoropropane and 2,2-bis [4- (4-aminophenoxy) phenyl] -1,1,1,3,3,3-hexafluoropropane.
However, a polyimide precursor containing fluorine, particularly polyamic acid, is difficult to dissolve in a basic aqueous solution and may need to be developed with a mixed solution with an organic solvent such as alcohol when the insulating layer is processed.

  On the other hand, when a diamine having a siloxane skeleton such as 1,3-bis (3-aminopropyl) tetramethyldisiloxane is used as the diamine, the adhesion with the metal layer is improved or the elastic modulus of the polyimide is decreased. The glass transition temperature can be lowered.

When forming an insulating layer containing polyimide using a polyimide resin composition containing a polyimide component of polyimide or polyimide precursor, the weight average molecular weight of the polyimide component depends on its use, but is 3,000 to 1, It is preferably in the range of 000,000, more preferably in the range of 5,000 to 500,000, and still more preferably in the range of 10,000 to 500,000. When the weight average molecular weight is less than 3,000, it is difficult to obtain sufficient strength when a coating film or film is used. In addition, the strength of the film is reduced when heat treatment is performed to obtain polyimide. On the other hand, when the weight average molecular weight exceeds 1,000,000, the viscosity increases and the solubility decreases, so that it is difficult to obtain a coating film or film having a smooth surface and a uniform film thickness.
The molecular weight used here refers to a value in terms of polystyrene by gel permeation chromatography (GPC), may be the molecular weight of the polyimide precursor itself, or after chemical imidization treatment with acetic anhydride or the like. It may be a thing.

The content of the polyimide component is preferably 50% by weight or more based on the entire solid content of the polyimide resin composition from the viewpoint of film physical properties of the pattern to be obtained, particularly film strength and heat resistance. It is preferable that it is weight% or more.
In addition, solid content of a polyimide resin composition is all components other than a solvent, and a liquid monomer component is also contained in solid content.

  In this invention, the insulating layer should just contain the polyimide which has a repeating unit represented by the above-mentioned Formula (1), and this polyimide and another polyimide may be laminated | stacked or combined suitably as needed. And you may use as an insulating layer.

  The polyimide described above may be obtained using a photosensitive polyimide or a photosensitive polyimide precursor. The photosensitive polyimide can be obtained using a known method. For example, an ethylenic double bond may be introduced into the carboxyl group of polyamic acid by an ester bond or an ionic bond, and a photoradical initiator may be mixed into the resulting polyimide precursor to form a solvent-developed negative photosensitive polyimide precursor. it can. In addition, for example, a naphthoquinone diazide compound is added to polyamic acid or a partially esterified product thereof to obtain an alkali development positive photosensitive polyimide precursor, or an nifedipine compound is added to polyamic acid to form an alkali development negative photosensitive polyimide precursor. For example, a photobase generator can be added to the polyamic acid to obtain an alkali development negative photosensitive polyimide precursor.

  In these photosensitive polyimide precursors, 15% to 35% of a photosensitizing component is added to the weight of the polyimide component. Therefore, even if it heats at 300 to 400 degreeC after pattern formation, the residue derived from a photosensitivity provision component remains in a polyimide. Because these residual materials cause the linear thermal expansion coefficient and hygroscopic expansion coefficient to increase, the reliability of the device is greater when using a photosensitive polyimide precursor than when using a non-photosensitive polyimide precursor. Tend to decrease. However, a photosensitive polyimide precursor obtained by adding a photobase generator to polyamic acid can form a pattern even if the amount of photobase generator added as an additive is 15% or less. Since there are few decomposition | disassembly residues derived from an additive, there is little deterioration of characteristics, such as a linear thermal expansion coefficient and a hygroscopic expansion coefficient, and also there is little outgas, it is the most preferable as a photosensitive polyimide precursor applicable to this invention.

  Especially, it is preferable that the above-mentioned polyimide is obtained using a photosensitive polyimide or a photosensitive polyimide precursor. This is because by using the photosensitive polyimide or the photosensitive polyimide precursor, a fine pattern can be formed and the diameter of the insulating layer through-hole can be reduced. As a result, the degree of integration of the thin film element portion disposed on the thin film element substrate of the present invention can be increased.

  The polyimide precursor used for the polyimide is preferably developable with a basic aqueous solution from the viewpoint of ensuring the safety of the working environment and reducing the process cost when patterning the insulating layer. Since the basic aqueous solution can be obtained at a low cost and the waste liquid treatment cost and the facility cost for ensuring work safety are low, production at a lower cost is possible.

  The insulating layer may contain additives such as a leveling agent, a plasticizer, a surfactant, and an antifoaming agent as necessary.

The insulating layer has an insulating layer through hole.
The shape of the insulating layer through-hole can be appropriately determined according to the use of the thin film element substrate of the present invention, and is not particularly limited. The planar shape of the insulating layer through-hole can be an arbitrary shape such as a circular shape, an elliptical shape, a polygonal shape, or a rectangular shape. Further, the planar shape of the insulating layer through-holes may be the same or different on the front and back of the insulating layer.

The size of the insulating layer through hole is not particularly limited. In the case where the thin film element substrate of the present invention has a conductive portion metal portion to be described later, the size of the insulating layer through hole is determined by the insulating layer and the first conductive portion filled in the insulating layer through hole. It is preferable that it is a size which can support a metal part, and an insulating layer through-hole may be smaller or larger than the metal part for conduction | electrical_connection parts.
When the planar shape of the insulating layer through-hole is circular, the diameter of the insulating layer through-hole is particularly limited as long as the wiring can be taken out from the front surface to the back surface through the first conductive portion filled in the insulating layer through-hole. Although it is not a thing, it is preferable that it exists in the range of 1 micrometer-1000 micrometers among them. In particular, in order to achieve high definition of the element formed on the thin film element substrate of the present invention, the diameter of the insulating layer through hole is preferably in the range of 1 μm to 500 μm, and preferably in the range of 1 μm to 200 μm. It is more preferable that it is in the range of 1 μm to 100 μm. If the diameter of the insulating layer through-hole is larger than the above range, when the thin film element substrate of the present invention is used for a thin film element, a desired aperture ratio cannot be obtained and the degree of integration (density) cannot be increased. This is because there is a risk that high definition may be hindered. In addition, from the viewpoint of filling the insulating layer through hole with the first conductive portion, it may be difficult to form the first conductive portion if the diameter of the insulating layer through hole is too small.
In addition, even when the planar shape of the insulating layer through hole is not circular, the area of the insulating layer through hole plane is preferably the same as the area defined by the diameter of the insulating layer through hole. .

The size of the first conducting portion depends on the size of the insulating layer through hole. The size of the insulating layer through hole depends on the thickness of the insulating layer. Specifically, the size of the insulating layer through-hole is substantially the same as the thickness of the insulating layer, so the smaller the insulating layer thickness, the smaller the size of the insulating layer through-hole can be. It is. Therefore, in order to reduce the size of the insulating layer conduction hole, it is desirable to make the insulating layer thin.
In addition, when non-photosensitive polyimide is used when forming the insulating layer through hole by photolithography, the thickness of the resist layer formed on the insulating layer also affects the size of the insulating layer through hole. Therefore, as described above, in order to form the insulating layer through-hole having a small diameter, it is preferable to use photosensitive polyimide.

The number of insulating layer through-holes is not particularly limited, and is appropriately selected according to the use of the thin film element substrate of the present invention.
In addition, the arrangement of the insulating layer through holes is not particularly limited, and is appropriately selected according to the use of the thin film element substrate of the present invention. The insulating layer through hole may be disposed on the outer peripheral portion of the thin film element substrate. For example, when the thin film element substrate of the present invention is used in an organic EL element or electronic paper, the insulating layer through-hole 12h is disposed on the outer peripheral portion of the thin film element substrate 1 as illustrated in FIG. Since the back electrode layer conducting portion 10a and the transparent electrode layer conducting portion 10b can be disposed outside the stop portion 26, the thin film element substrate can effectively prevent moisture and oxygen from entering the element. It is.

  The thickness of the insulating layer is not particularly limited as long as it can satisfy the above-mentioned characteristics. Specifically, it is preferably in the range of 1 μm to 1000 μm, more preferably in the range of 1 μm to 200 μm. More preferably, it exists in the range of 1 micrometer-100 micrometers. This is because if the thickness of the insulating layer is too thin, the insulation cannot be maintained, or it is difficult to flatten the irregularities on the surface of the metal layer. In addition, if the insulating layer is too thick, flexibility is reduced, it becomes excessive, drying during film formation becomes difficult, and the amount of material used increases, resulting in an increase in cost. . Furthermore, if the insulating layer is thick, a resin such as polyimide has a lower thermal conductivity than a metal, so that the thermal conductivity is lowered.

  The method for forming the insulating layer is not particularly limited as long as an insulating layer having a predetermined surface roughness can be obtained, but a coating liquid for forming an insulating layer is applied on a base layer such as a metal layer. Is preferably used. This is because an insulating layer having excellent smoothness can be obtained by the coating method. When the insulating layer contains polyimide, a method of applying a polyimide solution or a polyimide precursor solution can be used as a method of applying the insulating layer forming coating solution. In particular, a method of applying a polyimide precursor solution is suitable. This is because polyimide generally has poor solubility in a solvent. In addition, polyimide having high solubility in a solvent is inferior in physical properties such as heat resistance, linear thermal expansion coefficient, and hygroscopic expansion coefficient.

The coating method is not particularly limited as long as it is a method capable of obtaining an insulating layer having a predetermined surface roughness. For example, spin coating method, die coating method, dip coating method, bar coating method, gravure printing Method, screen printing method and the like can be used.
When applying a polyimide solution or a polyimide precursor solution, the fluidity of the film can be increased and the smoothness can be improved by heating to a temperature higher than the glass transition temperature of the polyimide or polyimide precursor after application.
Further, for example, the insulating layer through-holes may be simultaneously formed by forming the insulating layer in a pattern using a printing method such as a gravure printing method or a screen printing method.

As a method for forming the insulating layer through hole, a printing method, a photolithography method, a method of directly processing with a laser or the like can be used.
As a photolithography method, for example, in the state of a laminate of a metal layer and an insulating layer, a resist pattern is formed on the insulating layer, and the insulating layer is etched along the pattern by a wet etching method or a dry etching method, Method for removing resist pattern: patterning the second metal layer in the state of the laminated body in which the metal layer, the insulating layer, and the second metal layer are laminated, etching the insulating layer using the pattern as a mask, The method of removing the pattern of a metal layer; The method of forming the pattern of an insulating layer directly on a metal layer using photosensitive resin compositions, such as photosensitive polyimide or a photosensitive polyimide precursor, is mentioned. Moreover, when applying a polyimide precursor solution, after forming a polyamic acid, which is a polyimide precursor, on a metal layer, a resist layer is formed on the polyamic acid film, and a resist pattern is formed by a photolithography method. Then, using the pattern as a mask, after removing the polyamic acid film at the pattern opening, a method of removing the resist pattern and imidizing the polyamic acid; simultaneously developing the polyamic acid film at the time of forming the resist pattern; A method of removing the resist pattern and imidizing the polyamic acid can be mentioned.
Examples of the printing method include methods using known printing techniques such as gravure printing, flexographic printing, screen printing, and ink jet method.

  In the case of producing a thin film element substrate as illustrated in FIGS. 1A and 1B, an insulating layer is formed by applying a coating liquid for forming an insulating layer on a base layer such as a metal layer, Furthermore, after forming an insulating layer through-hole in the insulating layer, a method of removing a base layer such as a metal layer can be employed. As the underlayer, glass, a plastic film, or the like can be used in addition to the metal layer and the second metal layer. The method for manufacturing the substrate for a thin film element is appropriately selected depending on the material of the base layer. Specifically, after forming the insulating layer on the base layer, the insulating layer is peeled from the base layer. Examples thereof include a method and a method of forming an insulating layer on the base layer and then removing the base layer by an etching method or the like.

2. 1st conduction | electrical_connection part The 1st conduction | electrical_connection part in this invention is filled with the said insulating layer through-hole, and comprises a part of conduction | electrical_connection part.

The material of the first conduction part is not particularly limited as long as it can fill the insulating layer through-hole, and a metal is usually used. Examples of the metal include aluminum (Al), gold (Au), silver (Ag), cobalt (Co), nickel (Ni), platinum (Pt), copper (Cu), tin (Sn), and zinc (Zn). , Chromium (Cr), iron (Fe), and alloys of these metals.
The 1st conduction | electrical_connection part may be formed from one type of material, and may be formed using two or more types of materials.
Moreover, when forming the 1st conduction | electrical_connection part by electrolytic plating, the said metal simple substance is fundamentally used. These metals may be used alone or in combination. When plating is performed using different metals, the plating is performed sequentially.

From the viewpoint of electrical conductivity, it is desirable that the first conductive portion has a low electrical resistivity. Specifically, the electrical resistivity at room temperature is desirably 1 × 10 ⁻⁴ Ωcm or less, more desirably 5 × 10 ⁻⁵ Ωcm or less, and desirably 1 × 10 ⁻⁵ Ωcm or less. More desirable.

  The form of the first conducting portion is not particularly limited as long as it is formed in the thickness direction of the thin film element substrate, that is, the thickness direction of the insulating layer. Especially, it is preferable that the 1st conduction | electrical_connection part is formed in parallel with respect to the thickness direction of an insulating layer.

  Further, the shape of the first conducting portion can be appropriately determined according to the use of the thin film element substrate of the present invention, and is appropriately determined according to the shape of the insulating layer through hole, and is particularly limited. Is not to be done. As a shape of the plane of the 1st conduction part, it can be set as arbitrary shapes, such as circular shape, elliptical shape, polygonal shape, and a rectangular shape, for example. In addition, the shape of the first conductive portion may be the same or different on the front and back of the insulating layer.

  The size of the first conductive portion is appropriately determined according to the size of the insulating layer through hole. When the planar shape of the first conduction part is circular, the diameter of the first conduction part can be the same as the diameter of the insulating layer through hole. In addition, even when the planar shape of the first conductive portion is not circular, the plane area of the first conductive portion is preferably approximately the same as the area defined by the diameter of the first conductive portion. .

  The arrangement of the first conductive portion is not particularly limited as long as the first conductive portion is filled in the insulating layer through hole. Moreover, the 1st conduction | electrical_connection part may be arrange | positioned at the outer peripheral part of the board | substrate for thin film elements similarly to the said insulating layer through-hole.

  The number of 1st conduction | electrical_connection parts is suitably selected according to the use of the board | substrate for thin film elements of this invention. Further, when a plurality of first conductive portions are arranged, the arrangement is appropriately selected according to the use of the thin film element substrate of the present invention, and is regularly arranged, for example, as shown in FIG. May be.

Examples of the method for forming the first conductive portion include a plating method, a method of applying a conductive paste such as a silver paste, and a method of using solder.
The plating method may be an electrolytic plating method or an electroless plating method. Further, an electroless plating method and an electrolytic plating method may be combined. For example, after forming a thin metal film by electroless plating, the thin metal film may be subjected to electrolytic plating. In the case of electrolytic plating, plating may be performed using a metal layer as a power feeding layer. In the case of the second mode, the second metal layer is formed on the surface of the insulating layer opposite to the metal layer side, or the second insulating layer is formed on the surface opposite to the metal layer side. Three metal layers may be formed, and plating may be performed using the second metal layer or the third metal layer as a power feeding layer.
In the case of the method of applying the conductive paste, the number of process steps can be further reduced. The method for applying the conductive paste is not particularly limited as long as it can fill the insulating layer through-holes with the conductive paste, and examples thereof include an inkjet method and a dispenser method.

3. Metal Layer The thin film element substrate of the present invention is formed in a pattern on the insulating layer 2 and has an opening 14h disposed on the first conductive portion 3 as illustrated in FIGS. 4 is preferable. In this case, the metal layer 4 and the conducting part 10 are not conducting.

  When a metal layer is formed, the metal layer is generally excellent in gas barrier properties, and since the metal layer and the insulating layer are laminated, it can transmit moisture and oxygen as compared with the resin layer alone. When the thin film element substrate of the present invention is used for a thin film element, it is possible to suppress deterioration of the element due to moisture or oxygen. In addition, when the thin film element substrate of the present invention is used for electronic paper, the humidity in the element can be kept constant, and the change in the charge state due to the humidity change can be suppressed, and good display characteristics can be obtained. Is possible.

  In general, the metal layer is excellent in thermal conductivity. Therefore, when the thin film element substrate of the present invention has a metal layer, heat can be conducted or radiated quickly. Therefore, when the thin film element substrate of the present invention is used for an organic EL element, it has high thermal conductivity, can suppress adverse effects due to heat generation, achieve uniform light emission without light emission unevenness, and have a long life. Shortening and device destruction can be reduced.

Furthermore, when the metal layer is formed, the strength can be increased, and when the thin film element substrate of the present invention is used for a thin film element, durability can be improved.
Further, when the insulating layer is formed on the metal layer by a coating method when producing the thin film element substrate of the present invention, the smoothness of the insulating layer can be improved.

  The metal layer in the present invention is formed in a pattern on the insulating layer, and the opening of the metal layer is disposed on the first conductive portion and is not conductive with the conductive portion.

Examples of the metal material constituting the metal layer include aluminum, copper, copper alloy, phosphor bronze, stainless steel (SUS), gold, gold alloy, nickel, nickel alloy, silver, silver alloy, tin, tin alloy, titanium, Although iron, iron alloy, zinc, molybdenum, an invar material, etc. are mentioned, it is not specifically limited. These are appropriately selected and used in accordance with the characteristics described later.
The metal material here is a simple substance or an alloy of a metal element, and the definition of the metal element does not include silicon in accordance with the description of the Shriver Inorganic Chemistry 3rd edition (upper) 429p. (All elements other than hydrogen from Group 1 to Group 12 in the periodic table, Group 13 Al, Ga, In, Tl, Group 14 Sn, Pb, and Group 15 Bi are metal elements.)

  The metal layer preferably has a linear thermal expansion coefficient in the range of 0 ppm / ° C. to 25 ppm / ° C. from the viewpoint of dimensional stability. This is because if the linear thermal expansion coefficient is too large, the expansion and contraction that occurs when the temperature changes is increased, which adversely affects the dimensional stability.

  Moreover, it is preferable that the linear thermal expansion coefficient of a metal layer is near the linear thermal expansion coefficient of an insulating layer from a viewpoint of dimensional stability. The closer the linear thermal expansion coefficient between the insulating layer and the metal layer, the more the warpage of the thin film element substrate is suppressed, and the stress at the interface between the insulating layer and the metal layer when the thermal environment of the thin film element substrate changes. This is because the thickness is reduced and the adhesion is improved. In addition, since the difference between the linear thermal expansion coefficient of the metal layer and the linear thermal expansion coefficient of the insulating layer is described in the section of the insulating layer, description thereof is omitted here.

  In addition, the linear thermal expansion coefficient of the metal layer is not limited to the insulating layer, but the second metal layer, the third metal layer, the thin film element portion, the adhesion layer, the electrode formed on the insulating layer such as the electrode and the wiring described later. It is desirable to be close to the linear thermal expansion coefficient. This is because if the linear thermal expansion coefficient of the metal layer is different from the linear thermal expansion coefficient of the layer formed on the insulating layer, the dimensional stability is lowered, and warping and cracks are caused. The layer formed on the insulating layer is an oxide of metals such as Zn, In, Ga, Cd, Ti, St, Sn, Te, Mg, W, Mo, Cu, Al, Fe, Sr, Ni, Ir, and Mg. And non-metallic oxides such as Si, Ge, B, and nitrides, sulfides, selenides, and mixtures of the above elements (mixed at the atomic level like multi-element ceramics) In the case where the main component is an inorganic material such as a metal layer, these inorganic materials include those having a linear thermal expansion coefficient of 10 ppm / ° C. or less, so that the linear thermal expansion coefficient of the metal layer is also smaller. Is desirable.

The linear thermal expansion coefficient of the metal layer is more preferably in the range of 0 ppm / ° C. to 18 ppm / ° C., further preferably in the range of 0 ppm / ° C. to 12 ppm / ° C., particularly preferably in the range of 0 ppm / ° C. to 7 ppm / ° C. It is.
In addition, literature can be referred about the linear thermal expansion coefficient of a metal or an alloy. For example, the linear thermal expansion coefficient of pure metal is described in Chemistry Handbook 4th edition, Chemical Society of Japan, Basic Edition I, page 542 and Basic Compilation, page II17. The linear thermal expansion coefficients of some alloys and oxides are described in Materials Science and Engineering, an introduction, WD Callister Jr., John Wiley, 1985. In addition, those having an unknown linear thermal expansion coefficient can be obtained in the same manner as the measurement of the linear thermal expansion coefficient of the insulating layer. The method for measuring the linear thermal expansion coefficient is the same as the method for measuring the linear thermal expansion coefficient of the insulating layer except that the metal layer is cut into a width of 5 mm and a length of 20 mm to obtain an evaluation sample.

  In the case where the layer formed on the insulating layer is an oxide layer containing the oxide as described above, and an oxidation process is performed when a thin film element is manufactured using the thin film element substrate of the present invention. The metal layer preferably has oxidation resistance. This is because when the thin film element substrate of the present invention is used for a TFT element, a high temperature treatment is usually performed at the time of producing the TFT element. In particular, when the TFT element has an oxide semiconductor layer, the metal layer preferably has oxidation resistance because annealing is performed at a high temperature in the presence of oxygen.

  When high dimensional stability is required, such as when the thin film element substrate of the present invention is applied to a large thin film element or a thin film element that requires microfabrication, the metal material constituting the metal layer is An Fe (iron) -based alloy is preferable, and SUS is particularly preferable. SUS is excellent in oxidation resistance and heat resistance, and has a smaller coefficient of linear thermal expansion than copper and has excellent dimensional stability. Further, SUS304 has an advantage of higher oxidation resistance and corrosion resistance than SUS430, and SUS430 has an advantage that the linear thermal expansion coefficient is smaller than SUS304. On the other hand, when the thin film element substrate of the present invention is used for a TFT element, considering the linear thermal expansion coefficient of the metal layer and the TFT element, titanium having a lower linear thermal expansion coefficient than SUS430 from the viewpoint of the linear thermal expansion coefficient. Or invar. However, it is desirable to select not only the linear thermal expansion coefficient but also considering the workability of the foil and the cost due to the oxidation resistance, heat resistance, malleability and ductility of the metal foil.

  The form of the metal layer is not particularly limited, and may be, for example, a foil shape or a plate shape. In the case of a metal foil, it may be a rolled foil or an electrolytic foil, and is appropriately selected according to the type of metal material. Usually, a metal foil made of an alloy is produced by rolling.

  The thickness of the metal layer is not particularly limited as long as it can satisfy the above-described characteristics. Specifically, the thickness is preferably in the range of 1 μm to 1000 μm, more preferably in the range of 1 μm to 200 μm. More preferably, it is in the range of 1 μm to 100 μm. If the thickness of the metal layer is too thin, the strength of the thin film element substrate may be reduced. On the other hand, if the thickness of the metal layer is too thick, the flexibility may be reduced, the weight may be increased, or the cost may be increased.

  The surface roughness Ra of the metal layer is larger than the surface roughness Ra of the insulating layer, and is, for example, about 50 nm to 200 nm. The method for measuring the surface roughness is the same as the method for measuring the surface roughness of the insulating layer.

  The metal layer is formed in a pattern and has an opening on the first conduction part. The shape of the opening of the metal layer is not particularly limited. When the thin film element substrate of the present invention has a conductive portion metal portion described later, the shape of the opening of the metal layer is preferably a shape that allows the conductive portion metal portion to be disposed in the opening of the metal layer. . The planar shape of the opening of the metal layer can be any shape, such as a circular shape, an elliptical shape, a polygonal shape, or a rectangular shape.

The size of the opening of the metal layer is such that the conducting portion and the metal layer are not conducted. The first conducting portion (insulating layer through hole) and the second conducting portion (second insulating layer) are provided in the opening of the metal layer. There is no particular limitation as long as the through hole) and the metal part for the conductive part can be arranged, and usually the first conductive part (insulating layer through hole), the second conductive part (second insulating layer through hole), and conductive It is larger than the size of the metal part.
The number of openings in the metal layer is appropriately selected according to the use of the thin film element substrate of the present invention.

  As the arrangement of the opening of the metal layer, the first conduction part (insulating layer through-hole), the second conduction part (second insulating layer through-hole), and the metal part for conduction part are arranged in the opening of the metal layer. If it is possible, there is no particular limitation. The opening part of a metal layer may be arrange | positioned at the outer peripheral part of the board | substrate for thin film elements similarly to the said insulating-layer through-hole.

  It is preferable that the edge part of the pattern of a metal layer is insulated with the coating layer, and it is more preferable that parts other than the conduction | electrical_connection part in the opening part of a metal layer are filled with the coating layer. This is because the metal layer and the conductive portion can be insulated. In particular, the end portion of the metal layer pattern is preferably insulated by the insulating layer or the second insulating layer described later, and the portion other than the conductive portion in the opening of the metal layer is filled with the insulating layer or the second insulating layer. It is preferable that This is because when the covering layer is an insulating layer or a second insulating layer, the manufacturing process of the thin film element substrate can be simplified. Which of the insulating layer and the second insulating layer is filled in a portion other than the conductive portion metal portion in the opening of the metal layer is appropriately selected according to the method for manufacturing a thin film element substrate of the present invention.

  The area of the region where the metal layer is formed is not particularly limited as long as the strength required for the thin film element substrate can be secured, but the entire area of the thin film element substrate is 100%. When the area of the entire region where the metal layer is formed is preferably 50% or more, more preferably 80% or more. This is because if the area where the metal layer is formed is small, the strength of the thin film element substrate may be reduced, although it depends on the thicknesses of the insulating layer and the second insulating layer. In addition, the upper limit of the area of the whole area | region in which the metal layer is formed is less than 100%.

As illustrated in FIGS. 9 and 10, the metal layer has a metal layer exposed region 11 b in which the insulating layer 2 is not present and the metal layer 4 is exposed on the surface of the metal layer 4 on the insulating layer 2 side. 9 and 10, the metal layer exposed region 11 a where the second insulating layer 6 is not present on the surface of the metal layer 4 on the second insulating layer 6 side and the metal layer 4 is exposed. You may have.
As illustrated in FIGS. 11 and 12, when the thin film element substrate 1 of the present invention is used in the organic EL device 20, the insulating layer 2 is formed except for the outer edge portion of the metal layer 4, and the thin film element substrate is formed. When the metal layer exposed region 11b is provided in the outer edge portion of the metal layer 4 on the surface where one element is disposed, the metal layer 4 of the thin film element substrate 1 and the transparent sealing substrate 25 are in direct contact with each other. Thus, it is possible to prevent moisture and oxygen from entering the organic EL element from the interface between the thin film element substrate and the transparent sealing substrate. Further, in the case where a metal layer exposed region is provided on the surface on which the element of the thin film element substrate is disposed, the organic EL element is divided in-plane by selectively disposing the sealing portion in the metal layer exposed region. Or can be sealed in a multi-faceted state, and the device can be manufactured with high productivity.
11 and 12, when the thin film element substrate 1 of the present invention is used in the organic EL device 20, the second insulating layer 6 is formed in a pattern with respect to the metal layer 4, When the metal layer exposed region 11a is provided on the surface opposite to the surface on which the elements of the thin film element substrate 1 are arranged, the heat dissipation of the thin film element substrate can be improved. Thereby, the performance degradation by the heat_generation | fever of an organic EL element can be suppressed effectively.
The shape, size, arrangement, number, and the like of the metal layer exposed region are not particularly limited, and are appropriately selected depending on the purpose of providing the metal layer exposed region as described above.

As a method for forming the metal layer, a general method can be used, which is appropriately selected according to the type of the metal material, the thickness of the metal layer, and the like. For example, a method of obtaining a single metal layer or a method of obtaining a laminate of a metal layer and an insulating layer by vapor-depositing a metal material on the insulating layer may be used. Among these, a method for obtaining a metal layer alone is preferable.
Moreover, when laminating | stacking an insulating layer and a metal layer, an insulating layer may be formed on a metal layer, for example, and a metal layer may be formed on an insulating layer.

  When a metal layer is formed on the insulating layer, for example, a metallization method can be used as a method for forming the metal layer. When providing a metal layer by the metallization method on the said insulating layer, it does not specifically limit about conditions, You may use any method of vapor deposition, a sputter | spatter, and plating. Further, a method of combining a plurality of these methods may be used. When an adhesion layer described later is formed, first, an adhesion layer made of an inorganic material is formed on the insulating layer by sputtering or the like, and then the metal layer is formed on the adhesion layer by vapor deposition or the like. Can be used.

As a patterning method for the metal layer, a photolithography method, a method of directly processing with a laser or the like, and a method of forming a metal layer selectively by sputtering or vapor deposition through a metal mask can be used. As a photolithography method, for example, in the state of a laminate of a metal layer and an insulating layer, a dry film resist is laminated on the metal layer, a resist pattern is formed, the metal layer is etched along the pattern, and then the resist is resisted. A method for removing the pattern is mentioned.
Further, for example, the metal layer may be patterned at the same time by forming the metal layer in a pattern using a method of vapor-depositing the metal material through a mask.

  In addition, an insulating layer may be formed in advance on a metal layer patterned, or a metal layer may be formed on a patterned insulating layer.

4). In the case of the first embodiment, the thin film element substrate of the present invention is formed in the opening 14h of the metal layer 4 and is formed on the first conductive portion 3 as illustrated in FIGS. The conductive portion metal portion 8 that is disposed and made of the same material as the metal layer may be further included. Since the conducting part metal part is made of the same material as the metal layer, the conducting part metal part can be formed simultaneously with the patterning of the metal layer. In this case, the conductive layer can be formed by simultaneously processing the metal layer and forming the conductive portion metal portion by etching the metal layer, and performing electroplating using the metal layer before patterning as a power feeding layer. It is possible to shorten the process.

  The conductive portion metal portion in the present invention is formed in the opening of the metal layer, is disposed on the first conductive portion, is made of the same material as the metal layer, and constitutes a part of the conductive portion. Is.

  The material for the metal part for the conductive part is not particularly limited as long as it is made of the same material as that of the metal layer, but it is preferably formed simultaneously with the patterning of the metal layer. As described above, it is possible to shorten the process of forming the conductive portion.

  The shape of the metal part for the conductive part may be any shape as long as the metal part for the conductive part can be disposed in the opening of the metal layer, and can be appropriately determined according to the use of the thin film element substrate of the present invention. There is no particular limitation. As a planar shape of the metal part for conduction | electrical_connection parts, it can be set as arbitrary shapes, such as circular shape, elliptical shape, polygonal shape, a rectangular shape, for example. Moreover, the shape of the metal part for conduction | electrical_connection parts may be the same on the front and back, and may differ.

  The size of the conductive portion metal portion is supported by the conductive portion metal portion disposed in the opening of the metal layer, and the conductive portion metal portion is supported by the insulating layer and the first conductive portion filled in the insulating layer through hole. The conductive portion metal portion is not particularly limited as long as it is disposed on the first conductive portion, and the conductive portion metal portion may be smaller or larger than the first conductive portion.

The center position of the conductive portion metal portion is not particularly limited as long as the conductive portion metal portion is disposed on the first conductive portion, and may be coincident with the central position of the first conductive portion. You don't have to.
The number of the metal parts for conduction | electrical_connection parts is suitably selected according to the use of the board | substrate for thin film elements of this invention.
The arrangement of the conductive portion metal portion is not particularly limited as long as the conductive portion metal portion is disposed in the opening of the metal layer.
A method for forming the metal part for the conductive part can be the same as the patterning method for the metal layer.

5. Second Insulating Layer In the present invention, the second insulating layer 6 is preferably formed on the metal layer 4 as illustrated in FIGS. 4, 7 and 8. This is because by forming the second insulating layer on the metal layer, an electrode, a wiring, or the like can be formed on the second insulating layer so as to be electrically connected to the conductive portion, and the wiring can be easily formed.

  The second insulating layer in the present invention is formed on the metal layer and has a second insulating layer through-hole disposed on the first conductive portion.

  Note that the characteristics, material, thickness, formation method, and the like of the second insulating layer are the same as those of the insulating layer, and thus description thereof is omitted here.

  When the thin film element substrate of the present invention is used for a thin film element, a TFT element part is formed on one surface of the thin film element substrate, and an organic EL element part or an electronic paper element part is formed on the other surface. The surface of the second insulating layer opposite to the surface on the metal layer side preferably has surface smoothness. Specifically, it is preferable that the surface roughness Ra of the surface of the second insulating layer opposite to the surface on the metal layer side is within the range of the surface roughness Ra of the insulating layer.

The second insulating layer has a second insulating layer through-hole disposed on the first conductive portion.
Note that the shape, center position, size, number, arrangement, formation method, and the like of the second insulating layer through-hole are the same as those of the insulating layer through-hole, and a description thereof is omitted here.
The shape of the second insulating layer through hole may be the same as or different from the shape of the insulating layer through hole. The center position of the second insulating layer through hole may or may not coincide with the center position of the insulating layer through hole.

6). Second Conductive Part In the present invention, as illustrated in FIGS. 4 and 8, the second conductive part 7 may be filled in the second insulating layer through-hole 16h.
The 2nd conduction | electrical_connection part in this invention is filled with the said 2nd insulating layer through-hole, and comprises a part of conduction | electrical_connection part.
Note that the material, size, arrangement, number, formation method, and the like of the second conductive portion are the same as those of the first conductive portion, and thus description thereof is omitted here.
The material of the second conduction part may be the same as or different from the material of the first conduction part.

7). Conductive part The conductive part in the present invention is formed in the thickness direction of the thin film element substrate, conducts the front and back of the thin film element substrate, has at least the first conductive part, and is not conductive with the metal layer. Is.

  The conduction part 10 may have only the first conduction part 3 as illustrated in FIGS. 1 and 3, and has the first conduction part 3 and the second conduction part 7 as illustrated in FIG. 4. 5 to 7, the first conductive portion 3 and the conductive portion metal portion 8 may be included. As illustrated in FIG. 8, the first conductive portion 3 and the conductive portion may be included. The metal part 8 and the second conduction part 7 may be provided.

  The conduction part is usually connected to an electrode or wiring of the thin film element part. Note that that the conduction part is connected to the electrode or the wiring means that at least a part of the conduction part is connected to the electrode or the wiring. For example, all the conducting parts may be connected to the electrodes and wirings, or some conducting parts may be connected to the electrodes and wirings.

  The arrangement of the conductive portion is not particularly limited as long as it is formed in the thickness direction of the thin film element substrate, and is the same as the arrangement of the first conductive portion, the conductive portion metal portion, and the second conductive portion. is there. Moreover, the conduction | electrical_connection part may be arrange | positioned at the outer peripheral part of the board | substrate for thin film elements as mentioned above.

  The number of conducting portions is appropriately selected according to the application of the thin film element substrate of the present invention. Further, when a plurality of conductive portions are arranged, the arrangement is appropriately selected according to the use of the thin film element substrate of the present invention. For example, even if they are regularly arranged as shown in FIG. Good.

When the thin film element substrate of the present invention is used for an active matrix type thin film element, as illustrated in FIGS. 13A and 13B, a gate line conducting portion connected to the gate line 32 g of the thin film element portion 30. 10 g and the source line conduction portion 10 s connected to the source line 32 s of the thin film element portion 30 can be provided. 13A is a plan view seen from the surface on the insulating layer 2 side of the thin film element substrate, and FIG. 13B is a plan view seen from the surface on the second insulating layer 6 side of the thin film element substrate. FIGS. 13A and 13B are schematic views simply showing wiring. In FIG. 13A, a thin film element portion 30 is formed on the surface of the thin film element substrate on the insulating layer 2 side. In FIG. 13B, the driver (control IC) 35 is formed on the surface of the thin film element substrate on the second insulating layer 6 side, and the gate line conduction portion 10g and the source line conduction portion 10s are the driver (control IC). 35 is connected to wiring 35 by wiring 33.
As a wiring method of the active matrix thin film element, a known method can be employed.

  When the thin film element substrate of the present invention is used for a passive matrix thin film element, as illustrated in FIG. 14, the back electrode layer conduction connected to the x wiring 32 x connected to the back electrode layer of the thin film element portion 30. The conductive part 10b for transparent electrode layers connected to the y wiring 32y connected to the transparent electrode layer used as the electrode layer of the part 10a and the thin film element part 30 can be provided. 14 is a plan view seen from the surface on the insulating layer 2 side of the thin film element substrate, and is a schematic diagram showing the wiring in a simplified manner. In FIG. 14, the thin film element portion 30, the x wiring 32 x and the y wiring 32 y are formed on the insulating layer 2, that is, on the insulating layer 2 side of the thin film element substrate.

Further, when the thin film element substrate of the present invention is used for a passive matrix type thin film element, a conductive portion 10 can be provided for each thin film element portion 30 as illustrated in FIG. FIG. 15 is a plan view seen from the surface on the insulating layer 2 side of the thin film element substrate. In FIG. 15, the thin film element portion 30 is formed on the insulating layer 2, that is, on the insulating layer 2 side of the thin film element substrate. Although not shown, x wiring connected to the back electrode layer of the thin film element portion 30 on the second insulating layer, that is, on the second insulating layer side of the thin film element substrate, and the transparent electrode of the thin film element portion 30 A y wiring connected to the layer is formed.
As a wiring method of the passive matrix thin film element, a known method can be employed.

8). Second Metal Layer The thin film element substrate of the present invention is formed on the surface of the insulating layer 2 opposite to the surface on the metal layer 4 side, as illustrated in FIG. 9 and FIG. You may further have the 2nd metal layer 5a to conduct | electrically_connect. In the case of the second mode, when the first conductive portion is formed by a plating method, plating can be performed using the second metal layer as a power feeding layer.
The second metal layer 5a is preferably arranged so as to cover the opening 14h of the metal layer 4 as illustrated in FIGS. 9 and 10. By disposing the second metal layer so as to cover the opening of the metal layer, it is possible to eliminate a region where none of the metal layer, the second metal layer, and the conductive portion exists in the thickness direction of the thin film element substrate. It is possible to prevent the permeation of moisture and oxygen. In the case of using the thin film element substrate of the present invention as a sealing substrate for sealing the element from above, it is particularly preferable that the second metal layer is formed.

  The 2nd metal layer in this invention is formed in the surface on the opposite side to the said metal layer side surface of the said insulating layer, and is electrically connected with the said 1st conduction | electrical_connection part. Further, the second metal layer can be an electrode, a wiring or the like of the thin film element.

Since the second metal layer can serve as an electrode or wiring of the thin film element portion, the material constituting the second metal layer is appropriately selected according to the use and manufacturing method of the thin film element substrate of the present invention. .
For example, when the thin film element substrate of the present invention is used for an organic EL element or electronic paper, the second metal layer can be a back electrode layer. In this case, the material of the second metal layer is not particularly limited as long as it is a conductor. For example, Au, Ta, W, Pt, Ni, Pd, Cr, Cu, Mo, alkali metal, alkaline earth Simple metals such as metals, oxides of these metals, Al alloys such as AlLi, AlCa, AlMg, Mg alloys such as MgAg, Ni alloys, Cr alloys, alkali metal alloys, alkaline earth metal alloys, etc. An alloy etc. can be mentioned. These conductors may be used alone, in combination of two or more kinds, or may be laminated using two or more kinds.
For example, when the thin film element substrate of the present invention is used for a TFT element, the second metal layer can be a gate line, a source line, a gate electrode constituting the TFT, a source electrode, and a drain electrode. In this case, the second metal layer is preferably made of an inorganic material from the viewpoint of conductivity. The inorganic material constituting the second metal layer is not particularly limited as long as it has desired conductivity, and a conductor generally used for a TFT can be used. Examples of such inorganic materials include Cu, Ta, Ti, Al, Zr, Cr, Nb, Hf, Mo, Au, Ag, Pt, Mo—Ta alloy, W—Mo alloy, ITO, and IZO. be able to.

  The second metal layer may be formed as long as the second metal layer is formed on the surface opposite to the metal layer side of the insulating layer, even if the second metal layer is formed immediately above the insulating layer. When the adhesion layer described later is formed on the surface opposite to the metal layer side of the insulating layer, the second metal layer may be formed immediately above the adhesion layer. When the substrate is used for a TFT element, a semiconductor layer, a gate insulating film, or the like may be formed between the insulating layer and the second metal layer. Among these, it is preferable that the second metal layer is formed immediately above the insulating layer, or the second metal layer is formed directly above the adhesion layer.

  The arrangement of the second metal layer is not particularly limited as long as the second metal layer is arranged so as to be electrically connected to the first conductive portion, and is appropriately selected according to the use of the thin film element substrate of the present invention. Selected. In particular, the second metal layer is disposed so as to cover the opening of the metal layer, and there is no region where none of the metal layer, the second metal layer, and the conductive portion exists in the thickness direction of the thin film element substrate. It is preferable that they are arranged.

A method for forming the second metal layer can be the same as a general method for forming an electrode or wiring in a thin film element.
The thickness of the second metal layer is appropriately selected according to the use and manufacturing method of the thin film element substrate of the present invention, and is the same as the thickness of a general electrode or wiring in the thin film element. Can do.

9. Third Metal Layer The thin film element substrate of the present invention is formed on the surface of the second insulating layer 6 opposite to the surface on the metal layer 4 side, as illustrated in FIG. 9 and FIG. 7 may be further provided as a third metal layer 5 b that is electrically connected to 7. In the case of the second mode, when the second conductive portion is formed by a plating method, plating can be performed using the third metal layer as a power feeding layer.
The third metal layer 5b is preferably arranged so as to cover the opening 14h of the metal layer 4 as illustrated in FIGS. 9 and 10. By disposing the third metal layer so as to cover the opening of the metal layer, it is possible to eliminate a region where none of the metal layer, the third metal layer, and the conductive portion exists in the thickness direction of the thin film element substrate. It is possible to prevent the permeation of moisture and oxygen. When the thin film element substrate of the present invention is used as a sealing substrate for sealing the element from above, it is particularly preferable that this third metal layer is formed.

  The third metal layer in the present invention is formed on the surface of the second insulating layer opposite to the surface on the metal layer side and is electrically connected to the second conductive portion. Further, the third metal layer can be an electrode, wiring, or the like of the thin film element.

  The third metal layer can serve as an electrode or wiring of the thin film element portion, and the material of the third metal layer can be the same as the material of the second metal layer.

  The third metal layer may be formed as long as the third metal layer is formed on the surface of the second insulating layer opposite to the metal layer side, and the third metal layer is formed on the second insulating layer. It only has to be. Usually, the third metal layer is formed directly on the second insulating layer.

  In addition, the arrangement of the third metal layer is not particularly limited as long as the third metal layer is arranged so as to be electrically connected to the second conductive portion, and according to the use of the thin film element substrate of the present invention. Are appropriately selected. In particular, the third metal layer is disposed so as to cover the opening of the metal layer, and there is no region where none of the metal layer, the third metal layer, and the conductive portion exists in the thickness direction of the thin film element substrate. It is preferable that they are arranged.

  The formation method and thickness of the third metal layer can be the same as the formation method and thickness of the second metal layer.

  In the present invention, the second metal layer is formed on the surface of the insulating layer opposite to the metal layer side, and the third metal layer is formed on the surface of the second insulating layer opposite to the metal layer side, That is, it is preferable that the second metal layer and the third metal layer are respectively formed on both surfaces of the thin film element substrate, and the second metal layer and the third metal layer are arranged so as to cover the opening of the metal layer. The second metal layer and the third metal layer are formed on both surfaces of the thin film element substrate, respectively, and the second metal layer and the third metal layer are arranged so as to cover the opening of the metal layer, so that moisture and oxygen Can be effectively prevented. When the thin film element substrate of the present invention is used as a sealing substrate, it is particularly preferable that the second metal layer and the third metal layer are formed.

10. Electrode and Wiring In the present invention, an electrode and / or wiring may be formed on the surface of the insulating layer opposite to the metal layer or the surface of the second insulating layer opposite to the metal layer. Good.

  The material constituting the electrode and the wiring is appropriately selected according to the use of the thin film element substrate of the present invention, and the material of the second metal layer or the third metal layer can be used. For example, when the thin film element substrate of the present invention is used for an organic EL element, and when the electrode or wiring is required to be transparent, such as when an electrode or wiring is disposed on the organic light emitting layer, Conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide, zinc oxide, indium oxide, aluminum zinc oxide (AZO), and conductive polymer materials such as polyaniline and polyethylenedioxythiophene Can be used.

  The electrode and the wiring may be formed on the surface of the insulating layer opposite to the metal layer side or the surface of the second insulating layer opposite to the metal layer side. The wiring may be formed immediately above the insulating layer or the second insulating layer, and when the adhesion layer described below is formed on the surface of the insulating layer opposite to the metal layer side, the electrode and the wiring are When the thin film element substrate of the present invention is used for a TFT element, a semiconductor layer, a gate insulating film, or the like may be formed between the insulating layer and the electrode or wiring. In particular, it is preferable that the electrode and the wiring are formed immediately above the insulating layer or the second insulating layer, or the electrode and the wiring are formed directly above the adhesion layer.

  Further, the arrangement of the electrodes and the wiring is not particularly limited, and is appropriately selected according to the use of the thin film element substrate of the present invention.

The method for forming the electrode and the wiring can be the same as the general method for forming the electrode and the wiring in the thin film element.
The thickness of the electrode and wiring is appropriately selected according to the type of electrode and wiring, and can be the same as the thickness of a general electrode or wiring in a thin film element.

11. Adhesion Layer In the present invention, as illustrated in FIG. 16, an adhesion layer 9 containing an inorganic compound may be formed on the surface of the insulating layer 2 opposite to the surface on the metal layer 4 side. The adhesion layer is a layer provided to increase the adhesion between the insulating layer and the thin film element portion.

  The adhesion layer preferably has smoothness. The surface roughness Ra of the adhesion layer only needs to be smaller than the surface roughness Ra of the metal layer, and is specifically preferably 5 nm or less, more preferably 2 nm or less. This is because if the surface roughness Ra of the adhesion layer is too large, the electrical performance of the TFT element may be deteriorated when the thin film element substrate of the present invention is used for the TFT element. The method for measuring the surface roughness is the same as the method for measuring the surface roughness of the insulating layer.

The adhesion layer preferably has heat resistance. This is because, when the thin film element substrate of the present invention is used for a TFT element, a high temperature treatment is usually performed when the TFT element is produced. As the heat resistance of the adhesion layer, the 5% weight reduction temperature of the adhesion layer is preferably 300 ° C. or more.
In addition, about the measurement of 5% weight reduction | decrease temperature, using a thermal analyzer (DTG-60 (made by Shimadzu Corporation)), atmosphere: nitrogen atmosphere, temperature range: 30 to 600 ° C., temperature rising rate: Thermogravimetric / differential heat (TG-DTA) measurement was performed at 10 ° C./min, and the temperature at which the weight of the sample decreased by 5% was defined as a 5% weight reduction temperature (° C.).

  Since an electrode or wiring may be formed on the adhesion layer, the adhesion layer usually has an insulating property.

  In addition, when the thin film element substrate of the present invention is used for a TFT element, the adhesion layer preferably prevents impurity ions contained in the insulating layer from diffusing into the semiconductor layer of the TFT element. Specifically, as the ion permeability of the adhesion layer, the iron (Fe) ion concentration is preferably 0.1 ppm or less, or the sodium (Na) ion concentration is preferably 50 ppb or less. In addition, as a measuring method of the density | concentration of Fe ion and Na ion, after sampling and extracting the layer formed on the contact | adherence layer, the method of analyzing by an ion chromatography method is used.

  The inorganic compound constituting the adhesion layer is not particularly limited as long as it satisfies the above-described characteristics. For example, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, oxidation Examples thereof include chromium and titanium oxide. These may be one type or two or more types.

The adhesion layer may be a single layer or a multilayer.
When the adhesion layer is a multilayer film, a plurality of layers made of the above-described inorganic compound may be laminated, or a layer made of the above-mentioned inorganic compound and a layer made of metal may be laminated. The metal used in this case is not particularly limited as long as an adhesion layer that satisfies the above-described characteristics can be obtained, and examples thereof include chromium, titanium, aluminum, and silicon.
When the adhesion layer is a multilayer film, the outermost layer of the adhesion layer is preferably a silicon oxide film. That is, when a TFT element is produced on the thin film element substrate of the present invention, it is preferable that the TFT element is produced on the silicon oxide film. This is because the silicon oxide film sufficiently satisfies the above characteristics. The silicon oxide in this case is preferably SiO _x (X is in the range of 1.5 to 2.0).

  Among them, the adhesion layer is formed on the insulating layer and is selected from the group consisting of chromium, titanium, aluminum, silicon, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, chromium oxide and titanium oxide. It is preferable to have a first adhesion layer composed of at least one kind and a second adhesion layer formed on the first adhesion layer and composed of silicon oxide. This is because the adhesion between the insulating layer and the second adhesion layer can be enhanced by the first adhesion layer, and the adhesion between the insulation layer and the thin film element portion can be enhanced by the second adhesion layer. Moreover, it is because the 2nd contact | adherence layer which consists of silicon oxides fully satisfy | fills the above-mentioned characteristic.

  The thickness of the adhesion layer is not particularly limited as long as it can satisfy the above-described characteristics, but specifically, it is preferably in the range of 1 nm to 500 nm. In particular, when the adhesion layer has the first adhesion layer and the second adhesion layer as described above, the second adhesion layer is thicker than the first adhesion layer, the first adhesion layer is relatively thin, and the second adhesion layer. Is preferably relatively thick. In this case, the thickness of the first adhesion layer is preferably in the range of 0.1 nm to 50 nm, more preferably in the range of 0.5 nm to 20 nm, and still more preferably in the range of 1 nm to 10 nm. The thickness of the second adhesion layer is preferably in the range of 10 nm to 500 nm, more preferably in the range of 50 nm to 300 nm, and still more preferably in the range of 80 nm to 120 nm. This is because if the thickness is too thin, sufficient adhesion may not be obtained, and if the thickness is too thick, cracks may occur in the adhesion layer.

Since the thin film element portion is formed on the adhesion layer and the electrode of the thin film element portion is connected to the conduction portion, the adhesion layer 9 is usually formed in a pattern shape as illustrated in FIG. 3 has an opening 19h arranged on the top.
The arrangement of the opening of the adhesion layer is not particularly limited as long as the conductive portion is arranged in the opening of the adhesion layer. For example, the opening part of the adhesion layer may be arranged for each conduction part, or the opening part of the adhesion layer may be arranged so that the plurality of conduction parts are arranged in the opening part of one adhesion layer.
The shape of the opening portion of the adhesion layer is not particularly limited as long as the conductive portion can be disposed in the opening portion of the adhesion layer.
The size of the opening portion of the adhesion layer is not particularly limited as long as the conductive portion can be disposed in the opening portion of the adhesion layer.
The number of openings in the adhesion layer is appropriately selected according to the application of the thin film element substrate of the present invention.

  When the insulating layer is formed in a pattern with respect to the metal layer, the adhesion layer is preferably formed in a pattern with respect to the metal layer in the same manner as the insulating layer. This is because if the adhesion layer is formed directly on the metal layer, cracks or the like may occur in the adhesion layer.

  The method for forming the adhesion layer is not particularly limited as long as it is a method capable of forming a layer made of the above-described inorganic compound or a layer made of the above-mentioned metal. For example, DC (direct current) sputtering, RF (High frequency) magnetron sputtering method, plasma CVD (chemical vapor deposition) method, etc. can be mentioned. In particular, when a layer made of the above-described inorganic compound is formed and a layer containing aluminum or silicon is formed, it is preferable to use a reactive sputtering method. This is because a film having excellent adhesion to the insulating layer can be obtained.

  As a method for patterning the adhesion layer, a photolithography method, a method of directly processing with a laser or the like, and a method of forming the adhesion layer selectively by sputtering or vapor deposition through a metal mask can be used.

  In the present invention, the adhesion layer may be formed between the insulating layer and the metal layer. This is because the adhesion between the insulating layer and the metal layer can be improved. For example, when forming a metal layer on an insulating layer when laminating an insulating layer and a metal layer, in order to improve the adhesion between the insulating layer and the metal layer, an adhesion layer is formed on the insulating layer, A metal layer can be formed thereon.

12 Covering Layer In the present invention, the end of the pattern of the metal layer may be insulated with the covering layer, and further, the portion other than the conductive portion in the opening of the metal layer may be filled with the covering layer.

  The covering layer is not particularly limited as long as it can cover and insulate the end portion of the pattern of the metal layer and can be filled in a portion other than the conductive portion in the opening of the metal layer. The insulating layer or the second insulating layer may be used, or an insulating film different from the insulating layer and the second insulating layer may be used. The kind of coating layer is suitably selected according to the manufacturing method of the board | substrate for thin film elements of this invention. Especially, it is preferable that a coating layer is an insulating layer or a 2nd insulating layer.

13. Other Configurations In the present invention, an oxide film in which a metal constituting the metal layer is oxidized may be formed between the metal layer, the insulating layer, and the second insulating layer. Thereby, the adhesiveness of a metal layer, an insulating layer, and a 2nd insulating layer can be improved. This oxide film is formed by oxidizing the surface of the metal layer.

14 Application The substrate for a thin film element of the present invention is used for a thin film element. In addition, since it describes in the term of the below-mentioned "B. Thin film element" about a thin film element, description here is abbreviate | omitted.
The substrate for a thin film element of the present invention may be used as a support substrate that supports the thin film element, or may be used as a sealing substrate that seals the thin film element from above. Especially, the board | substrate for thin film elements of this invention is used suitably as a support substrate which supports a thin film element.
In addition, the thin film element substrate of the present invention may be used not only for taking out the wiring to the surface opposite to the surface on which the element of the thin film element substrate is disposed, but also for releasing heat through the conducting portion.

15. Manufacturing Method of Substrate for Thin Film Element The manufacturing method of the substrate for thin film element of the present invention is not particularly limited, and can be manufactured by various manufacturing methods. An example of the manufacturing method of the substrate for thin film element of the present invention is shown below.

FIGS. 17A to 17G are process diagrams showing an example of a method for manufacturing a thin film element substrate according to the present invention, which is an example of a method for manufacturing a thin film element substrate according to the second embodiment. First, a three-layer material in which the metal layer 4, the second insulating layer 6, and the third metal layer 5b are sequentially laminated is prepared (FIG. 17A). Next, a dry film resist is laminated on the metal layer 4, and the metal layer 4 is patterned by a photolithography method to form the opening 14h (FIG. 17B). Next, the insulating layer 2 is formed on the metal layer 4 using photosensitive polyimide or a photosensitive polyimide precursor (FIG. 17C). Subsequently, the insulating layer 2 is patterned by photolithography to form the insulating layer through-hole 12h (FIG. 17D). Next, using the pattern of the insulating layer 2 as a mask, the second insulating layer 6 is patterned by wet etching to form a second insulating layer through-hole 16h (FIG. 17E). At this time, after forming the insulating layer 2 using the polyimide precursor, laminating the dry film resist on the insulating layer 2, patterning the insulating layer 2 by photolithography, and forming the insulating layer through-hole 12h The second insulating layer through hole 16h may be formed by patterning the second insulating layer 6 by wet etching using the pattern of the insulating layer 2 as a mask. In these cases, the insulating layer 2 is not wet etched, and the second insulating layer 6 is one that can be wet etched. In the above case, the insulating layer 2 and the second insulating layer 6 may be simultaneously patterned by laser processing to form the insulating layer through hole 12h and the second insulating layer through hole 16h. Next, plating is performed using the third metal layer 5b as a power feeding layer, and the conductive layer 10 is formed by filling the insulating layer through-hole 12h and the second insulating layer through-hole 16h with the first conductive portion 3 and the second conductive portion 7. (FIG. 17 (f)). At this time, the first conductive portion 3 and the second conductive portion 7 may be filled into the insulating layer through-hole 12h and the second insulating layer through-hole 16h using a conductive paste. Next, the third metal layer 5b is patterned to form electrodes and wiring (FIG. 17G).
In the method for manufacturing a thin film element substrate illustrated in FIG. 17, an insulating layer is formed by coating, so that an insulating layer with high flatness can be obtained.

FIGS. 18A to 18E are process diagrams showing another example of the method for manufacturing a thin film element substrate of the present invention, which is an example of the method for manufacturing the thin film element substrate of the first aspect. First, the metal layer 4 alone is prepared (FIG. 18A), and the insulating layer 2 is formed on the metal layer 4 (FIG. 18B). Next, a dry film resist is laminated on the insulating layer 2, and the insulating layer 2 is patterned by photolithography to form the insulating layer through-hole 12h (FIG. 18C). At this time, the insulating layer through hole 12h may be formed by forming the insulating layer 2 using photosensitive polyimide or a photosensitive polyimide precursor and patterning the insulating layer 2 by a photolithography method. Next, plating is performed using the metal layer 4 as a power feeding layer, and the insulating layer through-holes 12h are filled with the first conductive portion 3 (FIG. 18D). At this time, the first conductive portion 3 may be filled in the insulating layer through-holes 12h using a conductive paste. Next, a dry film resist is laminated on the metal layer 4, and the metal layer 4 is patterned by a photolithography method to form the metal layer 4 having the opening 14h and the metal part 8 for the conductive part at the same time (FIG. 18 (e)). Thereby, the conduction | electrical_connection part 10 which consists of the 1st conduction | electrical_connection part 3 and the metal part 8 for conduction | electrical_connection parts is obtained.
Since the insulating layer is formed by coating in the above method for manufacturing a thin film element substrate, an insulating layer having high flatness can be obtained. In addition, by etching the metal layer, the metal layer can be processed and the metal portion for the conductive portion can be formed at the same time, and the electroplating can be performed using the metal layer before patterning as a power feeding layer, thereby simplifying the process. It has the advantage of being.

  Further, in the method for manufacturing a thin film element substrate of the present invention, after filling the insulating layer through-hole 12h with the first conductive portion 3 as shown in FIG. May be. In this case, a thin film element substrate 1 as shown in FIGS. 1A and 1B can be obtained.

18 (a) to 18 (e) and FIGS. 19 (a) to 19 (b) are process diagrams showing another example of the method for manufacturing a thin film element substrate of the present invention. It is an example of a manufacturing method. In addition, FIG.18 (e) and FIG.19 (a) are the same figures. Since FIGS. 18A to 18E have been described above, a description thereof will be omitted. Subsequently, the coating layer 15 is filled in a portion other than the conductive portion metal portion 8 in the opening portion 14h of the metal layer 4 (FIG. 19B).
In the method for manufacturing a thin film element substrate illustrated in FIGS. 18 and 19, an insulating layer is formed by coating, so that an insulating layer with high flatness can be obtained.

FIGS. 20A to 20G are process diagrams showing another example of the method for manufacturing a thin film element substrate of the present invention, and are an example of the method for manufacturing the thin film element substrate of the first aspect. First, a three-layer material in which the third metal layer 5b, the second insulating layer 6, and the metal layer 4 are sequentially laminated is prepared (FIG. 20A). Next, a dry film resist is laminated on the metal layer 4, and the metal layer 4 is patterned by a photolithography method, so that the metal layer 4 having the opening 14h and the conductive portion metal portion 8 are simultaneously formed (FIG. 20). (B)). Similarly, a dry film resist is laminated on the third metal layer 5b, and the third metal layer 5b is patterned by photolithography (FIG. 20B). The metal layer 4 and the third metal layer 5b may be patterned on both sides at the same time. Next, the insulating layer 2 is formed on the metal layer 4 (FIG. 20C). Subsequently, a dry film resist is laminated on the insulating layer 2, and the insulating layer 2 is patterned by photolithography to form the insulating layer through-hole 12h (FIG. 20D). At this time, the insulating layer through hole 12h may be formed by forming the insulating layer 2 using photosensitive polyimide or a photosensitive polyimide precursor and patterning the insulating layer 2 by a photolithography method. Next, using the pattern of the third metal layer 5b as a mask, the second insulating layer 6 is etched to form the second insulating layer through-hole 16h (FIG. 20E). In this case, since the etching is performed using the pattern of the third metal layer 5b as a mask, the second insulating layer 6 using non-photosensitive polyimide can be patterned. Subsequently, the third metal layer 5b is further patterned to form electrodes / wirings on the second insulating layer 6 (FIG. 20F). Next, the first conductive portion 3 and the second conductive portion 7 are filled into the insulating layer through-hole 12h and the second insulating layer through-hole 16h using a conductive paste, respectively (FIG. 20 (g)). Thereby, the conduction | electrical_connection part 10 which consists of the 1st conduction | electrical_connection part 3, the metal part 8 for conduction | electrical_connection parts, and the 2nd conduction | electrical_connection part 7 is obtained.
Since the insulating layer is formed by coating in the method for manufacturing a thin film element substrate illustrated in FIG. 20, an insulating layer with high flatness can be obtained.

B. Thin Film Element Next, the thin film element of the present invention will be described.
The thin film element of the present invention includes the above thin film element substrate, and the thin film element portion formed on the surface of the insulating layer of the thin film element substrate having a surface roughness Ra of 5 nm or less. The electrode is connected to the conductive portion of the thin film element substrate.

The “thin film element” refers to an electronic element having a functional layer with a thickness of 150 nm or less. That is, the “thin film element portion” refers to an electronic element portion having a functional layer with a film thickness of 150 nm or less. The thickness of the functional layer is preferably 100 nm or less.
Examples of the functional layer include an insulating layer, an electrode layer, a semiconductor layer, a dielectric layer, an adhesion layer, and a seed layer. Among them, the functional layer is preferably an insulating layer, an electrode layer, a semiconductor layer, or a dielectric layer. This is because it is particularly preferable that these layers have high flatness because irregularities on the order of nanometers cause problems that seriously affect the operation of the device, such as disconnection, short circuit, and defects.
The functional layer may be formed directly on the thin film element substrate, or may be formed on the thin film element substrate via an intermediate layer. The intermediate layer is not particularly limited as long as it does not significantly change the surface roughness of the thin film element substrate.

  The thin film element substrate has been described in detail in the above section “A. Thin Film Element Substrate”, and therefore the description thereof is omitted here. Hereinafter, each structure in the thin film element of this invention is demonstrated.

1. Thin Film Element Section The thin film element section in the present invention is formed on a surface where the surface roughness Ra of the insulating layer of the thin film element substrate is 5 nm or less.

The thin film element part is not particularly limited as long as it is an electronic element part having the above functional layer. IC tag), memory and the like.
The EL element may be either an organic EL element or an inorganic EL element.
Examples of the thin film solar cell include CIGS (Cu (copper), In (indium), Ga (gallium), Se (selenium)) solar cells, and organic thin film solar cells.
A method for forming the thin film element portion is appropriately selected according to the type of the thin film element portion, and a general method can be adopted.

  Especially, it is preferable that a thin film element part is a TFT element part, an organic EL element part, and an electronic paper element part. Hereinafter, the case where the thin film element portion is a TFT element portion, an organic EL element portion, and an electronic paper element portion will be described separately.

2. When the thin film element portion is a TFT element portion When the thin film element portion according to the present invention is a TFT element portion, the thin film element of the present invention includes a surface roughness of the above-described thin film element substrate and the insulating layer of the thin film element substrate. A thin film element portion formed on a surface having a thickness Ra of 5 nm or less, and an electrode of the thin film element portion is connected to a conduction portion of the thin film element substrate, wherein the thin film element portion Is a TFT element portion.
Hereinafter, each structure of the thin film element when the thin film element part is a TFT element part will be described.

(1) TFT element part The TFT element part in this invention is formed in the surface whose surface roughness Ra of the insulating layer of the said board | substrate for thin film elements is 5 nm or less, and the electrode of the said TFT element part is the said thin film It is connected to the conduction part of the element substrate.

  The electrode of the TFT element part is not particularly limited as long as it is an electrode or wiring constituting the TFT element part, and examples thereof include a gate line, a source line, a gate electrode constituting the TFT, a source electrode, and a drain electrode. It is done. These are appropriately selected according to the structure of the TFT.

  Examples of the TFT structure include a top gate structure (forward stagger type), a bottom gate structure (reverse stagger type), and a coplanar type structure. In the case of the top gate structure (forward stagger type) and the bottom gate structure (reverse stagger type), a top contact structure and a bottom contact structure can be further exemplified. These structures are appropriately selected according to the type of semiconductor layer constituting the TFT.

The semiconductor layer constituting the TFT is not particularly limited as long as it can be formed on the thin film element substrate. For example, silicon, an oxide semiconductor, or an organic semiconductor is used.
As the silicon, polysilicon or amorphous silicon can be used.
Examples of the oxide semiconductor include zinc oxide (ZnO), titanium oxide (TiO), magnesium zinc oxide (Mg _x Zn _1-x O), cadmium zinc oxide (Cd _x Zn _1-x O), and cadmium oxide (CdO). ), Indium oxide (In ₂ O ₃ ), gallium oxide (Ga ₂ O ₃ ), tin oxide (SnO ₂ ), magnesium oxide (MgO), tungsten oxide (WO), InGaZnO-based, InGaSnO-based, InGaZnMgO-based, InAlZnO-based InFeZnO, InGaO, ZnGaO, and InZnO can be used.
Examples of organic semiconductors include π-electron conjugated aromatic compounds, chain compounds, organic pigments, and organosilicon compounds. More specifically, pentacene, tetracene, thiophen oligomer derivatives, phenylene derivatives, phthalocyanine compounds, polyacetylene derivatives, polythiophene derivatives, cyanine dyes and the like can be mentioned.
The method for forming the semiconductor layer and the thickness thereof can be the same as those in general.

The gate line, the source line, and the gate electrode, the source electrode, and the drain electrode constituting the TFT are not particularly limited as long as they have desired conductivity, and a conductor generally used for TFT is used. be able to. Examples of such materials include Ta, Ti, Al, Zr, Cr, Nb, Hf, Mo, Au, Ag, Pt, Mo-Ta alloys, W-Mo alloys, ITO, IZO and other inorganic materials, and And organic materials having conductivity such as PEDOT / PSS.
The formation method and thickness of the gate line, the source line, the gate electrode constituting the TFT, the source electrode, and the drain electrode can be the same as those in general.

As the gate insulating film constituting the TFT, the same gate insulating film as that in a general TFT can be used. For example, silicon oxide, silicon nitride, aluminum oxide, tantalum oxide, barium strontium titanate (BST), Insulating inorganic materials such as lead zirconate titanate (PZT), acrylic resins, phenolic resins, fluorine resins, epoxy resins, cardo resins, vinyl resins, imide resins, novolac resins, etc. An insulating organic material can be used.
The formation method and thickness of the gate insulating film can be the same as a general one.

A protective film may be formed on the TFT. The protective film is provided to protect the TFT. For example, the semiconductor layer can be prevented from being exposed to moisture or the like contained in the air. By forming the protective film, deterioration of the TFT performance with time can be reduced. Examples of such protective films include insulating inorganic materials such as silicon oxide and silicon nitride, and acrylic resins, phenolic resins, fluorine resins, epoxy resins, cardo resins, vinyl resins, and imide resins. An insulating organic material such as resin or novolac resin is used.
The method for forming the protective film and the thickness thereof can be the same as those in general.

(2) Transparent sealing substrate In this invention, when a thin film element part is a TFT element part, the transparent sealing substrate may be arrange | positioned on the TFT element part. The element is sealed by the transparent sealing substrate, and entry of moisture and oxygen from the outside can be prevented.
The transparent sealing substrate can be the same as a general transparent sealing substrate in a TFT element.

(3) Sealing part In the present invention, when the thin film element part is a TFT element part, a sealing part is formed on the outer peripheral part of the TFT element part between the thin film element substrate and the transparent sealing substrate. Also good. The element is sealed by the sealing portion, and entry of moisture and oxygen from the outside can be prevented.
The sealing portion can be the same as a general sealing portion in a TFT element.

(4) Applications When the thin film element portion is a TFT element portion, the thin film element of the present invention can be used for display devices such as an active matrix driving organic EL display device and electronic paper. In this case, an organic EL element portion or an electronic paper element portion may be formed on the surface of the thin film element substrate on the TFT element portion side, and an organic surface may be formed on the surface opposite to the TFT element portion side of the thin film element substrate. An EL element part and an electronic paper element part may be formed, and an organic EL element part and an electronic paper element part may be formed on the opposing surface of the transparent sealing substrate, opposite to the opposing surface of the transparent sealing substrate. An organic EL element part or an electronic paper element part may be formed on the side surface.

3. When the thin film element portion is an organic EL element portion When the thin film element portion in the present invention is an organic EL element portion, the thin film element of the present invention includes the above-described thin film element substrate and the insulating layer of the thin film element substrate. A thin film element portion formed on a surface having a surface roughness Ra of 5 nm or less, and an electrode of the thin film element portion is connected to a conduction portion of the thin film element substrate, the thin film element The element portion includes a back electrode layer formed on the insulating layer, an EL layer formed on the back electrode layer and including at least an organic light emitting layer, and a transparent electrode layer formed on the EL layer. It is an organic EL element part, The conduction | electrical_connection part of the said board | substrate for thin film elements has the conduction | electrical_connection part for transparent electrode layers connected to the said transparent electrode layer, and the conduction | electrical_connection part for back electrode layers connected to the said back electrode layer Is.

  21 and 22 are schematic cross-sectional views showing an example of the thin film element of the present invention in which the thin film element part is an organic EL element part. Each of the organic EL devices 20 illustrated in FIGS. 21 and 22 is an organic EL device formed on a surface where the surface roughness Ra of the thin film element substrate 1 and the insulating layer 2 of the thin film element substrate 1 is within a predetermined range. It has an EL element part 21, a transparent sealing substrate 25 disposed on the organic EL element part 21, and a sealing part 26 for sealing the element by bonding the thin film element substrate 1 and the transparent sealing substrate 25 together. doing. The organic EL element unit 21 includes a back electrode layer 22, an EL layer 23 formed on the back electrode layer 22 and including an organic light emitting layer, and a transparent electrode layer 24 formed on the EL layer 23. . Of the two conducting portions 10 a and 10 b of the thin film element substrate 1, one back electrode layer conducting portion 10 a is connected to the back electrode layer 22, and the other transparent electrode layer conducting portion 10 b is connected to the transparent electrode layer 24. Has been. The thin film element substrate 1 is as described above. This organic EL device 20 is a top emission type in which light emission L is extracted from the transparent sealing substrate 25 side.

  Hereinafter, each structure of a thin film element in case a thin film element part is an organic EL element part is demonstrated.

(1) Substrate for thin film element The substrate for thin film element in the present invention is the substrate for thin film element described above, wherein the conductive part of the substrate for thin film element is connected to the transparent electrode layer conductive part, A back electrode layer conduction portion connected to the back electrode layer.

  The arrangement of the conductive part for transparent electrode layer and the conductive part for back electrode layer is particularly limited as long as the conductive part for transparent electrode layer is connected to the transparent electrode layer and the conductive part for back electrode layer is connected to the back electrode layer. Is not to be done. For example, as shown in FIGS. 21 and 22, the back electrode layer conductive portion 10a and the transparent electrode layer conductive portion 10b are arranged in the outer peripheral portion of the thin film element substrate 1, that is, in the region where the EL layer 23 is not formed. 23 and FIG. 24, the back electrode layer conductive portion 10a may be disposed in a region where the EL layer 23 is formed. Further, as shown in FIGS. 21 and 22, the back electrode layer conductive portion 10a and the transparent electrode layer conductive portion 10b may be disposed outside the sealing portion 26, as shown in FIGS. In addition, the back electrode layer conductive portion 10 a and the transparent electrode layer conductive portion 10 b may be disposed inside the sealing portion 26.

(2) Organic EL element part The organic EL element part in this invention is the EL layer which is formed on the back electrode layer formed on the insulating layer of the board | substrate for thin film elements, and the said back electrode layer, and contains an organic light emitting layer at least. And a transparent electrode layer formed on the EL layer.
Hereinafter, each structure of an organic EL element part is demonstrated.

(A) EL layer The EL layer in the present invention is formed between the transparent electrode layer and the back electrode layer, includes an organic light emitting layer, and has one or more organic layers including at least the organic light emitting layer. Is. That is, the EL layer is a layer including at least an organic light-emitting layer, and the layer configuration is a layer having one or more organic layers. Usually, when forming an EL layer by a coating method, it is difficult to stack a large number of layers in relation to the solvent, so the EL layer often has one or two organic layers, It is possible to further increase the number of layers by devising an organic material so that the solubility in a solvent is different or by combining a vacuum deposition method.

Examples of the layer formed in the EL layer other than the organic light emitting layer include a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. The hole injection layer and the hole transport layer may be integrated. Similarly, the electron injection layer and the electron transport layer may be integrated. In addition, as a layer formed in the EL layer, a hole or an electron penetrating like a carrier block layer is prevented, and further, diffusion of excitons is prevented to confine excitons in the light emitting layer. Examples thereof include a layer for increasing the coupling efficiency.
Thus, the EL layer often has a laminated structure in which various layers are laminated, and there are many types of laminated structures.

  Each layer constituting the EL layer can be the same as that used for a general organic EL element.

(B) Transparent electrode layer The transparent electrode layer in the present invention is formed on the EL layer. In the organic EL device of the present invention, since the light is extracted from the transparent electrode layer side, the transparent electrode layer has transparency.
The material of the transparent electrode layer is not particularly limited as long as it is a conductor capable of forming a transparent electrode. For example, indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide, zinc oxide, oxide Conductive oxides such as indium and aluminum zinc oxide (AZO) can be used.
The formation method and thickness of the transparent electrode layer can be the same as those of an electrode in a general organic EL element.

(C) Back electrode layer The back electrode layer in this invention is formed on the insulating layer of the board | substrate for thin film elements.
The material of the back electrode layer is not particularly limited as long as it is a conductor. For example, Au, Ta, W, Pt, Ni, Pd, Cr, Cu, Mo, alkali metal, alkaline earth metal, etc. Examples include simple metals, oxides of these metals, and Al alloys such as AlLi, AlCa, and AlMg, Mg alloys such as MgAg, alloys such as Ni alloys, Cr alloys, alkali metal alloys, and alkaline earth metal alloys. be able to. These conductors may be used alone, in combination of two or more kinds, or may be laminated using two or more kinds. In addition, conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), tin oxide, zinc oxide, indium oxide and aluminum zinc oxide (AZO), and high conductivity such as polyaniline and polyethylenedioxythiophene. Molecular materials can also be used.
The formation method and thickness of the back electrode layer can be the same as those of an electrode in a general organic EL element.

(3) Transparent sealing substrate In this invention, when a thin film element part is an organic EL element part, it is preferable that the transparent sealing substrate is arrange | positioned on the organic EL element part. The element is sealed by the transparent sealing substrate, and entry of moisture and oxygen from the outside can be prevented.
The transparent sealing substrate can be the same as a general transparent sealing substrate in the organic EL element.

(4) Sealing part In this invention, it is preferable that the sealing part is formed in the outer peripheral part of the organic EL element part between the board | substrate for thin film elements, and the transparent sealing substrate. The element is sealed by the sealing portion, and entry of moisture and oxygen from the outside can be prevented.

  The constituent material of the sealing portion is not particularly limited as long as it has a function of preventing moisture from entering. For example, thermosetting such as polyimide resin, silicone resin, epoxy resin, acrylic resin, etc. Mold resin and photo-curing resin.

The sealing part may contain a hygroscopic agent. This is because moisture intrusion from the outside can be more effectively prevented by moisture absorption by the hygroscopic agent in the sealing portion.
The hygroscopic agent is not particularly limited as long as it has at least a function of adsorbing moisture, but among them, it is a compound that chemically adsorbs moisture and maintains a solid state even when it absorbs moisture. Is preferred. Examples of such compounds include metal oxides, metal inorganic acid salts, and organic acid salts. In particular, alkaline earth metal oxides and sulfates are preferred. Examples of the alkaline earth metal oxide include calcium oxide, barium oxide, magnesium oxide, and strontium oxide. Examples of the sulfate include lithium sulfate, sodium sulfate, gallium sulfate, titanium sulfate, and nickel sulfate. Further, hygroscopic organic compounds such as silica gel and polyvinyl alcohol can also be used. Among these, calcium oxide, barium oxide, and silica gel are particularly preferable. This is because these hygroscopic agents are highly hygroscopic.
Although content of a hygroscopic agent is not specifically limited, It is preferable to exist in the range of 5 mass parts-80 mass parts with respect to 100 mass parts of total amounts of a hygroscopic agent and resin, More preferably, 5 It is in the range of mass parts to 60 mass parts, more preferably in the range of 5 mass parts to 50 mass parts.

  The thickness and width of the sealing portion are not particularly limited as long as moisture can be prevented from entering from the outside, and are appropriately selected according to the use of the organic EL element.

  As a method for forming the sealing portion, a method of applying a resin composition on a thin film element substrate or a transparent sealing substrate can be used. The application method is not particularly limited as long as it can be applied to a predetermined portion, and for example, a gravure printing method, a screen printing method, a tisspencer method, or the like can be used.

(5) Other Configurations When the thin film element portion is an organic EL element portion, the thin film element of the present invention may have an insulating layer, a partition wall, or the like as necessary in addition to the above configuration.

(6) Applications When the thin film element portion is an organic EL element portion, the thin film element of the present invention can be used as a passive matrix drive organic EL display device or an organic EL lighting device.

4). When the thin film element portion is an electronic paper element portion When the thin film element portion in the present invention is an electronic paper element portion, the thin film element of the present invention includes the above-described thin film element substrate and the insulating layer of the thin film element substrate. A thin film element portion formed on a surface having a surface roughness Ra of 5 nm or less, and an electrode of the thin film element portion is connected to a conduction portion of the thin film element substrate, the thin film element An element portion is formed on the insulating layer, and includes a back electrode layer made of the electrode layer, a display medium layer formed on the back electrode layer, and a transparent electrode layer formed on the display medium layer. A conductive part for the transparent electrode layer connected to the transparent electrode layer, and a conductive part for the back electrode layer connected to the back electrode layer. It is what you have.

  Hereinafter, each structure of a thin film element in case a thin film element part is an electronic paper element part is demonstrated.

(1) Substrate for thin film element The substrate for thin film element in the present invention is the substrate for thin film element described above, wherein the conductive part of the substrate for thin film element is connected to the transparent electrode layer conductive part, A back electrode layer conduction portion connected to the back electrode layer.
In addition, about arrangement | positioning of the conduction | electrical_connection part for transparent electrode layers, and the conduction | electrical_connection part for back electrode layers, since it can be made the same as that when the thin film element part is an organic EL element part, description here is abbreviate | omitted.

(2) Electronic paper element part The electronic paper element part in this invention is formed on the insulating layer of the board | substrate for thin film elements, and is formed on the back electrode layer which consists of an electrode layer of the board | substrate for thin film elements, and the said back electrode layer. A display medium layer, and a transparent electrode layer formed on the display medium layer.

As a display method of electronic paper, known ones can be applied, for example, electrophoresis method, twist ball method, powder movement method (electronic powder fluid method, charged toner type method), liquid crystal display method, thermal method. (Coloring method, light scattering method), electrodeposition method, movable film method, electrochromic method, electrowetting method, magnetophoresis method and the like.
The display medium layer constituting the electronic paper is appropriately selected according to the display method of the electronic paper.

  In addition, about a back electrode layer and a transparent electrode layer, since it can be the same as that of the case where a thin film element part is an organic EL element part, description here is abbreviate | omitted.

(3) Transparent sealing substrate In this invention, when a thin film element part is an electronic paper element part, the transparent sealing substrate may be arrange | positioned on the electronic paper element part. The element is sealed by the transparent sealing substrate, and entry of moisture and oxygen from the outside can be prevented.
The transparent sealing substrate can be the same as a general transparent sealing substrate in electronic paper.

(4) Sealing part In this invention, the sealing part may be formed in the outer peripheral part of an electronic paper element part between the board | substrate for thin film elements, and the transparent sealing substrate. The element is sealed by the sealing portion, moisture and oxygen can be prevented from entering from the outside, and the humidity inside the element can be kept constant.
In addition, about a sealing part, since it can be the same as that of the case where a thin film element part is an organic EL element part, description here is abbreviate | omitted.

(5) Applications When the thin film element portion is an electronic paper element portion, the thin film element of the present invention can be used as passive matrix driven electronic paper.

C. Organic EL Display Device Next, the organic EL display device of the present invention will be described.
The organic EL display device of the present invention includes the above thin film element substrate, the TFT element portion formed on the surface of the insulating layer of the thin film element substrate having a surface roughness Ra of 5 nm or less, and the thin film element substrate. An insulating layer having a surface roughness Ra of 5 nm or less, a back electrode layer connected to the TFT element portion, an EL layer formed on the back electrode layer and including at least an organic light emitting layer, and An organic EL element part having a transparent electrode layer formed on the EL layer; and a transparent sealing substrate disposed on the organic EL element part, wherein the electrode of the TFT element part is the substrate for the thin film element It is characterized by being connected to the conducting part.

  The thin film element substrate has been described in the above section “A. Thin Film Element Substrate”, and the description thereof is omitted here. Further, since the TFT element part, the organic EL element part, and the transparent sealing substrate are described in the above-mentioned section “B. Thin film element”, description thereof is omitted here.

D. Next, the electronic paper of the present invention will be described.
The electronic paper of the present invention includes the above thin film element substrate, the TFT element portion formed on the surface of the insulating layer of the thin film element substrate having a surface roughness Ra of 5 nm or less, and the thin film element substrate. Formed on a surface having a surface roughness Ra of 5 nm or less, a back electrode layer connected to the TFT element portion, a display medium layer formed on the back electrode layer, and formed on the display medium layer An electronic paper element portion having a transparent electrode layer formed thereon, and a transparent sealing substrate disposed on the electronic paper element portion, and the electrode of the TFT element portion is connected to the conduction portion of the thin film element substrate. It is characterized by that.

  The thin film element substrate has been described in the above section “A. Thin Film Element Substrate”, and the description thereof is omitted here. Further, since the TFT element part, the electronic paper element part, and the transparent sealing substrate are described in the above section “B. Thin film element”, the description thereof is omitted here.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

  Hereinafter, the present invention will be specifically described using examples and comparative examples.

[Production example]
1. Preparation of Polyimide Varnish (Polyimide Precursor Solution) (1) Production Example 1
4.0 g (20 mmol) of 4,4′-diaminodiphenyl ether (ODA) and 8.65 g (80 mmol) of paraphenylenediamine (PPD) were put into a 500 ml separable flask, and 200 g of dehydrated N-methyl-2 was added. -It dissolved in pyrrolidone (NMP), and it stirred, heating and monitoring with a thermocouple so that liquid temperature might be 50 degreeC with an oil bath under nitrogen stream. After confirming that they were completely dissolved, 29.1 g (99 mmol) of 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride (BPDA) was added thereto gradually over 30 minutes. After completion of the addition, the mixture was stirred at 50 ° C. for 5 hours. Then, it cooled to room temperature and obtained the polyimide precursor solution 1.

(2) Production Example 2
The polyimide precursor solution 2 was prepared in the same manner as in Production Example 1, except that the amount of NMP was adjusted so that the reaction temperature and the solution concentration were 17% by weight to 19% by weight. ~ 17 were synthesized.
Acid dianhydrides include 3,3 ′, 4,4′-biphenyltetracarboxylic dianhydride (BPDA) or pyromellitic dianhydride (PMDA), p-phenylenebistrimellitic acid monoester dianhydride (TAHQ), p-biphenylenebistrimellitic acid monoester dianhydride (BPTME) was used. Diamines include 4,4'-diaminodiphenyl ether (ODA), paraphenylenediamine (PPD), 1,4-Bis (4-aminophenoxy) benzene (4APB), 2,2'-Dimethyl-4,4'-diaminobiphenyl. One or two of (TBHG) and 2,2′-Bis (trifluoromethyl) -4,4′-diaminobiphenyl (TFMB) were used.

(3) Evaluation of linear thermal expansion coefficient and hygroscopic expansion coefficient The polyimide precursor solutions 1 to 17 were applied to a heat-resistant film (Upilex S 50S: manufactured by Ube Industries, Ltd.) pasted on glass, and 80 ° C. After drying on a hot plate for 10 minutes, the film was peeled off from the heat-resistant film to obtain a film having a thickness of 15 μm to 20 μm. Thereafter, the film was fixed to a metal frame, and was heat-treated at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, natural cooling), and the polyimide resins 1 to 17 having a film thickness of 9 μm to 15 μm A film was obtained.

(A) Linear thermal expansion coefficient The film produced by the above method was cut into a width of 5 mm and a length of 20 mm and used as an evaluation sample. The linear thermal expansion coefficient was measured by a thermomechanical analyzer Thermo Plus TMA8310 (manufactured by Rigaku Corporation). The measurement conditions are as follows: the observation length of the evaluation sample is 15 mm, the heating rate is 10 ° C./min, the tensile load is 1 g / 25000 μm ² so that the weight per cross-sectional area of the evaluation sample is the same, and the temperature is 100 ° C. to 200 ° C. The average linear thermal expansion coefficient in the range was defined as the linear thermal expansion coefficient (CTE).

(B) Humidity expansion coefficient The film produced by the above method was cut into a width of 5 mm and a length of 20 mm, and used as an evaluation sample. The humidity expansion coefficient was measured by a humidity variable mechanical analyzer Thermo Plus TMA8310 (manufactured by Rigaku Corporation). The temperature is kept constant at 25 ° C., and the sample is first stabilized in a humidity of 15% RH. After maintaining this state for approximately 30 minutes to 2 hours, the humidity of the measurement site is set to 20% RH. Further, this state was maintained for 30 minutes to 2 hours until the sample became stable. Thereafter, the humidity is changed to 50% RH, and the difference between the sample length when the humidity becomes stable and the sample length when the humidity becomes stable at 20% RH is expressed as a change in humidity (in this case, 50-20). 30), and the value divided by the sample length was defined as the humidity expansion coefficient (CHE). At this time, the tensile load was set to 1 g / 25000 μm ² so that the weight per cross-sectional area of the evaluation sample was the same.

(C) Evaluation of substrate warp On a SUS304-HTA foil (manufactured by Toyo Seiki Co., Ltd.) having a thickness of 18 μm, the above-mentioned polyimide precursor solutions 1 to 17 and linear thermal expansion so that the film thickness after imidation becomes 10 μm ± 1 μm. Polyimide films of polyimide resins 1 to 17 were formed under the same process conditions as those for creating samples for coefficient evaluation. Then, the laminated body of SUS304 foil and a polyimide film was cut | disconnected to width 10mm x length 50mm, and it was set as the sample for board | substrate curvature evaluation.

This sample was fixed to the SUS plate surface with only one of the short sides of the sample with Kapton tape, heated in an oven at 100 ° C. for 1 hour, and then in the oven heated to 100 ° C., the short side on the opposite side of the sample The distance from the SUS plate was measured. At that time, a sample having a distance of 0 mm or more and 0.5 mm or less was evaluated as “◯”, a sample of more than 0.5 mm and 1.0 mm or less was evaluated as Δ, and a sample of 1.0 mm or more was determined as “X”.
Similarly, when this sample is fixed to the surface of the SUS plate with only one of the short sides of the sample with Kapton tape and left in a constant temperature and humidity chamber at 23 ° C. and 85% RH for 1 hour, The distance from the short side SUS plate was measured. At that time, a sample having a distance of 0 mm or more and 0.5 mm or less was evaluated as “◯”, a sample of more than 0.5 mm and 1.0 mm or less was evaluated as Δ, and a sample of 1.0 mm or more was determined as “X”.
These evaluation results are shown in Table 2.

Since the linear thermal expansion coefficient of SUS304 foil was 17 ppm / ° C., it was confirmed that the warpage of the laminate was large when the difference in linear thermal expansion coefficient between the polyimide film and the metal foil was large.
Table 2 shows that the smaller the hygroscopic expansion coefficient of the polyimide film, the smaller the warp of the laminate in a high humidity environment.

2. Synthesis of photobase generator (1) Production Example (Synthesis of photobase generator 1)
Under a nitrogen atmosphere, in a 200 mL three-necked flask equipped with a Dean-Stark apparatus, 8.2 g (39 mmol) of 4,5-dimethoxy-2-nitrobenzaldehyde was dissolved in 100 mL of dehydrated 2-propanol, and 2.0 g (10 mmol, 10 mmol, aluminum isopropoxide) was dissolved. 0.25 eq.) Was added, and the mixture was heated and stirred at 105 ° C. for 7 hours. During the course of evaporation of the solvent, 40 mL of 2-propanol was added four times. After stopping the reaction with 150 mL of 0.2N hydrochloric acid, extraction was performed with chloroform, and the solvent was distilled off under reduced pressure to obtain 7.2 g of 6-nitroveratryl alcohol.
Under a nitrogen atmosphere, 5.3 g (25 mmol) of 6-nitroveratryl alcohol was dissolved in 100 mL of dehydrated dimethylacetamide in a 200 mL three-necked flask, and 7.0 mL (50 mmol, 2.0 eq) of triethylamine was added. In an ice bath, 5.5 g (27 mmol, 1.1 eq) of p-nitrophenyl chloroformate was added, and the mixture was stirred at room temperature for 16 hours. The reaction solution was poured into 2 L of water, and the resulting precipitate was filtered and purified by silica gel column chromatography to obtain 6.4 g of 4,5-dimethoxy-2-nitrobenzyl-p-nitrophenyl carbonate.
In a 100 mL three-necked flask under nitrogen atmosphere, 3.6 g (9.5 mmol) of 4,5-dimethoxy-2-nitrobenzyl-p-nitrophenyl carbonate was dissolved in 50 mL of dehydrated dimethylacetamide, and 5 mL (37 mmol) of 2,6-dimethylpiperidine was dissolved. , 3.9 eq) and 0.36 g (0.3 eq) of 1-hydroxybenzotriazole was added, and the mixture was stirred with heating at 90 ° C. for 18 hours. The reaction solution was poured into 1 L of a 1% aqueous sodium hydrogen carbonate solution, and the resulting precipitate was filtered and washed with water to give a photobase generator 1 (N-{[(4,5- 2.7 g of dimethoxy-2-nitrobenzyl) oxy] carbonyl} -2,6-dimethylpiperidine).

(Synthesis of photobase generator 2)
Under a nitrogen atmosphere, 0.50 g (3.1 mmol) of o-coumaric acid (manufactured by Tokyo Chemical Industry Co., Ltd.) was dissolved in 40 mL of dehydrated tetrahydroxyfuran in a 100 mL three-necked flask, and 1-ethyl-3- (3-dimethylamino) was dissolved. Propyl) carbodiimide hydrochloride (Tokyo Chemical Industry Co., Ltd.) 0.59 g (3.1 mmol, 1.0 eq) was added. Piperidine (manufactured by Tokyo Chemical Industry Co., Ltd.) (0.3 ml, 3.1 mmol, 1.0 eq) was added in an ice bath, and the mixture was stirred overnight at room temperature. The reaction solution was concentrated, extracted with chloroform, washed with dilute hydrochloric acid, saturated aqueous sodium hydrogen carbonate solution and brine, and filtered to obtain 450 mg of a photobase generator 2 represented by the following formula.

(Synthesis of photobase generator 3)
In a 100 mL flask, 2.00 g of potassium carbonate was added to 15 mL of methanol. In a 50 mL flask, 2.67 g (6.2 mmol) of ethoxycarbonylmethyl (triphenyl) phosphonium bromide and 945 mg (6.2 mmol) of 2-hydroxy-4-methoxybenzaldehyde were dissolved in 10 mL of methanol and slowly added dropwise to a well-stirred potassium carbonate solution. . After stirring for 3 hours, the completion of the reaction was confirmed by TLC, followed by filtration to remove potassium carbonate and concentration under reduced pressure. After concentration, 50 mL of 1N aqueous sodium hydroxide solution was added and stirred for 1 hour. After completion of the reaction, triphenylphosphine oxide was removed by filtration, and then concentrated hydrochloric acid was added dropwise to acidify the reaction solution. The precipitate was collected by filtration and washed with a small amount of chloroform to obtain 1.00 g of 2-hydroxy-4-methoxycinnamic acid. Subsequently, in a 100 mL three-necked flask, 500 mg (3.0 mmol) of 2-hydroxy-4-methoxycinnamic acid was dissolved in 40 mL of dehydrated tetrahydroxyfuran, and 0.586 g (3.0 mmol) of EDC was added. After 30 minutes, 0.3 ml (3.0 mmol) piperidine was added. After completion of the reaction, the reaction solution was concentrated and dissolved in water. After extraction with diethyl ether, the mixture was washed with saturated aqueous sodium hydrogen carbonate solution, 1N hydrochloric acid and saturated brine. Thereafter, purification by silica gel column chromatography (developing solvent: chloroform / methanol 100/1 to 10/1) yielded 64 mg of a photobase generator 3 represented by the following formula.

(Synthesis of photobase generator 4)
In the synthesis of the photobase generator 3, 80 mg of the photobase generator 4 represented by the following formula was obtained in the same manner as the synthesis of the photobase generator 3 except that cyclohexylamine was used instead of piperidine.

(Synthesis of photobase generator 5)
In the synthesis of photobase generator 3, in the same manner as the synthesis of photobase generator 3, except that 1-hydroxy-2-naphthaldehyde was used instead of 2-hydroxy-4-methoxybenzaldehyde, 75 mg of the photobase generator 5 represented was obtained.

(Synthesis of photobase generator 6)
In the synthesis of the photobase generator 3, in the same manner as the synthesis of the photobase generator 3 except that 2-hydroxy-1-naphthaldehyde was used instead of 2-hydroxy-4-methoxybenzaldehyde, 90 mg of the photobase generator 6 represented was obtained.

(2) Evaluation of base generator The synthesized base generators 1 to 6 were measured and evaluated as follows. The results of molar extinction coefficient and base generation ability are shown in Table 3. In Table 3, the photoreaction rate is a percentage of the number of moles of photoreaction with respect to the number of moles of the base generator used. The results for the 5% weight loss temperature are shown in Table 4.

(A) Molar extinction coefficient The base generators 1 to 6 were each dissolved in acetonitrile at a concentration of 1 × 10 ⁻⁴ mol / L, filled in a quartz cell (optical path length 10 mm), and the absorbance was measured. The molar extinction coefficient ε is a value (L / (mol · cm)) obtained by dividing the absorbance of the solution by the thickness of the absorbing layer and the molar concentration of the solute.

(B) Photoreaction rate evaluation For each of the base generators 1 to 6, three 1 mg samples were prepared, and each was dissolved in deuterated acetonitrile in a quartz NMR bowl. Using a filter and high-pressure mercury lamp that cuts light with a wavelength of 350 nm or less and transmits 20% of i-line, one is irradiated with light at ² J / cm ² and the other with 20 J / cm ² Light irradiation was performed. The remaining one was not irradiated with light. 1H NMR of each sample was measured to determine the rate of photoreaction.
In addition, about the photoreaction rate, both the base generator and the photoreaction product were quantified by NMR, and the photoreaction rate (%) was calculated from the ratio by the following formula.
Photoreaction rate = photoreaction product amount / (undecomposed base generator amount + photoreaction product amount) × 100

From Table 3, it was clarified that the base generators 1 to 6 have a sensitivity to i-line because it was confirmed that they photoreacted by irradiation with 20 J / cm ² . In the base generator 1, generation of base was not confirmed by irradiation at ² J / cm ² . Photobase generator 6 showed the highest sensitivity, and then photobase generator 3 had the highest sensitivity.

(C) Thermogravimetric measurement In order to evaluate the heat resistance of the base generators 1 to 6 and nifedipine (manufactured by Tokyo Chemical Industry), the temperature was increased at a rate of 10 ° C / min based on the weight at 30 ° C. Thermogravimetry was performed. The results are shown in Table 4.

3. Evaluation of photosensitive resin composition: Evaluation of pattern forming ability (1) Production example (Preparation example 1)
Photobase generator 1 was added to the polyimide precursor solution 1 at 15% by weight of the solid content of the solution to obtain a photosensitive polyimide resin composition 1.

(Preparation Example 2)
A photobase generator 3 was added to the polyimide precursor solution 1 at 10% by weight of the solid content of the solution to obtain a photosensitive polyimide resin composition 2.

(Preparation Example 3)
Photobase generator 3 was added to the polyimide precursor solution 11 at 15% by weight of the solid content of the solution to obtain a photosensitive polyimide resin composition 3.

(Preparation Example 4)
Photobase generator 1 was added to the polyimide precursor solution 11 at 15% by weight of the solid content of the solution to obtain a photosensitive polyimide resin composition 4.

(Preparation Example 5)
15 wt% of the solid content of the solution was added to the polyimide precursor solution 11 to obtain a photosensitive polyimide resin composition 5.

(Preparation Example 6)
15 wt% of the solid content of the solution was added to the polyimide precursor solution 11 to obtain a photosensitive polyimide resin composition 6.

(Preparation Example 7)
15 wt% of the solid content of the solution was added to the polyimide precursor solution 11 to obtain a photosensitive polyimide resin composition 7.

(Preparation Example 8)
15 wt% of the solid content of the solution was added to the polyimide precursor solution 11 to obtain a photosensitive polyimide resin composition 8.

(Preparation Example 9)
30% by weight of the solid content of the solution was added to the polyimide precursor solution 11 to make a photosensitive polyimide resin composition 9.

(2) Evaluation of photosensitive resin composition The photosensitive polyimide resin composition 1 and the photosensitive polyimide resin composition 2 prepared in the preparation examples were each made to have a final film thickness of 4 μm on chrome-plated glass. It spin-coated and dried for 15 minutes on a 80 degreeC hotplate, and the coating film of the photosensitive polyimide resin composition 1 and the photosensitive polyimide resin composition 2 was produced. With a high-pressure mercury lamp using a manual exposure machine through a photomask, the coating film of the photosensitive polyimide resin composition 1 is patterned to 2000 mJ / cm ² and the coating film of the photosensitive polyimide resin composition 2 is 100 mJ / cm. ^Two exposures were performed. Thereafter, each coating film was heated at 155 ° C. for 10 minutes.

  About each coating film, it was immersed in the solution which mixed tetramethylammonium hydroxide 2.38weight% aqueous solution and isopropanol by 9: 1. As a result, a pattern was obtained in which the exposed portion remained undissolved in the developer. Furthermore, it was heated at 350 ° C. for 1 hour to perform imidization. Thus, it became clear that a favorable pattern can be formed by using the said photosensitive polyimide resin compositions 1 and 2.

The photosensitive polyimide resin compositions 3 to 8 prepared in the preparation examples were each spin-coated on a chrome-plated glass so as to have a final film thickness of 4 μm, and dried on a hot plate at 100 ° C. for 15 minutes, Coating films of photosensitive polyimide resin compositions 3 to 8 were produced. The photosensitive polyimide resin composition 3 is 80 mJ / cm ² , the photosensitive polyimide resin composition 4 is 1500 mJ / cm ² , and the photosensitive polyimide resin composition is patterned in a pattern with a high-pressure mercury lamp using a manual exposure machine through a photomask. 5 was 500 mJ / cm ² , photosensitive polyimide resin composition 6 was 400 mJ / cm ² , photosensitive polyimide resin composition 7 was 200 mJ / cm ² , and photosensitive polyimide resin composition 8 was 80 mJ / cm ² exposed. Thereafter, each coating film was heated at 170 ° C. for 10 minutes.

  About each coating film, it was immersed in the solution which mixed tetramethylammonium hydroxide 2.38weight% aqueous solution and isopropanol by 8: 2. As a result, a pattern was obtained in which the exposed portion remained undissolved in the developer.

4). Evaluation of linear thermal expansion coefficient and hygroscopic expansion coefficient Further, the photosensitive polyimide resin compositions 1, 2 and 3 were applied to a heat-resistant film (Upilex S 50S: manufactured by Ube Industries, Ltd.) pasted on glass, After drying on a hot plate at 100 ° C. for 10 minutes, exposure to 2000 mJ / cm ^{2 in} terms of illuminance at a wavelength of 365 nm with a high-pressure mercury lamp, heating on the hot plate at 170 ° C. for 10 minutes, and then peeling off from the heat-resistant film A film having a thickness of 10 μm was obtained. Thereafter, the film is fixed to a metal frame, and heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate 10 ° C./min, natural cooling), photosensitive polyimide 1 having a thickness of 6 μm, photosensitive polyimide 2 and photosensitive polyimide 3 films were obtained.

  The linear thermal expansion coefficient, hygroscopic expansion coefficient, and substrate warpage were evaluated in the same manner as described above. The results are shown in Table 5.

As shown in Table 5, since the linear thermal expansion coefficient of SUS304 foil is 17 ppm / ° C., it was confirmed that the warpage of the laminate was large when the difference in linear thermal expansion coefficient between the polyimide film and the metal foil was large. .
Table 5 also shows that the smaller the hygroscopic expansion coefficient of the polyimide film, the smaller the warpage of the laminate in a high humidity environment.

5. Outgas test Each of the photosensitive polyimide resin composition 3 and the photosensitive polyimide resin composition 4 prepared in the preparation examples was spin-coated on glass to a final film thickness of 10 μm, and dried on a hot plate at 100 ° C. for 15 minutes. Thus, coating films of photosensitive polyimide resin composition 3 and photosensitive polyimide resin composition 4 were prepared. The photosensitive polyimide resin composition 3 was exposed to 500 mJ / cm ² and the photosensitive polyimide resin composition 4 was exposed to 2000 mJ / cm ² with a high-pressure mercury lamp using a manual exposure machine through a photomask. Thereafter, each coating film was heated at 170 ° C. for 10 minutes. About each coating film, it heated at 350 degreeC for 1 hour, imidated, and the outgas measurement samples 1 and 2 were obtained.

Moreover, the polyimide precursor solution 11 was spin-coated on glass so that the final film thickness might be 10 micrometers, and it was made to dry for 15 minutes on a 100 degreeC hotplate, and the coating film of the polyimide precursor solution 11 was produced. About each coating film, it heated at 350 degreeC for 1 hour, imidated, and the outgas measurement sample 3 was obtained.
The photosensitive polyimide resin composition 9 prepared in Preparation Example 9 was spin-coated on glass so as to have a final film thickness of 10 μm, and dried on a hot plate at 100 ° C. for 15 minutes. A coating film was prepared. 1000 mJ / cm < ² > exposure was performed with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, after heating at 185 degreeC for 10 minute (s), it heated at 350 degreeC for 1 hour, imidated, and the outgas measurement sample 4 was obtained.

UR-5100FX (manufactured by Toray) was spin-coated on glass to a final film thickness of 10 μm and dried on a hot plate at 95 ° C. for 8 minutes to prepare a UR-5100FX coating film. 70 mJ / cm ² exposure was performed with a high-pressure mercury lamp using a manual exposure machine through a photomask. Then, after heating at 80 ° C. for 1 minute, imidization was performed by heating at 140 ° C. for 30 minutes and at 350 ° C. for 1 hour to obtain an outgas measurement sample 5.

XP-1530 (manufactured by HD Microsystems) was spin-coated on glass to a final film thickness of 10 μm, dried on a 70 ° C. hot plate for 2 minutes, and then dried on an 85 ° C. hot plate for 2 minutes. A coating film of -1530 was produced. 300 mJ / cm < ² > exposure was performed with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, after heating at 105 ° C. for 1 minute, imidization was performed by heating at 200 ° C. for 30 minutes and at 350 ° C. for 1 hour to obtain an outgas measurement sample 6.

  About the produced outgas measurement samples 1 to 6, after scraping the sample from the glass, raising the temperature to 100 ° C. at a temperature rising rate of 10 ° C./min in a nitrogen atmosphere, heating at 100 ° C. for 60 minutes, and then 15 minutes or more After cooling in a nitrogen atmosphere, a 5% weight loss temperature was measured based on the weight after cooling when measured at a temperature elevation rate of 10 ° C./min. The results are shown in Table 6.

  As shown in Table 6, the samples using the photobase generator (outgas measurement samples 1 and 2) both had a 5% weight loss temperature of 450 ° C. or higher. Regarding the outgas measurement sample 1, it had a very low low outgassing property comparable to that of the polyamic acid alone (outgas measurement sample 3) (because the photobase generator has a low 50% weight loss temperature, it is derived from the photosensitive component) Less residue). All the other measurement samples had a 5% weight loss temperature of less than 450 ° C.

[Comparative Example 1]
A laminated substrate in which a metal substrate made of SUS, an insulating layer made of polyimide, a seed layer made of Cu, and a conductive layer were laminated in this order was prepared.
Next, a metal etching resist was made on the SUS surface of the multilayer substrate. Specifically, a dry film resist for metal etching is laminated on both surfaces of the laminated substrate, pattern exposure is performed on the SUS surface side, entire surface exposure is performed on the Cu surface side, development is performed using a sodium carbonate aqueous solution, and the SUS surface is developed. A resist pattern was formed thereon. Next, a ferric chloride aqueous solution was used as an etching solution, and the SUS surface was subjected to pattern etching through the resist pattern, and then the resist pattern was peeled off.
Subsequently, a resist for polyimide wet etching was made on the exposed polyimide surface on the SUS surface side of the multilayer substrate. Specifically, a dry film resist for polyimide wet etching is laminated on both surfaces of the laminated substrate, pattern exposure is performed on the SUS surface side, entire surface exposure is performed on the Cu surface side, development is performed using a sodium carbonate aqueous solution, and SUS is performed. A resist pattern was formed on the surface. Next, using TPE-3000 (manufactured by Toray Engineering Co., Ltd.) as an etchant, pattern resist is applied to the exposed polyimide surface on the SUS surface side through a resist pattern, and through holes for forming conductive portions are formed. The resist pattern was peeled off.
The manufactured laminate was subjected to plasma treatment at a pressure of 25 to 30 Pa, a process gas NF ₃ / O ₂ = 10/90%, and a frequency of 40 kHz. Thereafter, the exposed portion of the SUS surface and the Cu surface were masked with a masking tape for plating, and then an additive (CU-BRITE (manufactured by Ebara Eugene Corporation)) was added to 130 g / L of copper sulfate and 160 g / L of sulfuric acid. Using a plating bath, plating was performed for 45 minutes under the condition of ² A / dm ² at room temperature using the Cu surface as a power feeding layer to form a conductive portion.
Next, a resist for metal etching was made on the Cu surface of the multilayer substrate. Specifically, a dry film resist for metal etching is laminated on both surfaces of the laminated substrate, pattern exposure is performed on the Cu surface side, entire exposure is performed on the SUS surface side, development is performed using an aqueous sodium carbonate solution, and the Cu surface is exposed. A resist pattern was formed thereon. Next, a ferric chloride aqueous solution was used as an etching solution, and the Cu surface was subjected to pattern etching so that the electrode made of Cu remained on the polyimide through the resist pattern. Thereafter, after peeling off the resist pattern, the seed layer was removed by flash etching to obtain a substrate for thin film element b-1.

[Example 1-1] (Non-photosensitive polyimide precursor patterning)
The polyimide precursor solution 1 was coated on a 20 μm thick SUS304-HTA foil (manufactured by Toyo Seiki Co., Ltd.) with a die coater so as to have a film thickness of 10 μm after curing. It was made to dry partially (FIG. 18 (a)-(b)). Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. A polyimide-stainless steel laminate in which an insulating layer made of polyimide was patterned so that the through-hole portion was removed was obtained by natural cooling at 10 ° C./min (FIG. 18C).
Then, after masking the exposed part of the SUS surface with a masking tape for plating, an electrolytic plating bath in which an additive (CU-BRITE (manufactured by Sugawara Eugleite Co., Ltd.)) was added to 130 g / L of copper sulfate and 160 g / L of sulfuric acid. Then, using the SUS surface as a power feeding layer, plating was performed for 45 minutes under the condition of ² A / dm ² at room temperature to form a conductive portion (FIG. 18D).
Next, a resist for metal etching was made on the SUS surface of this polyimide-stainless steel laminate. Next, by using a ferric chloride aqueous solution as an etchant, pattern etching is performed on the SUS surface through the resist pattern, and then the resist pattern is peeled off (FIG. 18 (e)). 1-1 was obtained.

[Example 1-2] (Patterning after non-photosensitive polyimide imidization)
The polyimide precursor solution 12 is coated on a 20 μm thick SUS304-HTA foil (manufactured by Toyo Seiki Co., Ltd.) with a die coater so as to have a film thickness of 10 μm after curing, and then in an oven at 80 ° C. for 60 minutes in the air. Dried. Thereafter, heat treatment was performed at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, natural cooling) to obtain a laminate (FIGS. 18A to 18B). A resist pattern was formed on the laminated insulating layer made of polyimide. After removing the exposed portion of the insulating layer using polyimide etchant TPE-3000 (manufactured by Toray Engineering), the resist pattern is peeled off and the insulating layer is patterned so that the through hole portion is removed. A laminate was obtained (FIG. 18 (c)).
Thereafter, a thin film element substrate a-1-2 was obtained in the same manner as in Example 1-1.

[Example 1-3] (Photosensitive polyimide patterning)
The photosensitive polyimide resin composition 3 prepared in Preparation Example 3 was coated on a 20 μm thick SUS304-HTA foil (manufactured by Toyo Seiki Foil) with a die coater so as to have a film thickness of 10 μm after curing, and an oven at 80 ° C. It was dried in the atmosphere for 60 minutes (FIGS. 18A to 18B). Then, 500 mJ / cm < ² > exposure was performed to the pattern shape with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, it heated at 155 degreeC for 10 minute (s). The coating film was developed with a solution in which a 2.38% by weight aqueous solution of tetramethylammonium hydroxide and isopropanol were mixed at a ratio of 9: 1 and then heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate: 10 ° C./min. , Natural cooling), a polyimide-stainless steel laminate was obtained in which the insulating layer made of polyimide was patterned so that the through-hole portion was removed (FIG. 18C).
Thereafter, a thin film element substrate a-1-3 was obtained in the same manner as in Example 1-1.

[Example 2-1] (Non-photosensitive polyimide precursor patterning)
The polyimide precursor solution 1 is cured on the SUS surface side of the thin film element substrate a-1-1 and coated with a die coater so that the film thickness after curing is 10 μm on SUS. And dried for 60 minutes. Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. By performing natural cooling at 10 ° C./min, a thin film element substrate a-2-1 was obtained in which the insulating layer (second layer) made of polyimide was patterned so that the through-hole portion was removed.

[Example 2-2] (Patterning after non-photosensitive polyimide imidization)
The polyimide precursor solution 12 is coated on the SUS surface side of the thin film element substrate a-1-2 with a die coater so that the film thickness after curing is 10 μm on SUS. And dried for 60 minutes. Thereafter, heat treatment was performed at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, natural cooling) to obtain a laminate. A resist pattern was formed on the insulating layer (second layer) made of polyimide of the laminate. After removing the exposed portion of the insulating layer (second layer) using a polyimide etching solution TPE-3000 (manufactured by Toray Engineering), the resist layer is peeled off so that the through hole portion is removed. A thin film element substrate a-2-2 on which the (second layer) was patterned was obtained.

[Example 2-3] (Photosensitive polyimide patterning)
On the SUS surface side of the substrate for thin film elements a-1-2, the photosensitive polyimide resin composition 3 was coated with a die coater so that the film thickness after curing was 10 μm on SUS, and in an oven at 80 ° C., It was dried in the atmosphere for 60 minutes. Then, 500 mJ / cm < ² > exposure was performed to the pattern shape with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, it heated at 155 degreeC for 10 minute (s). The coating film was developed with a solution in which a 2.38% by weight aqueous solution of tetramethylammonium hydroxide and isopropanol were mixed at a ratio of 9: 1 and then heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate: 10 ° C./min. , Natural cooling), and a thin film element substrate a-2-3 was obtained in which the insulating layer (second layer) made of polyimide was patterned so that the through-hole portion was removed.

[Example 3-1] (Non-photosensitive polyimide precursor patterning)
A laminated substrate is prepared in which a metal substrate made of SUS (thickness 18 μm), an insulating layer made of polyimide (first layer) (thickness 10 μm), a seed layer made of Cu and an electrode layer (thickness 9 μm) are laminated in this order. (FIG. 20A).
A resist for metal etching was made on the SUS surface of the multilayer substrate. Next, a ferric chloride aqueous solution was used as an etching solution, and the SUS surface was subjected to pattern etching through the resist pattern, and then the resist pattern was peeled off. Subsequently, a resist for metal etching was made on the Cu surface of the multilayer substrate. Next, using a ferric chloride aqueous solution as an etching solution, pattern etching is performed on the Cu surface through the resist pattern, and then the resist pattern is peeled off, whereby the SUS surface and the Cu surface are both patterned. Was formed (FIG. 20B).
The polyimide precursor solution 1 was cured, and the SUS surface was coated with a die coater so that the film thickness was 10 μm on SUS, and dried in the atmosphere at 80 ° C. for 60 minutes (FIG. 20C). ). Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. The insulating layer (second layer) made of patterned polyimide was formed by natural cooling at 10 ° C./min (FIG. 20D). Subsequently, using the patterned Cu layer as a mask, the insulating layer (first layer) was etched using a polyimide etching solution TPE-3000 (manufactured by Toray Engineering) (FIG. 20E).
After laminating a dry film resist for metal etching on both sides of the laminated substrate, exposing the entire surface on the SUS side, developing using a sodium carbonate aqueous solution, and using a ferric chloride aqueous solution as an etching solution, an electrode made of Cu The Cu surface was etched so as to remain (FIG. 20 (f)). Thereafter, the seed layer was removed by flash etching. Next, the first conductive portion and the second conductive portion were formed by filling the through holes of the two insulating layers with a dispenser using a dispenser to obtain a thin film element substrate a-3-1 (FIG. 20 (g)).

[Example 3-2] (Photosensitive polyimide patterning)
In the same manner as in Example 3-1, a laminated body in which both the SUS surface and the Cu surface were patterned was formed (FIG. 20B).
Photosensitive polyimide resin composition 2 was coated on the SUS surface with a die coater so that the film thickness after curing was 10 μm on SUS, and dried in an oven at 80 ° C. for 60 minutes in the atmosphere (FIG. 20 (c). )). Then, 500 mJ / cm < ² > exposure was performed to the pattern shape with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, it heated at 155 degreeC for 10 minute (s). Each coating film was developed with a 9: 1 mixed solution of 2.38% by weight of tetramethylammonium hydroxide and isopropanol, and then heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate: 10 ° C. / Min, natural cooling), an insulating layer (second layer) made of patterned polyimide was formed (FIG. 20D).
Thereafter, a thin film element substrate a-3-2 was obtained in the same manner as in Example 3-1 (FIG. 20G).

[Example 4-1]
A laminated substrate was prepared in which a metal substrate (thickness 18 μm) made of SUS, an insulating layer (first layer) made of polyimide (thickness 10 μm), and a conductive layer (thickness 9 μm) made of Cu were laminated in this order (FIG. 17 (a)).
A resist for metal etching was made on the SUS surface of the multilayer substrate. Next, a ferric chloride aqueous solution was used as an etching solution, and the SUS surface was subjected to pattern etching through the resist pattern, and then the resist pattern was peeled off (FIG. 17B).
Subsequently, the photosensitive polyimide resin composition 3 was coated with a die coater so that the film thickness after curing was 10 μm on SUS, and dried in an oven at 80 ° C. for 60 minutes in the atmosphere (FIG. 17 (c). )). Then, 500 mJ / cm < ² > exposure was performed to the pattern shape with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, it heated at 155 degreeC for 10 minute (s). The coating film was developed with a solution in which a 2.38% by weight aqueous solution of tetramethylammonium hydroxide and isopropanol were mixed at a ratio of 9: 1 and then heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate: 10 ° C./min. , Spontaneous cooling), and a polyimide-stainless steel laminate was obtained in which the insulating layer (second layer) made of polyimide was patterned so that the through-hole portion for forming the conductive portion was removed (FIG. 17D). Using the patterned insulating layer (second layer) as a mask, the insulating layer (first layer) was etched using polyimide etchant TPE-3000 (manufactured by Toray Engineering) (FIG. 17E).
Using a dispenser, a silver paste was filled into the through holes of the two insulating layers to form conductive portions (FIG. 17 (f)).
Next, a resist for metal etching was made on the Cu surface of this polyimide-stainless steel laminate. Next, a ferric chloride aqueous solution was used as an etching solution, and the Cu surface was subjected to pattern etching so that an electrode made of Cu remained through the resist pattern, and then the resist pattern was peeled off (FIG. 17G). ).

[Example 4-2]
In the same manner as in Example 4-1 above, a laminated body in which the SUS surface was patterned was formed (FIG. 17B).
Subsequently, the polyimide precursor solution 1 was coated on the SUS surface side with a die coater so as to have a film thickness of 10 μm after curing, and was dried in the atmosphere at 80 ° C. for 60 minutes in the oven (FIG. 17C). ). Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. A polyimide-stainless laminate was obtained by patterning the insulating layer (second layer) made of polyimide so that the through-hole portion for forming the conductive portion was removed by natural cooling at 10 ° C./min (FIG. 17 (d)).
Thereafter, a thin film element substrate a-4-2 was obtained in the same manner as in Example 4-1.

[Example 4-3]
In the same manner as in Example 4-1 above, a laminated body in which the SUS surface was patterned was formed (FIG. 17B).
Subsequently, the polyimide precursor solution 12 was coated on the SUS surface side with a die coater, and was dried in an oven at 80 ° C. in the atmosphere for 60 minutes. Thereafter, heat treatment was performed at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, natural cooling) (FIG. 17C). Next, by irradiating YAG laser from the polyimide surface side and forming the through hole in the two insulating layers, the two insulating layers made of polyimide are patterned so that the through hole portion for forming the conductive portion is removed. A polyimide-stainless steel laminate was obtained (FIG. 17 (e)).
Thereafter, a thin film element substrate a-4-3 was obtained in the same manner as in Example 4-1.

[Comparative Example 2-1]
In the same manner as in Example 1-1, a polyimide-stainless steel laminate in which the polyimide film was patterned so that the through hole portion for forming the conductive portion was removed was obtained.
The produced polyimide-stainless steel laminate was subjected to plasma treatment at a pressure of 25 Pa to 30 Pa, a process gas NF ₃ / O ₂ = 10% / 90%, and a frequency of 40 kHz. The exposed portion of the SUS surface is masked with a masking tape for plating, and pretreated with S-10X (manufactured by Uemura Kogyo) and A-10X (manufactured by Uemura Kogyo) for 3 minutes, respectively, and then NPR-4 (manufactured by Uemura Kogyo) Was used for 1 minute of electroless plating. Using the electroless plating layer formed on the insulating layer as a power feeding layer, additives (Super Slow 2000 (manufactured by Enson Japan Co., Ltd.)) were added to 70 g / L copper sulfate, 200 g / L sulfuric acid, and 0.5 mL / L hydrochloric acid. Using the electrolytic plating bath, plating was performed for 25 minutes at room temperature under a current density of 4 A / dm ² .
Next, a resist for metal etching was made on the surface of the Cu electroplating layer formed on the electroless plating layer. Next, after using a ferric chloride aqueous solution as an etchant and performing pattern etching so that the electrode made of Cu remains on the Cu surface in a form covering the openings of SUS to be formed later, through the resist pattern, The resist pattern was peeled off. After removing the exposed electroless plating layer by soft etching with Nimden lip C-11, in order to remove the catalyst, a wet blasting device manufactured by Macau Co., Ltd. was used with an alumina grindstone, 0.5 kg / m. ^The treatment was performed at a water pressure of ² and a treatment speed of 10 m / min to remove the catalyst. Next, heat treatment was performed at 180 ° C. for 1 hr in a nitrogen atmosphere.
Next, a metal etching resist was made on the SUS surface of the laminate. Next, using a ferric chloride aqueous solution as an etching solution, pattern etching was performed on the SUS surface through the resist pattern, and then the resist pattern was peeled off to obtain a substrate for thin film element b-2-1. .

[Comparative Example 2-2]
In Comparative Example 2-1, in place of the catalyst removal step by wet blasting, the sample was immersed in a Macudizer 9204 (manufactured by Nihon Mcda Mid Co., Ltd.) for 1 minute at a liquid temperature of 35 ° C. Manufactured at 75 ° C. for 2 minutes, washed with water, immersed at 43 ° C. for Macudizer 9279 (manufactured by Nihon McDamid Co., Ltd.) for 1 minute, washed with water, and dried to remove the catalyst. Except for this, a thin film element substrate b-2-2 was produced in the same manner as in Comparative Example 2-1.

[Example 5-1]
On the SUS surface side of the thin film element substrate b-2-1, the polyimide precursor solution 1 is coated with a die coater so that the film thickness after curing is 10 μm on SUS. Dried under 60 minutes. Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. By performing natural cooling at 10 ° C./min, a thin film element substrate a-5-1 was obtained in which an insulating layer (second layer) made of polyimide was patterned so that the through-hole portion was removed.

[Example 5-2]
On the SUS surface side of the substrate for thin film element b-2-2, the polyimide precursor solution 1 is cured and coated with a die coater so that the film thickness becomes 10 μm on SUS. Dried under 60 minutes. Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. The substrate a-5-2 for thin film elements by which the insulating layer (2nd layer) which consists of polyimides was patterned so that a through-hole part might be removed was obtained by carrying out natural cooling of 10 degreeC / min.

[Example 6-1]
A laminated substrate was prepared in which a metal substrate (thickness 18 μm) made of SUS, an insulating layer (first layer) made of polyimide (thickness 10 μm), and a conductive layer (thickness 9 μm) made of Cu were laminated in this order (FIG. 17 (a)).
A resist for metal etching was made on the SUS surface of the multilayer substrate. Next, a ferric chloride aqueous solution was used as an etching solution, and the SUS surface was subjected to pattern etching through the resist pattern, and then the resist pattern was peeled off (FIG. 17B).
Subsequently, the photosensitive polyimide resin composition 3 was coated on the SUS surface side with a die coater so as to have a film thickness of 10 μm after being cured on SUS, and dried in an oven at 80 ° C. in the atmosphere for 60 minutes (FIG. 17 (c)). Then, 500 mJ / cm < ² > exposure was performed to the pattern shape with the high pressure mercury lamp using the manual exposure machine through the photomask. Then, it heated at 155 degreeC for 10 minute (s). The coating film was developed with a solution in which a 2.38% by weight aqueous solution of tetramethylammonium hydroxide and isopropanol were mixed at a ratio of 9: 1 and then heat-treated in a nitrogen atmosphere at 350 ° C. for 1 hour (temperature increase rate: 10 ° C./min. , Spontaneous cooling), and a polyimide-stainless steel laminate was obtained in which the insulating layer (second layer) made of polyimide was patterned so that the through-hole portion for forming the conductive portion was removed (FIG. 17D).
Using the patterned insulating layer (second layer) as a mask, the insulating layer (first layer) was etched using polyimide etchant TPE-3000 (manufactured by Toray Engineering) (FIG. 17E).
The prepared polyimide-stainless steel laminate was subjected to plasma treatment at a pressure of 25 Pa to 30 Pa, a process gas NF ₃ / O ₂ = 10% / 90%, and a frequency of 40 kHz, then copper sulfate 130 g / L, sulfuric acid 160 g / Using an electroplating bath in which an additive (CU-BRITE (manufactured by Sugawara Eugleite Co., Ltd.)) is added to L, plating is performed for 120 minutes at room temperature under the condition of ² A / dm ² using the Cu surface as a power feeding layer. A conduction part was formed (FIG. 17F).
Next, a resist for metal etching was made on the Cu surface of this polyimide-stainless steel laminate. Next, an aqueous solution of ferric chloride is used as an etching solution, and after etching the pattern on the Cu surface so that the electrode made of Cu remains through the resist pattern, the resist pattern is peeled to remove the resist pattern. Substrate a-6-1 was obtained (FIG. 17 (g)).

[Example 6-2]
In the same manner as in Example 6-1 above, a laminate in which the SUS surface was patterned was formed (FIG. 17B).
Subsequently, the polyimide precursor solution 1 was coated on the SUS surface side with a die coater so as to have a film thickness of 10 μm after being cured on SUS, and dried in an atmosphere at 80 ° C. for 60 minutes in the atmosphere (FIG. 17). (C)). Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. A polyimide-stainless laminate was obtained by patterning the insulating layer (second layer) made of polyimide so that the through-hole portion for forming the conductive portion was removed by natural cooling at 10 ° C./min (FIG. 17 (d)).
Thereafter, in the same manner as in Example 6-1 above, a thin film element substrate a-6-2 was obtained.

[Example 6-3]
In the same manner as in Example 6-1 above, a laminate in which the SUS surface was patterned was formed (FIG. 17B).
Subsequently, the polyimide precursor solution 12 was coated on the SUS surface side with a die coater, and was dried in an oven at 80 ° C. in the atmosphere for 60 minutes. Thereafter, heat treatment was performed at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, natural cooling) (FIG. 17C). Next, by irradiating YAG laser from the polyimide surface side and forming the through hole in the two insulating layers, the two insulating layers made of polyimide are patterned so that the through hole portion for forming the conductive portion is removed. A polyimide-stainless steel laminate was obtained (FIG. 17 (e)).
Thereafter, a thin film element substrate a-6-3 was obtained in the same manner as in Example 6-1.

[Example 7] (Non-photosensitive polyimide precursor patterning)
The polyimide precursor solution 1 is coated on a 18 μm thick electrolytic copper foil (made by Mitsui Metals) with a die coater so as to have a film thickness of 10 μm after curing, and is dried in an atmosphere at 80 ° C. for 60 minutes in the air. (FIGS. 18A to 18B). Then, on the polyimide precursor film, a resist film is made using a dry film resist, and the polyimide precursor film is developed at the same time as development. Then, the resist pattern is peeled off, and heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere. The polyimide-copper laminated body by which the insulating layer which consists of a polyimide was patterned so that a through-hole part might be removed was obtained by carrying out natural cooling of 10 degreeC / min (FIG.18 (c)).
Then, after the exposed part of the copper surface is masked with a masking tape for plating, an electrolytic plating bath in which an additive (CU-BRITE (manufactured by Sugawara Eugleite Co., Ltd.)) is added to 130 g / L of copper sulfate and 160 g / L of sulfuric acid. Then, using the copper surface as a power feeding layer, plating was performed for 45 minutes at room temperature under the condition of ² A / dm ² to form a conductive portion (FIG. 18D).
Next, a resist for metal etching was made on the copper surface of the polyimide-copper laminate. Next, using a ferric chloride aqueous solution as an etching solution, pattern etching was performed on the copper surface through the resist pattern, and then the resist pattern was peeled off (FIG. 26), whereby the thin film element substrate a-7 was obtained. Obtained.

[Reference Example 1]
A laminated substrate in which a metal substrate made of SUS, an insulating layer made of polyimide, a seed layer made of Cu, and a conductive layer were laminated in this order was prepared.
Next, a metal etching resist was made on the SUS surface of the multilayer substrate. Specifically, a dry film resist for metal etching is laminated on both surfaces of the laminated substrate, pattern exposure is performed on the SUS surface side, entire surface exposure is performed on the Cu surface side, development is performed using a sodium carbonate aqueous solution, and the SUS surface is developed. A resist pattern was formed thereon. Next, an aqueous ferric chloride solution was used as an etching solution, and after pattern etching was performed on the SUS surface through the resist pattern, the resist pattern was peeled off to expose the polyimide surface on the SUS surface side of the multilayer substrate.

[Evaluation of surface flatness]
The surface flatness was evaluated about the insulating layer in the board | substrate for thin film elements of an Example and a comparative example. The insulating layer can be classified into the following three types.
1. 1. Polyimide (PI) surface formed by coating 2. PI surface formed by Cu etching from a laminate of PI-Cu. PI surface formed by SUS etching from laminate of PI-SUS As reference example 2, the surface flatness of SUS foil was also evaluated.

[Example 8]
According to the method described in Example 4-1, a conductive part of 150 μmφ is formed on a 150 mm × 150 mm substrate at intervals of 225 μm, 240 vertical and 320 horizontal, and copper is formed on the back surface (insulating layer (first layer) side). The board | substrate A which has the conduction | electrical_connection part in which wiring was formed was prepared.
Next, after masking the conductive portion using a metal mask, an aluminum film as a first adhesion layer is formed on the insulating layer (second layer) of the substrate A having the conductive portion by a DC sputtering method (deposition pressure). The film was formed with a thickness of 5 nm by 0.2 Pa (argon), input power of 1 kW, and film formation time of 10 seconds. Next, a silicon oxide film as a second adhesion layer was formed with a thickness of 100 nm by RF magnetron sputtering (deposition pressure 0.3 Pa (argon: oxygen = 3: 1), input power 2 kW, deposition time 30 minutes). .

A TFT having a bottom gate / bottom contact structure was fabricated on a second adhesion layer of the substrate A having the conductive portion and in a 120 mm × 120 mm area in the center of the substrate A having the conductive portion. First, after forming an aluminum film having a thickness of 100 nm as a gate electrode film, a resist pattern is formed by a photolithography method, wet etching is performed with a phosphoric acid solution, and the aluminum film is patterned into a predetermined pattern to form a gate electrode and a gate wiring. Formed. The gate wiring was formed so as to connect the conduction portion and the gate electrode. Next, silicon oxide having a thickness of 300 nm was formed as a gate insulating film on the entire surface so as to cover the gate electrode. This gate insulating film uses an RF magnetron sputtering apparatus and is applied to a 6-inch SiO ₂ target with a power of 1.0 kW (= 3 W / cm ² ), a pressure of 1.0 Pa, and a gas of argon + O ₂ (50%). It formed on film-forming conditions. Thereafter, after forming a resist pattern by a photolithography method, dry etching was performed to pattern the gate insulating film. Next, a titanium film, an aluminum film, and an IZO film having a thickness of 100 nm are deposited on the entire surface of the gate insulating film so as to serve as a source electrode, a source wiring, and a drain electrode, and then a resist pattern is formed by photolithography. Wet etching was continuously performed with an aqueous hydrogen oxide solution and a phosphoric acid solution, and the titanium film was patterned into a predetermined pattern to form a source electrode, a source wiring, and a drain electrode. The source wiring was formed so as to connect the conduction portion and the source electrode. At this time, the source electrode and the drain electrode were formed on the gate insulating film so as to have a pattern apart from a portion other than directly above the central portion of the gate electrode.

Next, an InGaZnO amorphous oxide thin film (InGaZnO ₄ ) with an In: Ga: Zn ratio of 1: 1: 1 was formed on the entire surface so as to cover the source electrode and the drain electrode so as to have a thickness of 25 nm. The amorphous oxide thin film is 4 inches of InGaZnO (In: Ga: Zn = 1: 1: 1) using an RF magnetron sputtering apparatus under conditions of room temperature (25 ° C.) and Ar: O ₂ of 30:50. It was formed using a target. Then, after forming a resist pattern on the amorphous oxide thin film by photolithography, wet etching was performed with an oxalic acid solution, and the amorphous oxide thin film was patterned to form an amorphous oxide thin film having a predetermined pattern. The amorphous oxide thin film thus obtained was formed on the gate insulating film so as to contact the source electrode and the drain electrode on both sides and straddle the source electrode and the drain electrode. Subsequently, 100 nm thick silicon oxide was formed as a protective film by RF magnetron sputtering so as to cover the whole, and then a resist pattern was formed by photolithography, followed by dry etching. After annealing in the atmosphere at 300 ° C. for 1 hour, an EL partition layer was formed using an acrylic positive resist to produce a TFT substrate.

After depositing an EL layer to be white on the TFT substrate, depositing an IZO film as an electrode and sealing the EL using a barrier film, a flexible diagonal of 5.9 inches and a resolution of 68 dpi A 320 × 240 active matrix driven monochrome EL display was fabricated.
Subsequently, a control IC is mounted on the wiring portion formed on the back surface (insulating layer (first layer) side) in advance, and the manufactured monochrome EL display is scanned at 15 V, beta voltage 10 V, and power supply voltage 10 V. Confirmed operation. About the produced monochrome EL display, the continuous operation | movement for 24 hours and the operation | movement six months after preparation were confirmed.

[Comparative Example 3]
On a SUS304-HTA plate (manufactured by Koyama Steel Co., Ltd.) having a length of 200 mm, a width of 150 mm, and a thickness of 100 μm, using the polyimide precursor solution 1, a spin coater is used so that the film thickness after imidization becomes 7 μm ± 1 μm. After coating and drying in a hot plate oven at 100 ° C. for 60 minutes in the air, heat treatment is performed at 350 ° C. for 1 hour in a nitrogen atmosphere (temperature increase rate: 10 ° C./min, spontaneous cooling) to form a polyimide layer did. Next, an aluminum film as a first adhesion layer was formed on the polyimide layer with a thickness of 5 nm by a DC sputtering method (film formation pressure 0.2 Pa (argon), input power 1 kW, film formation time 10 seconds). Next, a silicon oxide film as a second adhesion layer was formed with a thickness of 100 nm by RF magnetron sputtering (deposition pressure 0.3 Pa (argon: oxygen = 3: 1), input power 2 kW, deposition time 30 minutes). .
Thereafter, various wirings are not connected to the conductive portion in the upper 150 mm × 150 mm area of the substrate, but connected to the wiring portion formed in the remaining vertical 50 mm and horizontal 150 mm area on the lower surface of the substrate provided on the surface side of the substrate. In the same manner as in the device example described above, an active matrix driven monochrome EL display was fabricated.
Subsequently, a control IC was mounted on the wiring portion formed on the surface (element side), and the operation of the produced monochrome EL display was confirmed at a scan voltage of 15 V, a beta voltage of 10 V, and a power supply voltage of 10 V. About the produced monochrome EL display, the continuous operation | movement for 24 hours and the operation | movement six months after preparation were confirmed.

[Evaluation]
The organic EL display devices of Example 8 and Comparative Example 3 were compared. By using a substrate provided with a conductive portion as a thin film element substrate on which elements are formed, the control IC can be arranged on the back surface, and the device has a narrow frame.

[Comparative Example 4]
By the method described in Comparative Example 1, 240 conductive portions of 320 μmφ were formed on a 150 mm × 150 mm substrate at intervals of 225 μm and 320 horizontal portions. The board | substrate B which has the conduction | electrical_connection part by which the copper wiring was formed on the insulating layer was prepared.
An active matrix driven monochrome EL display was produced in the same manner as in Example 8 except that the substrate B was used in place of the substrate A, and the TFT and the EL element were formed on the insulating layer on which the copper wiring was formed.
Then, FPC which mounted IC for control and formed the wiring and the electrode was bonded together to the back surface (SUS surface) of the board | substrate B. FIG. Then, the electrode formed in FPC and the conduction | electrical_connection part of the board | substrate B were connected by wire bonding. About the produced monochrome EL display, operation | movement was confirmed with the scanning voltage 15V, the beta voltage 10V, and the power supply voltage 10V.

[Evaluation]
The TFTs of Example 8 and Comparative Example 4 were compared. When the electrical characteristics of the TFT of Comparative Example 4 were evaluated, a reduction in field effect mobility was observed as compared with the TFT of Example 8. In addition, a short circuit was observed between the gate electrode and the source or drain electrode in a part of the TFT of Comparative Example 4. These are considered due to the low surface flatness of the insulating layer of the substrate B. Note that such a short circuit between electrodes can occur not only in the TFT but also in the wiring of the display or the like. For this reason, it is necessary to planarize the insulating layer.

[Example 9]
By the method described in Example 4-1, as shown in FIGS. 17A to 17F, the 200 μmφ insulating layer through hole 12h and the second insulating layer through hole are formed in the opening 14h of the 400 μmφ metal layer. The conductive portion 10 was formed by filling the insulating layer through holes 12h and the second insulating layer through holes 16h with a conductive material. Furthermore, a copper wiring was formed when pattern etching was performed on the Cu surface. As shown in FIG. 17G, this copper wiring has a 1000 μmφ portion (indicated by the third metal layer 5b in the figure) so as to cover the opening 14h of the 400 μmφ metal layer. . In this way, as shown in FIGS. 25A and 25B, 10 200 μmφ transparent electrode layer conducting portions 10b for anode connection and 10 pieces for cathode connection are provided on a 100 mm × 100 mm substrate. Substrate C having conductive portions in which 200 μmφ back electrode layer conductive portions 10 a are provided and copper wirings (anode connection wires 32 b and cathode connection wires 32 a) are formed on the back side (insulating layer 2 side) was prepared. . FIG. 25A is a plan view seen from the insulating layer 2 side (front side) of the substrate, and FIG. 25B is a plan view seen from the second insulating layer 6 side (back side) of the substrate. In FIG. 25A, a region E1 indicated by a broken line is a portion in contact with the light emitting portion of the organic EL element.

Moreover, an ITO substrate in which ITO was patterned in a line shape having a width of 52 mm as an anode on a glass substrate was prepared. Next, a positive resist (TFRH manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the ITO substrate by a spin coating method so as to have a dry film thickness of 1 μm, and then baked at 120 ° C. for 2 minutes. Thereafter, ultraviolet light of 365 nm was irradiated through a photomask so that the light emitting area became 50 mm □. The resist was developed with an organic alkaline developer NMD3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) for 30 seconds, and baked at 240 ° C. for 30 minutes to form an EL insulating layer. Next, α-NPD (N, N′-di [(1-naphthyl) -N, N′-diphenyl] -1,1′-biphenyl) -4,4′-diamine) and MoO are formed on the ITO substrate. ₃ was formed by co-evaporation at a volume ratio of 4: 1 and a degree of vacuum of 10 ⁻⁵ Pa to a film thickness of 40 nm at a deposition rate of 1.0 Å / sec, thereby forming a hole injection layer. Next, α-NPD was vacuum-deposited to a film thickness of 20 nm at a deposition rate of 1.0 速度 / sec under a vacuum degree of 10 ⁻⁵ Pa to form a hole transport layer. Next, Alq ₃ (Tris- (8-hydroxyquinoline) aluminum) is used as the host material, C545t is used as the green light-emitting dopant, Alq ₃ and C545t are formed on the hole transport layer, and the C545t concentration is 3 wt%. As described above, a light emitting layer was formed by vacuum deposition to a thickness of 35 nm at a deposition rate of 1 sec / sec under a vacuum degree of 10 ⁻⁵ Pa. Next, Alq ₃ was vacuum-deposited to a thickness of 10 nm at a deposition rate of 1.0 Å / sec under a vacuum degree of 10 ⁻⁵ Pa to form an electron transport layer. Next, Alq ₃ and LiF were co-evaporated to form a film with a thickness of 15 nm at a deposition rate of 0.1 Å / sec under a vacuum degree of 10 ⁻⁵ Pa, thereby forming an electron injection layer. Finally, using Al as the cathode, vacuum deposition was performed at a deposition rate of 5.0 Å / sec and a film thickness of 200 nm under a vacuum degree of 10 ⁻⁵ Pa.
As for the anode (transparent electrode layer 24) and the cathode (back electrode layer 22), as shown in FIG. 25 (c), the transparent electrode layer conducting portion 10b and the back electrode layer provided on the substrate C having the conducting portion. It formed so that the conduction | electrical_connection part 10a might be opposed. In FIG.25 (c), the area | region E2 shown with a broken line is a light emission part of an organic EL element.

  After the formation of the cathode, the organic EL element was transported from the vacuum deposition apparatus to a glove box in a nitrogen atmosphere with a moisture concentration of 0.1 ppm or less. Moreover, the board | substrate C which has the said conduction | electrical_connection part was heat-dried in the glove box. Thereafter, the transparent electrode layer conducting portion for anode connection and the anode of the organic EL element of the substrate C having the conducting portion are arranged so that the surface side of the substrate C having the conducting portion faces the cathode side of the organic EL element. Are in contact with each other, the back electrode layer conducting portion for cathode connection of the substrate C having the conducting portion is in contact with the cathode of the organic EL element, and the light emitting portion of the organic EL element is in contact with the insulating layer of the substrate C having the conducting portion. Then, the substrate C having a conducting portion and the organic EL element were conducted and then bonded. An epoxy resin was applied from the outside of the outer edge portion and the conductive portion of the substrate C having a conductive portion, and was cured from ultraviolet rays to obtain an organic EL element.

DESCRIPTION OF SYMBOLS 1 ... Substrate for thin film elements 2 ... Insulating layer 3 ... 1st conduction | electrical_connection part 4 ... Metal layer 5a ... 2nd metal layer 5b ... 3rd metal layer 6 ... 2nd insulation layer 7 ... 2nd conduction | electrical_connection part 8 ... Metal for conduction | electrical_connection parts Part 9 ... Adhesion layer 10 ... Conducting part 10a ... Back electrode layer conducting part 10b ... Transparent electrode layer conducting part 12h ... Insulating layer through-hole 14h ... Metal layer opening 14s ... Metal layer pattern end 15 ... Cover Layer 16h ... 2nd insulating layer through-hole 19h ... Opening part of adhesion layer 20 ... Organic EL device 21 ... Organic EL element part 22 ... Back electrode layer 23 ... EL layer 24 ... Transparent electrode layer 25 ... Transparent sealing substrate 26 ... Sealing Stop L: Light emission

Claims (12)

A substrate for a thin film element used for a thin film element,
An insulating layer having an insulating layer through-hole and having a surface roughness Ra of 5 nm or less;
A first conductive portion filled in the insulating layer through hole;
A thin-film element substrate comprising: a conductive portion formed in a thickness direction of the thin-film element substrate; conducting the front and back of the thin-film element substrate; and having at least the first conductive portion.   The thin film element substrate according to claim 1, wherein the insulating layer contains polyimide.   The thin film element substrate according to claim 2, wherein the insulating layer contains polyimide as a main component.   The substrate for thin film elements according to any one of claims 1 to 3, wherein the hygroscopic expansion coefficient of the insulating layer is in a range of 0 ppm /% RH to 15 ppm /% RH.   5. The thin film element substrate according to claim 1, wherein a linear thermal expansion coefficient of the insulating layer is in a range of 0 ppm / ° C. to 30 ppm / ° C. 6. A thin film element substrate according to any one of claims 1 to 5,
A thin film element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate, and an electrode of the thin film element portion is connected to a conduction portion of the thin film element substrate. A thin film element characterized by comprising:   The thin film element according to claim 6, further comprising a transparent sealing substrate disposed on the thin film element portion.   The thin film element according to claim 6, wherein the thin film element part is a thin film transistor element part. The thin film element portion is formed on the insulating layer, a back electrode layer, an electroluminescence layer formed on the back electrode layer and including at least an organic light emitting layer, and a transparent electrode formed on the electroluminescence layer An organic electroluminescence element portion having a layer,
The conductive portion of the thin film element substrate includes a transparent electrode layer conductive portion connected to the transparent electrode layer and a back electrode layer conductive portion connected to the back electrode layer. The thin film element according to claim 6 or 7. Electronic paper in which the thin film element portion includes a back electrode layer formed on the insulating layer, a display medium layer formed on the back electrode layer, and a transparent electrode layer formed on the display medium layer Element part,
The conductive portion of the thin film element substrate includes a transparent electrode layer conductive portion connected to the transparent electrode layer and a back electrode layer conductive portion connected to the back electrode layer. The thin film element according to claim 6 or 7. A thin film element substrate according to any one of claims 1 to 5,
A thin film transistor element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate;
The insulating layer of the thin film element substrate is formed on a surface having a surface roughness Ra of 5 nm or less, a back electrode layer connected to the thin film transistor element part, formed on the back electrode layer, and including at least an organic light emitting layer An electroluminescence layer, and an organic electroluminescence element portion having a transparent electrode layer formed on the electroluminescence layer;
An organic electroluminescence display device comprising: a transparent sealing substrate disposed on the organic electroluminescence element portion; and an electrode of the thin film transistor element portion connected to a conduction portion of the thin film element substrate. . A thin film element substrate according to any one of claims 1 to 5,
A thin film transistor element portion formed on a surface having a surface roughness Ra of 5 nm or less of the insulating layer of the thin film element substrate;
A back electrode layer formed on the surface of the insulating layer of the thin film element substrate having a surface roughness Ra of 5 nm or less, connected to the thin film transistor element part, a display medium layer formed on the back electrode layer, and An electronic paper element portion having a transparent electrode layer formed on the display medium layer;
An electronic paper, comprising: a transparent sealing substrate disposed on the electronic paper element portion, wherein an electrode of the thin film transistor element portion is connected to a conduction portion of the thin film element substrate.

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