JP2016100483A - Epitaxial wafer manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of an epitaxial wafer having favorable flatness, which reduces a difference in growth rate of an epitaxial layer generated depending on a difference in crystal orientation.SOLUTION: In an epitaxial wafer manufacturing method of epitaxially growing a silicon layer by introducing a material gas to a silicon wafer with a principal surface of (100) or (110), epitaxial growth is performed at a temperature of 950-1150 degrees and at a material gas concentration within a range of 1.0×10-1.0×10mol/l and pressure is reduced to equal to or lower then 200 torr. By doing this, a difference in growth rate caused by a difference in crystal orientation is reduced and an epitaxial wafer with a favorable flatness can be manufactured.SELECTED DRAWING: Figure 4A

Description

  The present invention relates to an epitaxial wafer manufacturing method.

A silicon epitaxial wafer is known in which an epitaxial layer is grown by introducing a source gas into the surface of a silicon single crystal substrate on which an epitaxial layer is grown by vapor phase growth. As manufacturing conditions for such an epitaxial wafer, for example, Patent Documents 1 to 4 disclose various manufacturing conditions. In a normal epitaxial wafer, the concentration of the source gas is set to 1 × 10 ⁻⁴ to 1 × 10 ⁻² mol / l, the reaction temperature during vapor phase growth is set to 950 to 1150 degrees, and an epitaxial layer of 2 μm or more is formed. Is common.

  When the concentration of the source gas is lower than the above range, the growth rate of the epitaxial layer is slow and the productivity is lowered, and when the concentration is higher than the above range, defects in the epitaxial layer increase. In addition, when the reaction temperature during vapor phase growth is lower than the above range, defects in the epitaxial layer increase. Absent. Therefore, epitaxial growth is performed at the source gas concentration and reaction temperature as described above.

Japanese Patent Publication No. 06-38403 Japanese Patent Laid-Open No. 2000-100731 JP 2005-183510 A Japanese Patent Laid-Open No. 10-209054

  In recent years, with the wide use of epitaxial wafers manufactured using silicon wafers having a diameter of 300 mm or more in miniaturized electronic devices, improvement in the flatness of the epitaxial wafers has been demanded.

  As a factor that deteriorates the flatness of the epitaxial wafer, attention is paid to a growth rate difference caused by a difference in crystal orientation on the surface of the wafer. For example, consider a case where an epitaxial layer (silicon layer) is grown on a silicon wafer having a main surface of (100). When the main surface of the silicon wafer is viewed from above, the growth rate of the epitaxial layer becomes slow at the peripheral edge of the wafer in the <100> direction (crystal orientation reference) from the center of the wafer toward the outer periphery. On the other hand, the growth rate of the epitaxial layer increases at the peripheral portion of the wafer in the <110> direction, which is deviated by 45 degrees about the center of the wafer from the crystal orientation reference (<100> direction). Therefore, in the peripheral portion of the epitaxial wafer, the difference in thickness of the epitaxial layer between the <100> direction and the <110> direction increases, and the flatness of the epitaxial wafer is deteriorated. A similar phenomenon occurs in a silicon wafer having a main surface of (110).

  The difference in the growth rate of the epitaxial layer caused by this difference in crystal orientation appears particularly prominently in the following regions, for example, in an epitaxial wafer having a diameter of 300 mm or more. A difference in growth rate becomes noticeable in an annular region (peripheral edge of the wafer) having a width of 2 mm that is 2 mm inward from the outer peripheral edge of the epitaxial wafer toward the center of the wafer, and affects the flatness of the wafer (site flatness). . In addition, as the reaction temperature and source gas concentration during vapor phase growth, a difference in the growth rate of the epitaxial layer occurs even in the above-described conventional temperature range during vapor phase growth and concentration range of the source gas, and the epitaxial wafer is flattened. Influences the degree.

  The subject of this invention is providing the manufacturing method of an epitaxial wafer with favorable flatness while reducing the growth rate difference of the epitaxial layer produced by the difference in crystal orientation.

Means for Solving the Problems and Effects of the Invention

The method for producing an epitaxial wafer of the present invention includes:
In a method for producing an epitaxial wafer, wherein a raw material gas is introduced into a silicon wafer having a main surface of (100) or (110) to epitaxially grow a silicon layer,
The temperature is set to 950 to 1150 degrees, the gas concentration of the raw material gas is set in the range of 1.0 × 10 ^{−4 to} 1.0 × 10 ⁻² mol / l, and the pressure is set to 200 torr or less for epitaxial growth. To do.

  The present inventor manufactured epitaxial wafers under various conditions and investigated the growth rate difference in order to reduce the growth rate difference of the epitaxial layer generated at the peripheral portion of the wafer (growth substrate) during epitaxial growth. When investigating this growth rate difference, the maximum thickness of the epitaxial layer (silicon layer) at the annular point entering the inside of 2 mm from the outer periphery to the center when the silicon wafer with the main surface of (100) is viewed from the top. The value was T1. In addition, the film thickness average value at a moving point obtained by rotating the point T1 around ± 45 degrees around the center of the wafer was T2, and the film thickness average value at a point moved 3 mm toward the center of the wafer was T3. And the growth rate difference of the epitaxial layer was defined by (T1-T2) / T3. As a result, it has been found that when the growth rate difference is larger than 0.5%, it has an adverse effect on the recent demand for flatness required for epitaxial wafers.

In order to reduce this growth rate difference to 0.5% or less, the concentration of a source gas that is generally used (1 × 10 ⁻⁴ to 1 × 10 ⁻² mol / l), the reaction temperature during epitaxial growth (950) (˜1150 degrees) may be adjusted as follows. Specifically, it is possible to reduce the growth rate difference to 0.5% or less by lowering the gas concentration within the above range and increasing the reaction temperature. However, if only the reaction temperature and the gas concentration of the source gas are adjusted, the film thickness at the peripheral edge of the wafer tends to increase overall, and this does not satisfy the recent demand for flatness of the epitaxial wafer.

  Therefore, the present inventor has defined the film thickness variation of the epitaxial layer formed on the peripheral portion of the growth substrate together with the growth rate difference, and investigated an epitaxial wafer that satisfies the demand for flatness in recent years. In such investigation, when the (100) main surface of the silicon wafer is viewed from above, the average thickness of the epitaxial layer at the first annular point that is 2 mm inside from the outer periphery to the center of the epitaxial layer is T4. did. Similarly, the film thickness average value at the second annular point that entered 5 mm toward the center from the outer periphery of the epitaxial layer was defined as T5. And the film thickness fluctuation | variation of the peripheral part of an epitaxial layer was defined by (T4-T5) / T5. As a result, the present inventors faced the fact that it is difficult to achieve both reduction in the growth rate difference and reduction in film thickness variation when epitaxial growth is performed at normal pressure.

  In the face of this fact, the present inventor obtained the knowledge that the pressure in the epitaxial growth (pressure in the reactor) greatly affects the growth rate difference and the film thickness variation in trial and error about the growth conditions in the epitaxial growth. . As a result of further intensive studies, the conclusion has been reached that it is possible to achieve both a growth rate difference and a reduction in film thickness variation by reducing the pressure in the reactor.

Specifically, the temperature is set to 950 to 1150 degrees, the gas concentration of the raw material gas is set to a range of 1.0 × 10 ^{−4 to} 1.0 × 10 ⁻² mol / l, and the pressure is set to 200 torr or less for epitaxial growth. By doing so, the growth rate difference and film thickness variation can be reduced.

In an embodiment of the present invention, the main surface of the silicon wafer is (100),
The maximum thickness of the silicon layer at the first annular point that is 2 mm inward from the outer periphery to the center of the silicon layer is T1, and the main surface is viewed from the top and moved by turning ± 45 degrees around the T1 point. The film thickness average value of the silicon layer at the point is T2, the film thickness average value of the point moved 3 mm toward the center is T3, and the difference in the growth rate of the silicon layer defined by (T1-T2) / T3 is 0.5% or less,
The film thickness average value at the first annular point is defined as T4, and the film thickness average value at the second annular point entering 3 mm toward the center from the first annular point is defined as T5, which is defined by (T4-T5) / T5. The absolute value of film thickness fluctuation at the peripheral edge of the silicon layer can be reduced to 1.3% or less. Therefore, an epitaxial wafer with good flatness can be provided (good flatness quality can be achieved).

In another embodiment of the present invention, the main surface of the silicon wafer is (110),
The maximum thickness of the silicon layer at the first annular point that is 2 mm inside from the outer periphery to the center of the silicon layer is T1, and the main surface is viewed from the top and moved by ± 90 degrees around the T1 point. The film thickness average value of the silicon layer at the point is T2, the film thickness average value of the point moved 3 mm toward the center is T3, and the difference in the growth rate of the silicon layer defined by (T1-T2) / T3 is 0.5% or less,
The film thickness average value at the first annular point is defined as T4, and the film thickness average value at the second annular point entering 3 mm toward the center from the first annular point is defined as T5, which is defined by (T4-T5) / T5. The absolute value of film thickness fluctuation at the peripheral edge of the silicon layer can be reduced to 1.3% or less. Therefore, an epitaxial wafer with good flatness can be provided (good flatness quality can be achieved).

  Furthermore, in an embodiment of the present invention, the source gas comprises trichlorosilane or dichlorosilane. Further, when the diameter of the silicon wafer is 300 mm or more, it is effective to reduce the film thickness variation and the growth rate difference.

The typical fragmentary sectional view which shows an example of the vapor phase growth apparatus used for this invention. The plane schematic diagram which looked at the main surface of the silicon wafer which shows the crystal orientation (<100> direction and <110> direction) in a silicon wafer whose main surface is (100). The plane schematic diagram which looked at the main surface of the silicon wafer which shows the crystal orientation (<100> direction and <110> direction) in a silicon wafer whose main surface is (110) from the top. The plane schematic diagram of the epitaxial wafer which shows the measurement location which measured the film thickness of the epitaxial layer in an epitaxial wafer. The table | surface which showed the growth rate difference of the epitaxial layer in Example 1 and the comparative example 1, and the film thickness fluctuation | variation of the epitaxial layer in percentage (%). The table | surface which showed the growth rate difference of the epitaxial layer in Example 2 and the comparative example 2, and the film thickness fluctuation | variation of the epitaxial layer in percentage (%). The table | surface which showed the growth rate difference of the epitaxial layer in Example 3 and Comparative Example 3, and the film thickness fluctuation | variation of the epitaxial layer in percentage (%). The table | surface which showed the growth rate difference of the epitaxial layer in Example 4 and Comparative Example 4, and the film thickness fluctuation | variation of the epitaxial layer in percentage (%).

  FIG. 1 shows an example of a single wafer type vapor phase growth apparatus 1 used in the present invention. By the vapor phase growth apparatus 1, a silicon single crystal film (epitaxial layer) is vapor phase grown on the silicon single crystal wafer, and a silicon epitaxial wafer is manufactured. As the silicon single crystal substrate, a silicon wafer having a main surface of (100) or (110) is used, and an epitaxial layer is formed on the main surface.

  The vapor phase growth apparatus 1 includes a reaction furnace 2 (vapor phase growth furnace) composed of a transparent quartz member, a metal member such as stainless steel, or the like. The reaction furnace 2 includes a susceptor 3, a support unit 4 that supports the susceptor 3, and a drive unit 5 that drives the susceptor 3 through the support unit 4.

  The susceptor 3 is formed in a disk shape so as to substantially horizontally support a growth substrate W (for example, a silicon single crystal wafer) on which an epitaxial layer is grown in a vapor phase, and has a pocket portion 3a recessed in a concave shape on the surface. The pocket portion 3 a is formed to be slightly larger than the diameter (for example, 300 mm) of the growth substrate W and to be penetrated from the upper surface of the susceptor 3 to a depth similar to the thickness of the substrate W.

  The support portion 4 is disposed so as to support the susceptor 3 substantially horizontally from the back surface side of the susceptor 3, and has a support column 4 a extending in the vertical direction and extending obliquely upward from the upper portion of the support column 4 a, and a leading end at the peripheral portion of the susceptor 3 back surface The arm 4b to connect is provided.

  The drive unit 5 is connected to the lower part of the support column 4a, and the drive unit 5 is a motor or the like that can move the support column 4a up and down and rotate around the axis O (vertical direction). When the support 4 rotates around the axis O by the drive unit 5, the susceptor 3 also rotates. When the support 4 a moves up and down by the drive unit 5, the susceptor 3 also moves up and down.

  A gas introduction pipe 6 for introducing various gases into the reaction furnace 2 substantially horizontally is connected to one end side in the horizontal direction of the reaction furnace 2. The gas introduction pipe 6 introduces gas into the reaction furnace 2 from a gas introduction port 6 a communicating with the reaction furnace 2. The gas introduction pipe 6 introduces the vapor growth gas G into the reaction furnace 2 from the gas introduction port 6a at the time of vapor phase growth. The vapor growth gas G includes a source gas that is a raw material of the silicon single crystal thin film, a carrier gas that dilutes the source gas, and a dopant gas that imparts conductivity to the thin film. For example, a silane-based gas such as trichlorosilane (TCS) or dichlorosilane (DCS) is used as the source gas, a hydrogen gas is used as the carrier gas, and a gas containing boron or phosphorus is used as the dopant gas.

  Connected to the other end of the gas introduction pipe 6 is a gas discharge pipe 7 for discharging a gas (such as a vapor phase growth gas G that has passed through the growth substrate W) from the reaction furnace 2. The gas discharge pipe 7 discharges the vapor phase growth gas G and the like introduced into the reaction furnace 2 from the gas discharge port 7 a communicating with the reaction furnace 2 to the outside of the reaction furnace 2.

  Above and below the reaction furnace 2 are provided heaters 8 that can heat the inside of the reaction furnace 2 and adjust the temperature in the reaction furnace 2 during vapor phase growth.

The gas concentration of the raw material gas introduced into the reaction furnace 2 during vapor phase growth, the reaction temperature within the reaction furnace 2 during vapor phase growth, and the pressure within the reaction furnace 2 during vapor phase growth are controlled by a control unit (not shown). . At the time of vapor phase growth, the temperature in the reaction furnace 2 (reaction temperature), the gas concentration of the raw material gas in the reaction furnace 2 and the pressure in the reaction furnace 2 are adjusted by the control unit. For example, during vapor phase growth, the reaction temperature in the reaction furnace 2 is adjusted to a range of 950 to 1150 degrees, and the gas concentration of the raw material gas is adjusted to a range of 1.0 × 10 ^{−4 to} 1.0 × 10 ⁻² mol / l. The pressure in the reactor 2 is reduced to 200 torr or less.

  The epitaxial layer (silicon layer) is vapor-phase grown on the growth substrate W (silicon wafer) by the vapor phase growth apparatus 1 configured as described above to manufacture a silicon epitaxial wafer. When a silicon layer is vapor-phase grown on a silicon wafer having a main surface of (100), the difference in the growth rate of the silicon layer becomes significant at specific locations on the silicon wafer. FIG. 2A shows a schematic plan view of a silicon wafer having a main surface of (100) as viewed from above, and the difference in growth rate of the epitaxial layer (silicon layer) will be described with reference to FIG. 2A. As shown in FIG. 2A, the growth rate of the epitaxial layer becomes slow at the peripheral portion of the wafer in the <100> direction from the center of the silicon wafer toward the outer periphery. On the other hand, the growth rate of the epitaxial layer increases at the peripheral edge of the wafer in the <110> direction, which is shifted from the <100> direction by an angle θ (45 degrees) about the center of the wafer. Therefore, the film thickness of the epitaxial layer increases at the peripheral portion of the wafer in the <110> direction, whereas the film thickness of the epitaxial layer decreases at the peripheral portion of the wafer in the <100> direction. Therefore, in the peripheral portion of the epitaxial wafer, the difference in thickness of the epitaxial layer between the <100> direction and the <110> direction increases, and the flatness of the epitaxial wafer is deteriorated.

  A similar phenomenon occurs even when an epitaxial layer (silicon layer) is vapor-phase grown on a silicon wafer having a main surface of (110). However, since the main surface of the silicon wafer is (110), as shown in FIG. 2B, the <100> direction and the <110> direction are shifted by an angle α (90 degrees) around the center of the wafer.

  According to the knowledge of the present inventor, in order to produce an epitaxial wafer with good flatness, it is necessary to reduce both the growth rate difference and film thickness variation of the epitaxial layer at the peripheral edge of the silicon wafer. This growth rate difference and film thickness variation are defined as follows.

As shown in FIG. 3, the maximum value of the film thickness of the epitaxial layer at the annular point C1 that enters 2 mm from the outer periphery C of the silicon wafer having a main surface of (100) toward the center C0 is defined as T1 (T1 is defined as P _T1 ). Further, when the silicon wafer is viewed from the main surface, the point P _T1 of _T1 is moved around the center C0 of the wafer by ± 45 degrees (± 90 degrees if the main surface of the silicon wafer is (110)) and the moving points P1 and P2 are rotated. The film thickness average value was T2. Furthermore, the film thickness average value of the points P3 and P4 moved 3 mm from the moving points P1 and P2 toward the center C0 was defined as T3. Then, the growth rate difference D1 of the epitaxial layer was defined by (T1-T2) / T3. The film thickness average values T2 and T3 are both average film thickness values of the epitaxial layer (silicon layer).

  The average thickness of the epitaxial layer at the first annular point C1 is T4, and the second annular point is located 5 mm from the outer periphery C toward the center C0 (3 mm from the first annular point C1 toward the center C0). The film thickness average value of C2 was set to T5. And the film thickness fluctuation | variation D2 of the peripheral part of an epitaxial layer was defined by (T4-T5) / T5.

According to the knowledge of the present inventor, at the concentration (1 × 10 ⁻⁴ to 1 × 10 ⁻² mol / l) and the reaction temperature (950 to 1150 degrees) of the raw material gas during the epitaxial growth, which has been generally used conventionally, the growth is performed. It is difficult to reduce the speed difference D1 and the film thickness variation D2. Therefore, the present inventor reduces both the growth rate difference D1 and the film thickness fluctuation D2 (absolute value of film thickness fluctuation) by adjusting the pressure during epitaxial growth (pressure in the reaction furnace 2), and the flatness is reduced. It has been found that a good epitaxial wafer can be produced.

  In order to confirm the effect of the present invention, the following experiment was conducted.

(Example)
In the example, a silicon layer was formed on a P-type silicon single crystal wafer having a diameter of 300 mm by the vapor phase growth apparatus 1 to produce a silicon epitaxial wafer. And the growth rate difference D1 and the film thickness fluctuation | variation D2 of the produced epitaxial wafer were measured, and the growth speed difference D1 and the film thickness fluctuation | variation D2 were represented by percentage (%). That is, a value obtained by multiplying the measured growth rate difference D1 and film thickness variation D2 by 100 was used as a measured value for growth rate difference and a measured value for film thickness variation.

In Example 1, a silicon single crystal wafer having a main surface of (100) was used, and epitaxial growth was performed using TCS as a source gas. Further, the epitaxial growth was performed with the gas concentration of the source gas during the epitaxial growth being 9.4 × 10 ⁻⁴ mol / l, the reaction temperature being 1080 ° C., and the pressure in the reactor 2 being 200 torr. Similarly, an epitaxial wafer was produced even when the pressure in the reactor 2 was 100 torr. When the pressure in the reactor 2 was 200 torr, the growth rate difference was 0.49% and the film thickness variation was -1.18%. When the pressure in the reactor 2 was 100 torr, the growth rate difference was 0.42% and the film thickness variation was -0.80%.

  In Example 2, an epitaxial wafer was produced under the same conditions except that the source gas of Example 1 was changed from TCS to DCS. When the pressure in the reactor 2 was 200 torr, the growth rate difference was 0.47% and the film thickness variation was -1.14%. When the pressure in the reactor 2 was 100 torr, the growth rate difference was 0.41% and the film thickness variation was -0.78%.

  In Example 3, an epitaxial wafer was manufactured under the same conditions except that the silicon single crystal wafer having the main surface of (100) in Example 1 was replaced with the silicon single crystal wafer having the main surface of (110). When the pressure in the reactor 2 was 200 torr, the growth rate difference was 0.48%, and the film thickness variation was -1.25%. When the pressure in the reactor was 100 torr, the growth rate difference was 0.39% and the film thickness variation was -0.88%.

  In Example 4, an epitaxial wafer was produced under the same conditions except that the raw material gas of Example 3 was changed from TCS to DCS. When the pressure in the reactor 2 was 200 torr, the growth rate difference was 0.48%, and the film thickness variation was −1.22%. When the pressure in the reactor 2 was 100 torr, the growth rate difference was 0.39% and the film thickness variation was -0.85%.

(Comparative example)
As a comparative example, a silicon epitaxial wafer was produced in the same manner as in Examples 1 to 4 except for the pressure in the reaction furnace 2. In Comparative Example 1, an epitaxial wafer was produced under the same conditions except that the pressures 200 torr and 100 torr in the reaction furnace 2 of Example 1 were replaced with 760 torr and 400 torr. When the pressure in the reactor 2 was 760 torr, the growth rate difference was 1.32% and the film thickness variation was -1.94%. When the pressure in the reactor 2 was 400 torr, the growth rate difference was 0.62% and the film thickness variation was -1.64%.

  In Comparative Example 2, an epitaxial wafer was produced under the same conditions except that the pressures 200 torr and 100 torr in the reaction furnace 2 of Example 2 were changed to 760 torr and 400 torr. When the pressure in the reactor 2 was 760 torr, the growth rate difference was 1.24% and the film thickness variation was -1.95%. When the pressure in the reactor 2 was 400 torr, the growth rate difference was 0.60%, and the film thickness variation was −1.61%.

  In Comparative Example 3, an epitaxial wafer was produced under the same conditions except that the pressures 200 torr and 100 torr in the reaction furnace 2 of Example 3 were replaced with 760 torr and 400 torr. When the pressure in the reactor 2 was 760 torr, the growth rate difference was 1.22% and the film thickness variation was -1.98%. When the pressure in the reactor 2 was 400 torr, the growth rate difference was 0.61%, and the film thickness variation was -1.71%.

  In Comparative Example 4, an epitaxial wafer was produced under the same conditions except that the pressures 200 torr and 100 torr in the reactor 2 of Example 4 were changed to 760 torr and 400 torr. When the pressure in the reactor 2 was 760 torr, the growth rate difference was 1.18% and the film thickness variation was -1.98%. When the pressure in the reactor 2 was 400 torr, the growth rate difference was 0.61% and the film thickness variation was -1.70%.

  4A to 4D show the growth rate difference D1 and film thickness variation D2 of Examples 1 to 4 and Comparative Examples 1 to 4. FIG. 4A shows data in which Example 1 and Comparative Example 1 are paired. FIG. 4B shows data obtained by pairing Example 2 and Comparative Example 2, FIG. 4C shows Example 3 and Comparative Example 3, and FIG. 4D shows data obtained by pairing Example 4 and Comparative Example 4. As shown in FIGS. 4A to 4D, when the pressure in the reaction furnace 2 is set to 200 torr or less, the difference in growth rate is 0.5% or less, and the absolute value of the film thickness variation is 1.3% or less. Can provide a good epitaxial wafer.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

DESCRIPTION OF SYMBOLS 1 Vapor growth apparatus 2 Reactor 3 Susceptor 4 Support part 5 Drive part O Axis W Growth substrate C Outer periphery C0 Center C1 First annular point C2 Second annular point

Claims (5)

In a method for producing an epitaxial wafer, wherein a raw material gas is introduced into a silicon wafer having a main surface of (100) or (110) to epitaxially grow a silicon layer,
The epitaxial growth is performed at a temperature of 950 to 1150 ° C., a gas concentration of the raw material gas in a range of 1.0 × 10 ^{−4 to} 1.0 × 10 ⁻² mol / l, and a pressure of 200 torr or less. An epitaxial wafer manufacturing method characterized by the above. The main surface of the silicon wafer is (100),
The maximum value of the thickness of the silicon layer at the first annular point entering 2 mm from the outer periphery to the center of the silicon layer is T1, and the point of T1 around the center when the main surface is viewed from above is ± The film thickness average value of the silicon layer at the moving point rotated 45 degrees is T2, and the film thickness average value at the point moved 3 mm toward the center is T3, and (T1-T2) / T3 The defined growth rate difference of the silicon layer is 0.5% or less,
The film thickness average value of the first annular point is T4, and the film thickness average value of the second annular point entering 3 mm from the first annular point toward the center is T5, and (T4-T5) 2. The method for producing an epitaxial wafer according to claim 1, wherein an absolute value of a film thickness variation at a peripheral portion of the silicon layer defined by / T5 is 1.3% or less. The main surface of the silicon wafer is (110),
The maximum value of the thickness of the silicon layer at the first annular point entering 2 mm from the outer periphery to the center of the silicon layer is T1, and the point of T1 around the center when the main surface is viewed from above is ± The film thickness average value of the silicon layer at the moving point rotated 90 degrees is T2, and the film thickness average value at the point moved 3 mm toward the center is T3, and (T1-T2) / T3 The defined growth rate difference of the silicon layer is 0.5% or less,
The film thickness average value of the first annular point is T4, and the film thickness average value of the second annular point entering 3 mm from the first annular point toward the center is T5, and (T4-T5) 2. The method for producing an epitaxial wafer according to claim 1, wherein an absolute value of a film thickness variation at a peripheral portion of the silicon layer defined by / T5 is 1.3% or less.   The method for producing an epitaxial wafer according to any one of claims 1 to 3, wherein the source gas includes trichlorosilane or dichlorosilane.   The method for manufacturing an epitaxial wafer according to claim 1, wherein the silicon wafer has a diameter of 300 mm or more.

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