JP2016096500A - Amplifier circuit and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an amplifier circuit a higher accuracy by obtaining a constant signal gain in a predetermined frequency range without changing DC gain or peak angular frequency.SOLUTION: The amplifier circuit includes: a voltage-current conversion amplifier that converts an input voltage into an output current; a current-voltage conversion amplifier that converts an output current into an output voltage; and a variable resistance circuit which, being connected between a grounding cable and at least either one of a first node which outputs an output current from the voltage-current conversion amplifier or a second node which outputs an output voltage from the current-voltage conversion amplifier, changes the resistance value on the basis of a control from the outside.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an amplifier circuit and a semiconductor device.

  In the bandpass filter built in the phase shift circuit, the voltage amplification circuit is arranged in the negative feedback path from the output of the integration circuit to the input, and the Q value of the bandpass filter is changed by changing the gain of the voltage amplification circuit. There has been proposed a technique for making it (see, for example, Patent Document 1). Here, the Q value is an index indicating the sharpness of the resonance peak of the resonance circuit.

JP 2003-133904 A

  By the way, the high frequency component of the signal transmitted through the transmission path is easily deteriorated, and when the high frequency component is deteriorated, the waveform of the signal received by the receiving apparatus through the transmission path becomes dull. Therefore, the receiving device is equipped with an equalizer that amplifies the high-frequency component of the dull signal and shapes the waveform of the signal.

  For example, an equalizer having a voltage-current conversion amplifier that converts an input voltage into an output current and a current-voltage conversion amplifier that converts an output current from the voltage-current conversion amplifier into an output voltage has a gain at a specific frequency (peak angle frequency). In some cases. When the frequency band of the signal transmitted through the transmission line includes the peak angular frequency, the equalizer also amplifies the frequency component near the peak of the gain. In addition, when the resistance value or capacitance value of an element included in the equalizer is changed to reduce the gain peak and flatten the frequency characteristics of the equalizer, the DC (Direct Current) gain or peak angular frequency changes. End up. That is, it is difficult to improve the accuracy of the equalizer by making the signal gain constant in a predetermined frequency range without changing the DC gain and the peak angular frequency.

  An amplifier circuit and a semiconductor device according to the present disclosure provide an amplifier circuit with higher accuracy than the prior art by making a signal gain constant in a predetermined frequency range without changing a DC gain and a peak angular frequency. With the goal.

  According to one aspect, the amplifier circuit includes a voltage-current conversion amplifier that converts an input voltage into an output current, a current-voltage conversion amplifier that converts an output current into an output voltage, and a first output that outputs an output current in the voltage-current conversion amplifier. And a variable resistance circuit that is connected between at least one of the first node and the second node that outputs an output voltage in the current-voltage conversion amplifier and the ground line, and whose resistance value changes based on external control.

  According to another aspect, there is provided a semiconductor device including a first amplifier circuit and a second amplifier circuit having the same characteristics, and a control circuit that controls operations of the first amplifier circuit and the second amplifier circuit. The first amplifier circuit includes a first voltage-current conversion amplifier that converts an input voltage into an output current, a first current-voltage conversion amplifier that converts an output current into an output voltage, and a first voltage-current conversion amplifier. Is connected between the ground node and at least one of the first node that outputs the output current and the second node that outputs the output voltage in the first current-voltage conversion amplifier, and the resistance value changes based on the control signal A second variable current circuit that converts a test input voltage into a test output current, and a second amplifier that converts the test output current into a test output voltage. Current voltage variation Between the ground line and at least one of the amplifier, the third node that outputs the test output current in the second voltage-current conversion amplifier, and the fourth node that outputs the test output voltage in the second current-voltage conversion amplifier And a second variable resistance circuit that is connected and has a resistance value that changes based on the control signal. The control circuit changes the resistance value of the second variable resistance circuit according to the control signal and generates a test input voltage. By receiving the test output voltage, the resistance value of the second variable resistance circuit when the second amplifier circuit has a predetermined frequency characteristic is obtained, and a control signal corresponding to the obtained resistance value is sent to the first amplifier circuit. Output.

  The amplifier circuit and the semiconductor device according to the present disclosure can provide a signal amplifier in a predetermined frequency range that is constant without changing the DC gain and the peak angular frequency, and provides an amplifier circuit with higher accuracy than in the past. be able to.

It is a figure which shows one Embodiment of an amplifier circuit. It is a figure which shows an example of the variable resistance circuit shown in FIG. It is a figure which shows an example of the semiconductor device with which the amplifier circuit shown in FIG. 1 is mounted. It is a figure which shows another example of the semiconductor device with which the amplifier circuit shown in FIG. 1 is mounted. It is a figure which shows another example of the semiconductor device in which the amplifier circuit shown in FIG. 1 is mounted. It is a figure which shows another example of the semiconductor device in which the amplifier circuit shown in FIG. 1 is mounted. It is a figure which shows an example of the communication system which has the amplifier circuit shown in FIG. It is a figure which shows an example of the frequency characteristic of the amplifier circuit shown in FIG. It is a figure which shows another example of the frequency characteristic of the amplifier circuit shown in FIG. It is a figure which shows another embodiment of an amplifier circuit. It is a figure which shows another embodiment of an amplifier circuit. It is a figure which shows another embodiment of an amplifier circuit. It is a figure which shows another embodiment of an amplifier circuit. It is a figure which shows another example of an amplifier circuit. It is a figure which shows an example of the frequency characteristic at the time of changing the resistance value of a feedback resistance in the amplifier circuit shown in FIG. It is a figure which shows an example of the frequency characteristic at the time of changing the capacitance value of a capacity | capacitance in the amplifier circuit shown in FIG.

  Hereinafter, embodiments will be described with reference to the drawings. The same reference numerals as the signal names are used for signal lines and terminals through which signals are transmitted.

  FIG. 1 shows an embodiment of an amplifier circuit. The amplifier circuit AMPCKT1 shown in FIG. 1 includes amplifiers AMP1, AMP2, and AMP3, variable resistance circuits VR1 and VR2, and capacitors C1 and C2. For example, the amplifier circuit AMPCKT1 is mounted on a signal receiving device, and is used as a broadband amplifier such as a CTLE (Continuous Time Linear Equalizer) that compensates for loss of a received signal in an analog manner.

  The amplifiers AMP1 and AMP3 are connected in series via a node Vx between an input terminal Vi that receives the input voltage Vi and an output terminal Vo that outputs the output voltage Vo. The amplifier AMP2 is arranged in a feedback path from the output of the amplifier AMP3 to the input of the amplifier AMP3. Symbols “−gm1”, “gm2”, and “−gm3” attached to the amplifiers AMP1, AMP2, and AMP3 indicate transconductances. The amplifier AMP1 functions as a voltage / current conversion amplifier (also referred to as a gm cell) that converts an input voltage into an output current. The amplifiers AMP2 and AMP3 function as TIA (Trans Impedance Amplifier) that converts the output current from the amplifier AMP1 into an output voltage. That is, the amplifier circuit AMPCKT1 has a two-stage configuration in which a gm cell and a TIA are connected in series.

  The capacitor C1 is a load capacity including, for example, the output capacity of the amplifier AMP1, the output capacity of the amplifier AMP2, the input capacity and the wiring capacity of the amplifier AMP3. The capacitor C2 is, for example, a load capacitor including an output capacitor of the amplifier AMP3, an input capacitor of the amplifier AMP2, a capacitor connected to the output terminal Vo, a wiring capacitor, and the like.

  The variable resistance circuit VR1 is connected between the output of the amplifier AMP1 and the ground line VSS, and changes the resistance value based on at least a 1-bit control signal CNT1 supplied from the outside. The variable resistance circuit VR2 is connected between the output of the amplifier AMP3 and the ground line VSS, and changes the resistance value based on at least a 1-bit control signal CNT2 supplied from the outside. An example of the variable resistance circuits VR1 and VR2 is shown in FIG. Hereinafter, the resistance value of the variable resistance circuit VR1 is indicated by a symbol R1, and the resistance value of the variable resistance circuit VR2 is indicated by a symbol R2.

  In the amplifier circuit AMPCKT1 shown in FIG. 1, the impedance Z1 between the variable resistor circuit VR1 and the capacitor C1 connected in parallel and the impedance Z2 between the variable resistor circuit VR2 and the capacitor C2 connected in parallel are expressed by Expression (1). It is. In the equation (1), the symbol “s” indicates a variable in Laplace transform. The transfer function H (s) of the amplifier circuit AMPCKT1 is expressed by Expression (2) based on Expression (1).

式（２）において、増幅器ＡＭＰ２のトランスコンダクタンスｇｍ２と、増幅器ＡＭＰ３のトランスコンダクタンスｇｍ３と、抵抗値Ｒ１と抵抗値Ｒ２との積が１より大きいと仮定すると（ｇｍ２・ｇｍ３・Ｒ１・Ｒ２＞＞１）、式（３）が成立する。式（３）における符号Ｇ'は、増幅回路ＡＭＰＣＫＴ１のＤＣ利得であり、式（４）で示される。式（３）における符号ω'ｐは、最大利得での角周波数（ピーク角周波数）であり、式（５）で示される。式（３）における符号Ｑ'ｐは、最大利得（ピーク角周波数でのピーキング値）であり、式（６）で示される。

In equation (2), assuming that the product of transconductance gm2 of amplifier AMP2, transconductance gm3 of amplifier AMP3, and resistance value R1 and resistance value R2 is greater than 1 (gm2, gm3, R1, and R2 >> 1 ), Formula (3) holds. A symbol G ′ in Expression (3) is a DC gain of the amplifier circuit AMPCKT1 and is expressed by Expression (4). The symbol ω′p in the equation (3) is an angular frequency (peak angular frequency) at the maximum gain, and is represented by the equation (5). Symbol Q′p in equation (3) is the maximum gain (peaking value at the peak angular frequency), and is represented by equation (6).

式（４）、（５）は抵抗値Ｒ１、Ｒ２を含まないため、抵抗値Ｒ１、Ｒ２を変化させても、ＤＣ利得Ｇ’および最大利得Ｑ’ｐは変化しない。これに対して、式（６）は抵抗値Ｒ１、Ｒ２を含むため、抵抗値Ｒ１、Ｒ２の少なくともいずれかを変化させることで、ピーキング値Ｑ'ｐは変化する。すなわち、抵抗値Ｒ１、Ｒ２の少なくともいずれかを変化させることで、ＤＣ利得Ｇ'およびピーク角周波数ω'ｐを変化させることなく、ピーキング値Ｑ'ｐを変化させることができる。

Since the equations (4) and (5) do not include the resistance values R1 and R2, the DC gain G ′ and the maximum gain Q′p do not change even if the resistance values R1 and R2 are changed. On the other hand, since the equation (6) includes the resistance values R1 and R2, the peaking value Q′p is changed by changing at least one of the resistance values R1 and R2. That is, the peaking value Q′p can be changed without changing the DC gain G ′ and the peak angular frequency ω′p by changing at least one of the resistance values R1 and R2.

  In Equation (2), when “gm2 · gm3 · R1 · R2 >> 1” is not assumed and the term “1 / gm2 · gm3 · R1 · R2” is left, the DC gain G ′ is a resistance value. It changes slightly with changes in at least one of R1 and R2. However, for example, when at least one of the resistance values R1 and R2 is changed from 500 ohms to 100 ohms, the change amount of the DC gain G ′ is about 1 dB, and there is almost no problem in actual use.

  FIG. 2 shows an example of the variable resistance circuits VR1 and VR2 shown in FIG. The variable resistance circuit VR1 includes a resistance element R1 (R11 or R12, R13, R14, R15) and a transistor T1 (T11 or T12, T13, T14, T15) connected in series between the node Vx and the ground line VSS. . For example, the transistors T11 to T15 are n-channel MOS (Metal Oxide Semiconductor) transistors. Each of the transistors T11 to T15 operates as a switch that is turned on when a high-level control signal CNT1 (CNT11 or CNT12, CNT13, CNT14, CNT15) is received at the gate. For example, resistive element R11 is 100 ohms, resistive element R12 is 200 ohms, resistive element R13 is 300 ohms, resistive element R14 is 400 ohms, and resistive element R15 is 500 ohms. is there.

  The variable resistance circuit VR2 includes a resistance element R2 (R21 or R22, R23, R24, R25) and a transistor T2 (T21 or T22, T23, T24, T25) connected in series between the node Vo and the ground line VSS. . For example, each transistor T21-T25 is an n-channel MOS transistor. Each of the transistors T21 to T25 operates as a switch that is turned on when a high-level control signal CNT2 (CNT21 or CNT22, CNT23, CNT24, CNT25) is received at the gate. For example, resistive element R21 is 100 ohms, resistive element R22 is 200 ohms, resistive element R23 is 300 ohms, resistive element R24 is 400 ohms, and resistive element R25 is 500 ohms. is there.

  In this embodiment, any one of the control signals CNT11 to CNT15 and the control signal CNT25 are set to a high level, and the other control signals CNT1 and CNT21 to CNT25 are set to a low level. Thereby, the node Vx is connected to the ground line VSS via any of the resistance elements R11 to R15, and the node Vo is connected to the ground line VSS via the resistance element R25.

  Alternatively, one of the control signal CNT15 and the control signals CNT21 to CNT25 may be set to a high level, and the other control signals CNT11 to CNT14 and CNT2 may be set to a low level. In this case, the node Vx is connected to the ground line VSS via the resistance element R15, and the node Vo is connected to the ground line VSS via any of the resistance elements R21 to R25.

  The control signals CNT11 to CNT15 and CNT21 to CNT25 are supplied from the outside of the amplifier circuit AMPCKT1. Note that the configuration (number of resistance elements and resistance value) of the variable resistance circuits VR1 and VR2 is not limited to FIG. 2, and the combinations of the transistors T11 to T15 and T21 to T25 to be turned on are limited to the above. There is no.

  FIG. 3 shows an example of a semiconductor device on which the amplifier circuit AMPCKT1 shown in FIG. 1 is mounted. In the semiconductor device SEM1 shown in FIG. 3, double square marks indicate external terminals. The external terminal is a pad on the semiconductor chip or a lead of a package in which the semiconductor chip is stored. For the signal supplied via the external terminal, the same symbol as the terminal name is used.

  The amplifier circuit AMPCKT1 shapes the waveform of the signal received at the input terminal Vi and outputs it as the output signal Vo. The output signal Vo is supplied to an equalization circuit such as a DFE (Decision Feedback Equalizer) mounted on the semiconductor device SEM1, or a determination circuit that determines the logic of the input signal Vi.

  For example, after the wafer manufacturing process of the semiconductor device SEM1 is completed, the test of the semiconductor device SEM1 in the wafer state is executed using a test apparatus such as an LSI (Large Scale Integration) tester. For example, the test apparatus sets any one of the control signals CNT11 to CNT15 and any one of the control signals CNT21 to CNT25 to a high level, and sets the other control signals CNT1 and CNT2 to a low level. Next, the test apparatus gives a test signal to the input terminal Vi and monitors the voltage of the output terminal Vo which is the test terminal. Then, the test apparatus sequentially changes the control signals CNT11 to CNT15 and CNT21 to CNT25 that are set to the high level, and obtains resistance values of the variable resistance circuits VR1 and VR2 (FIG. 2) that obtain desired frequency characteristics.

  Next, in the packaging process of the semiconductor device SEM1, the logic of the control signals CNT1 and CNT2 corresponding to the resistance values of the variable resistance circuits VR1 and VR2 that can obtain a desired frequency characteristic is set based on the test result by the test device. The The high level of the control signal CNT1 (or CNT2) is set by connecting the control terminal CNT1 (or CNT2) to a power supply line or the like. The low level of the control signal CNT1 (or CNT2) is set by connecting the control terminal CNT1 (or CNT2) to a ground line or the like. The output terminal Vo is set to an open state (not connected). Accordingly, the amplifier circuit AMPCKT1 in the semiconductor device SEM1 that has completed the packaging process operates with a desired frequency characteristic.

  FIG. 4 shows another example of a semiconductor device on which the amplifier circuit AMPCKT1 shown in FIG. 1 is mounted. In the semiconductor device SEM2 shown in FIG. 4, double square marks indicate external terminals as in FIG.

  In addition to the amplifier circuit AMPCKT1, the semiconductor device SEM2 includes a program unit PGM connected to each of the control terminals CNT11, CNT12,. Each program unit PGM has a resistance element R and a fuse FS connected in series between the power supply line VDD and the ground line VSS. The program unit PGM fixes the control terminal CNT1 (or CNT2) at a high level when the fuse FS is cut, and fixes the control terminal CNT1 (or CNT2) at a low level when the fuse FS is not cut. After the semiconductor device SEM2 is mounted on the system board or the like, the usage of the output signal Vo output from the amplifier circuit AMPCKT1 is the same as that in FIG.

  The semiconductor device SEM2 shown in FIG. 4 is variable so that a desired frequency characteristic can be obtained after a wafer manufacturing process is completed and a test is performed using a test apparatus such as an LSI tester, similar to the semiconductor device SEM1 shown in FIG. The resistance values of the resistance circuits VR1 and VR2 (FIG. 2) are obtained.

  Next, the program unit PGM is programmed based on the test result by the test apparatus. Thereafter, in the packaging process, the semiconductor device SEM2 is assembled in a state where the control terminals CNT1 and CNT2 and the output terminal Vo are opened (non-connected state). Accordingly, the amplifier circuit AMPCKT1 in the semiconductor device SEM2 that has completed the packaging process operates with a desired frequency characteristic. Note that the test using a test apparatus such as an LSI tester may be performed on the semiconductor device SEM2 in a wafer state or may be performed on the packaged semiconductor device SEM2.

  FIG. 5 shows still another example of the semiconductor device on which the amplifier circuit AMPCKT1 shown in FIG. 1 is mounted. In the semiconductor device SEM3 shown in FIG. 5, double square marks indicate external terminals as in FIG.

  The semiconductor device SEM3 includes a control circuit TCNT1 and a switch circuit SW in addition to the amplifier circuit AMPCKT1. After the semiconductor device SEM3 is mounted on the system board or the like, the use of the output signal Vo output from the amplifier circuit AMPCKT1 is the same as that in FIG.

  The control circuit TCNT1 operates instead of a test apparatus such as an LSI tester described with reference to FIG. 3 during a period in which the logic of the test mode terminal TMD indicates the test mode. During the test mode, the control circuit TCNT1 supplies the switch control signal SWC to the switch circuit SW, and connects the test input terminal TVi of the control circuit TCNT1 to the input terminal Vi of the amplifier circuit AMPCKT1. Next, the control circuit TCNT1 sequentially changes the control signals CNT11 to CNT15 and CNT21 to CNT25 that are set to the high level, applies the test input signal TVi to the input terminal Vi, and the test output terminal TVo connected to the output terminal Vo. Monitor the voltage. Then, the control circuit TCNT1 obtains resistance values of the variable resistance circuits VR1 and VR2 (FIG. 2) from which desired frequency characteristics can be obtained.

  The control circuit TCNT1 stores the logic of the control signals CNT1 and CNT2 for setting the resistance values of the variable resistance circuits VR1 and VR2 that can obtain desired frequency characteristics in a program unit such as a built-in ROM (Read Only Memory). Thereafter, the control circuit TCNT1 sets the switch control signal SWC to a logic for connecting the input terminal Vi of the semiconductor device SEM3 to the input terminal Vi of the amplifier circuit AMPCKT1 during a period when the logic of the test mode terminal TMD indicates the normal operation mode. To do. The control circuit TCNT1 outputs the logic control signals CNT1 and CNT2 stored in the program unit to the amplifier circuit AMPCKT1 during a period in which the logic of the test mode terminal TMD indicates the normal operation mode. Note that a switch circuit for releasing the connection between the output terminal Vo of the amplifier circuit AMPCKT1 and the test output terminal TVo of the control circuit TCNT1 during the normal operation mode may be provided in the semiconductor device SEM3.

  In the semiconductor device SEM3 shown in FIG. 5, the state of the control circuit TCNT1 is shifted to the test mode according to the logic of the test mode terminal TMD. Therefore, a system equipped with the semiconductor device SEM3 temporarily shifts the semiconductor device SEM3 operating in the normal operation mode to the test mode, and obtains resistance values of the variable resistance circuits VR1 and VR2 that can obtain desired frequency characteristics. be able to. That is, the background calibration for correcting the resistance values of the variable resistance circuits VR1 and VR2 can be executed during the normal operation period of the amplifier circuit AMPCKT1. The semiconductor device SEM3 can execute foreground calibration for correcting the resistance values of the variable resistance circuits VR1 and VR2 outside the normal operation period of the amplifier circuit AMPCKT1 such as an initialization sequence at power-on. As a result, the resistance values of the variable resistance circuits VR1 and VR2 can be corrected in accordance with a change in power supply voltage supplied to the semiconductor device SEM3 or a change in temperature of the semiconductor device SEM3, and the amplifier circuit AMPCKT1 can be adjusted to a predetermined accuracy. Can be maintained.

  FIG. 6 shows still another example of a semiconductor device on which the amplifier circuit AMPCKT1 shown in FIG. 1 is mounted. In the semiconductor device SEM4 shown in FIG. 6, double square marks indicate external terminals as in FIG.

  The semiconductor device SEM4 includes a replica of the amplifier circuit AMPCKT1 and a control circuit TCNT2 in addition to the amplifier circuit AMPCKT1. The amplifier circuit AMPCKT1 and the replica of the amplifier circuit AMPCKT1 are manufactured using, for example, common layout data and have the same characteristics.

  The control circuit TCNT2 has the same function as the control circuit TCNT1 except that the function of generating the switch control signal SWC is deleted from the control circuit TCNT1 shown in FIG. The test input terminal TVi and the test output terminal TVo of the control circuit TCNT2 are connected only to the replica of the amplifier circuit AMPCKT1, and are not connected to the amplifier circuit AMPCKT1.

  The control circuit TCNT2 sets predetermined control signals CNT11 to CNT15 and CNT21 to CNT25 to a high level during the test mode. In this state, the control circuit TCNT2 applies the test input voltage TVi to the replica input terminal Vi of the amplifier circuit AMPCKT1. A replica amplifier AMP1 (FIG. 1) of the amplifier circuit AMPCKT1 converts the test input voltage TVi into a test output current. The replica TIA (FIG. 1) of the amplifier circuit AMPCKT1 converts the test output current from the amplifier AMP1 into the test output voltage TVo.

  The control circuit TCNT2 monitors the test output voltage TVo output from the output terminal Vo of the replica of the amplifier circuit AMPCKT1. The control circuit TCNT2 sequentially changes the control signals CNT11 to CNT15 and CNT21 to CNT25 set to the high level, and repeats the output of the test input voltage TVi and the monitor of the test output voltage TVo. Based on the test output voltage TVo, the control circuit TCNT2 obtains resistance values of the variable resistance circuits VR1 and VR2 (FIG. 2) when the replica of the amplifier circuit AMPCKT1 has a desired frequency characteristic.

  The control circuit TCNT2 stores the logic of the control signals CNT1 and CNT2 for setting the resistance values of the variable resistance circuits VR1 and VR2 from which desired frequency characteristics are obtained in a built-in program unit. Thereafter, the control circuit TCNT2 outputs the logic control signals CNT1 and CNT2 stored in the program unit to the amplifier circuit AMPCKT1 during a period when the logic of the test mode terminal TMD indicates the normal operation mode.

  By operating the replica to obtain the resistance values of the variable resistance circuits VR1 and VR2, the amplifier circuit AMPCKT1 used in the normal operation mode by an extra test circuit or load as in the switch circuit SW shown in FIG. Can be prevented from being connected to. As a result, the characteristics of the amplifier circuit AMPCKT1 can be prevented from deteriorating due to an extra load.

  Similar to the semiconductor device SEM3 shown in FIG. 5, the semiconductor device SEM4 shown in FIG. 6 can correct the resistance values of the variable resistance circuits VR1 and VR2 in both the background calibration and the foreground calibration.

  When it is desired to completely stop the operation of the amplifier circuit AMPCKT1 during the test mode, the control circuit TCNT2 may output a stop signal for stopping the operation of the amplifier circuit AMPCKT1 to the amplifier circuit AMPCKT1 during the test mode.

  FIG. 7 shows an example of a communication system SYS having the amplifier circuit AMPCKT1 shown in FIG. The communication system SYS includes a transmission device TRNS and a reception device RCV that are connected to each other via a transmission line TP. The transmitter TRNS has a transmitter TX including a driver DRV that outputs a signal to the transmission line TP, and the receiver RCV has a receiver RX including an equalizer EQ that receives a signal transmitted to the transmission line TP. For example, the receiver RX is any one of the semiconductor devices SEM (SEM1, SEM2, SEM3, SEM4) illustrated in FIGS. The equalizer EQ is a CTLE having the amplifier circuit AMPCKT1 shown in FIG. 1, and shapes the waveform of a signal received via the transmission line TP.

  The receiver RX may have a DFE connected to the output of the equalizer EQ. Moreover, the communication system SYS which can transmit a signal bidirectionally may be constructed | assembled by adding the receiver RX to the transmitter TRNS and adding the transmitter TX to the receiver RCV.

  FIG. 8 shows an example of frequency characteristics of the amplifier circuit AMPCKT1 shown in FIG. FIG. 8 shows frequency characteristics when the resistance value R1 is fixed to 500 ohms and the resistance value R2 is changed from 100 ohms to 500 ohms.

  As shown in the equations (4), (5), and (6), the peaking value Q′p is changed by changing the resistance value R2, but the DC gain G ′ and the peak angular frequency ω′p are changed. do not do. For this reason, the gain of the signal in a predetermined frequency range can be made constant by changing the resistance value R2. For example, by setting the resistance value R2 to 200 ohms, the gain of the signal up to about 5 GHz (gigahertz) can be made constant.

  Note that the gain in a region where the signal frequency is low (for example, a region lower than 1 GHz) may be attenuated using a source degeneration method or the like. In the source degeneration method, for example, the source of a transistor that operates as a gm cell in the amplifier circuit AMPCKT1 is grounded via a resistance element.

  FIG. 9 shows another example of the frequency characteristics of the amplifier circuit AMPCKT1 shown in FIG. FIG. 9 shows frequency characteristics when the resistance value R1 is changed from 100 ohms to 500 ohms and the resistance value R2 is fixed to 500 ohms.

  In FIG. 9, as in FIG. 8, by changing the resistance value R1, the peaking value Q′p changes, but the DC gain G ′ and the peak angular frequency ω′p do not change. For this reason, the gain of the signal in a predetermined frequency range can be made constant by changing the resistance value R1. For example, by setting the resistance value R1 to 200 ohms, the gain of the signal up to about 5 GHz (gigahertz) can be made constant. The gain in a low frequency region (for example, a region lower than 1 GHz) may be attenuated using a source degeneration method or the like.

  The values of DC gain G ′ and peak angular frequency ω′p shown in FIGS. 8 and 9 are examples. For example, the DC gain G ′ can be adjusted by changing the transconductances gm1 and gm2 of the amplifiers AMP1 and AMP2, as shown in Expression (4), and the peak angular frequency ω′p is expressed by Expression (5). As shown in FIG. 5, the transconductances gm2 and gm3 of the amplifiers AMP2 and AMP3 can be adjusted.

  As described above, in the embodiment shown in FIGS. 1 to 9, by selecting appropriate resistance values R1 and R2, only the peaking value is obtained without changing the DC gain and the peak angular frequency even when the signal frequency is changed. Can be changed. As a result, by selecting appropriate resistance values R1 and R2, the gain of the signal in a predetermined frequency range can be made constant (flat) without changing the DC gain and the peak angular frequency. Thus, the amplifier circuit AMPCKT1 with high accuracy can be provided.

  The selection of the resistance values R1 and R2 can be realized by the variable resistance circuits R1 and R2 including a resistance element and a transistor, so that an increase in the circuit scale of the amplifier circuit AMPCKT1 can be minimized.

  FIG. 10 shows another embodiment of the amplifier circuit. In the amplifier circuit AMPCKT2 shown in FIG. 10, the variable resistor circuit VR1 is deleted from the amplifier circuit AMPCKT1 shown in FIG. The other configuration of the amplifier circuit AMPCKT2 is the same as that of the amplifier circuit AMPCKT1 shown in FIG. For example, the amplifier circuit AMPCKT2 is mounted on any one of the semiconductor devices SEM1-SEM4 illustrated in FIGS. In this case, the semiconductor device SEM1 shown in FIG. 3 and the semiconductor device SEM2 shown in FIG. 4 do not have the control terminals CNT11-CNT15, and the control circuit TCNT1 shown in FIG. 5 and the control circuit TCNT2 shown in FIG. It does not have a function to output CNT15. Further, the amplifier circuit AMPCKT2 is used in the equalizer EQ of the receiver RX in the communication system SYS shown in FIG.

  As described above, in the embodiment shown in FIG. 10 as well, as in the embodiments shown in FIGS. 1 to 9, the gain of the signal in a predetermined frequency range can be made constant by selecting an appropriate resistance value R2. Thus, it is possible to provide the amplifier circuit AMPCKT2 having higher accuracy than conventional.

  FIG. 11 shows another embodiment of the amplifier circuit. In the amplifier circuit AMPCKT3 shown in FIG. 11, the variable resistor circuit VR2 is deleted from the amplifier circuit AMPCKT1 shown in FIG. The other configuration of the amplifier circuit AMPCKT3 is the same as that of the amplifier circuit AMPCKT1 shown in FIG. The amplifier circuit AMPCKT3 is mounted on any one of the semiconductor devices SEM1-SEM4 shown in FIGS. In this case, the semiconductor device SEM1 shown in FIG. 3 and the semiconductor device SEM2 shown in FIG. 4 do not have the control terminals CNT21-CNT25, and the control circuit TCNT1 shown in FIG. 5 and the control circuit TCNT2 shown in FIG. It does not have the function of outputting CNT25. The amplifier circuit AMPCKT3 is used for the equalizer EQ of the receiver RX in the communication system SYS shown in FIG.

  As described above, in the embodiment shown in FIG. 11 as well, as in the embodiments shown in FIGS. 1 to 9, the gain of the signal in a predetermined frequency range can be made constant by selecting an appropriate resistance value R1. Therefore, the amplifier circuit AMPCKT3 having higher accuracy than the conventional one can be provided.

  FIG. 12 shows another embodiment of the amplifier circuit. An amplifier circuit AMPCKT4 illustrated in FIG. 12 includes a resistance element FR1 having a constant resistance value instead of the variable resistance circuit VR1 of the amplifier circuit AMPCKT1 illustrated in FIG. For example, the resistance value of the resistance element FR1 is 500 ohms. The other configuration of the amplifier circuit AMPCKT4 is the same as that of the amplifier circuit AMPCKT1 except that it does not receive the control signals CNT11 to CNT15 shown in FIG. The amplifier circuit AMPCKT4 is mounted on any one of the semiconductor devices SEM1-SEM4 shown in FIGS. In this case, the semiconductor device SEM1 shown in FIG. 3 and the semiconductor device SEM2 shown in FIG. 4 do not have the control terminals CNT11-CNT15, and the control circuit TCNT1 shown in FIG. 5 and the control circuit TCNT2 shown in FIG. It does not have a function to output CNT15. The amplifier circuit AMPCKT4 is used for the equalizer EQ of the receiver RX in the communication system SYS shown in FIG.

  As described above, also in the embodiment shown in FIG. 12, the gain of the signal in a predetermined frequency range can be made constant by selecting an appropriate resistance value R2 as in the embodiment shown in FIGS. Thus, it is possible to provide the amplifier circuit AMPCKT4 with higher accuracy than in the past.

  FIG. 13 shows another embodiment of the amplifier circuit. An amplifier circuit AMPCKT5 illustrated in FIG. 13 includes a resistance element FR2 having a constant resistance value instead of the variable resistance circuit VR2 of the amplifier circuit AMPCKT1 illustrated in FIG. For example, the resistance value of the resistive element FR2 is 500 ohms. The other configuration of the amplifier circuit AMPCKT5 is the same as that of the amplifier circuit AMPCKT1 except that it does not receive the control signals CNT21 to CNT25 shown in FIG. The amplifier circuit AMPCKT5 is mounted on any one of the semiconductor devices SEM1-SEM4 shown in FIGS. In this case, the semiconductor device SEM1 shown in FIG. 3 and the semiconductor device SEM2 shown in FIG. 4 do not have the control terminals CNT21-CNT25, and the control circuit TCNT1 shown in FIG. 5 and the control circuit TCNT2 shown in FIG. It does not have the function of outputting CNT25. The amplifier circuit AMPCKT5 is used in the equalizer EQ of the receiver RX in the communication system SYS shown in FIG.

  As described above, in the embodiment shown in FIG. 13, as in the embodiments shown in FIGS. 1 to 9, the gain of the signal in a predetermined frequency range can be made constant by selecting an appropriate resistance value R1. Thus, it is possible to provide the amplifier circuit AMPCKT5 with higher accuracy than in the past.

  FIG. 14 shows another example of the amplifier circuit. An amplifier circuit AMPCKT6 illustrated in FIG. 14 includes amplifiers AMPa and AMPb, a feedback resistance element Rfb, and capacitors Coa and Cob. The amplifier AMPa functions as a voltage-current conversion amplifier (also referred to as a gm cell) that converts an input voltage into an output current. The amplifier AMPb and the feedback resistance element Rfb function as a TIA. As described above, the amplifier circuit AMPCKT6 has a two-stage configuration in which the gm cell and the TIA are connected in series similarly to the amplifier circuit AMPCKT1 shown in FIG. 1, and is mounted on the receiver of the communication system as a broadband amplifier such as CTLE. Is done.

  The amplifiers AMPa and AMPb are connected in series between an input terminal Vi that receives the input voltage Vi and an output terminal Vo that outputs the output voltage Vo. The feedback resistance element Rfb is arranged in a feedback path from the output of the amplifier AMPb to the input of the amplifier AMPb. The sign “-gma” shown in the amplifier AMPa and the sign “-gmb” shown in the amplifier AMPb indicate the transconductances of the amplifiers AMpa and AMPb, respectively. Hereinafter, the resistance value of the feedback resistance element Rfb is indicated by a symbol Rfb.

  The capacity Coa is a load capacity including the output capacity of the amplifier AMPa, the input capacity and the wiring capacity of the amplifier AMPb. The capacitor Cob is a load capacitor including an output capacitor of the amplifier AMPb, a capacitor connected to the output terminal Vo, a wiring capacitor, and the like.

  Equation (7) shows the transfer function H (s) of the amplifier circuit AMPCKT6 shown in FIG. In equation (7), the symbol “s” indicates a variable in Laplace transform.

式（８）は、ωａ＝１／（Ｃｏａ・Ｒｆｂ）、ωｂ＝１／（Ｃｏｂ・Ｒｆｂ）とし、式（７）を二次伝達関数の標準形に変形したものである。

Equation (8) is obtained by changing ωa = 1 / (Coa · Rfb) and ωb = 1 / (Cob · Rfb) and transforming equation (7) into a standard form of the secondary transfer function.

ここで、式（９）に示すように、増幅回路ＡＭＰＣＫＴ６のＤＣ利得Ｇを定義すると、式（８）は、式（１０）で表される。式（１０）における符号ωｐは、最大利得での角周波数（ピーク角周波数）であり、式（１１）で示される。式（１０）における符号Ｑｐは、最大利得（ピーク角周波数でのピーキング値）であり、式（１２）で示される。

Here, when the DC gain G of the amplifier circuit AMPCKT6 is defined as shown in Expression (9), Expression (8) is expressed by Expression (10). Symbol ωp in equation (10) is an angular frequency (peak angular frequency) at the maximum gain, and is represented by equation (11). The symbol Qp in the equation (10) is the maximum gain (peaking value at the peak angular frequency), and is represented by the equation (12).

式（９）は、容量値Ｃｏａ、Ｃｏｂのパラメータを含まず、抵抗値Ｒｆｂのパラメータを含む。式（１１）および式（１２）は、容量値Ｃｏａ、Ｃｏｂのパラメータおよび抵抗値Ｒｆｂのパラメータを両方含む。このため、抵抗値Ｒｆｂを変化させた場合、ＤＣ利得Ｇ、ピーク角周波数ωｐおよびピーキング値Ｑｐのいずれも変化する。また、容量値Ｃｏａ、Ｃｏｂの少なくともいずれかを変化させた場合、ＤＣ利得Ｇは変化しないが、ピーク角周波数ωｐおよびピーキング値Ｑｐのいずれも変化する。換言すれば、図１４に示す増幅回路ＡＭＰＣＫＴ６では、ＤＣ利得Ｇおよびピーク角周波数ωｐを変化させることなく、ピーキング値Ｑｐを変化させることは、困難である。

Equation (9) does not include the parameters of the capacitance values Coa and Cob, but includes the parameter of the resistance value Rfb. Expressions (11) and (12) include both parameters of capacitance values Coa and Cob and parameters of resistance value Rfb. For this reason, when the resistance value Rfb is changed, all of the DC gain G, the peak angular frequency ωp, and the peaking value Qp change. When at least one of the capacitance values Coa and Cob is changed, the DC gain G does not change, but both the peak angular frequency ωp and the peaking value Qp change. In other words, in the amplifier circuit AMPCKT6 shown in FIG. 14, it is difficult to change the peaking value Qp without changing the DC gain G and the peak angular frequency ωp.

  FIG. 15 shows an example of frequency characteristics when the resistance value of the feedback resistance element Rfb is changed in the amplifier circuit AMPCKT6 shown in FIG. FIG. 15 shows frequency characteristics when the feedback resistance value Rfb is changed from 2000 ohms to 125 ohms. Parameters other than the resistance value Rfb are fixed to predetermined values. As shown in the equations (9), (11), and (12), the DC gain G, the peak angular frequency ωp, and the peaking value Qp all change by changing the resistance value Rfb. In FIG. 15, the peaking value Qp is reduced by reducing the resistance value of the feedback resistance element Rfb, but the DC gain and the peak angular frequency ωp change in accordance with the change in the resistance value of the feedback resistance Rfb.

  FIG. 16 shows an example of frequency characteristics when the capacitance value of the capacitor Cob is changed in the amplifier circuit AMPCKT6 shown in FIG. FIG. 16 shows frequency characteristics when the capacitance value Cob is changed from 100 fF (femtofarad) to 10 pF (picofarad). Parameters other than the capacitance value Cob are fixed to predetermined values. As shown in equations (9), (11), and (12), changing the capacitance value Cob does not change the DC gain G, but changes the peak angular frequency ωp and the peaking value Qp. In FIG. 16, by increasing the capacitance value Cob, the peaking value Qp decreases without changing the DC gain, but the peak angular frequency ωp deteriorates according to the capacitance value Cob.

  From the above detailed description, features and advantages of the embodiments will become apparent. This is intended to cover the features and advantages of the embodiments described above without departing from the spirit and scope of the claims. Also, any improvement and modification should be readily conceivable by those having ordinary knowledge in the art. Therefore, there is no intention to limit the scope of the inventive embodiments to those described above, and appropriate modifications and equivalents included in the scope disclosed in the embodiments can be used.

  AMP1, AMP2, AMP3... Amplifier; AMPa, AMPb... Amplifier; AMPCKT1, AMPCKT2, AMMPKT3, AMMPKT4, AMMPKT5, AMPCKT6... Amplifier circuit; C1, C2, Coa, Cob. , CNT22, CNT23, CNT24, CNT25 ... control signal; DRV ... driver; EQ ... equalizer; FR1, FR2 ... resistance element; FS ... fuse; PGM ... program part; R15: resistance element; VR2: variable resistance circuit; R21, R22, R23, R24, R25 ... resistance element; RCV ... receiving device; Rfb ... feedback resistance element; RX ... receiver; SEM1, SEM2, S M3, SEM4 ... Semiconductor device; SW ... Switching unit; SYS ... Communication system; T11, T12, T13, T14, T15, T21, T22, T23, T24, T25 ... Transistor; TCNT1, TCNT2 ... Control circuit; TMD ... Test mode Terminal: TP ... Transmission path; TRNS ... Transmitter; TX ... Transmitter; Vi ... Input terminal; Vo ... Output terminal

Claims (3)

A voltage-current conversion amplifier that converts an input voltage into an output current; and
A current-voltage conversion amplifier that converts the output current into an output voltage;
Connected between at least one of a first node that outputs the output current in the voltage-current conversion amplifier and a second node that outputs the output voltage in the current-voltage conversion amplifier and a ground line, and is controlled from the outside. And a variable resistance circuit whose resistance value changes based on A resistor element connected between one of the first node or the second node and the ground line and having a constant resistance value;
The amplifier circuit according to claim 1, wherein the variable resistance circuit is connected between the other of the first node or the second node and the ground line. A semiconductor device including a first amplifier circuit and a second amplifier circuit having the same characteristics, and a control circuit for controlling operations of the first amplifier circuit and the second amplifier circuit,
The first amplifier circuit includes:
A first voltage-current conversion amplifier that converts an input voltage into an output current;
A first current-voltage conversion amplifier for converting the output current into an output voltage;
Connected between at least one of a first node that outputs the output current in the first voltage-current conversion amplifier and a second node that outputs the output voltage in the first current-voltage conversion amplifier, and a ground line. And a first variable resistance circuit whose resistance value changes based on the control signal,
The second amplifier circuit includes:
A second voltage-current conversion amplifier for converting a test input voltage into a test output current;
A second current-voltage conversion amplifier for converting the test output current into a test output voltage;
And at least one of a third node that outputs the test output current in the second voltage-current conversion amplifier and a fourth node that outputs the test output voltage in the second current-voltage conversion amplifier, and the ground line. A second variable resistance circuit connected between and having a resistance value that changes based on the control signal,
The control circuit changes the resistance value of the second variable resistance circuit according to the control signal, generates the test input voltage and receives the test output voltage, whereby the second amplifier circuit has a predetermined frequency. A semiconductor device characterized by obtaining a resistance value of the second variable resistance circuit in the case of having a characteristic and outputting the control signal corresponding to the obtained resistance value to the first amplifier circuit.

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