JP2016092894A5 - - Google Patents

Description

Power supply circuit and image forming apparatus

  The present invention relates to a power supply circuit and an image forming apparatus including the power supply circuit.

  In an electronic device such as a digital multi-function peripheral having a copying function, a facsimile function, a printing function, a scanner function, etc., the power source is divided into a plurality of DC / DC converters, and each DC / DC converter has a corresponding control board. Electric power is supplied to each component unit. A sequence for supplying power to each constituent unit and a sequence for shutting off the power to each constituent unit are determined in advance. As a circuit for realizing the sequence control, a power supply sequence circuit including a FET (Field Effect Transistor) is known (see Patent Document 1 below).

JP 2010-206382 A

  In the conventional power supply sequence circuit, when the capacity of the load decreases due to the aging of the load such as a capacitor connected to the output terminal of the DC / DC converter, the voltage rise at the output terminal of the DC / DC converter becomes steep. Become. As a result, the timing at which the voltage at the output terminal of the DC / DC converter rises may not match the timing at which the voltage at the output terminal of another DC / DC converter of the DC / DC converter rises.

  The present invention has been made to solve the above problem, and even if the capacity of a load connected to the DC / DC converter decreases due to aging, the rise of the voltage at the output terminal of the DC / DC converter is achieved. The purpose is to control the slope at the same time as before the load capacity has changed over time.

A power supply circuit according to one aspect of the present invention includes a power supply ,
Power is supplied from the power source to the source terminal, a load is connected to the drain terminal, a gate voltage is applied to the gate terminal, and the drain terminal is turned on when the gate voltage exceeds a predetermined reference voltage value. A switch transistor for supplying the power to the load;
An inclination detector for detecting an inclination at the time of rising of the drain voltage at the drain terminal;
A signal supply unit for supplying a pulse signal to the gate terminal,
The signal supply unit, at the rise of the drain voltage,
When the slope detected by the slope detector is equal to or lower than a predetermined lower limit value,
Increase the duty ratio of the pulse signal by a predetermined value,
When the inclination detected by the inclination detection unit is larger than a predetermined upper limit value,
The duty ratio of the pulse signal is decreased by a predetermined value.

According to the present invention, even if the capacity of the load connected to the power supply decreases due to aging, the slope at the time of rising of the voltage at the output terminal of the power supply is the same as that before the capacity of the load changes over time. It becomes possible to control to become.

1 is a front cross-sectional view illustrating a structure of a power supply circuit and an image forming apparatus according to an embodiment of the present invention. 2 is a functional block diagram illustrating a main internal configuration of the image forming apparatus. FIG. It is a circuit diagram of a power supply circuit. It is a figure which shows various waveforms. It is a figure which shows various waveforms. It is a figure which shows various waveforms. (A) is an example of a waveform at the time of rising of the voltage before the load capacity decreases with time. FIG. 5B is a diagram illustrating an example of a waveform adjustment range at the time of voltage rise.

  Hereinafter, an image forming apparatus according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a front sectional view showing the structure of an image forming apparatus according to an embodiment of the present invention. An image forming apparatus 1 according to an embodiment of the present invention is a multifunction machine having a plurality of functions such as a copy function, a printer function, a scanner function, and a facsimile function. The image forming apparatus 1 includes an operation unit 47, an image forming unit 12, a fixing unit 13, a paper feeding unit 14, a document feeding unit 6, a document reading unit 5 and the like in the apparatus main body 11.

  The operation unit 47 receives instructions such as an image forming operation execution instruction and a document reading operation execution instruction from the operator regarding various operations and processes that can be executed by the image forming apparatus 1. The operation unit 47 includes a display unit 473 that displays operation guidance to the operator.

  When the image forming apparatus 1 performs the document reading operation, the document reading unit 5 optically reads the document fed by the document feeding unit 6 or the image of the document placed on the document placing glass 161, and Generate data. Image data generated by the document reading unit 5 is stored in a built-in HDD or a network-connected computer.

  When the image forming apparatus 1 performs an image forming operation, image forming is performed based on image data generated by an original reading operation, image data received from a computer connected to a network, or image data stored in a built-in HDD. The unit 12 forms a toner image on the recording paper P as a recording medium fed from the paper feeding unit 14. When performing color printing, the magenta image forming unit 12M, the cyan image forming unit 12C, the yellow image forming unit 12Y, and the black image forming unit 12Bk of the image forming unit 12 each receive image data. A toner image is formed on the photosensitive drum 121 by charging, exposing, and developing processes based on the image composed of each color component, and the toner image is transferred onto the intermediate transfer belt 125 by the primary transfer roller 126.

  The toner images of the respective colors transferred onto the intermediate transfer belt 125 are superimposed on the intermediate transfer belt 125 with the transfer timing adjusted to become a color toner image. The secondary transfer roller 210 conveys the color toner image formed on the surface of the intermediate transfer belt 125 from the sheet feeding unit 14 through the conveyance path 190 at the nip N with the driving roller 125A with the intermediate transfer belt 125 interposed therebetween. The recording sheet P is transferred. Thereafter, the fixing unit 13 fixes the toner image on the recording paper P to the recording paper P by thermocompression bonding. The recording paper P on which the color image has been formed after completion of the fixing process is discharged to a discharge tray 151.

  The paper feed unit 14 includes a plurality of paper feed cassettes. The control unit 100 (FIG. 2) rotates the pickup roller 145 of the paper feed cassette that contains the recording paper of the size specified by the operator's instruction, and the recording paper P contained in each paper feed cassette. Is conveyed toward the nip portion N.

  In the case of performing double-sided printing in the image forming apparatus 1, the recording paper P on which an image is formed on one side from the image forming unit 12 is nipped by the discharge roller pair 159, and then the recording paper P Is switched back by the discharge roller pair 159 and sent to the reverse conveyance path 195, and the conveyance roller pair 19 conveys the recording paper P again upstream in the conveyance direction of the recording paper P with respect to the nip N and the fixing unit 13. Thereby, an image is formed on the other side of the recording paper by the image forming unit 12.

  FIG. 2 is a functional block diagram showing the main internal configuration of the image forming apparatus 1. The image forming apparatus 1 includes a control unit 10, a document feeding unit 6, a document reading unit 5, an image forming unit 12, an image memory 32, an HDD 92, a fixing unit 13, a drive motor 70, an operation unit 47, a facsimile communication unit 71, and a network. An interface unit 91 and the like are provided. In addition, the same number is attached | subjected to the same component as demonstrated using FIG. 1, and description is abbreviate | omitted.

  The document reading unit 5 includes a reading mechanism 163 (FIG. 1) having a light irradiation unit, a CCD sensor, and the like under the control of the control unit 100 provided in the control unit 10. The document reading unit 5 reads an image from the document by irradiating the document with the light irradiating unit and receiving the reflected light with a CCD sensor.

  The image memory 32 is an area for temporarily storing document image data obtained by reading by the document reading unit 5 and temporarily storing data to be printed by the image forming unit 12.

  The HDD 92 is a large-capacity storage device that stores document images and the like read by the document reading unit 5.

  The driving motor 70 is a driving source that applies a rotational driving force to each rotating member of the image forming unit 12, the conveyance roller pair 19, and the like.

  The facsimile communication unit 71 includes an unillustrated encoding / decoding unit, modulation / demodulation unit, and NCU (Network Control Unit), and performs facsimile transmission using a public telephone network.

  The network interface unit 91 includes a communication module such as a LAN board, and transmits / receives various data to / from an external device 300 such as a personal computer in a local area or the Internet via a LAN connected to the network interface unit 91. I do.

  The control unit 10 is a circuit board composed of a CPU (Central Processing Unit), LSI, ASIC, RAM, ROM, a dedicated hardware circuit, and the like. The control unit 10 includes a control unit 100 and a power supply control unit 200. The control unit 100 governs overall dynamic control of the image forming apparatus 1. Details of the power supply control unit 200 will be described later.

  The control unit 100 includes a document feeding unit 6, a document reading unit 5, an image forming unit 12, an image memory 32, an HDD 92, a fixing unit 13, a drive motor 70, an operation unit 47, a facsimile communication unit 71, a network interface unit 91, and the like. Connected and controls each of these parts.

  The control unit 10 functions as the control unit 100 and the power supply control unit 200 by the operation according to the image processing program. However, the control unit 100 can also be configured by a hardware circuit, regardless of the operation of the control unit 10 according to the image processing program. The same applies to each embodiment unless otherwise specified.

FIG. 3 is a circuit diagram of the power supply circuit 2. The power supply circuit 2 includes a time constant circuit 20, an FET 21, a DC / DC converter (power supply) 22, and a power supply control unit 200. The FET 21 is an example of a switch transistor in the claims.

  The time constant circuit 20 includes a capacitor 24 and a resistor 25. One end of the capacitor 24 is grounded, and the other end is connected to the gate terminal G of the FET 21. One end of the resistor 25 is connected between the other end of the capacitor 24 and the gate terminal G, and a pulse signal is supplied from the signal supply unit 202 to the other end.

  The FET 21 is a switch transistor that interrupts power from the DC / DC converter 22. The FET 21 is supplied with power from the DC / DC converter 22 to the source terminal S, the load of the control unit 100 (not shown) is connected to the drain terminal D, the capacitor 24 is connected to the gate terminal G, and the time constant is applied to the gate terminal G. A gate voltage is applied from the circuit 20. The FET 21 is turned on when the gate voltage exceeds a predetermined reference voltage value, and supplies power from the DC / DC converter 22 from the drain terminal D to the load. Although not shown, in the control unit 10, for example, a circuit, an element such as a CPU, LSI, ASIC, RAM, ROM, a resistor, a capacitor, or the like is mounted as a load. Different for each component unit. Therefore, a plurality of DC / DC converters having different output voltages are provided.

  The power control unit 200 includes an inclination detection unit 201 and a signal supply unit 202.

  The inclination detector 201 detects the inclination at the time of rising of the drain voltage at the drain terminal D.

  The signal supply unit 202 supplies a pulse signal to the gate terminal G through the resistor 25.

  The signal supply unit 202 increases the duty ratio of the pulse signal by a predetermined value when the gradient detected by the gradient detection unit 201 is equal to or lower than a predetermined lower limit at the rise of the drain voltage, and the gradient detection unit When the inclination detected by 201 is larger than a predetermined upper limit value, the duty ratio of the pulse signal is decreased by a predetermined value.

  4 to 6 are diagrams showing various waveforms.

  FIG. 4A shows an example of a waveform at the time of rising of the gate voltage VG after the capacity of the load decreases with time. As shown in FIG. 3, when the capacity of a load (for example, a capacitor) decreases with time, the gate voltage VG rises in a short time. Then, as shown in FIG. 4A, at the rise of the gate voltage VG, the time t1 required for the gate voltage VG to exceed the reference voltage value V0 is also shortened, and the FET 21 takes time t1 from the start of the rise of the gate voltage VG. It turns on as soon as elapses.

  FIG. 4B is an example of a waveform at the time of rising of the voltage VD1 at the output terminal of the DC / DC converter 22 after the capacity of the load has decreased with time. As described above, in addition to the DC / DC converter 22, another DC / DC converter is provided to control the power supplied to other loads. The voltages VD2 and VD3 are output from the other DC / DC converter. Waveforms VD2 and VD3 in the figure show waveforms when the voltages VD2 and VD3 rise at the output terminal of another DC / DC converter. The DC / DC converter 22 and the other two DC / DC converters control the rise of the voltage at the output terminals that are the respective control objects. The power supply control unit 200 controls the rising timing so that a predetermined order is observed in each DC / DC converter. As described above, when the rise of the gate voltage VG becomes faster, the rise of the voltage VD1 at the output terminal of the DC / DC converter 22 becomes steep as shown in FIG. Specifically, the slope (ΔVD1 / Δt) at the time of rising of the voltage VD1 is larger than a predetermined upper limit value (not shown). As a result, the timing at which the voltage VD1 rises in the DC / DC converter 22 does not match the timing at which the voltages VD2 and VD3 rise in the other two DC / DC converters.

  In the present embodiment, when the voltage VD1 at the output terminal of the DC / DC converter 22 rises, the signal supply unit 202 has a slope (ΔVD1 / Δt) detected by the slope detection unit 201 equal to or less than a predetermined lower limit value. When the duty ratio of the pulse signal is increased by a predetermined value and the inclination (ΔVD1 / Δt) detected by the inclination detecting unit 201 is larger than the predetermined upper limit value, the duty ratio of the pulse signal is determined in advance. Decrease by the specified value. Here, the waveform shown in FIG. 5A is an example of a pulse signal waveform in which the signal supply unit 202 increases the duty ratio of the pulse signal by a predetermined value. The waveform shown in FIG. 5B is an example of a pulse signal waveform in which the signal supply unit 202 decreases the duty ratio of the pulse signal by a predetermined value.

  5A and 5B, the duty ratio τ2 / T2 (about 5/10) shown in FIG. 5B is equal to the duty ratio τ1 / T1 (about 5/10) shown in FIG. The frequency f2 (= 1 / T2) shown in FIG. 5B is a frequency f1 (= 1 / T1) shown in FIG. 5A. It is a bigger value. When the inclination (ΔVD1 / Δt) detected by the inclination detecting unit 201 is larger than a predetermined upper limit value, the signal supply unit 202 decreases the duty ratio of the pulse signal by a predetermined value and sets the duty ratio τ2. Change to / T2. On the other hand, when the inclination (ΔVD1 / Δt) detected by the inclination detecting unit 201 is equal to or smaller than a predetermined lower limit value, the signal supply unit 202 increases the duty ratio of the pulse signal by a predetermined value. Change to τ1 / T1.

  FIG. 6A shows an example of a waveform at the rise of the gate voltage VG when the signal supply unit 202 changes the duty ratio of the pulse signal to the duty ratio τ2 / T2 shown in FIG. In this example, the gate voltage VG rises in stages, but the pulse signal set to the duty ratio τ2 / T2 shown in FIG. 5B has a period T2 (FIG. 5) that does not affect the stage. (See (B)), the signal supply unit 202 controls the signal to be close to a normal signal. As shown in FIG. 6 (A), the time t2 when the gate voltage VG exceeds the reference voltage value V0 is longer than the time t1 (see FIG. 4 (A)), so that the FET 21 takes time t1 from the start of rising of the gate voltage VG. Turns on when a longer time t2 elapses. As a result, the timing at which the FET 21 is turned on is delayed by time (t2−t1) compared to before the signal supply unit 202 performs the duty ratio change control. Accordingly, the timing at which the voltage VD1 rises in the DC / DC converter 22 is also delayed.

  FIG. 6B is an example of a waveform at the rise of the voltage VD1 when the signal supply unit 202 changes the duty ratio of the pulse signal to the duty ratio τ2 / T2 shown in FIG. Waveforms VD2 and VD3 in the figure show waveforms at the time of rising of the voltages VD2 and VD3 in the other two DC / DC converters of the DC / DC converter 22. The DC / DC converter 22 and the other two DC / DC converters each have a slope of the output voltage value at the time of rising. As described above, when the rise of the voltage VD1 is delayed by the control of the power supply control unit 200, the rise of the voltage VD1 becomes gentle as shown in FIG. 6B, and the slope at the rise of the voltage VD1 is predetermined. It falls to a slope (ΔVD1 / Δt) that is less than or equal to the upper limit value. In the present embodiment, the power supply control unit 200 controls the slope at the time of rising of the drain voltage VD1 to be the same slope as the slope before the load has deteriorated over time due to the decrease in the slope. 6B, the timing at which the voltage VD1 rises matches the timing at which the voltages VD2 and VD3 rise by the control of the power supply control unit 200, and the power supply control unit 200 detects the voltage at the output terminal of the DC / DC converter 22. Control is performed so that the slope at the rise of VD1 falls within the slope at the rise of voltages VD2 and VD3 in the other two DC / DC converters. Thereby, the rising timings of the voltages VD1 to VD3 are matched, and the sequence at the rising of the voltages VD1 to VD3 is maintained between the DC / DC converter 22 and the other two DC / DC converters.

  Therefore, in the above embodiment, even if the capacity of the load connected to the DC / DC converter 22 decreases due to aging, the slope of the load at the rising edge of the voltage at the output terminal of the DC / DC converter 22 It can be controlled to have the same inclination as before aging.

  FIG. 7A is an example of a waveform at the time of rising of the voltages VD1 to VD3 before the load capacity decreases with time. FIG. 7B is a diagram showing an example of a waveform adjustment range when the voltage VD1 rises.

  Note that the configurations and processes shown in the above embodiments using FIGS. 1 to 7 are only one embodiment of the present invention, and the configurations and processes of the present invention are not limited thereto.

DESCRIPTION OF SYMBOLS 1 Image forming apparatus 2 Power supply circuit 10 Control unit 12 Image forming part 20 Time constant circuit 21 FET
22 DC / DC converter 24 Capacitor 25 Resistance 100 Control unit 200 Power supply control unit 201 Inclination detection unit 202 Signal supply unit

Claims (4)

Power supply ,
Power is supplied from the power source to the source terminal, a load is connected to the drain terminal, a gate voltage is applied to the gate terminal, and the drain terminal is turned on when the gate voltage exceeds a predetermined reference voltage value. A switch transistor for supplying the power to the load;
An inclination detector for detecting an inclination at the time of rising of the drain voltage at the drain terminal;
A signal supply unit for supplying a pulse signal to the gate terminal,
The signal supply unit, at the rise of the drain voltage,
When the slope detected by the slope detector is equal to or lower than a predetermined lower limit value,
Increase the duty ratio of the pulse signal by a predetermined value,
When the inclination detected by the inclination detection unit is larger than a predetermined upper limit value,
A power supply circuit for reducing the duty ratio of the pulse signal by a predetermined value. It has a time constant circuit consisting of a capacitor and a resistor.
The power supply circuit according to claim 1, wherein the gate voltage is applied to the gate terminal from the time constant circuit. The time constant circuit is:
A capacitor having one end grounded and the other end connected to the gate terminal;
3. The power supply circuit according to claim 2, further comprising: one end connected between the other end of the capacitor and the gate terminal, and a resistor to which the pulse signal is supplied from the signal supply unit at the other end. The power supply circuit according to any one of claims 1 to 3,
An image forming unit for forming an image on a recording medium;
A control unit for controlling the image forming unit,
An image forming apparatus in which a load of the control unit is connected to the drain terminal of the switch transistor.