JP2016054428A - Amplifier circuit, detector and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce noise of an output signal utilizing a capacitive detection element such as a pyroelectric element.SOLUTION: An amplifier circuit 18 is a chopper type amplifier circuit generating an amplification signal SA corresponding to an electric charge supplied from a pyroelectric element. In an amplification period QA, a first input terminal NA1 is connected to a negative side input terminal TA1 of an operational amplifier 34, a second input terminal NA2 is connected to a positive side input terminal TA2, a first output terminal NB1 is connected to a positive side output terminal TB1, and a second output terminal NB2 is connected to a negative side output terminal TB2. In an amplification period QB, the first input terminal NA1 is connected to the positive side input terminal TA2, the second input terminal NA2 is connected to the negative side input terminal TA1, the first output terminal NB1 is connected to the negative side output terminal TB2, and the second output terminal NB2 is connected to the positive side output terminal TB1. In a period between the amplification period QA and the amplification period QB, an electric potential difference between the negative side input terminal TA1 and the positive side input terminal TA2 is reduced in a state of the first output terminal NB1 and the second output terminal NB2 being insulated from the operational amplifier 34.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a detection technique using a capacitive detection element such as a pyroelectric element.

  Various techniques for generating an output signal corresponding to a detection result by a capacitive detection element such as a pyroelectric element have been proposed. For example, Patent Document 1 discloses a detection device that uses a pyroelectric element, a source follower circuit, and a differential amplifier circuit.

JP2013-148488A

  However, in the technique of Patent Document 1, since noise such as Johnson noise and flicker noise is generated due to the operation of each element such as a transistor constituting the detection circuit, an output signal having a high S / N ratio is actually generated. Is not easy. In view of the above circumstances, an object of the present invention is to reduce noise in an output signal generated using a capacitive element such as a pyroelectric element.

In order to solve the above problems, an amplifier circuit according to a preferred aspect of the present invention provides a first output of an amplified signal corresponding to a voltage generated between a first input terminal and a second input terminal by a capacitive element. Chopper type amplifier circuit for outputting to a terminal and a second output terminal, a fully differential operation including a first amplification input terminal, a second amplification input terminal, a first amplification output terminal, and a second amplification output terminal An amplifier, a modulation circuit for switching electrical connection between the first input terminal and the second input terminal, and the first amplification input terminal and the second amplification input terminal; a first amplification output terminal; a second amplification output terminal; A demodulating circuit for switching electrical connection between the output terminal and the second output terminal; and a first circuit between the first amplification input terminal and the second amplification input terminal. Is connected between the first input terminal and the first amplification input terminal, and the second input terminal and the second amplification input terminal And the demodulating circuit connects the first output terminal and the first amplification output terminal and connects the second output terminal and the second amplification output terminal, and in the second amplification period after the first amplification period. The modulation circuit connects the first input terminal and the second amplification input terminal and connects the second input terminal and the first amplification input terminal, and the demodulation circuit includes the first output terminal and the second amplification output terminal. And the second output terminal and the first amplification output terminal are connected, and the modulation circuit electrically connects the first input terminal and the second input terminal from the operational amplifier between the first amplification period and the second amplification period. The first circuit reduces the potential difference between the first amplification input terminal and the second amplification input terminal during the release period in which the first amplification input terminal is isolated.
In the above aspect, a chopper type amplifier circuit is used to generate an amplified signal corresponding to a voltage generated in the capacitive element. Therefore, it is possible to generate a signal with sufficiently reduced noise (or a signal that can effectively suppress noise in the post-amplification process). Further, in the release period between the first amplification period and the second amplification period, the first amplification input terminal and the second amplification terminal are electrically isolated from the operational amplifier in a state in which the modulation circuit electrically isolates the first input terminal and the second input terminal from the operational amplifier. The potential difference from the two amplification input terminals is reduced. That is, the charge remaining at the first amplification input terminal and the second amplification input terminal in the first amplification period is reduced in the release period. Therefore, cancellation of the charge remaining at the first amplification input terminal and the second amplification input terminal and the charge supplied to the first input terminal and the second input terminal is suppressed, and as a result, an appropriate amplification operation can be realized. There are advantages.

  In a preferred aspect of the present invention, the first circuit includes a switch that is disposed between the first amplification input terminal and the second amplification input terminal and is turned on during a part of the release period. According to the above configuration, it is possible to reliably reduce the potential difference between the first amplification input terminal and the second amplification input terminal with a simple operation of controlling the switch of the first circuit.

  An amplifier circuit according to a preferred aspect of the present invention includes a second circuit between the first amplification output terminal and the second amplification output terminal, and the demodulation circuit is configured to output the first output terminal and the second output terminal during the release period. Is electrically insulated from the operational amplifier, the second circuit reduces the potential difference between the first amplification output terminal and the second amplification output terminal. In the above aspect, the potential difference between the first amplification output terminal and the second amplification output terminal is reduced in the release period. That is, the charge remaining at the first amplification output terminal and the second amplification output terminal during the first amplification period is reduced during the release period. Therefore, there is an advantage that an appropriate amplification operation can be realized without being affected by the charge remaining at the first amplification output terminal or the second amplification output terminal. The second circuit includes, for example, a switch that is disposed between the first amplification output terminal and the second amplification output terminal and is turned on during a part of the release period. According to the above configuration, the potential difference between the first amplification output terminal and the second amplification output terminal can be reliably reduced by a simple operation for controlling the switch of the second circuit.

  A detection device according to a preferred aspect of the present invention includes a pyroelectric element that generates a charge due to a pyroelectric effect, and an amplifier circuit according to each of the aspects that generates an amplified signal corresponding to the charge generated in the pyroelectric element. It has. In the above configuration, a chopper type amplifier circuit is used to generate an amplified signal corresponding to the charge generated in the pyroelectric element. Therefore, it is possible to reduce noise of a signal generated using the pyroelectric element. For example, the noise of the amplified signal is reduced by a filter that suppresses a frequency band including the frequency of chopping by the amplifier circuit in the amplified signal generated by the amplifier circuit.

  The detection device according to each aspect described above is used in various electronic devices. For example, a detection device adopting a pyroelectric element as a detection element can be mounted on an electronic device for sensing a detection target (for example, a human) using infrared rays, for example, but the use of the detection device in the electronic device is for infrared detection. It is not limited.

It is a block diagram of the detection apparatus which concerns on 1st Embodiment of this invention. It is explanatory drawing of the fluctuation | variation of the frequency band by amplification operation | movement. It is explanatory drawing of operation | movement of an initialization switch. It is a block diagram of an amplifier circuit. It is a schematic diagram of each control signal. It is explanatory drawing of amplification operation. It is explanatory drawing of amplification operation. It is a block diagram of the amplifier circuit in 2nd Embodiment. It is a schematic diagram of each control signal in the second embodiment. It is a block diagram of the amplifier circuit in 3rd Embodiment. It is a block diagram of the detection apparatus in a modification. It is a block diagram of the 1st circuit and 2nd circuit which concern on a modification.

<First Embodiment>
FIG. 1 is a configuration diagram of a detection apparatus 100 according to the first embodiment of the present invention. The detection device 100 according to the first embodiment is an electronic circuit that detects infrared rays and generates an output signal S according to the detection result. As illustrated in FIG. 1, the pyroelectric element 12, the initialization switch 14, and the control A circuit 16, an amplifier circuit 18, and a filter 20 are provided. The control circuit 16 controls each element of the detection device 100. Specifically, the control circuit 16 of the first embodiment controls the initialization switch 14 by supplying the control signal σ and controls the amplifier circuit 18 by supplying the control signal φ (φa to φd).

  The pyroelectric element 12 in FIG. 1 is a detection element that generates electric charge due to the pyroelectric effect of a pyroelectric body (not shown), and is connected in parallel between the first detection end D1 and the second detection end D2. The capacitance C D and the resistance R D are equivalently configured. The pyroelectric element 12 of the first embodiment is used as a capacitive detection element that detects infrared rays. That is, spontaneous polarization according to a temperature change caused by infrared irradiation occurs in the pyroelectric body (pyroelectric effect), so that a charge corresponding to the intensity of infrared light (a voltage corresponding to the charge) is a first detection end. Occurs at D1 and the second detection end D2. Specifically, charges having opposite polarities and the same charge amount are generated at the first detection end D1 and the second detection end D2. In the first embodiment, as illustrated in FIG. 1, it is assumed that a negative charge is generated at the first detection end D1 and a positive charge is generated at the second detection end D2. The initialization switch 14 in FIG. 1 establishes electrical connection (conduction / insulation) between the second detection terminal D2 of the pyroelectric element 12 and a power source 22 that generates a predetermined voltage (hereinafter referred to as "initialization voltage") VRST. Control.

  The amplifier circuit 18 generates a differential voltage signal (hereinafter referred to as “amplified signal”) SA (voltage SA1 and voltage SA2) corresponding to the electric charge generated in the pyroelectric element 12. As illustrated in FIG. 1, the amplifier circuit 18 includes a first input terminal NA1, a second input terminal NA2, a first output terminal NB1, and a second output terminal NB2. The first input end NA1 is electrically connected to the first detection end D1 of the pyroelectric element 12, and the second input end NA2 is electrically connected to the second detection end D2 of the pyroelectric element 12. The amplifier circuit 18 of the first embodiment generates an amplified signal SA corresponding to the charges (that is, differential charge signals) supplied from the pyroelectric element 12 to the first input terminal NA1 and the second input terminal NA2 by chopping. A chopper type amplifier (chopper stabilized amplifier), which includes a modulation circuit 32, an operational amplifier 34, a demodulation circuit 36, a capacitor C1, and a capacitor C2, as illustrated in FIG.

  The operational amplifier 34 is a fully differential operational amplifier having a negative input terminal TA1, a positive input terminal TA2, a positive output terminal TB1, and a negative output terminal TB2. The capacitor C1 is disposed between the first input terminal NA1 and the first output terminal NB1, and the capacitor C2 is disposed between the second input terminal NA2 and the second output terminal NB2. The modulation circuit 32 is installed on the input side of the operational amplifier 34, and the demodulation circuit 36 is installed on the output side of the operational amplifier 34.

  The modulation circuit 32 periodically switches the electrical connection between the first input terminal NA1 and the second input terminal NA2 and the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34. The demodulating circuit 36 periodically switches the electrical connection between the positive output terminal TB1 and negative output terminal TB2 of the operational amplifier 34 and the first output terminal NB1 and second output terminal NB2 to thereby amplify the signal SA. Is generated. The frequency (chopping frequency) fc of modulation by the modulation circuit 32 and demodulation by the demodulation circuit 36 is defined by a control signal φ (φa to φd) supplied from the control circuit 16.

  As illustrated in part (A) of FIG. 2, the detection signal (charge signal) expressed by the charges supplied to the first input end NA1 and the second input end NA2 is a low-frequency side signal including a DC component. Although the signal component is preferentially contained, as illustrated in the part (B) of FIG. In FIG. 2 (B), sidebands resulting from modulation are also shown. On the other hand, in the amplification by the operational amplifier 34, as illustrated in part (B) of FIG. 2, low-frequency noise (for example, Johnson noise or flicker) caused by the operation of each element such as a transistor constituting the operational amplifier 34 is illustrated. Noise) is superimposed on the modulated signal processed by the modulation circuit 32. In the amplified signal SA generated by demodulation by the demodulation circuit 36, the frequency band of the modulation signal transitions to the low frequency side and the frequency band of noise transitions to the high frequency side. Part (C) of FIG. 2 illustrates a high frequency band B in which noise and sideband waves are present in the amplified signal SA. The frequency band B is a band including the frequency fc.

  The filter 20 in FIG. 1 generates the output signal S by suppressing (ideally removing) the signal component of the high frequency band B including the frequency fc from the amplified signal SA generated by the amplifier circuit 18. . For example, a low-pass filter or a band-pass filter having a pass band on the low frequency side of the frequency band B is preferably used as the filter 20 of the first embodiment. According to the above configuration, it is possible to generate the output signal S having a high S / N ratio in which the noise of the operational amplifier 34 is suppressed.

  FIG. 3 is an explanatory diagram of a schematic operation of the detection apparatus 100. As illustrated in FIG. 3, the initialization switch 14 performs an amplification operation in which the amplification circuit 18 generates an amplification signal SA corresponding to the charge of the pyroelectric element 12 in accordance with the control signal σ supplied from the control circuit 16. It is turned on in a predetermined length initialization period QRST before the start, and is kept off during the amplification operation. Since the initialization switch 14 is controlled to be in the ON state in the initialization period QRST, the voltage of the second detection terminal D2 is initialized to the initialization voltage VRST before the amplification operation is started. On the other hand, during the execution of the amplification operation, the initialization switch 14 is maintained in the OFF state, so that the second detection end D2 and the first detection end D1 of the pyroelectric element 12 are maintained in an electrical floating state.

  FIG. 4 is a specific configuration diagram of the amplifier circuit 18 of the first embodiment. As illustrated in FIG. 4, the control signal φa and the control signal φb generated by the control circuit 16 are supplied to the modulation circuit 32, and the control signal φc and the control signal φd generated by the control circuit 16 are supplied to the demodulation circuit 36. .

  As illustrated in FIG. 4, the modulation circuit 32 includes an electrical connection (conduction) between the first input terminal NA1 and the second input terminal NA2 and the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34. A plurality of switches (Xa1, Xa2, Xb1, Xb2) for controlling (insulation). The switch Xa1 controls the connection between the first input terminal NA1 and the negative input terminal TA1, and the switch Xb1 controls the connection between the first input terminal NA1 and the positive input terminal TA2. The switch Xa2 controls the connection between the second input terminal NA2 and the positive input terminal TA2, and the switch Xb2 controls the connection between the second input terminal NA2 and the negative input terminal TA1. The switch Xa1 and the switch Xa2 operate according to the control signal φa, and the switch Xb1 and the switch Xb2 operate according to the control signal φb.

  As illustrated in FIG. 4, the demodulation circuit 36 includes an electrical connection (conduction) between the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34 and the first output terminal NB1 and the second output terminal NB2. A plurality of switches (Yc1, Yc2, Yd1, Yd2) for controlling (insulation). The switch Yc1 controls the connection between the positive output terminal TB1 and the first output terminal NB1, and the switch Yd1 controls the connection between the negative output terminal TB2 and the first output terminal NB1. The switch Yc2 controls the connection between the negative output terminal TB2 and the second output terminal NB2, and the switch Yd2 controls the connection between the positive output terminal TB1 and the second output terminal NB2. The switch Yc1 and the switch Yc2 operate according to the control signal φc, and the switch Yd1 and the switch Yd2 operate according to the control signal φd.

  FIG. 5 is a schematic diagram of each control signal φ (φa to φd) supplied from the control circuit 16 to the amplifier circuit 18 after the initialization period QRST has elapsed. FIGS. 6 and 7 illustrate the amplification operation by the amplifier circuit 18. It is explanatory drawing. In the first embodiment, each switch (Xa1, Xa2, Xb1, Xb2) of the modulation circuit 32 and each switch (Yc1, Yc2, Yd1, Yd2) of the demodulation circuit 36 are configured by P-channel transistors. Is illustrated. Therefore, each switch is controlled to be in an on state by setting each control signal φ to a low level, and each switch is controlled to be in an off state by setting control signal φ to a high level. However, the conductivity type of the transistors used as the switches of the modulation circuit 32 and the demodulation circuit 36 is arbitrary. Further, an analog switch in which P-channel and N-channel transistors are combined can be used as the switches of the modulation circuit 32 and the demodulation circuit 36.

  As illustrated in FIG. 5, in the first embodiment, the control circuit 16 causes each control signal (chopper clock) to repeat a set of the amplification period QA and the amplification period QB sequentially in a cycle corresponding to the frequency fc. Generate φ. The amplification period QA corresponds to one example of the first amplification period and the second amplification period, and the amplification period QB corresponds to the other example of the first amplification period and the second amplification period. The operation in the amplification period QA and the amplification period QB will be described in detail below.

<Amplification period QA>
In the amplification period QA, as illustrated in FIG. 5, the control signal φa and the control signal φc are set to the low level, and the control signal φb and the control signal φd are set to the high level. Therefore, as illustrated in part (A) of FIG. 6, in the modulation circuit 32, the switch Xa1 and the switch Xa2 are controlled to be in the on state, and the switch Xb1 and the switch Xb2 are controlled to be in the off state. In the demodulation circuit 36, the switch Yc1 and the switch Yc2 are controlled to be in an on state, and the switch Yd1 and the switch Yd2 are controlled to be in an off state. That is, in the amplification period QA, the modulation circuit 32 connects the first input terminal NA1 and the negative input terminal TA1 and connects the second input terminal NA2 and the positive input terminal TA2, and the demodulation circuit 36 The side output terminal TB1 and the first output terminal NB1 are connected, and the negative output terminal TB2 and the second output terminal NB2 are connected.

  In the above state (hereinafter referred to as “first state”), the capacitor C1 functions as a feedback capacitor between the negative input terminal TA1 and the positive output terminal TB1 of the operational amplifier 34, and the pyroelectric element 12 is detected first. The charge supplied from the terminal D1 to the first input terminal NA1 is charged in the capacitor (integrating capacitor) C1. Therefore, the voltage SA1 of the first output terminal NB1 is set to a voltage (voltage of the capacitor C1) corresponding to the charge amount and the capacitance value of the capacitor C1. That is, in the amplification period QA, the operational amplifier 34 and the capacitor C1 function as a charge amplifier (charge-voltage conversion circuit) that generates a voltage corresponding to the charge supplied to the first input terminal NA1. The amplification factor of the voltage SA1 is a numerical value corresponding to the capacitance ratio between the capacitance CD of the pyroelectric element 12 and the capacitance C1 of the amplifier circuit 18. Similarly, since the charge supplied from the second detection end D2 of the pyroelectric element 12 to the second input end NA2 is charged to the capacitor C2, the voltage SA2 of the second output end NB2 is equal to the charge amount of the capacitor C2 and the capacitance. The voltage is set according to the value. The amplification factor of the voltage SA2 is a numerical value corresponding to the capacitance ratio between the capacitance CD of the pyroelectric element 12 and the capacitance C2 of the amplifier circuit 18.

<Amplification period QB>
In the amplification period QB, as illustrated in FIG. 5, contrary to the amplification period QA, the control signal φa and the control signal φc are set to the high level, and the control signal φb and the control signal φd are set to the low level. . Therefore, as illustrated in part (E) of FIG. 6, in the modulation circuit 32, the switch Xa1 and the switch Xa2 are controlled to be in the off state, and the switch Xb1 and the switch Xb2 are controlled to be in the on state. In the demodulation circuit 36, the switch Yc1 and the switch Yc2 are controlled to be in an off state, and the switch Yd1 and the switch Yd2 are controlled to be in an on state. That is, in the amplification period QB, the modulation circuit 32 connects the first input terminal NA1 and the positive input terminal TA2 and connects the second input terminal NA2 and the negative input terminal TA1, and the demodulation circuit 36 The side output terminal TB1 and the second output terminal NB2 are connected, and the negative output terminal TB2 and the first output terminal NB1 are connected.

  In the above state (hereinafter referred to as “second state”), the charge supplied from the first detection end D1 of the pyroelectric element 12 to the first input end NA1 is charged to the capacitor C1 as in the amplification period QA. Thus, the voltage SA1 of the first output terminal NB1 is set to a voltage corresponding to the charge amount and the capacitance value of the capacitor C1, and the charge supplied from the second detection terminal D2 to the second input terminal NA2 is charged to the capacitor C2. Thus, the voltage SA2 of the second output terminal NB2 is set to a voltage corresponding to the charge amount and the capacitance value of the capacitor C2. As understood from the above description, the differential amplification signal SA (part of FIG. 2) expressed by the voltage SA1 and the voltage SA2 is obtained by chopping the frequency fc that periodically switches between the first state and the second state. C)) is generated.

  By the way, in the configuration in which the initialization switch 14 of FIG. 1 is omitted and the second detection terminal D2 of the pyroelectric element 12 is fixedly connected to the power source 22 (hereinafter referred to as “proportional 1”), the switch Xa2 is turned on. The state in which the initialization voltage VRST is supplied from the power supply 22 to the positive input terminal TA2 of the operational amplifier 34 and the switch Xa2 is switched to the OFF state so that the positive input terminal TA2 is maintained in an electrically floating state. The state is repeated alternately. Therefore, the contrast 1 has a problem that the stability of the amplification operation is low. On the other hand, in the first embodiment, the initialization switch 14 is maintained in the OFF state during the execution of the amplification operation, so that the first detection end D1 and the second detection end D2 of the pyroelectric element 12 are in an electrically floating state. Maintained. Therefore, in addition to the state where the operational amplifier 34 is insulated from the first input end NA1 and the second input end NA2, the operational amplifier 34 is connected even when the operational amplifier 34 is connected to the first input end NA1 and the second input end NA2. The negative input terminal TA1 and the positive input terminal TA2 of 34 are maintained in an electrical floating state. Therefore, according to the first embodiment, it is possible to stabilize the amplification operation as compared with the comparative 1.

<Preparation period P>
As illustrated in FIG. 5, a preparation period P for appropriately shifting one of the first state and the second state to the other is secured between the amplification period QA and the amplification period QB. The preparation period P of the first embodiment includes a period PA, a period PB, and a period PC. The period PA and the period PB are an amplification period QA or a period between the amplification period QB and the period PC. Specifically, the period PA is a period immediately before the period PB, and the period PC is a period immediately after the period PB. The preparation period P exists both immediately after the amplification period QA and immediately after the amplification period QB. In the following description, the preparation period P immediately after the amplification period QA will be focused on for convenience.

  In the period PA immediately after the amplification period QA in the preparation period P, as illustrated in FIG. 5, the control signal φb, the control signal φc, and the control signal φd are controlled while being maintained at the same level as in the amplification period QA. Signal φa is changed to a high level. Therefore, as illustrated in part (B) of FIG. 6, the switch Xa1 and the switch Xa2 of the modulation circuit 32 transition from the first state in the amplification period QA to the OFF state. That is, in the state where the demodulation circuit 36 maintains the connection between the first output terminal NB1 and the second output terminal NB2 and the operational amplifier 34 as in the amplification period QA, the modulation circuit 32 includes the first input terminal NA1 and the second input terminal. The terminal NA2 is isolated from the operational amplifier 34.

  In the period PB immediately after the period PA, as illustrated in FIG. 5, the control signal φc is changed to the high level while the control signal φa, the control signal φb, and the control signal φd are maintained at the same level as in the period PA. Is done. Therefore, as illustrated in the part (C) of FIG. 6, the switch Yc1 and the switch Yc2 of the demodulation circuit 36 transition from the state of the period PA to the off state. That is, the demodulating circuit 36 insulates the first output terminal NB1 and the second output terminal NB2 from the operational amplifier 34 while the modulation circuit 32 insulates the first input terminal NA1 and the second input terminal NA2 from the operational amplifier 34. . As illustrated above, in the period PB (release period) of the preparation period P, the first input terminal NA1, the second input terminal NA2, the first output terminal NB1, and the second output terminal NB2 are insulated from the operational amplifier 34. .

  In the configuration in which the preparation period P is omitted and the amplification period QA and the amplification period QB are mutually continuous (hereinafter referred to as “contrast 2”), the control signal φa is set to a low level in the amplification period QA. There is a possibility that the period during which the control signal φb is set to the low level in the amplification period QB overlaps with each other. When both the control signal φa and the control signal φb are set to the low level, all the switches (Xa1, Xa2, Xb1, Xb2) of the modulation circuit 32 are simultaneously controlled to be in the ON state (the first input terminal NA1 and the first input terminal NA1). Therefore, the negative charge existing in the first input terminal NA1 and the capacitor C1 cancels out the positive charge existing in the second input terminal NA2 and the capacitor C2. Therefore, in the comparative example 2, the capacitors C1 and C2 cannot be charged sufficiently, and as a result, there is a possibility that an appropriate amplification operation by the amplifier circuit 18 is hindered. In the above description, the conduction between the first input end NA1 and the second input end NA2 has been focused. However, all the switches (in the demodulator circuit 36) are set by setting both the control signal φc and the control signal φd to a low level. In the case where Yc1, Yc2, Yd1, Yd2) are simultaneously controlled to be in the ON state, charge cancellation can occur similarly.

  In contrast to the comparative 2 described above, in the first embodiment, the period PA in which the first input terminal NA1 and the second input terminal NA2 are insulated from the operational amplifier 34, and the first output terminal NB1 and the second output terminal NB2 are provided. Since the period PB that is insulated from the operational amplifier 34 is ensured between the amplification period QA and the amplification period QB, the situation where both the control signal φa and the control signal φb are set to the low level, the control signal φc, and the control signal The situation where both of the signals φd are set to the low level is avoided. Therefore, charge cancellation due to conduction between the first input terminal NA1 and the second input terminal NA2 and conduction between the first output terminal NB1 and the second output terminal NB2 is prevented. That is, according to the first embodiment, as compared with the comparative 2, the charge generated in the pyroelectric element 12 is surely charged to the capacitors C 1 and C 2 to realize an appropriate amplification operation by the amplifier circuit 18. Is possible.

  Incidentally, a capacitance (parasitic capacitance) is attached to the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34. As illustrated in part (A) of FIG. 6, in the amplification period QA, the capacitor CS1 associated with the positive output terminal TB1 of the operational amplifier 34 is charged with a positive charge, and the capacitor CS2 associated with the negative output terminal TB2 is charged. Negative charge is charged. The charges of the capacitors CS1 and CS2 are maintained in the periods PA and PB. Therefore, in the configuration in which the amplification period QB is started immediately after the period PB without the period PC (hereinafter referred to as “comparative 3”), when the switch Yd1 of the demodulation circuit 36 transitions to the ON state with the start of the amplification period QB. The positive charge accumulated in the capacitor C1 in the immediately preceding amplification period QA cancels out the negative charge accumulated in the capacitor CS2 associated with the negative output terminal TB2. Similarly, when the switch Yd2 of the demodulator circuit 36 is turned on with the start of the amplification period QB, the negative charge accumulated in the capacitor C2 during the amplification period QA and the positive charge accumulated in the capacitor CS1 associated with the positive output terminal TB1. The charge is offset. In contrast 3, the voltages of the capacitors C1 and C2 are reduced due to the charge cancellation described above, and as a result, an appropriate amplification operation by the amplifier circuit 18 may be hindered.

  In order to solve the above problem of the comparative 3, in the first embodiment, the period PC (transition period) in FIG. 5 is ensured immediately before the amplification period QB. Specifically, in the period PC, the control signal φb is changed to the low level while the control signal φa, the control signal φc, and the control signal φd are maintained at the same high level as in the immediately preceding period PB. Accordingly, the first input terminal NA1, the second input terminal NA2, the first output terminal NB1, and the second output terminal NB2 are illustrated in part (D) of FIG. 6 from the state of the period PB that is insulated from the operational amplifier 34. As shown, the switch Xb1 and the switch Xb2 of the modulation circuit 32 are turned on. That is, the modulation circuit 32 connects the first input terminal NA1 and the positive input terminal TA2 while the demodulator circuit 36 insulates the first output terminal NB1 and the second output terminal NB2 from the operational amplifier 34. The two input terminals NA2 and the negative input terminal TA1 are connected. In the above state, negative charge is supplied from the positive output terminal TB1 to the capacitor CS1 while the positive output terminal TB1 of the operational amplifier 34 and the capacitor C1 are insulated, and the negative output terminal TB2 and the capacitor of the operational amplifier 34 are supplied. A positive charge is charged from the negative output terminal TB2 to the capacitor CS2 in a state where C2 is insulated. That is, the positive charge of the capacitor CS1 and the negative charge of the capacitor CS2 accumulated before the start of the period PC are reduced in the period PC. In the amplification period QB after the end of the period PC described above, the capacitor C1 is connected to the negative output terminal TB2 and the capacitor C2 is connected to the positive output terminal TB1 as illustrated in part (E) of FIG. Connected. Therefore, the first embodiment has the advantage that the voltage drop of the capacitors C1 and C2 due to the charge cancellation immediately after the start of the amplification period QB is suppressed, and an appropriate amplification operation by the amplifier circuit 18 can be realized. .

  In the above description, attention is paid to the preparation period P immediately after the amplification period QA. However, as exemplified below, the same operation is performed in the preparation period P immediately after the amplification period QB. In the amplification period QB illustrated in part (A) of FIG. 7, as described above, the first input terminal NA1 and the positive input terminal TA2 are connected, and the second input terminal NA2 and the negative input terminal TA1 are connected. The positive output terminal TB1 and the second output terminal NB2 are connected, and the negative output terminal TB2 and the first output terminal NB1 are connected. Accordingly, the capacitor CS1 associated with the positive output terminal TB1 of the operational amplifier 34 is charged with a negative charge, and the capacitor CS2 associated with the negative output terminal TB2 is charged with a positive charge.

  In the period PA of the preparation period P immediately after the amplification period QB, as illustrated in part (B) of FIG. 7, the first input terminal NA1 and the second input terminal NA2 are changed by changing the control signal φb to the high level. Is isolated from the operational amplifier 34, and in the period PB immediately after, the control signal φd is changed to the high level as illustrated in the part (C) of FIG. 7, whereby the first output terminal NB1 and the second output terminal NB2 Is isolated from the operational amplifier 34. In the period PC of the preparation period P immediately after the amplification period QB, the control signal φa is changed to the low level, so that the first input terminal NA1 is connected to the operational amplifier 34 as illustrated in part (D) of FIG. And the second input terminal NA2 is connected to the positive input terminal TA2. In the above state, positive charge is supplied from the positive output terminal TB1 to the capacitor CS1 while the positive output terminal TB1 and the capacitor C1 of the operational amplifier 34 are insulated, and the negative output terminal TB2 and the capacitor of the operational amplifier 34 are supplied. A negative charge is supplied from the negative output terminal TB2 to the capacitor CS2 while being insulated from C2. That is, the negative charge of the capacitor CS1 and the positive charge of the capacitor CS2 accumulated before the start of the period PC are reduced in the period PC. In the amplification period QA after the end of the period PC described above, the capacitor C1 is connected to the positive output terminal TB1, and the capacitor C2 is connected to the negative output terminal TB2. Therefore, a decrease in voltage of the capacitors C1 and C2 due to charge cancellation immediately after the start of the amplification period QA is suppressed, and an appropriate amplification operation by the amplifier circuit 18 can be realized.

  The period PC is set to a length of time such that the charges accumulated in the capacitors CS1 and CS2 before the start of the period PC are sufficiently reduced. Specifically, the period PC is set to a time length according to a time constant depending on the output impedance of the operational amplifier 34 and the capacitance value of the capacitor CS1 or the capacitor CS2. The period PC of the first embodiment is set to a longer time length than each of the period PA and the period PB.

Second Embodiment
A second embodiment of the present invention will be described. In the following exemplary embodiments, elements having the same functions and functions as those of the first embodiment are diverted using the same reference numerals used in the description of the first embodiment, and detailed descriptions thereof are appropriately omitted.

  FIG. 8 is a configuration diagram of the amplifier circuit 18 of the detection device 100 according to the second embodiment. As illustrated in FIG. 8, the amplifier circuit 18 of the second embodiment has the same elements (modulation circuit 32, operational amplifier 34, demodulation circuit 36, capacitor C1, capacitor C2) as the amplifier circuit 18 of the first embodiment. The first circuit 42 and the second circuit 44 are added. The first circuit 42 is disposed between the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34, and the second circuit 44 is disposed between the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34. Placed in. The first circuit 42 includes a switch ZA that is interposed between the negative input terminal TA1 and the positive input terminal TA2 and controls electrical connection (conduction / insulation) between the two. Similarly, the second circuit 44 includes a switch ZB that is interposed between the positive output terminal TB1 and the negative output terminal TB2 and controls electrical connection therebetween. Further, the control circuit 16 of the second embodiment generates a control signal φe for controlling the first circuit 42 and the second circuit 44. In the following description, the case where the switch ZA and the switch ZB are configured by P-channel transistors is illustrated for convenience, but the conductivity types of the transistors configuring the switch ZA and the switch ZB are arbitrary.

  FIG. 9 is a schematic diagram of each control signal φ (φa to φe) supplied to the amplifier circuit 18 by the control circuit 16 of the second embodiment. The operation in the amplification period QA and the amplification period QB and the operation in the period PA and the period PC in the preparation period P are the same as those in the first embodiment. Therefore, the same effects as those of the first embodiment are realized in the second embodiment.

  As illustrated in FIG. 9, the control is performed within the period PB in which the first input terminal NA1, the second input terminal NA2, the first output terminal NB1, and the second output terminal NB2 are insulated from the operational amplifier 34 in the preparation period P. The signal φe is set to a low level. Specifically, the control signal φe is set to a low level during a part of the period PB of the period PB, and is maintained at a high level during periods other than the period G. The start point of the period G is located behind the start point of the period PB, and the end point of the period G is located in front of the end point of the period PB.

  When the control signal φe is set to a low level in the period G, the switch ZA of the first circuit 42 and the switch ZB of the second circuit 44 are turned on. Accordingly, the negative side input terminal TA1 and the positive side input terminal TA2 of the operational amplifier 34 are electrically connected via the switch ZA of the first circuit 42, and the positive side output terminal TB1 and the negative side output terminal TB2 are connected to the second side. The circuit 44 is electrically connected via a switch ZB. Therefore, in the period G, the charges remaining at the negative input terminal TA1 and the positive input terminal TA2 are canceled out, and the charges remaining at the positive output terminal TB1 and the negative output terminal TB2 are canceled out. That is, the potential difference between the input ends of the operational amplifier 34 and the potential difference between the output ends are reduced (ideally eliminated).

  In the amplification period QA illustrated in part (A) of FIG. 6, negative charge may remain at the negative input terminal TA1 of the operational amplifier 34 and positive charge may remain at the positive input terminal TA2. Therefore, in the configuration in which the period G is omitted, the first input terminal NA1 is connected to the positive input terminal TA2 and the second input terminal NA2 is connected to the negative input terminal at the start point of the period PC (part (D) in FIG. 6). When connected to TA1, the negative charge supplied to the first input terminal NA1 and the positive charge remaining at the positive input terminal TA2 cancel each other, and the positive charge supplied to the second input terminal NA2 and the negative input terminal The negative charge remaining on TA1 can be offset. A similar problem may occur for the charge remaining on the input side of the operational amplifier 34 during the amplification period QB. In the second embodiment, since the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34 are electrically connected in the period G within the period PB, the remaining charges are canceled out. In PC, the charge supplied to the first input end NA1 and the second input end NA2 is suppressed. Therefore, an appropriate amplification operation by the amplifier circuit 18 can be realized.

  The same applies to the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34. The charge remaining on the positive output terminal TB1 (capacitor CS1) of the operational amplifier 34 and the negative output terminal TB2 (in the amplification period QA) Since the charge remaining in the capacitor CS2) is canceled out in the period G, an appropriate amplification operation by the amplifier circuit 18 can be realized. As described above, since the charge at the positive output terminal TB1 and the charge at the negative output terminal TB2 are canceled in the period G, the time length necessary for the period PC is shortened compared to the first embodiment. obtain. For example, the period PC is set to a time length equivalent to the period PA.

  In the second embodiment, since the potential difference between the input terminals of the operational amplifier 34 and the potential difference between the output terminals of the operational amplifier 34 are initialized before the start of each of the amplification period QA and the amplification period QB, amplification is performed. There is also an advantage that the operational amplifier 34 can be stably operated without being affected by the state before the operation is started.

<Third Embodiment>
FIG. 10 is a configuration diagram of the amplifier circuit 18 of the detection device 100 in the third embodiment. As illustrated in FIG. 10, the amplifier circuit 18 of the third embodiment has the same elements (modulation circuit 32, operational amplifier 34, demodulator circuit 36, capacitor C1, capacitor C2) as the amplifier circuit 18 of the first embodiment. In this configuration, a switch 46 and a switch 48 are added. The switch 46 is disposed between both electrodes of the capacitor C1 (between the first input terminal NA1 and the first output terminal NB1), and the switch 48 is disposed between both electrodes of the capacitor C2 (second input terminal NA2 and second output terminal NB2). Between).

  The control circuit 16 of the third embodiment controls the switch 46 and the switch 48 by supplying a control signal σ for controlling the initialization switch 14. That is, the switch 46 and the switch 48 of the third embodiment are turned on together with the initialization switch 14 in the initialization period QRST before the start of the amplification operation, and are kept off during the execution of the amplification operation. Accordingly, the voltages of the capacitors C1 and C2 are initialized to zero in the initialization period QRST before the start of the amplification operation.

  In the third embodiment, the same effect as in the first embodiment is realized. In the third embodiment, since the voltages of the capacitors C1 and C2 are initialized before the amplification operation is started, the influence of the charges remaining in the capacitors C1 and C2 is reduced at the time of starting the amplification operation. There is an advantage that the amplification operation can be executed. In the third embodiment, since the common control signal σ is used for the control of the initialization switch 14 and the control of the switch 46 and the switch 48, the control circuit is compared with a configuration using mutually separate signals. There is also an advantage that the configuration and operation of 16 are simplified. However, the initialization switch 14, the switch 46, and the switch 48 can be individually controlled. It should be noted that the first circuit 42 and the second circuit 44 of the second embodiment can be adopted in the third embodiment.

<Modification>
Each form illustrated above can be variously modified. Specific modifications are exemplified below. Two or more aspects arbitrarily selected from the following examples can be appropriately combined as long as they do not contradict each other.

(1) In the first embodiment, the configuration in which the second detection end D2 of the pyroelectric element 12 is connected to the power source 22 in the initialization period QRST is exemplified. Since a virtual short circuit is established between the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34, for example, if the switch Xa1 and the switch Xa2 of the modulation circuit 32 are maintained in the ON state during the initialization period QRST. The first detection end D1 of the pyroelectric element 12 is also initialized to a voltage (initialization voltage VRST) equivalent to the second detection end D2. However, from the viewpoint of reliably initializing both the first detection end D1 and the second detection end D2 of the pyroelectric element 12 to a predetermined voltage, the second detection end D2 and the power source 22 are exemplified as shown in FIG. In addition to the initialization switch 14 between the first detection terminal D1 and the power source 22, the initialization switch 15 is preferably installed. The initialization switch 14 and the initialization switch 15 operate according to a common control signal σ supplied from the control circuit 16. Specifically, the initialization switch 14 and the initialization switch 15 are controlled to be in the on state during the initialization period QRST, and remain in the off state during the execution of the amplification operation. As understood from the above description, a switch (for example, the initialization switch 14 or the initialization switch) that controls electrical connection between at least one of the first detection end D1 and the second detection end D2 of the pyroelectric element 12 and the power source 22. A configuration in which the switch 15) is arranged is preferable.

(2) The specific contents of the amplification operation by the amplifier circuit 18 can be changed as appropriate. For example, a configuration in which the period PA of the preparation period P is omitted (a configuration in which the period PB is started immediately after the amplification period QA or the amplification period QB) may be employed. In the second embodiment, the period PC of the preparation period P can be omitted (the amplification period QA or the amplification period QB is started immediately after the period PB).

(3) The configuration of the first circuit 42 and the second circuit 44 in the second embodiment is not limited to the illustration (switch ZA, switch ZB) of FIG. For example, as illustrated in FIG. 12, the first circuit 42 includes a switch ZA and a resistor RA connected in series between the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34. A configuration in which the second circuit 44 includes a switch ZB and a resistor RB connected in series between the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34 may be employed. As understood from the above description, the first circuit 42 is comprehensively expressed as a means for reducing the potential difference between the negative input terminal TA1 and the positive input terminal TA2 of the operational amplifier 34, and the negative input terminal TA1 The configuration is not essential until the positive input terminal TA2 is set to the same potential. Similarly, the second circuit 44 is comprehensively expressed as means for reducing the potential difference between the positive output terminal TB1 and the negative output terminal TB2 of the operational amplifier 34, and the positive output terminal TB1 and the negative output terminal TB2 Is not essential until the voltage is set to the same potential. One of the first circuit 42 and the second circuit 44 can be omitted.

<Electronic equipment>
The detection apparatus 100 according to each of the above embodiments is used for various electronic devices. For example, it is possible to use the detection device 100 of each of the above-described forms as a human sensor that senses the presence of a person using infrared rays. In any electronic device such as a display device (TV, monitor, electronic paper, car navigation device), imaging device (video camera or still camera), information terminal (mobile phone, smartphone, game machine), for example, whether or not there is a user It is possible to use the detection device 100 of each of the above-described forms for the determination.

DESCRIPTION OF SYMBOLS 100 ... Detection apparatus, 12 ... Pyroelectric element, 14, 15 ... Initialization switch, 16 ... Control circuit, 18 ... Amplification circuit, 20 ... Filter, 22 ... Power supply, 32 ... Modulation circuit, 34... Operational amplifier 36... Demodulator circuit 42... First circuit 44... Second circuit D1... First detection end D2 ... second detection end NA1. NA2 ... Second input end, TA1 ... Negative input end, TA2 ... Positive input end, TB1 ... Positive output end, TB2 ... Negative output end, NB1 ... First output end, NB2 ... ... second output terminal, Xa1, Xa2, Xb1, Xb2, Yc1, Yc2, Yd1, Yd2 ... switch, C1, C2 ... capacitance.

Claims (7)

A chopper type amplifier circuit that outputs an amplified signal to a first output terminal and a second output terminal according to a voltage generated between a first input terminal and a second input terminal by a capacitive element;
A fully differential operational amplifier including a first amplification input terminal, a second amplification input terminal, a first amplification output terminal, and a second amplification output terminal;
A modulation circuit that switches electrical connection between the first input terminal and the second input terminal, and the first amplification input terminal and the second amplification input terminal;
A demodulation circuit for switching electrical connection between the first amplification output terminal and the second amplification output terminal and the first output terminal and the second output terminal;
A first circuit between the first amplification input terminal and the second amplification input terminal;
In the first amplification period, the modulation circuit connects the first input terminal and the first amplification input terminal and connects the second input terminal and the second amplification input terminal, and the demodulation circuit includes: Connecting the first output terminal and the first amplification output terminal and connecting the second output terminal and the second amplification output terminal;
In a second amplification period after the first amplification period, the modulation circuit connects the first input terminal and the second amplification input terminal, and connects the second input terminal and the first amplification input terminal. The demodulating circuit connects the first output terminal and the second amplification output terminal and connects the second output terminal and the first amplification output terminal;
In the release period in which the modulation circuit electrically isolates the first input terminal and the second input terminal from the operational amplifier between the first amplification period and the second amplification period, the first circuit includes: An amplifier circuit for reducing a potential difference between the first amplification input terminal and the second amplification input terminal. 2. The amplifier circuit according to claim 1, wherein the first circuit includes a switch that is disposed between the first amplification input terminal and the second amplification input terminal and is turned on during a part of the release period. A second circuit between the first amplification output terminal and the second amplification output terminal;
In the release period, the demodulating circuit electrically isolates the first output end and the second output end from the operational amplifier, and the second circuit includes the first amplification output end and the second amplification end. The amplifier circuit according to claim 1, wherein a potential difference with the output terminal is reduced. 4. The amplifier circuit according to claim 3, wherein the second circuit includes a switch that is disposed between the first amplification output terminal and the second amplification output terminal and is turned on during a part of the release period. A pyroelectric element that generates charge by the pyroelectric effect;
A detection apparatus comprising: the amplification circuit according to any one of claims 1 to 4 that generates an amplification signal corresponding to a charge generated in the pyroelectric element. The detection device according to claim 5, further comprising: a filter that suppresses a frequency band including a frequency of chopping by the amplifier circuit in the amplified signal generated by the amplifier circuit. An electronic apparatus comprising the detection device according to claim 5.

Images