JP2016051892A - Semiconductor substrate, solar battery, method for manufacturing solar battery, and manufacturing device therefor - Google Patents

Semiconductor substrate, solar battery, method for manufacturing solar battery, and manufacturing device therefor Download PDF

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JP2016051892A
JP2016051892A JP2015033506A JP2015033506A JP2016051892A JP 2016051892 A JP2016051892 A JP 2016051892A JP 2015033506 A JP2015033506 A JP 2015033506A JP 2015033506 A JP2015033506 A JP 2015033506A JP 2016051892 A JP2016051892 A JP 2016051892A
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小林 光
Hikaru Kobayashi
光 小林
健太郎 今村
kentaro Imamura
健太郎 今村
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Abstract

PROBLEM TO BE SOLVED: To materialize a semiconductor device such as a high-performance solar battery, which has a good surface passivation function.SOLUTION: A semiconductor substrate is arranged by the steps of: chemically processing a single crystal silicon substrate in nitric acid of a concentration of 70 wt% to form an oxide film, mainly consisting of a silicon dioxide and formed by chemical process, on a surface of the semiconductor; then, performing, by heating, an annealing treatment on the substrate in dry oxygen of 100 vol.% oxygen in a heating furnace at 925°C; and further, performing, on the substrate, an annealing treatment at 450°C in 100 vol.% hydrogen. In the single crystal silicon substrate, the lifetime of minority carriers is about 5 μs(1/e), which is a measured value immediately after formation of the oxide film. The lifetime of minority carriers is largely increased to a level of about 11100 μs(1/e) by the annealing treatments. The substrate surface passivation processing with a SiOfilm formed by a heat treatment in a predetermined oxygen/hydrogen according to a nitric acid oxidation method (NAOS) also exhibits a satisfying surface passivation function on a substrate for a solar battery.SELECTED DRAWING: Figure 1

Description

本発明は、太陽電池において、半導体面に化学的処理で絶縁膜を形成、及び表面安定化膜を形成して、酸素中、水素中で加熱アニール処理して、下地の半導体面と絶縁膜との界面での物性(パッシベーション機能)を向上し得る半導体基板、太陽電池、太陽電池の製造方法及びその製造装置に関する。 In the solar cell, an insulating film is formed on a semiconductor surface by chemical treatment, a surface stabilization film is formed, and heat annealing is performed in oxygen and hydrogen to form a base semiconductor surface and an insulating film. The present invention relates to a semiconductor substrate, a solar cell, a method for manufacturing a solar cell, and a manufacturing apparatus thereof that can improve physical properties (passivation function) at the interface.

本発明者は、シリコンなどの半導体基板の表面に、濃硝酸に浸漬して二酸化シリコン膜(化学酸化膜)を形成すること(特許文献1)、とりわけ、共沸濃度の濃硝酸等の酸化性薬液を用いて薄い酸化膜を形成すること(特許文献2)等を提案している。 The present inventor forms a silicon dioxide film (chemical oxide film) by immersing in concentrated nitric acid on the surface of a semiconductor substrate such as silicon (Patent Document 1), and in particular, oxidizing properties such as concentrated nitric acid having an azeotropic concentration. It has been proposed to form a thin oxide film using a chemical solution (Patent Document 2).

特開2002−64093号公報JP 2002-64093 A 特開2005−311302号公報Japanese Patent Laid-Open No. 2005-313102

近年、高集積化半導体装置や太陽電池等の光電変換装置の分野で、シリコン表面に厚さがサブナノメートル(0.1nmオーダー)から数ナノメートル(1nmオーダー)レベルの極薄の絶縁膜を形成すること、また半導体表面のパッシベーション機能を高めて、少数キャリアライフタイムや潜在的開放端電圧[Implied Voc]を高精度で制御・向上することが求められる。 In recent years, in the field of highly integrated semiconductor devices and photovoltaic devices such as solar cells, ultra-thin insulating films with sub-nanometer (0.1 nm order) to several nanometer (1 nm order) levels have been formed on the silicon surface. In addition, it is required to improve the passivation function of the semiconductor surface and control and improve the minority carrier lifetime and the potential open-ended voltage [Implied Voc] with high accuracy.

本発明の目的は、半導体面に化学的処理で絶縁膜の二酸化シリコン膜を形成して、その二酸化シリコン膜を酸素中加熱処理及び/又は水素中加熱処理により、半導体表面のパッシベーション機能を高めた半導体基板、太陽電池、太陽電池の製造方法及びその製造装置を実現することにある。 An object of the present invention is to form a silicon dioxide film as an insulating film on a semiconductor surface by chemical treatment, and to improve the passivation function of the semiconductor surface by heat treatment in oxygen and / or heat treatment in hydrogen. A semiconductor substrate, a solar cell, a method for manufacturing a solar cell, and an apparatus for manufacturing the same are provided.

本発明は、半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、少なくとも酸素中600℃以上で加熱処理及び/又は水素中400〜500℃で処理を施す工程を備えたものである。 The present invention is a process in which an oxide film is formed on the surface of a semiconductor by chemical treatment in an oxidizing chemical solution, and then heat treatment is performed at least at 600 ° C. in oxygen and / or treatment at 400 to 500 ° C. in hydrogen. It is equipped with.

本発明は、シリコン基板を酸化性薬液中での化学的処理により前記シリコン基板の表面に二酸化シリコン主体の酸化膜を形成後、酸素中600℃以上で加熱処理し、さらに水素中400〜500℃でのアニール処理を施したシリコン基板を提供することにある。 The present invention forms a silicon dioxide-based oxide film on the surface of a silicon substrate by chemical treatment in an oxidizing chemical solution, heat-treats the substrate at 600 ° C. or higher in oxygen, and further heats at 400 to 500 ° C. in hydrogen. An object of the present invention is to provide a silicon substrate that has been subjected to the annealing process.

本発明は、半導体を硝酸濃度70wt%の硝酸薬液中、室温〜約120℃で化学的に処理して、前記半導体の表面に二酸化シリコン主体の酸化膜を形成後、ドライ酸素中600℃以上で加熱処理すること及び/又は水素中400〜500℃でのアニール処理を施した半導体装置を提供することにある。 In the present invention, a semiconductor is chemically treated in a nitric acid chemical solution having a nitric acid concentration of 70 wt% at room temperature to about 120 ° C. to form an oxide film mainly composed of silicon dioxide on the surface of the semiconductor, and then at 600 ° C. or higher in dry oxygen. An object of the present invention is to provide a semiconductor device subjected to heat treatment and / or subjected to annealing treatment in hydrogen at 400 to 500 ° C.

本発明は、半導体を硝酸濃度40〜99.5%の高濃度硝酸薬液中、室温〜約120℃で化学的に処理して、前記半導体の表面に二酸化シリコン(SiO)主体の酸化膜を形成後、100vol%ドライ酸素中600℃〜1000℃の加熱処理し、さらに100vol%水素中400〜500℃でアニール処理を施す過程をそなえた半導体基板、太陽電池、太陽電池の製造方法及びその製造装置を提供することにある。 In the present invention, a semiconductor is chemically treated in a high concentration nitric acid chemical solution having a nitric acid concentration of 40 to 99.5% at room temperature to about 120 ° C., and an oxide film mainly composed of silicon dioxide (SiO 2 ) is formed on the surface of the semiconductor. A semiconductor substrate, a solar cell, a method for manufacturing a solar cell, and a method for manufacturing the semiconductor substrate, which are subjected to heat treatment at 600 ° C. to 1000 ° C. in 100 vol% dry oxygen after the formation and further annealed at 400 to 500 ° C. in 100 vol% hydrogen. To provide an apparatus.

本発明によると、半導体を酸化性薬液中での化学的処理により前記半導体の表面に二酸化シリコン(SiO)主体の酸化膜を形成後、ドライ酸素中600℃以上で加熱アニール処理すること及び/又は水素中400〜500℃でのアニール処理することにより、例えば、シリコン基板表面の(1/e)少数キャリアライフタイム(測定値)は数千μs(マイクロ秒)以上となり、ドライ酸素中600℃以上での加熱アニール処理及び/又は水素中400〜500℃でのアニール処理をしなかった,上記酸化膜の形成直後の少数キャリアライフタイム(測定値)が約5μsであるのに比べて、大幅な少数キャリアライフタイムの向上現象が見られるなど、実験の結果、半導体表面のパッシベーション機能を高めた太陽電池等の半導体装置の実現が可能でとなった。 According to the present invention, after forming an oxide film mainly composed of silicon dioxide (SiO 2 ) on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, the semiconductor is heat-annealed at 600 ° C. or higher in dry oxygen and / or Alternatively, by annealing at 400 to 500 ° C. in hydrogen, for example, the (1 / e) minority carrier lifetime (measured value) of the silicon substrate surface becomes several thousand μs (microseconds) or more, and 600 ° C. in dry oxygen. The minority carrier lifetime (measured value) immediately after the formation of the oxide film, which was not subjected to the above-described heat annealing treatment and / or annealing treatment in hydrogen at 400 to 500 ° C., is significantly larger than that of about 5 μs. As a result of experiments, such as the phenomenon of significant minority carrier lifetime improvement being observed, the performance of semiconductor devices such as solar cells with enhanced semiconductor surface passivation functions has been demonstrated. It became possible.

本発明によると、半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、100vol%ドライ酸素中600℃以上で加熱アニール処理及び/又は水素中400〜500℃でのアニール処理することにより、半導体表面のパッシベーション機能の高い太陽電池等の半導体装置の製造装置を実現することができる。 According to the present invention, after an oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, a heat annealing treatment is performed at 600 ° C. or higher in 100 vol% dry oxygen and / or 400 to 500 ° C. in hydrogen. By performing this annealing process, it is possible to realize a semiconductor device manufacturing apparatus such as a solar cell having a high semiconductor surface passivation function.

また、本発明によると、 半導体を硝酸濃度40〜99.5%の高濃度硝酸薬液中で化学的に処理して、前記半導体の表面に二酸化シリコン主体の酸化膜を形成後、100vol%ドライ酸素中600℃以上で加熱アニール処理し、さらに100vol%水素中400〜500℃での水素アニール処理を施す過程をそなえたことにより、大幅な少数キャリアライフタイムの増大があり、特性の高い半導体装置や太陽電池の実現に寄与することができる。 Further, according to the present invention, a semiconductor is chemically treated in a high concentration nitric acid chemical solution having a nitric acid concentration of 40 to 99.5% to form an oxide film mainly composed of silicon dioxide on the surface of the semiconductor, and then 100 vol% dry oxygen. By providing a heat annealing treatment at a temperature of 600 ° C. or higher and a hydrogen annealing treatment at a temperature of 400 to 500 ° C. in a 100 vol% hydrogen, there is a significant increase in minority carrier lifetime, It can contribute to realization of a solar cell.

本発明実施例1の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic view of 1 / e minority carrier lifetime measured value of Example 1 of this invention. 本発明実施例1の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic diagram of 1 / e 2 minority carrier lifetime measurements of the present invention Example 1. 本発明実施例の二酸化シリコン(SiO)の酸化膜厚の特性図である。It is a characteristic view of the oxide film thickness of the silicon dioxide (SiO 2) of the present invention embodiment. 本発明実施例2の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic view of 1 / e minority carrier lifetime measurement value of Example 2 of this invention. 本発明実施例2の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic diagram of 1 / e 2 minority carrier lifetime measurements of the present invention Example 2. 本発明実施例3の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic view of 1 / e minority carrier lifetime measured value of Example 3 of this invention. 本発明実施例3の1/e少数キャリアライフタイム測定値の特性図である。It is a characteristic diagram of 1 / e 2 minority carrier lifetime measurements of the present invention Example 3. 本発明実施例4のn+/p―Si/n+基板の少数キャリアライフタイム測定値の特性図である。It is a characteristic view of the minority carrier lifetime measured value of the n + / p-Si / n + substrate of Example 4 of the present invention. 本発明実施例4のn+/p―Si/n+基板での潜在的開放端電圧(Implied Voc)の測定値の特性図である。It is a characteristic view of the measured value of the potential open end voltage (Implied Voc) in the n + / p-Si / n + board | substrate of Example 4 of this invention. 本発明実施例5でのn+/p―Si/n+基板での少数キャリアライフタイムの測定図である。It is a measurement figure of the minority carrier lifetime in the n + / p-Si / n + board | substrate in this invention Example 5. FIG. 本発明実施例5のn+/p―Si/n+基板での潜在的開放端電圧(Implied Voc)の測定値の特性図である。It is a characteristic view of the measured value of the potential open end voltage (Implied Voc) in the n + / p-Si / n + board | substrate of this invention Example 5. FIG. 本発明実施例6のp+/n―Si/p+基板での少数キャリアライフタイムの測定値の特性図である。It is a characteristic view of the measured value of the minority carrier lifetime in the p <+> / n-Si / p + board | substrate of this invention Example 6. FIG. 本発明実施例6のp+/n―Si/p+基板での潜在的開放端電圧(Implied Voc)の測定値の特性図である。It is a characteristic view of the measured value of the potential open end voltage (Implied Voc) in the p <+> / n-Si / p + board | substrate of Example 6 of this invention. 本発明実施例6のn+/n―Si/n+基板での少数キャリアライフタイムの測定値の特性図である。It is a characteristic view of the measured value of the minority carrier lifetime in the n <+> / n-Si / n + board | substrate of Example 6 of this invention. 本発明実施例6のn+/n―Si/n+基板の潜在的開放端電圧(Implied Voc)の測定値の特性図である。It is a characteristic view of the measured value of the potential open end voltage (Implied Voc) of the n <+> / n-Si / n + board | substrate of Example 6 of this invention.

つぎに、本発明の実施の形態である実施例として、以下詳細に述べる。 Next, an example which is an embodiment of the present invention will be described in detail below.

本発明の実施の形態である第1の実施例では、基板に(100)面,抵抗率:8−12Ω・cm,厚さ725μmのn型単結晶シリコン基板をサイズ;50mm×50mmに切断して用いて、初めにRCA洗浄を石英ビーカー中300ccの溶液内で、温度70℃、10分間で行い、流水で2分間水洗して、窒素(N2)ブローで乾燥した。 In a first example which is an embodiment of the present invention, an n-type single crystal silicon substrate having a (100) plane, resistivity: 8-12 Ω · cm, and thickness of 725 μm is cut into a size of 50 mm × 50 mm. First, RCA cleaning was performed in a 300 cc solution in a quartz beaker at a temperature of 70 ° C. for 10 minutes, washed with running water for 2 minutes, and dried with nitrogen (N 2) blow.

次いで、フッ素系樹脂ビーカー内で、濃度0.5wt%,300ccのフッ酸溶液で2分間の洗浄を行い、室温で2分間の水洗後、窒素(N2)ブローで乾燥処理した。 Next, in a fluororesin beaker, washing was performed with a hydrofluoric acid solution having a concentration of 0.5 wt% and 300 cc for 2 minutes, followed by washing with water at room temperature for 2 minutes and then drying with nitrogen (N2) blow.

続いて、フッ素系樹脂ビーカー内で、濃度70wt%の硝酸溶液中、70℃,10分間の溶液処理を施し、シリコン表面に化学的酸化法により二酸化シリコン(SiO)膜を形成した。二酸化シリコン(SiO)膜の厚さはXPS測定で1〜1.3nmであった。 Subsequently, a solution treatment at 70 ° C. for 10 minutes in a 70 wt% nitric acid solution was performed in a fluorine-based resin beaker to form a silicon dioxide (SiO 2 ) film on the silicon surface by a chemical oxidation method. The thickness of the silicon dioxide (SiO 2 ) film was 1 to 1.3 nm as measured by XPS.

この段階で、二酸化シリコン(SiO)膜形成直後の(1/e)少数キャリアライフタイムを,測定装置(μーPCD);コベルコ科研製/LTA・1510(品番)を用いて,測定したところ、約5μsであった。 At this stage, the (1 / e) minority carrier lifetime immediately after the formation of the silicon dioxide (SiO 2 ) film was measured using a measuring device (μ-PCD); Kobelco Research Institute / LTA.1510 (part number). , About 5 μs.

次に、上述の化学的酸化法により二酸化シリコン(SiO)膜を形成の後に、熱酸化炉内の100vol%の酸素からなるドライ雰囲気中、温度700℃、800℃、850℃、900℃、925℃及び1000℃の各温度に選定して、それぞれ10分間の熱酸化アニール処理と、引続いて100vol%の水素雰囲気中の450℃で、それぞれ30分間の水素アニール処理とを行った。 Next, after forming a silicon dioxide (SiO 2 ) film by the above-described chemical oxidation method, the temperature is 700 ° C., 800 ° C., 850 ° C., 900 ° C. in a dry atmosphere composed of 100 vol% oxygen in a thermal oxidation furnace. Each temperature was selected as 925 ° C. and 1000 ° C., and each was subjected to a thermal oxidation annealing treatment for 10 minutes, followed by a hydrogen annealing treatment for 30 minutes at 450 ° C. in a 100 vol% hydrogen atmosphere.

上記の100wt%酸素からなるドライ雰囲気中、温度700℃〜1000℃の熱酸化アニール処理と引続き100vol%の水素雰囲気中の450℃での水素アニール処理とを行ったものについて、化学的酸化法により形成の二酸化シリコン(SiO)膜の有/無(いわゆる,NAOSあり/NAOSなし)の場合の、それぞれの少数キャリアライフタイム測定結果を、図1に1/e少数キャリアライフタイムの測定値で、図2に1/e少数キャリアライフタイムの測定値で比較して示す。 In a dry atmosphere composed of 100 wt% oxygen, a thermal oxidation annealing process at a temperature of 700 ° C. to 1000 ° C. and a hydrogen annealing process at 450 ° C. in a 100 vol% hydrogen atmosphere were performed by a chemical oxidation method. Each minority carrier lifetime measurement result when the formed silicon dioxide (SiO 2 ) film is present / not present (so-called, with NAOS / without NAOS) is shown in FIG. 1 as a measurement value of 1 / e minority carrier lifetime. FIG. 2 shows a comparison of measured values of 1 / e 2 minority carrier lifetime.

図1および図2に明らかなように、例えば、化学的酸化法により形成の二酸化シリコン(SiO)膜の有(いわゆる,NAOSあり)で、ドライ酸素中925℃の加熱アニール処理後、100vol%水素中450℃の水素アニール処理した場合の,1/e少数キャリアライフタイム(図1)、1/e少数キャリアライフタイム(図2)は、(1/e)値で最大11.1ms(ミリ秒)及び(1/e)値で同16.0msまで大幅に増加した。 As is apparent from FIGS. 1 and 2, for example, with a silicon dioxide (SiO 2 ) film formed by a chemical oxidation method (so-called NAOS is present), after heat annealing at 925 ° C. in dry oxygen, 100 vol% in the case of hydrogen annealing process 450 ° C. in hydrogen, 1 / e minority carrier lifetime (Figure 1), 1 / e 2 minority carrier lifetime (Figure 2) is, (1 / e) value at maximum 11.1Ms ( (Millisecond) and (1 / e 2 ) values increased significantly to 16.0 ms.

水素アニール処理による上述の少数キャリアライフタイムの増加は、シリコン基板において、ダングリングボンドの水素終端化により界面準位密度の低減が促進されることに起因すると考えられる。 The increase in the minority carrier lifetime described above due to the hydrogen annealing treatment is considered to be caused by the reduction in interface state density promoted by hydrogen termination of dangling bonds in the silicon substrate.

図3は、加熱炉内の100vol%の酸素からなるドライ雰囲気中、温度700℃〜1000℃の範囲で選択して、10分間の熱酸化アニール処理での二酸化シリコン(SiO)膜の厚さをエリプソメトリ測定により求めた結果を示し、横軸に処理温度700℃、800℃、850℃、900℃、925℃、950℃、1000℃のプロットで、縦軸に二酸化シリコン(SiO)膜の厚さを表わした。 FIG. 3 shows the thickness of a silicon dioxide (SiO 2 ) film in a 10-minute thermal oxidation annealing process selected in a temperature range of 700 ° C. to 1000 ° C. in a dry atmosphere consisting of 100 vol% oxygen in a heating furnace. Shows the results obtained by ellipsometry measurement, the horizontal axis is a plot of processing temperatures of 700 ° C., 800 ° C., 850 ° C., 900 ° C., 925 ° C., 950 ° C. and 1000 ° C., and the vertical axis is a silicon dioxide (SiO 2 ) film. The thickness of was expressed.

なお、図3において、当初に化学的酸化法(いわゆる,NAOS処理)により形成の二酸化シリコン(SiO)膜の有る場合(図中のNAOSあり;実線表示)、また、それが無い場合(図中のNAOSなし;点線表示)のいずれにおいても、熱酸化アニール処理により、各シリコン基板表面の二酸化シリコン(SiO)膜は成長しているが、少数キャリアライフタイムは、図1および図2では数値を表していないが、いずれも約5〜50μs程度の範囲であり、少数キャリアライフタイムの変動にはほとんど影響が見られなかった。 In FIG. 3, when a silicon dioxide (SiO 2 ) film initially formed by a chemical oxidation method (so-called NAOS treatment) is present (with NAOS in the figure; indicated by a solid line), and when there is not (FIG. 3) In any of the cases without NAOS in the middle; indicated by a dotted line), the silicon dioxide (SiO 2 ) film on the surface of each silicon substrate is grown by thermal oxidation annealing, but the minority carrier lifetime is as shown in FIGS. Although no numerical values are shown, all of them are in the range of about 5 to 50 μs, and there was almost no effect on the fluctuation of the minority carrier lifetime.

また、本発明の実施の形態である第2の実施例では、サンプル基板にn型単結晶シリコン基板(100)面の表面にテキスチャー構造凹凸(111)面を形成した,抵抗率:1.7Ωcm,厚さ130μm、サンプルサイズ;5cm×5cmの基板を用いて、実施例1及び実施例2と同様に、初めにRCA洗浄、次いで、濃度0.5wt%のフッ酸溶液で2分間の表面洗浄を行い、続いて、濃度70wt%の硝酸溶液中、70℃,10分間の処理で、シリコン基板の表面に化学的酸化法(いわゆる,NAOS処理)による二酸化シリコン(SiO)膜を形成した。この段階で、二酸化シリコン(SiO)膜の厚さは1〜1.3nmであった。 In the second example, which is an embodiment of the present invention, the texture structure unevenness (111) surface is formed on the surface of the n-type single crystal silicon substrate (100) surface on the sample substrate, and the resistivity is 1.7 Ωcm. , 130 μm thick, sample size; using a 5 cm × 5 cm substrate, as in Example 1 and Example 2, first RCA cleaning, then surface cleaning with 0.5 wt% hydrofluoric acid solution for 2 minutes Subsequently, a silicon dioxide (SiO 2 ) film by a chemical oxidation method (so-called NAOS treatment) was formed on the surface of the silicon substrate by treatment at 70 ° C. for 10 minutes in a nitric acid solution having a concentration of 70 wt%. At this stage, the thickness of the silicon dioxide (SiO 2 ) film was 1-1.3 nm.

次に、上述のn型単結晶シリコン基板において、化学的酸化法による二酸化シリコン(SiO)膜を形成後に、熱酸化炉を使用して、100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なって、少数キャリアライフタイムの測定を実施したところ、化学的酸化法により形成の二酸化シリコン(SiO)膜の有/無(いわゆる,NAOSあり/NAOSなし)の場合について、それぞれの少数キャリアライフタイムの測定結果を、図4に1/e少数キャリアライフタイムの測定値で、図5に1/e少数キャリアライフタイムの測定値でそれぞれ比較して示す。少数キャリアライフタイムの測定装置(μーPCD)はコベルコ科研製/LTA・1510(品番)を用いた。 Next, in the above-described n-type single crystal silicon substrate, after forming a silicon dioxide (SiO 2 ) film by a chemical oxidation method, using a thermal oxidation furnace, 925 ° C. in dry oxygen composed of 100 vol% oxygen, After performing thermal oxidation annealing treatment for 10 minutes, hydrogen annealing treatment was performed at 450 ° C. for 30 minutes in 100 vol% hydrogen, and minority carrier lifetime was measured. Silicon dioxide formed by a chemical oxidation method For the presence / absence of the (SiO 2 ) film (so-called, with / without NAOS), the measurement results of the minority carrier lifetimes are shown in FIG. And 1 / e 2 minority carrier lifetime values are compared and shown. As a minority carrier lifetime measuring apparatus (μ-PCD), Kobelco Research Institute / LTA.1510 (product number) was used.

図4及び図5に観られるように、100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なった結果、化学的酸化法により形成の二酸化シリコン(SiO)膜の有/無(図中のNAOSあり/NAOSなし)の場合も、少数キャリアライフタイムは大幅に増加した。 As shown in FIGS. 4 and 5, after performing thermal oxidation annealing treatment at 925 ° C. for 10 minutes in dry oxygen composed of 100 vol% oxygen, hydrogen annealing treatment at 450 ° C. for 30 minutes in 100 vol% hydrogen. As a result, the minority carrier lifetime was significantly increased even in the presence / absence of the silicon dioxide (SiO 2 ) film formed by the chemical oxidation method (with / without NAOS in the figure).

水素アニール処理による上述の少数キャリアライフタイムの増加は、シリコン基板において、ダングリングボンドの水素終端化により界面準位密度の低減が促進されることに起因すると考えられる。 The increase in the minority carrier lifetime described above due to the hydrogen annealing treatment is considered to be caused by the reduction in interface state density promoted by hydrogen termination of dangling bonds in the silicon substrate.

さらに、本発明の実施の形態である第3の実施例では、サンプル基板に、実施例2と同様の、n型太陽電池単結晶シリコン基板(100)面の表面にテキスチャー構造を形成した、抵抗率:1.7Ωcm,厚さ130μm、サンプルサイズ;5cm×5cmの基板を用いて、実施例1及び実施例2の各例と同様に、初めにRCA洗浄、次いで、濃度0.5wt%のフッ酸溶液で2分間の表面洗浄を行った。 Furthermore, in the third example, which is an embodiment of the present invention, a resistance in which a texture structure is formed on the surface of the n-type solar cell single crystal silicon substrate (100) surface of the sample substrate, as in Example 2. Rate: 1.7 Ωcm, thickness 130 μm, sample size: using a 5 cm × 5 cm substrate, as in Examples 1 and 2, first RCA cleaning, then 0.5 wt% concentration of fluorine. The surface was cleaned with an acid solution for 2 minutes.

次いで、上述のn型単結晶シリコン基板において、プラズマ気相成長(P−CVD)法により窒化シリコン(SiN)膜を形成した。このSiN膜の成膜に際しては、シリコン基板側に水素組成多の1層と、大気側に水素組成少の2層との二層の構造を選定した。製膜条件は、1層目に、プラズマ発生入力RF;50(W)、ガス成分20%SiH)/NH/ N/H:50/9/260/0、圧力(Pa):80、温度150℃、製膜速度nm/min:19.3を選定して、成膜の厚さ40nm、屈折率(n):2.097であり、2層目に、プラズマ発生入力RF;100(W)、ガス成分20%SiH)/NH/ N/H:13/0/1000/270、圧力(Pa):133、温度300℃、製膜速度nm/min:12.6を選定して、成膜の厚さ50nm、屈折率(n):2.07であった。上述の基板に上述の窒化シリコン膜を形成した。形成後、焼成処理相当の空気中で730℃、数秒間の熱処理を行った。 Next, a silicon nitride (SiN x ) film was formed on the above-described n-type single crystal silicon substrate by a plasma vapor deposition (P-CVD) method. In forming this SiN X film, a two-layer structure was selected, one layer having a high hydrogen composition on the silicon substrate side and two layers having a low hydrogen composition on the air side. The film formation conditions are as follows: plasma generation input RF; 50 (W), gas component 20% SiH 4 N 2 ) / NH 2 / N 2 / H 2 : 50/9/260/0, pressure (Pa ): 80, temperature 150 ° C., film forming speed nm / min: 19.3, film thickness 40 nm, refractive index (n): 2.097, plasma generation input on the second layer RF: 100 (W), gas component 20% SiH 4 N 2 ) / NH 2 / N 2 / H 2 : 13/0/1000/270, pressure (Pa): 133, temperature 300 ° C., film formation rate nm / Min: 12.6 was selected, and the film thickness was 50 nm and the refractive index (n) was 2.07. The above silicon nitride film was formed on the above substrate. After the formation, heat treatment was performed at 730 ° C. for several seconds in air corresponding to the firing treatment.

次に、上述のn型単結晶シリコン基板において、熱酸化炉を使用して、100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なった。その後、上述の窒化シリコン膜を形成し、上述の焼成処理を行った。 Next, in the above-described n-type single crystal silicon substrate, a thermal oxidation furnace is used to perform a thermal oxidation annealing treatment at 925 ° C. for 10 minutes in dry oxygen composed of 100 vol% oxygen, and then in 100 vol% hydrogen. Hydrogen annealing treatment at 450 ° C. for 30 minutes was performed. Thereafter, the above silicon nitride film was formed, and the above baking process was performed.

ついで、上述のn型単結晶シリコン基板において、化学的酸化法により二酸化シリコン(SiO)膜を形成後に、熱酸化炉を使用して、100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なった。その後、上述の窒化シリコン膜を形成し、上述の焼成処理を行った。 Next, after forming a silicon dioxide (SiO 2 ) film by a chemical oxidation method on the above-described n-type single crystal silicon substrate, using a thermal oxidation furnace, 925 ° C., 10 ° C. in dry oxygen composed of 100 vol% oxygen. After performing a thermal oxidation annealing treatment for 30 minutes, a hydrogen annealing treatment was performed in 100 vol% hydrogen at 450 ° C. for 30 minutes. Thereafter, the above silicon nitride film was formed, and the above baking process was performed.

上述の各処理後の1/e少数キャリアライフタイムの測定値を図6に、図7に1/e少数キャリアライフタイムの測定値をそれぞれ比較して示す。少数キャリアライフタイムの測定装置(μーPCD)はコベルコ科研製/LTA・1510(品番)を用いた。 The measured value of 1 / e minority carrier lifetime after each of the above-described processes is shown in FIG. 6, and the measured value of 1 / e 2 minority carrier lifetime is compared in FIG. As a minority carrier lifetime measuring apparatus (μ-PCD), Kobelco Research Institute / LTA.1510 (product number) was used.

図6には、二酸化シリコン(SiO)膜有(いわゆる,NAOSあり)の場合で、100vol%酸素中のドライ酸素中、925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行ない、窒化シリコン膜の焼成処理後に最も高い少数キャリアライフタイムが得られた。 FIG. 6 shows a case with a silicon dioxide (SiO 2 ) film (so-called NAOS), after performing thermal oxidation annealing treatment at 925 ° C. for 10 minutes in dry oxygen in 100 vol% oxygen and then 100 vol% hydrogen. In the middle, hydrogen annealing treatment was performed at 450 ° C. for 30 minutes, and the highest minority carrier lifetime was obtained after the baking treatment of the silicon nitride film.

図7においても、NAOS処理ありで100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行ない、シリコン窒化膜を形成し、焼成処理を行った場合に少数キャリアライフタイムは最も高い値を示した。 Also in FIG. 7, after performing thermal oxidation annealing treatment at 925 ° C. for 10 minutes in dry oxygen composed of 100 vol% oxygen with NAOS treatment, hydrogen annealing treatment at 450 ° C. for 30 minutes in 100 vol% hydrogen is performed. When the silicon nitride film was formed and baked, the minority carrier lifetime showed the highest value.

本実施例の結果から、n型単結晶シリコン基板上にNAOS処理後に、熱酸化アニール処理及び/又は水素アニール処理及び窒化シリコン膜を形成して焼成処理を行なうことにより、少数キャリアライフタイムは大幅に増加することが分かり、半導体や太陽電池の電気的、光学的特性が顕著に向上することが明らかとなった。さらに、これらの処理を一定時間内に連続的に処理することにより、特性の安定性、ばらつきの低減、製造安定性、製造速度の向上が可能となる。 From the results of this example, the minority carrier lifetime is greatly increased by performing thermal oxidation annealing treatment and / or hydrogen annealing treatment and baking treatment after forming a silicon nitride film on the n-type single crystal silicon substrate after NAOS treatment. It was found that the electrical and optical characteristics of semiconductors and solar cells were significantly improved. Furthermore, by continuously performing these processes within a predetermined time, it is possible to improve the stability of characteristics, the reduction of variations, the manufacturing stability, and the manufacturing speed.

本発明の実施の形態である第4の実施例では、シリコン基板に、p型太陽電池用単結晶シリコン基板(100)面の両面にテキスチャー構造を形成した、抵抗率:2Ωcm,厚さ190μm、サンプルサイズ;5cm×5cmの基板を用いた。実施例1,2,3のように初めにRCA洗浄、次いで、濃度0.5wt%のフッ酸溶液で2分間の表面洗浄を行った。 In the fourth example which is an embodiment of the present invention, a texture structure is formed on both sides of a single crystal silicon substrate (100) surface for a p-type solar cell on a silicon substrate, resistivity: 2 Ωcm, thickness 190 μm, Sample size: A substrate of 5 cm × 5 cm was used. As in Examples 1, 2, and 3, RCA cleaning was first performed, and then surface cleaning was performed with a hydrofluoric acid solution having a concentration of 0.5 wt% for 2 minutes.

続いて、P2O5含有の有機ケイ酸からなる被膜形成用コート剤を滴下し、スピンコート3000回転/分で30秒間塗布した。本塗布処理を両面に行った。
その後、オーブンにて150℃で30分間加熱処理し、続いて、熱拡散炉を用いて、酸素中で600℃、30分間処理し、ガラス化しPSG膜を形成した。その後、窒素に置換し、5分保持し、その後、窒素中でPSGは910℃、20分間拡散処理し、n型拡散層を形成した。n型拡散層のシート抵抗は約70Ω/□であった。その後、5%フッ酸で2分間処理し、PSG膜を除去した。このようにして作製した、n型拡散層付p型基板(n+/p−Si/n+)を用いて、以下のようにプロセス処理実験を続行した。
Subsequently, a coating agent for forming a film made of organic silica containing P2O5 was dropped and applied for 30 seconds at a spin coat of 3000 rpm. This coating process was performed on both sides.
Thereafter, heat treatment was performed at 150 ° C. for 30 minutes in an oven, followed by treatment in oxygen at 600 ° C. for 30 minutes using a thermal diffusion furnace to vitrify and form a PSG film. Thereafter, the atmosphere was replaced with nitrogen and held for 5 minutes. Thereafter, PSG was diffused in nitrogen at 910 ° C. for 20 minutes to form an n-type diffusion layer. The sheet resistance of the n-type diffusion layer was about 70Ω / □. Thereafter, the PSG film was removed by treatment with 5% hydrofluoric acid for 2 minutes. Using the p-type substrate with an n-type diffusion layer (n + / p-Si / n +) thus produced, the process treatment experiment was continued as follows.

続いて、濃度70wt%の硝酸溶液中、70℃,10分間の処理で、シリコン基板の表面に化学的酸化法(NAOS法)により二酸化シリコン(SiO)膜を形成した。この段階で、二酸化シリコン(SiO)膜の厚さは1〜1.3nmであった。 Subsequently, a silicon dioxide (SiO 2 ) film was formed on the surface of the silicon substrate by a chemical oxidation method (NAOS method) in a 70 wt% nitric acid solution at 70 ° C. for 10 minutes. At this stage, the thickness of the silicon dioxide (SiO 2 ) film was 1-1.3 nm.

次に、上述のp型単結晶シリコン基板において、熱酸化炉を使用して、100vol%の酸素からなるドライ酸素中で700℃~925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なった。 Next, in the above-described p-type single crystal silicon substrate, a thermal oxidation furnace is used to perform a thermal oxidation annealing treatment at 700 ° C. to 925 ° C. for 10 minutes in dry oxygen composed of 100 vol% oxygen, and then 100 vol. Hydrogen annealing treatment was performed in% hydrogen at 450 ° C. for 30 minutes.

図8と図9にこれらの処理後にシントン社製の測定装置(WCT―120)を用いて行った少数キャリアライフタイムと潜在的開放端電圧(Implied Voc(mV))の測定結果を示す。
これらの結果から、硝酸酸化法(NAOS)とドライ酸化アニールと100wt%水素処理法を適切に用いることにより、少数キャリアライフタイムの制御・向上が可能となり、Implied Vocを625mV以上に制御・向上を達成できることが分かった。このことにより、良好な表面パッシベーション処理が実現でき、p型基板を用いた太陽電池の大幅な性能向上が可能となる。
FIG. 8 and FIG. 9 show the measurement results of minority carrier lifetime and potential open-ended voltage (Implied Voc (mV)) using a measuring device (WCT-120) manufactured by Synton after these treatments.
From these results, it is possible to control and improve the minority carrier lifetime by appropriately using the nitric acid oxidation method (NAOS), dry oxidation annealing, and 100 wt% hydrogen treatment method, and control and improve the Implied Voc to 625 mV or more. It turns out that it can be achieved. As a result, a good surface passivation treatment can be realized, and the performance of a solar cell using a p-type substrate can be greatly improved.

次に、本発明の実施の形態である第5の実施例のSiN(窒化シリコン)膜積層によるパッシベーション効果の実験を行った。
第4の実施例のうち、NAOS処理後、ドライ酸素中加熱処理(925℃)と100vol%水素中加熱処理の後、PECVD SiN膜を90 nm堆積して後、量産用のベルト炉で空気中、860℃で、数秒間の焼成処理を行ったときの,シントン社製の測定装置(WCT−120)を用いて行った少数キャリアライフタイムと潜在的開放端電圧[Implied Voc(mV)]を図10、図11に示す。これらの結果からNAOS処理とドライ酸化と100wt%水素処理とSiN膜積層処理を用いることにより、良好な表面パッシベーション処理が実現でき、p型太陽電池基板で、Implied Vocとして644mVの極めて高い値を得た。従って、p型基板を用いた太陽電池の更に大幅な性能向上が可能となる。
Next, an experiment of the passivation effect by the SiN (silicon nitride) film lamination of the fifth example which is an embodiment of the present invention was conducted.
In the fourth embodiment, after NAOS treatment, heat treatment in dry oxygen (925 ° C.) and heat treatment in 100 vol% hydrogen, PECVD SiN film was deposited to 90 nm, and then in the air in a mass production belt furnace. Minority carrier lifetime and potential open-ended voltage [Implied Voc (mV)] using a measuring device (WCT-120) manufactured by Synton Co., Ltd. when firing at 860 ° C. for several seconds. It shows in FIG. 10, FIG. From these results, by using NAOS treatment, dry oxidation, 100 wt% hydrogen treatment and SiN film lamination treatment, a good surface passivation treatment can be realized, and a p-type solar cell substrate has an extremely high value of 644 mV as Implied Voc. It was. Therefore, the performance of the solar cell using the p-type substrate can be further greatly improved.

本発明の実施の形態である第6の実施例では、シリコン基板に、n型太陽電池単結晶シリコン基板(100)面の両面にテキスチャー構造を形成した、抵抗率:2Ωcm,厚さ130μm、サンプルサイズ;5cm×5cmの基板を用いた。初めにRCA洗浄、次いで、濃度0.5wt%のフッ酸溶液で2分間の表面洗浄を行った。 In the sixth example which is an embodiment of the present invention, a texture structure is formed on both sides of the surface of an n-type solar cell single crystal silicon substrate (100) on a silicon substrate, resistivity: 2 Ωcm, thickness 130 μm, sample Size: A substrate of 5 cm × 5 cm was used. First, RCA cleaning was performed, and then surface cleaning was performed for 2 minutes with a hydrofluoric acid solution having a concentration of 0.5 wt%.

続いて、両面に同一のn型拡散層と両面に同一のp型拡散層をそれぞれ形成するために、P2O5含有の有機ケイ酸からなる被膜形成用コート剤とB2O3含有の有機ケイ酸からなる被膜形成用コート剤をそれぞれ滴下し、スピンコート3000回転/分で30秒間塗布した。本塗布処理をそれぞれ両面に行った。
その後、オーブンにて150℃で30分間加熱処理し続いて、熱拡散炉を用いて、酸素中で600℃、30分間処理し、ガラス化しPSG膜、BSG膜を両面にそれぞれ形成した。その後、窒素に置換し、5分保持し、その後、窒素中でPSGは910℃、20分、BSGは950℃、20分間それぞれ拡散処理し、n型、p型拡散層を形成した。n型拡散層のシート抵抗は60Ω/□、p型拡散層のシート抵抗は60Ω/□であった。その後、5%フッ酸で2分間処理し、それぞれ膜を除去した。このようにして作製した、両面n型拡散層付n型基板(n+/n−Si/n+)、両面p型拡散層付n型基板(p+/n−Si/p+)を用いて、以下のようにプロセス処理実験を続行した。
Subsequently, in order to form the same n-type diffusion layer on both sides and the same p-type diffusion layer on both sides, a coating agent for forming a film made of organic silica containing P2O5 and a film made of organic silica containing B2O3 Each of the forming coating agents was dropped and applied by spin coating at 3000 rpm for 30 seconds. The coating process was performed on both sides.
Thereafter, heat treatment was performed in an oven at 150 ° C. for 30 minutes, followed by treatment in oxygen at 600 ° C. for 30 minutes using a thermal diffusion furnace, and vitrified to form a PSG film and a BSG film on both surfaces. Thereafter, it was replaced with nitrogen, and held for 5 minutes. Thereafter, PSG was diffused in nitrogen at 910 ° C. for 20 minutes and BSG was diffused at 950 ° C. for 20 minutes to form n-type and p-type diffusion layers. The sheet resistance of the n-type diffusion layer was 60Ω / □, and the sheet resistance of the p-type diffusion layer was 60Ω / □. Thereafter, the film was treated with 5% hydrofluoric acid for 2 minutes to remove the film. Using the n-type substrate with the double-sided n-type diffusion layer (n + / n-Si / n +) and the n-type substrate with the double-sided p-type diffusion layer (p + / n-Si / p +) thus prepared, So that the process treatment experiment continued.

続いて、濃度70wt%の硝酸溶液中、70℃,10分間の処理で、シリコン基板の表面に化学的酸化法(NAOS法)により二酸化シリコン(SiO)膜を形成した。この段階で、二酸化シリコン(SiO)膜の厚さは1〜1.3nmであった。 Subsequently, a silicon dioxide (SiO 2 ) film was formed on the surface of the silicon substrate by a chemical oxidation method (NAOS method) in a 70 wt% nitric acid solution at 70 ° C. for 10 minutes. At this stage, the thickness of the silicon dioxide (SiO 2 ) film was 1-1.3 nm.

次に、上述のp型単結晶シリコン基板において、熱酸化炉を使用して、100vol%の酸素からなるドライ酸素中で925℃、10分間の熱酸化アニール処理を行った後、100vol%水素中、450℃、30分間の水素アニール処理を行なった。 Next, in the above-described p-type single crystal silicon substrate, a thermal oxidation furnace is used to perform a thermal oxidation annealing treatment at 925 ° C. for 10 minutes in dry oxygen composed of 100 vol% oxygen, and then in 100 vol% hydrogen. Hydrogen annealing treatment at 450 ° C. for 30 minutes was performed.

図12、図13に実施例6の処理を用いたp+/n―Si/p+基板でのシントン社製の測定装置(WCT-120)を用いて行った少数キャリアライフタイムと潜在的開放端電圧[Implied Voc(mV)]の測定結果を示す。図12の100%H2の文字の意味はドライ酸化(925°処理)後に100vol%水素処理をしたという意味である(以下図13、14、15も同様である)。特に、NAOS処理とドライ酸化925℃と100vol%水素処理により、Implied Vocとして、611mVに制御・向上した。これらの処理により、良好な表面パッシベーション処理が実現でき、n型基板を用いた太陽電池の大幅な性能向上が可能となら。 12 and 13 minority carrier lifetime and potential open-circuit voltage performed using a measuring device (WCT-120) manufactured by Synton on a p + / n-Si / p + substrate using the process of Example 6 in FIGS. The measurement result of [Implied Voc (mV)] is shown. The meaning of 100% H2 in FIG. 12 means that 100 vol% hydrogen treatment was performed after dry oxidation (925 ° treatment) (the same applies to FIGS. 13, 14, and 15). In particular, the Implied Voc was controlled and improved to 611 mV by NAOS treatment, dry oxidation at 925 ° C. and 100 vol% hydrogen treatment. If these treatments can realize a good surface passivation treatment, it is possible to greatly improve the performance of a solar cell using an n-type substrate.

図14、図15に実施例6の処理を用いたn+/n―Si/n+基板でのシントン社製の測定装置(WCT−120)を用いて行った少数キャリアライフタイムと潜在的開放端電圧[Implied Voc(mV)]の測定結果を示す。特に、NAOS処理とドライ酸化925℃と100vol%水素処理により、Implied Vocを制御・向上して、実験中での最高値650mVを達成した。特に水素処理により、少数キャリアライフタイムが10倍以上向上し、Implied Vocが約70mVも向上した。これらの処理により、極めて良好な表面パッシベーション処理が実現でき、n型基板を用いた太陽電池の更なる大幅な性能向上が可能となる。 14 and 15, minority carrier lifetime and potential open-ended voltage performed using a measuring device (WCT-120) manufactured by Synton on an n + / n−Si / n + substrate using the process of Example 6 in FIGS. The measurement result of [Implied Voc (mV)] is shown. In particular, by implementing NAOS treatment, dry oxidation at 925 ° C. and 100 vol% hydrogen treatment, Implied Voc was controlled and improved, and the maximum value of 650 mV in the experiment was achieved. In particular, the hydrogen treatment improved the minority carrier lifetime by 10 times or more, and improved the Implied Voc by about 70 mV. By these treatments, a very good surface passivation treatment can be realized, and further significant performance improvement of a solar cell using an n-type substrate can be achieved.

本発明は、上記のn型単結晶シリコン基板に限らず、p型単結晶シリコン基板にも、またn、p型多結晶シリコンでも、その導電性に係わらず適用できること、また、化学的酸化法により二酸化シリコン(SiO)膜を形成する際の薬液(高濃度硝酸)の(HNO)濃度を、60%〜99.5%の範囲で選定して用い得ること、同薬液の使用温度を室温〜約120℃の範囲で選定することは適宜可能であり、さらに、上記酸化膜の形成後における酸素中での熱アニール処理の温度を600℃〜1000℃の範囲で適宜選択すること、加えて、水素中でのアニール処理過程での水素濃度を5vol%付近と100vol%で選択設定すること、加熱温度を400℃〜500℃の範囲で適宜設定することも、及びその処理時間とともに、最適条件を求めて選択設定して利用することは、当然可能である。 The present invention is applicable not only to the above-mentioned n-type single crystal silicon substrate, but also to a p-type single crystal silicon substrate and n and p-type polycrystalline silicon regardless of its conductivity, and a chemical oxidation method. (HNO 3 ) concentration of the chemical solution (high concentration nitric acid) when forming the silicon dioxide (SiO 2 ) film by the above can be selected and used within the range of 60% to 99.5%, and the use temperature of the chemical solution It is possible to select from the range of room temperature to about 120 ° C. as appropriate, and further, the temperature of the thermal annealing treatment in oxygen after the formation of the oxide film is appropriately selected in the range of 600 ° C. to 1000 ° C. In addition, the hydrogen concentration in the annealing process in hydrogen can be selectively set at around 5 vol% and 100 vol%, the heating temperature can be appropriately set in the range of 400 ° C. to 500 ° C., and the processing time can be maximized. Of course, it is possible to obtain appropriate conditions, select and set them, and use them.

本発明は、高集積化半導体装置やシステム液晶ディスプレイの分野、あるいは太陽電池等の光電変換装置の分野で、シリコン表面に厚さがサブナノメートル(0.1nm)から数ナノメートル(nm)レベルの極薄の絶縁膜を形成して利用できる半導体装置およびその製造方法において、少数キャリアライフタイムや潜在的開放端電圧を高精度に制御・向上して、半導体デバイスの大幅な性能向上に利用することができる。

In the field of highly integrated semiconductor devices and system liquid crystal displays, or in the field of photoelectric conversion devices such as solar cells, the present invention has a thickness of sub-nanometers (0.1 nm) to several nanometers (nm) on the silicon surface. A semiconductor device that can be used by forming an ultra-thin insulating film, and its manufacturing method, to control and improve the minority carrier lifetime and potential open-ended voltage with high accuracy, and to use it to significantly improve the performance of semiconductor devices. Can do.

Claims (8)

半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、酸素雰囲気中600℃〜1000℃の範囲で加熱アニール処理を施すこと及び/又は400〜500℃での水素アニール処理を施すことを特徴とする半導体基板。 After an oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, the semiconductor is subjected to a heat annealing treatment in an oxygen atmosphere in the range of 600 ° C. to 1000 ° C. and / or hydrogen at 400 to 500 ° C. A semiconductor substrate characterized by performing an annealing treatment. 半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、ドライ酸素雰囲気中600℃以上で加熱アニール処理を施すこと及び/又は400〜500℃での水素アニール処理を施すことを特徴とする半導体装置の製造方法。 An oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, and then a heat annealing treatment is performed at 600 ° C. or higher in a dry oxygen atmosphere and / or a hydrogen annealing treatment at 400 to 500 ° C. A method for manufacturing a semiconductor device, comprising: シリコン窒化膜を焼成処理することを特徴とする請求項1〜請求項2の1つに記載の半導体装置の製造方法。 The method of manufacturing a semiconductor device according to claim 1, wherein the silicon nitride film is baked. 半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、酸素中で600℃〜1000℃の温度範囲の熱アニール処理、及び水素中で400〜500℃の温度範囲のアニール処理を施す手段を備えたことを特徴とする半導体装置の製造装置。 An oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, and then a thermal annealing treatment in a temperature range of 600 ° C. to 1000 ° C. in oxygen and a temperature range of 400 to 500 ° C. in hydrogen. An apparatus for manufacturing a semiconductor device, comprising means for performing an annealing process. 半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、酸素雰囲気中600℃〜1000℃の範囲で加熱アニール処理を施すこと及び/又は400〜500℃での水素アニール処理を施すこと及び/又は窒化シリコン膜を備えたことを特徴とする太陽電池。 After an oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, the semiconductor is subjected to a heat annealing treatment in an oxygen atmosphere in the range of 600 ° C. to 1000 ° C. and / or hydrogen at 400 to 500 ° C. A solar cell comprising an annealing treatment and / or a silicon nitride film. 半導体を酸化性薬液中での化学的処理により前記半導体の表面に酸化膜を形成後、酸素雰囲気中600℃〜1000℃の範囲で加熱アニール処理を施すこと及び/又は400〜500℃での水素アニール処理を施すこと及び/又は窒化シリコン膜を形成することを特徴とする太陽電池の製造方法。 After an oxide film is formed on the surface of the semiconductor by chemical treatment in an oxidizing chemical solution, the semiconductor is subjected to a heat annealing treatment in an oxygen atmosphere in the range of 600 ° C. to 1000 ° C. and / or hydrogen at 400 to 500 ° C. A method for manufacturing a solar cell, characterized by performing an annealing treatment and / or forming a silicon nitride film. 半導体の表裏面にn型及び/又はp型拡散層を備えたことを特徴とする請求項5に記載の太陽電池。 6. The solar cell according to claim 5, wherein n-type and / or p-type diffusion layers are provided on the front and back surfaces of the semiconductor. 半導体の表裏面にn型及び/又はp型拡散層を備えたことを特徴とする請求項6に記載の太陽電池の製造方法。
The method for manufacturing a solar cell according to claim 6, wherein an n-type and / or a p-type diffusion layer is provided on the front and back surfaces of the semiconductor.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021004521A1 (en) * 2019-07-11 2021-01-14 苏州迈正科技有限公司 Heterojunction battery hydrogen passivation method and hydrogen passivation device, battery, battery assembly, and solar power station
CN113782641A (en) * 2021-09-13 2021-12-10 浙江晶科能源有限公司 Preparation process of solar cell

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021004521A1 (en) * 2019-07-11 2021-01-14 苏州迈正科技有限公司 Heterojunction battery hydrogen passivation method and hydrogen passivation device, battery, battery assembly, and solar power station
CN113782641A (en) * 2021-09-13 2021-12-10 浙江晶科能源有限公司 Preparation process of solar cell
CN113782641B (en) * 2021-09-13 2024-01-30 浙江晶科能源有限公司 Preparation process of solar cell

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