JP2016040524A - CHIP SUBSTRATE FORMED OF CdTe OR CdZnTe, RADIATION DETECTOR USING THE SAME, AND PRODUCTION METHOD OF RADIATION DETECTOR - Google Patents

CHIP SUBSTRATE FORMED OF CdTe OR CdZnTe, RADIATION DETECTOR USING THE SAME, AND PRODUCTION METHOD OF RADIATION DETECTOR Download PDF

Info

Publication number
JP2016040524A
JP2016040524A JP2014164207A JP2014164207A JP2016040524A JP 2016040524 A JP2016040524 A JP 2016040524A JP 2014164207 A JP2014164207 A JP 2014164207A JP 2014164207 A JP2014164207 A JP 2014164207A JP 2016040524 A JP2016040524 A JP 2016040524A
Authority
JP
Japan
Prior art keywords
chipping
substrate
chip substrate
metal electrode
length
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014164207A
Other languages
Japanese (ja)
Other versions
JP6366418B2 (en
Inventor
村上 幸司
Koji Murakami
幸司 村上
朗 野田
Akira Noda
朗 野田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JX Nippon Mining and Metals Corp
Original Assignee
JX Nippon Mining and Metals Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JX Nippon Mining and Metals Corp filed Critical JX Nippon Mining and Metals Corp
Priority to JP2014164207A priority Critical patent/JP6366418B2/en
Publication of JP2016040524A publication Critical patent/JP2016040524A/en
Application granted granted Critical
Publication of JP6366418B2 publication Critical patent/JP6366418B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Measurement Of Radiation (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a radiation detector in which leakage current is reduced, and detection sensitivity of radiation spectra and energy resolution are improved, a production method of it, and a chip substrate formed of CdTe or CdZnTe for achieving them.SOLUTION: The chip substrate formed of CdTe or CdZnTe comprises a chipping on an end part of the chip substrate, and a length of the chipping is equal to or less than 300 μm. The length of the chipping satisfies a relationship of a1<a2, when a maximum length out of respective lengths in which, a first extension line of a ridgeline of a first side of the chip substrate is drawn, and the first extension line and an edge part where there is the chipping of the chip substrate have an orthogonal relationship, is a1, and a maximum length out of respective lengths in which, a second extension line drawn from a ridgeline of a second side of the chip substrate is drawn and the second extension line and the edge part of the chipping have an orthogonal relationship, is a2. Further, the length of the chipping is defined as a maximum length to a length direction of the a1, and when a1=a2, as a maximum length to length directions of the a1 and a2.SELECTED DRAWING: Figure 1

Description

本発明は、CdTe又はCdZnTeからなるチップ基板、及びそれを用いた放射線検出器及び放射線検出器の製造方法に関する。 The present invention relates to a chip substrate made of CdTe or CdZnTe, a radiation detector using the chip substrate, and a method of manufacturing the radiation detector.

II−VI族化合物半導体であるテルル化カドミウム(CdTe)やテルル化亜鉛カドミウム(CdZnTe)は、シリコン(Si)やゲルマニウム(Ge)に比べて、バンドギャップが大きく、放射線検出器として使用した場合には、熱雑音等の影響が小さくできるので、冷却装置を必要とせずに検出器を構成できるので小型化が可能であり、また、不純物をドーピングすることによってさらなる高抵抗化が容易であるので、暗電流(リーク電流)の発生を抑制できるため、エネルギー分解能を向上させることが可能な放射線検出器に用いられている。放射線検出器は、CdTeやCdZnTeの単結晶で形成された基板の両面に金属電極を形成した放射線検出素子を、検出回路に接続することにより構成される。放射線検出器は、放射線検出素子が放射線を受けた際に放出する電子量を検出回路で電流に変換して増幅することにより、放射線を検出する。 II-VI group compound semiconductors cadmium telluride (CdTe) and zinc cadmium telluride (CdZnTe) have a larger band gap than silicon (Si) and germanium (Ge), and are used as radiation detectors. Since the influence of thermal noise and the like can be reduced, the detector can be configured without the need for a cooling device, so that it is possible to reduce the size, and it is easy to further increase the resistance by doping impurities, Since generation of dark current (leakage current) can be suppressed, it is used for a radiation detector capable of improving energy resolution. The radiation detector is configured by connecting a radiation detection element in which metal electrodes are formed on both surfaces of a substrate made of a single crystal of CdTe or CdZnTe to a detection circuit. The radiation detector detects radiation by converting the amount of electrons emitted when the radiation detecting element receives radiation into a current by a detection circuit and amplifying it.

放射線スペクトルの検出感度とエネルギー分解能を向上させるために、CdTeやCdZnTeの単結晶で形成された基板に様々な処理を施すことが検討されている。例えば、特許文献1には、基板に250℃以上450℃以下の温度下に少なくとも20時間保持される熱処理を施すことにより、キャリア移動度μとキャリアの寿命τとの積μτが2.0×10−3cm/V以上とすることが記載されている。 In order to improve the detection sensitivity and energy resolution of the radiation spectrum, it has been studied to perform various treatments on a substrate formed of a single crystal of CdTe or CdZnTe. For example, Patent Document 1 discloses that the product μτ of the carrier mobility μ and the carrier lifetime τ is 2.0 × by applying a heat treatment to the substrate at a temperature of 250 ° C. to 450 ° C. for at least 20 hours. It is described that it is 10 −3 cm 2 / V or more.

一方で、放射線スペクトルの検出感度とエネルギー分解能を向上させるには、金属電極から基板に電圧を印加した時に、キャリア注入によるリーク電流の急増を防ぐ必要もある。例えば、特許文献2には、ポリッシングにより基板の表面処理を行い、原子間力顕微鏡で基板表面を観察したときに10μm×10μmの視野範囲内に深さ1nm以上の線状の研磨ダメージの痕跡が観察されず、かつ、蛍光灯下目視で基板表面を観察したときにオレンジピールが観察されない基板を形成することが記載されている。また、特許文献3には、基板表面をエッチングすることにより加工変質層を除去した後、無電解メッキにより電極を形成することが記載されている。 On the other hand, in order to improve the detection sensitivity and energy resolution of the radiation spectrum, it is necessary to prevent a sudden increase in leakage current due to carrier injection when a voltage is applied from the metal electrode to the substrate. For example, in Patent Document 2, when the surface of a substrate is subjected to polishing and the surface of the substrate is observed with an atomic force microscope, there is a trace of linear polishing damage having a depth of 1 nm or more within a visual field range of 10 μm × 10 μm. It is described that a substrate that is not observed and in which no orange peel is observed when the substrate surface is visually observed under a fluorescent lamp is described. Patent Document 3 describes that an electrode is formed by electroless plating after removing the work-affected layer by etching the substrate surface.

特開平6−3455985号公報JP-A-6-3455985 国際公開第2011/040566号International Publication No. 2011/0405066 特開平3−201487号公報JP-A-3-2014487

しかし、放射線スペクトルの検出感度とエネルギー分解能をさらに向上させるには、リーク電流をさらに低減する必要がある。上述した方法だけではリーク電流が十分には低減できず、新たなアプローチが必要であった。 However, in order to further improve the detection sensitivity and energy resolution of the radiation spectrum, it is necessary to further reduce the leakage current. The leak current cannot be sufficiently reduced only by the method described above, and a new approach is required.

本発明は、上記の如き従来技術の問題点を解決し、リーク電流を低減し、放射線スペクトルの検出感度とエネルギー分解能を向上させた放射線検出器、その製造方法、及びそれを実現するCdTe又はCdZnTeからなるチップ基板を提供することを課題とする。 The present invention solves the problems of the prior art as described above, reduces the leakage current, and improves the detection sensitivity and energy resolution of the radiation spectrum, the manufacturing method thereof, and CdTe or CdZnTe realizing the same. It is an object of the present invention to provide a chip substrate comprising:

本発明の一実施形態によると、CdTe又はCdZnTeからなる矩形のチップ基板であって、前記チップ基板の端部にチッピングを有し、前記チッピングの長さが300μm以下であるチップ基板が提供される。 According to an embodiment of the present invention, there is provided a chip substrate having a rectangular shape made of CdTe or CdZnTe, which has chipping at an end portion of the chip substrate, and the chipping length is 300 μm or less. .

前記チップ基板において、前記チッピングの長さは、前記チップ基板の第1の側面の稜線の第1の延長線を引き、前記チップ基板のチッピングが生じた縁部と前記第1の延長線とが直交の関係をなす各長さのうち最大距離をa1とし、前記第1の側面と直交関係にある第2の側面の稜線から引いた第2の延長線に対してもチッピングが生じた縁部と前記第2の延長線とが直交の関係をなす各長さのうち最大距離をa2として、a1<a2の関係を有し、且つ、前記a1の長さ方向に対して最大距離であってもよい。また、a1=a2の場合には、a1及びa2それぞれの長さ方向に対しての最大距離であってもよい。 In the chip substrate, the chipping length is calculated by drawing a first extension line of a ridge line on the first side surface of the chip substrate, and an edge portion where the chipping of the chip substrate occurs and the first extension line. The edge where the maximum distance among the lengths that are orthogonal to each other is a1, and chipping has occurred even with respect to the second extension line drawn from the ridge line of the second side surface that is orthogonal to the first side surface And the second extension line are orthogonal to each other, the maximum distance is a2, and the relationship is a1 <a2, and the maximum distance with respect to the length direction of a1. Also good. Further, when a1 = a2, the maximum distances in the length directions of a1 and a2 may be used.

また、本発明の一実施形態によると、前記何れかのチップ基板と、前記チップ基板の第1の面に配設された第1の金属電極と、前記第1の面と対向する前記チップ基板の第2の面に配設された第2の金属電極と、を備える放射線検出器が提供される。 According to an embodiment of the present invention, any one of the chip substrates, a first metal electrode disposed on a first surface of the chip substrate, and the chip substrate facing the first surface And a second metal electrode disposed on the second surface of the radiation detector.

また、本発明の一実施形態によると、CdTe又はCdZnTeからなる基板を準備し、前記基板の第1の面と、前記第1の面に対向する前記基板の第2の面を研磨し、前記基板の第1の面に第1の金属電極を形成し、前記第1の金属電極と対向するように前記基板の第2の面に第2の金属電極を形成し、前記第1の金属電極と前記第2の金属電極とが配設された前記基板を所定の形状に切断し、前記第1の金属電極と前記第2の金属電極とが配設されたチップ基板の端部に生じるチッピングの長さが300μm以下となるように、前記チップ基板を形成することを含む放射線検出器の製造方法が提供される。 According to an embodiment of the present invention, a substrate made of CdTe or CdZnTe is prepared, the first surface of the substrate and the second surface of the substrate facing the first surface are polished, Forming a first metal electrode on the first surface of the substrate; forming a second metal electrode on the second surface of the substrate so as to face the first metal electrode; and And the second metal electrode are cut into a predetermined shape, and chipping occurs at the end of the chip substrate on which the first metal electrode and the second metal electrode are arranged. There is provided a method of manufacturing a radiation detector including forming the chip substrate such that the length of the radiation detector is 300 μm or less.

前記放射線検出器の製造方法において、前記チッピングの長さは、前記チップ基板の第1の側面の稜線の第1の延長線を引き、前記チップ基板のチッピングが生じた縁部と前記第1の延長線とが直交の関係をなす各長さのうち最大距離をa1とし、前記第1の側面と直交関係にある第2の側面の稜線から引いた第2の延長線に対してもチッピングが生じた縁部と前記第2の延長線とが直交の関係をなす各長さのうち最大距離をa2として、a1<a2の関係を有し、且つ、前記a1の長さ方向に対して最大距離であってもよい。また、a1=a2の場合には、a1及びa2それぞれの長さ方向に対しての最大距離であってもよい。 In the manufacturing method of the radiation detector, the chipping length is obtained by drawing a first extension line of a ridge line on the first side surface of the chip substrate, and the edge portion where the chipping of the chip substrate occurs and the first chip. Chipping is also applied to the second extension line drawn from the ridge line of the second side surface orthogonal to the first side surface with the maximum distance a1 among the lengths that are orthogonal to the extension line. Of the lengths in which the generated edge portion and the second extension line are orthogonal to each other, the maximum distance is a2, and a relationship of a1 <a2 is satisfied, and the maximum length with respect to the length direction of the a1 It may be a distance. Further, when a1 = a2, the maximum distances in the length directions of a1 and a2 may be used.

本発明に係るCdTe又はCdZnTeからなるチップ基板は、リーク電流を低減し、放射線スペクトルの検出感度とエネルギー分解能を向上させた放射線検出器を実現することができる。 The chip substrate made of CdTe or CdZnTe according to the present invention can realize a radiation detector with reduced leakage current and improved radiation spectrum detection sensitivity and energy resolution.

本発明の一実施形態に係る放射線検出器に用いる放射線検出素子100を示す模式図であり、(a)は放射線検出素子100の上面図であり、(b)は(a)のAA’における断面図であり、(c)は(b)のチッピング150を拡大した図である。It is a schematic diagram which shows the radiation detection element 100 used for the radiation detector which concerns on one Embodiment of this invention, (a) is a top view of the radiation detection element 100, (b) is the cross section in AA 'of (a). It is a figure, (c) is the figure which expanded the chipping 150 of (b). 本発明の一実施形態に係る放射線検出素子100を備えた放射線検出器500の側面図である。It is a side view of the radiation detector 500 provided with the radiation detection element 100 which concerns on one Embodiment of this invention. 本発明の一実施例に係るダイシングにより生じたチッピングの状態を示す図である。It is a figure which shows the state of the chipping produced by the dicing which concerns on one Example of this invention. 本発明の一実施例に係る放射線検出素子100の特性を示す図であり、(a)はチッピングの長さとリーク電流の関係を示し、(b)はチッピングの長さと放射線スペクトルの半値幅の関係を示す。It is a figure which shows the characteristic of the radiation detection element 100 which concerns on one Example of this invention, (a) shows the relationship between chipping length and a leakage current, (b) shows the relationship between the chipping length and the half value width of a radiation spectrum. Indicates. 本発明の一実施例に係る放射線検出素子100のチッピングの長さと放射線ピーク強度の関係を示す図である。It is a figure which shows the relationship between the chipping length of the radiation detection element 100 which concerns on one Example of this invention, and a radiation peak intensity.

以下、図面を参照して本発明に係るCdTeもしくはCdZnTeからなるチップ基板、及びそれを用いた放射線検出器及び放射線検出器の製造方法について説明する。本発明のCdTeもしくはCdZnTeからなるチップ基板、及びそれを用いた放射線検出器及び放射線検出器の製造方法は、以下に示す実施の形態及び実施例の記載内容に限定して解釈されるものではない。なお、本実施の形態及び後述する実施例で参照する図面において、同一部分又は同様な機能を有する部分には同一の符号を付し、その繰り返しの説明は省略する。 Hereinafter, a chip substrate made of CdTe or CdZnTe according to the present invention, a radiation detector using the same, and a method of manufacturing the radiation detector will be described with reference to the drawings. The chip substrate made of CdTe or CdZnTe of the present invention, the radiation detector using the chip substrate, and the manufacturing method of the radiation detector are not construed as being limited to the description of the following embodiments and examples. . Note that in the drawings referred to in this embodiment mode and examples to be described later, the same portions or portions having similar functions are denoted by the same reference numerals, and description thereof is not repeated.

図1は、本発明の一実施形態に係る放射線検出器に用いる放射線検出素子100を示す模式図である。図1(a)は放射線検出素子100の上面図であり、図1(b)は図1(a)のAA’における断面図であり、図1(c)は図1(a)のチッピング150を拡大した図である。また、図2は、放射線検出素子100を備えた放射線検出器500の側面図である。 FIG. 1 is a schematic diagram showing a radiation detection element 100 used in a radiation detector according to an embodiment of the present invention. 1A is a top view of the radiation detection element 100, FIG. 1B is a cross-sectional view taken along the line AA ′ in FIG. 1A, and FIG. 1C is the chipping 150 in FIG. FIG. FIG. 2 is a side view of the radiation detector 500 including the radiation detection element 100.

放射線検出素子100は、チップ基板20と、チップ基板20の第1の面(図1(b)ではチップ基板20の下面)に配設された第1の金属電極11と、第1の面と対向するチップ基板20の第2の面(図1(b)ではチップ基板20の上面)に配設された第2の金属電極13と、を備える。第1の金属電極11は、例えば、チップ基板20の第1の面の全面に形成される。また、第2の金属電極13は、例えば、チップ基板20の第2の面にマトリクス状に配設される。また、放射線検出器500は、第3の金属電極60を配設した集積回路基板50を備える。放射線検出素子100の第2の金属電極13は、集積回路基板50に配設された、対応する第3の金属電極60と、バンプ65を介して接続される。 The radiation detection element 100 includes a chip substrate 20, a first metal electrode 11 disposed on a first surface of the chip substrate 20 (a lower surface of the chip substrate 20 in FIG. 1B), a first surface, And a second metal electrode 13 disposed on the second surface of the chip substrate 20 facing (in FIG. 1B, the upper surface of the chip substrate 20). For example, the first metal electrode 11 is formed on the entire first surface of the chip substrate 20. The second metal electrode 13 is arranged in a matrix on the second surface of the chip substrate 20, for example. The radiation detector 500 includes an integrated circuit substrate 50 on which the third metal electrode 60 is disposed. The second metal electrode 13 of the radiation detection element 100 is connected to a corresponding third metal electrode 60 disposed on the integrated circuit substrate 50 via a bump 65.

チップ基板20は、CdTeもしくはCdZnTeからなる基板である。チップ基板20は、薄い板状に形成されており、例えば、第1の金属電極11及び第2の金属電極13が形成される主面は、(111)面となっている。結晶方位[111]は、CdZnTeにおける極性軸であるため、チップ基板20の表面のうち第2の面側の表面組成はCdの割合が高く、第1の面側の表面組成はTeの割合が高くなっている。 The chip substrate 20 is a substrate made of CdTe or CdZnTe. The chip substrate 20 is formed in a thin plate shape. For example, the main surface on which the first metal electrode 11 and the second metal electrode 13 are formed is a (111) surface. Since the crystal orientation [111] is a polar axis in CdZnTe, the surface composition on the second surface side of the surface of the chip substrate 20 has a high Cd ratio, and the surface composition on the first surface side has a Te ratio. It is high.

第1の金属電極11、第2の金属電極13及び第3の金属電極60は、金、白金、イリジウム等の貴金属を用いた薄膜で形成される。本実施形態において、第1の金属電極11及び第2の金属電極13は共通電極である。また、第3の金属電極60は、バンプ65を介して第2の金属電極13からの電流を受ける。 The 1st metal electrode 11, the 2nd metal electrode 13, and the 3rd metal electrode 60 are formed with the thin film using noble metals, such as gold | metal | money, platinum, and iridium. In the present embodiment, the first metal electrode 11 and the second metal electrode 13 are common electrodes. The third metal electrode 60 receives a current from the second metal electrode 13 via the bump 65.

集積回路基板50は、コンデンサや増幅器等を備える。チップ基板20が放射線(硬X線やγ線)を受けて電子を放出すると、電子がバイアス電圧により電離電流となり、放射線検出素子100から、第2の金属電極13、バンプ65及び第2の金属電極13を介して集積回路基板50へと流れる。コンデンサ、増幅器を経てパルス信号に変換され、パルス信号がマルチチャンネルアナライザで解析され、放射線のスペクトルを得る。 The integrated circuit board 50 includes a capacitor, an amplifier, and the like. When the chip substrate 20 receives radiation (hard X-rays or γ-rays) and emits electrons, the electrons become an ionization current due to a bias voltage, and the second metal electrode 13, the bump 65, and the second metal are emitted from the radiation detection element 100. It flows to the integrated circuit board 50 through the electrode 13. It is converted into a pulse signal through a capacitor and an amplifier, and the pulse signal is analyzed by a multi-channel analyzer to obtain a radiation spectrum.

後述するように、放射線検出素子100は、金属電極形成工程の後、ダイシング工程を経て製造される。チップ基板20を構成するCdTeやCdZnTeは、ダイシング工程における加工歪の発生により、チップ基板20の端部に加工変質層が多く出現し、切断面での欠け(チッピング)が多くなる。本発明者らは、チッピングが放射線検出素子100の検出感度やエネルギー分解能を低下させる原因であることを見出した。このようなチップ基板20のチッピングによる放射線検出素子100の検出感度やエネルギー分解能の低下についての知見は、これまでの報告されておらず、以降に説明する本発明は、放射線検出器のリーク電流を低減し、放射線スペクトルの検出感度とエネルギー分解能を向上させる新規なアプローチである。 As will be described later, the radiation detection element 100 is manufactured through a dicing process after the metal electrode forming process. In CdTe and CdZnTe constituting the chip substrate 20, due to the occurrence of processing strain in the dicing process, a large number of work-affected layers appear at the end of the chip substrate 20 and chipping (chipping) at the cut surface increases. The present inventors have found that chipping is a cause of lowering the detection sensitivity and energy resolution of the radiation detection element 100. The knowledge about the reduction of the detection sensitivity and the energy resolution of the radiation detection element 100 due to the chipping of the chip substrate 20 has not been reported so far, and the present invention to be described below is based on the leakage current of the radiation detector. It is a novel approach that reduces and improves the detection sensitivity and energy resolution of the radiation spectrum.

ここで、図1(a)を参照する。上述したように、放射線検出素子100は、第1の金属電極11及び第2の金属電極13を形成した後、チップ基板20をダイシングして製造される。このとき、ダイシング工程における加工歪の発生により、図1(a)に示したように、チッピング150が生じる。本発明者らは、チッピングの長さが300μm以下の範囲であれば、放射線検出素子100のリーク電流を低減し、放射線スペクトルの検出感度とエネルギー分解能を向上させることができることを見出した。後述する実施例に示すように、チッピングの長さが300μmを超えると、リーク電流が急激に増加するため好ましくない。一方、ダイシング工程が必須であるため、チップ基板20からチッピングを完全になくすことはできないが、チッピングの長さを20〜50μm程度にまで低減することは可能である。 Here, reference is made to FIG. As described above, the radiation detection element 100 is manufactured by forming the first metal electrode 11 and the second metal electrode 13 and then dicing the chip substrate 20. At this time, chipping 150 is generated as shown in FIG. The present inventors have found that when the chipping length is in the range of 300 μm or less, the leakage current of the radiation detection element 100 can be reduced, and the detection sensitivity and energy resolution of the radiation spectrum can be improved. As shown in the examples described later, when the chipping length exceeds 300 μm, the leakage current increases rapidly, which is not preferable. On the other hand, since the dicing process is essential, the chipping cannot be completely eliminated from the chip substrate 20, but the chipping length can be reduced to about 20 to 50 μm.

なお、本明細書において、「チッピングの長さ」とは、図1(c)と図3を基に説明すると、チップ基板内部のチッピング(欠け)部分と、矩形のチップ基板の側面171の稜線の延長線181を引き、チッピングが発生した縁部155と延長線181とが直交の関係をなす各長さのうち最大距離をa1とし、また矩形のチップ基板の側面171と直交関係にある側面173の稜線から引いた延長線183に対してもチッピングの縁部155と延長線183とが直交の関係をなす各長さのうち最大距離をa2として、a1<a2の関係を有し、且つ、a1の長さ方向に対する最大距離190として定義する。また、a1=a2の場合には、a1及びa2それぞれの長さ方向に対する最大距離190として定義する。 In this specification, the “chipping length” is described based on FIG. 1C and FIG. 3, and the chipping (chip) portion inside the chip substrate and the ridge line of the side surface 171 of the rectangular chip substrate. The extension line 181 is drawn and the edge 155 where the chipping has occurred and the extension line 181 are orthogonal to each other, and the maximum distance is a1, and the side surface is orthogonal to the side surface 171 of the rectangular chip substrate. The maximum distance a2 of the lengths of the chipping edge 155 and the extension line 183 orthogonal to the extension line 183 drawn from the ridge line 173 has a relation of a1 <a2, and , A1 is defined as the maximum distance 190 in the length direction. When a1 = a2, it is defined as the maximum distance 190 in the length direction of each of a1 and a2.

本出願は、チップ基板20に生じるチッピング150の長さを300μm以下に制御することにより、リーク電流を低減し、放射線スペクトルの検出感度とエネルギー分解能を向上させることができることを初めて報告するものである。 This application reports for the first time that the leakage current can be reduced and the detection sensitivity and energy resolution of the radiation spectrum can be improved by controlling the length of the chipping 150 generated in the chip substrate 20 to 300 μm or less. .

(放射線検出器の製造方法)
チップ基板20に生じるチッピング150の長さを所定の範囲に制御するための放射線検出器500の製造方法について説明する。放射線検出器500の製造方法は、例えば、基板製造工程、電極形成工程及びダイシング工程を含むが、これらに限定されるものではない。基板製造工程は、CdTeもしくはCdZnTeからなる基板を準備する工程であって、CdTeもしくはCdZnTeの単結晶インゴットを結晶面(111)に沿って切断することにより薄い円盤状の基板(ウエハ)を切り出す(切断工程)。切り出した基板は、切断面(第1の金属電極11を配設する第1の面及び第2の金属電極13を配設する第2の面)をアルミナ粉末等の研磨剤を用いて物理的に鏡面研磨する(研磨工程)。この研磨工程は、基板毎に複数回繰り返してもよい。
(Production method of radiation detector)
A method of manufacturing the radiation detector 500 for controlling the length of the chipping 150 generated on the chip substrate 20 to a predetermined range will be described. The manufacturing method of the radiation detector 500 includes, for example, a substrate manufacturing process, an electrode forming process, and a dicing process, but is not limited thereto. The substrate manufacturing process is a process of preparing a substrate made of CdTe or CdZnTe, and a thin disk-shaped substrate (wafer) is cut out by cutting a single crystal ingot of CdTe or CdZnTe along the crystal plane (111) ( Cutting step). The cut out substrate is physically cut by using an abrasive such as alumina powder on the cut surfaces (the first surface on which the first metal electrode 11 is disposed and the second surface on which the second metal electrode 13 is disposed). Mirror polishing (polishing process). This polishing step may be repeated multiple times for each substrate.

電極形成工程においては、基板の第1の面に第1の金属電極11を形成し、第1の金属電極と対向するように基板の第2の面に第2の金属電極13を形成する(電極形成工程)。電極形成工程では、例えば、基板をメタノールに浸漬し、室温で超音波洗浄することにより、基板に付着した異物を除去する。 In the electrode formation step, the first metal electrode 11 is formed on the first surface of the substrate, and the second metal electrode 13 is formed on the second surface of the substrate so as to face the first metal electrode ( Electrode forming step). In the electrode forming process, for example, the substrate is immersed in methanol, and ultrasonic cleaning is performed at room temperature, thereby removing foreign matters attached to the substrate.

例えば、基板を塩化白金酸(IV)六水和物水溶液に塩酸を混合しためっき液に浸漬することで、基板の研磨面に貴金属、例えば、プラチナ(Pt)を析出させて金属電極を形成する(めっき工程)。その後、基板に窒素ガスを噴きつけることにより乾燥させて、第1の金属電極11及び第2の金属電極13を備えた基板を得る。なお、第1の金属電極11及び第2の金属電極13は、一つのメッキ工程で形成してもよく、また、異なる金属溶液を用いて別のメッキ工程で形成してもよい。 For example, by immersing the substrate in a plating solution in which hydrochloric acid is mixed in a chloroplatinic acid (IV) hexahydrate aqueous solution, a noble metal such as platinum (Pt) is deposited on the polished surface of the substrate to form a metal electrode. (Plating process). Then, it is made to dry by spraying nitrogen gas on a board | substrate, and the board | substrate provided with the 1st metal electrode 11 and the 2nd metal electrode 13 is obtained. The first metal electrode 11 and the second metal electrode 13 may be formed in one plating process, or may be formed in another plating process using different metal solutions.

第1の金属電極11及び第2の金属電極13を備えた基板はダイシング工程により、チップ基板20へと分割される。ここで、本発明においては、チッピングの長さを上述した範囲に制御する。基板をダイシングするには、一般にスライサー又はダイサーが用いられる。本発明においては、チッピングの発生を抑制するために、ダイシング時の基板に生じる加工歪を小さくする必要がある。このため、本発明においては、高精度に基板を切断可能なダイサーをダイシング工程に用いることが好ましい。このように、加工歪を小さくして、第1の金属電極11及び第2の金属電極13を備えたチップ基板20を基板から切り出して、本実施形態に係る放射線検出素子100を製造することができる。 The substrate provided with the first metal electrode 11 and the second metal electrode 13 is divided into chip substrates 20 by a dicing process. Here, in the present invention, the chipping length is controlled within the above-described range. In order to dice the substrate, a slicer or a dicer is generally used. In the present invention, in order to suppress the occurrence of chipping, it is necessary to reduce the processing strain generated in the substrate during dicing. For this reason, in this invention, it is preferable to use the dicer which can cut | disconnect a board | substrate with high precision for a dicing process. In this way, the radiation distortion detecting device 100 according to the present embodiment can be manufactured by cutting the chip substrate 20 including the first metal electrode 11 and the second metal electrode 13 from the substrate while reducing the processing strain. it can.

また、得られた放射線検出素子100は、第3の金属電極60を配設した集積回路基板50とバンプ65を介して接続する。第2の金属電極13は第3の金属電極60と接続され、放射線検出器500を得る。本実施形態において、バンプ65には、公知の材料を用いることができ、例えば、金(Au)やハンダ等が挙げられる。 Further, the obtained radiation detection element 100 is connected to the integrated circuit substrate 50 provided with the third metal electrode 60 via the bumps 65. The second metal electrode 13 is connected to the third metal electrode 60 to obtain the radiation detector 500. In the present embodiment, a known material can be used for the bump 65, and examples thereof include gold (Au) and solder.

以上説明したように、本発明においては、高精度に基板を切断可能なダイサーをダイシング工程に用いることにより、基板に生じる加工歪を小さくして、チッピングの長さを上述した範囲に制御することができる。 As described above, in the present invention, by using a dicer capable of cutting the substrate with high accuracy in the dicing process, the processing strain generated in the substrate is reduced, and the chipping length is controlled within the above-described range. Can do.

(CdZnTe単結晶の製造)
実施例として、CdTe単結晶基板を用いた。CdTe単結晶はVGF法(例えば、特開2010−150138号公報)により成長させた。常圧容器の中心にリザーバ部を有する石英アンプルを配置し、石英アンプル内にはpBN(pyrolytic Boron Nitride)製ルツボを配置した。石英アンプルを包囲するようにヒータを設けた。ヒータは、ルツボに対応する部分とリザーバ部に対応する部分とを別々の温度に加熱でき、かつ常圧容器内の温度分布を細かく制御できる3段の多段型構造を有するものを用いた。
(Production of CdZnTe single crystal)
As an example, a CdTe single crystal substrate was used. CdTe single crystals were grown by the VGF method (for example, JP 2010-150138 A). A quartz ampoule having a reservoir portion was disposed at the center of the atmospheric pressure vessel, and a crucible made of pBN (pyrolytic Boron Nitride) was disposed in the quartz ampoule. A heater was provided so as to surround the quartz ampule. A heater having a three-stage multistage structure that can heat the portion corresponding to the crucible and the portion corresponding to the reservoir to different temperatures and finely control the temperature distribution in the atmospheric container.

石英アンプルのリザーバ部に易揮発性元素であるCd単体を約10g入れるとともに、pBN製ルツボにCdTe原料を約3000g入れて石英アンプル内に配置した後、石英アンプルを真空封止した。このとき、CdTe原料には、100ppmwtの塩素をドープして合成したCdTe多結晶をブロック状に分割したものを用いた。 About 10 g of Cd, which is a readily volatile element, was placed in the reservoir portion of the quartz ampule, and about 3000 g of CdTe raw material was placed in a pBN crucible and placed in the quartz ampule, and then the quartz ampule was vacuum sealed. At this time, the CdTe raw material used was a CdTe polycrystal synthesized by doping with 100 ppm wt of chlorine divided into blocks.

そして、ヒータで加熱昇温してルツボ内のCdTe原料を融解した後、ヒータでリザーバ部を780℃に加熱して、Cd蒸気圧を0.116MPaに制御を行うとともに、ルツボを1100℃に加熱した。さらに、常圧容器内に所望の温度分布が生じるように各ヒータへの供給電力量を制御装置で制御しながら加熱炉内の温度を0.1℃/hrの降温速度で徐々に下げて、約200時間かけて原料融液の表面から下方に向かってCdTe単結晶を成長させた。 Then, the temperature is raised with a heater to melt the CdTe raw material in the crucible, and the reservoir is heated to 780 ° C. with the heater to control the Cd vapor pressure to 0.116 MPa and the crucible is heated to 1100 ° C. did. Furthermore, the temperature in the heating furnace is gradually decreased at a temperature decrease rate of 0.1 ° C./hr while controlling the amount of electric power supplied to each heater so that a desired temperature distribution is generated in the normal pressure vessel, A CdTe single crystal was grown downward from the surface of the raw material melt over about 200 hours.

その後、CdTe単結晶を、950℃、20時間、Cd蒸気圧を0.130MPa印加しながら、加熱し(ポストアニール)、直径78mm、長さ60mmのClドープn型CdZnTe単結晶インゴットを得た。   Thereafter, the CdTe single crystal was heated at 950 ° C. for 20 hours while applying a Cd vapor pressure of 0.130 MPa (post-annealing) to obtain a Cl-doped n-type CdZnTe single crystal ingot having a diameter of 78 mm and a length of 60 mm.

製造したCdTe単結晶インゴットから厚さ1800μm、30mm×30mmのCdTe基板を5枚切り出して1バッチの加工単位として、処理工程を全て5枚1組で行った。粒径2μmのアルミナ砥粒を水に溶かした研磨液とガラス研磨板を用いてラッピング処理を行い、厚さが1400μmとなるように加工した。次に、研磨布付きの回転研磨盤を用いて、以下の条件によりポリシング(鏡面研磨)処理を行った。 Five CdTe substrates having a thickness of 1800 μm and a thickness of 30 mm × 30 mm were cut out from the manufactured CdTe single crystal ingot, and the processing steps were performed as a set of 5 sheets as a batch. A lapping treatment was performed using a polishing liquid obtained by dissolving alumina abrasive grains having a particle diameter of 2 μm in water and a glass polishing plate, and the thickness was processed to 1400 μm. Next, polishing (mirror polishing) treatment was performed under the following conditions using a rotary polishing machine with a polishing cloth.

(ポリシング条件)
鏡面研磨液:以下の割合で各成分を混合した鏡面研磨液
次亜塩素酸カルシウム水溶液(有効塩素70%):1L
炭酸水素カルシウム:150g
水:4L
塩化カルシウム:60g
研磨機の定盤径:300mmφ
定盤回転数:50rpm
加工圧:70g/cm
研磨時間:70min
研磨流量:2L/hr
研磨量:50μm
研磨布:発泡ポリウレタン系軟質クロス
(Policing condition)
Mirror polishing liquid: Mirror polishing liquid in which each component is mixed in the following ratio: Calcium hypochlorite aqueous solution (effective chlorine 70%): 1 L
Calcium bicarbonate: 150g
Water: 4L
Calcium chloride: 60g
Surface plate diameter of polishing machine: 300mmφ
Plate rotation speed: 50 rpm
Processing pressure: 70 g / cm 2
Polishing time: 70 min
Polishing flow rate: 2L / hr
Polishing amount: 50 μm
Polishing cloth: polyurethane foam soft cloth

(金属電極の形成)
1容量%の臭素を混合したメタノール溶液のエッチング液に基板を浸漬し、室温で基板の研磨面をエッチングして基板の表面から加工変質層を除去した。メタノールを用いて基板からエッチング液を除去し、純水を用いて基板からメタノールを除去した。
(Formation of metal electrodes)
The substrate was immersed in an etching solution of a methanol solution mixed with 1% by volume of bromine, and the polished surface of the substrate was etched at room temperature to remove the work-affected layer from the surface of the substrate. The etching solution was removed from the substrate using methanol, and methanol was removed from the substrate using pure water.

その後、基板を温度50℃、濃度0.83g/Lの塩化白金酸(IV)六水和物水溶液に塩酸を混合しためっき液に浸漬することで、基板表面にPtを析出させて金属電極を形成した。その後、基板に窒素ガスを噴きつけることにより乾燥させて、Pt//Pt電極基板(基板の両面にPt電極が配置された基板)を得た。 Thereafter, the substrate is immersed in a plating solution in which hydrochloric acid is mixed with an aqueous solution of chloroplatinic acid (IV) hexahydrate having a temperature of 50 ° C. and a concentration of 0.83 g / L, thereby depositing Pt on the surface of the substrate to form a metal electrode. Formed. Thereafter, the substrate was dried by spraying nitrogen gas to obtain a Pt // Pt electrode substrate (a substrate in which Pt electrodes are arranged on both sides of the substrate).

Pt//Pt電極を備えた基板は、ダイシング工程により、チップ基板20へと分割し、放射線検出素子100を形成した。 The substrate provided with the Pt // Pt electrode was divided into the chip substrate 20 by the dicing process, and the radiation detection element 100 was formed.

(ダイシング工程)
本実施例においては、準備した基板にダイシング工程を行った。実施例として、ダイサーを用い、比較例としてスライサーを用いて基板をダイシングした。実施例及び比較例のダイシングの条件を表1に示す。
(Dicing process)
In this example, a dicing process was performed on the prepared substrate. The substrate was diced using a dicer as an example and a slicer as a comparative example. Table 1 shows the dicing conditions of the examples and comparative examples.

図3は、本実施例に係るダイシングにより生じたチッピングの状態を示す図である。本実施例に係るダイシングにより生じたチッピングの長さは、300μm以下であった。また、実施例及び比較例についてチッピングの長さを表2に示す。
FIG. 3 is a diagram illustrating a state of chipping caused by dicing according to the present embodiment. The length of chipping generated by dicing according to the present example was 300 μm or less. Table 2 shows the chipping lengths for the examples and comparative examples.

(リーク電流)
実施例及び比較例の放射線検出素子100について、CdTe基板を挟むように対向した両電極間に電圧を印加し、放射線源からの照射をしない状態でリーク電流を測定した。図4(a)にチッピングの長さとリーク電流の関係を示す。図4(a)から、チッピングの長さが300μm迄はリーク電流が少ないことがわかる。
(Leakage current)
For the radiation detection element 100 of the example and the comparative example, a voltage was applied between both electrodes facing each other so as to sandwich the CdTe substrate, and the leakage current was measured without irradiation from the radiation source. FIG. 4A shows the relationship between chipping length and leakage current. FIG. 4 (a) shows that the leakage current is small until the chipping length is 300 μm.

(放射線スペクトルの半値幅)
実施例及び比較例の放射線検出素子100に対して、57Coを管球に使用した放射線源よりガンマ線を照射し、その時検出された122.1keVのエネルギースペクトラ強度の半値幅(FWHM)を測定した。図4(b)にチッピングの長さと半値幅の関係を示す。図4(b)から、チッピングの長さが300μmを超えると、半値幅が急激に上昇することが明らかとなった。
(Half width of radiation spectrum)
The radiation detection element 100 of the example and the comparative example was irradiated with gamma rays from a radiation source using 57 Co as a tube, and the half width (FWHM) of the energy spectrum intensity of 122.1 keV detected at that time was measured. . FIG. 4B shows the relationship between the chipping length and the full width at half maximum. From FIG. 4 (b), it has been clarified that when the chipping length exceeds 300 μm, the half width increases rapidly.

(放射線ピーク強度)
実施例及び比較例の放射線検出素子100に対して、57Coを管球に使用した放射線源よりガンマ線を照射し、その時検出された122.1keVのエネルギースペクトラのピーク強度(Intensity)を測定した。図5にチッピングの長さと放射線ピーク強度の関係を示す。図5から、チッピングの長さが300μmを超えると、放射線ピーク強度が急激に低下することが明らかとなった。
(Radiation peak intensity)
The radiation detection element 100 of the example and the comparative example was irradiated with gamma rays from a radiation source using 57 Co as a tube, and the peak intensity (Intensity) of the 122.1 keV energy spectrum detected at that time was measured. FIG. 5 shows the relationship between the chipping length and the radiation peak intensity. From FIG. 5, it was found that when the chipping length exceeds 300 μm, the radiation peak intensity rapidly decreases.

11:第1の金属電極、13:第2の金属電極、20:チップ基板、60:第3の金属電極、65:バンプ、100:放射線検出素子、150:チッピング、155:縁部、171:チップ基板の側面、173:チップ基板の側面、181:線、183:線、190:最大距離、500:放射線検出器 11: 1st metal electrode, 13: 2nd metal electrode, 20: Chip substrate, 60: 3rd metal electrode, 65: Bump, 100: Radiation detection element, 150: Chipping, 155: Edge, 171: Side surface of chip substrate, 173: Side surface of chip substrate, 181: Line, 183: Line, 190: Maximum distance, 500: Radiation detector

Claims (5)

CdTe又はCdZnTeからなるチップ基板であって、
前記チップ基板の端部にチッピングを有し、
前記チッピングの長さが300μm以下であることを特徴とするチップ基板。
A chip substrate made of CdTe or CdZnTe,
Having chipping at the end of the chip substrate;
A chip substrate having a chipping length of 300 μm or less.
前記チッピングの長さは、前記チップ基板の第1の側面の稜線の第1の延長線を引き、前記チップ基板のチッピングが生じた縁部と前記第1の延長線とが直交の関係をなす各長さのうち最大距離をa1とし、前記第1の側面と直交関係にある第2の側面の稜線から引いた第2の延長線に対してもチッピングが生じた縁部と前記第2の延長線とが直交の関係をなす各長さのうち最大距離をa2として、a1<a2の関係を有し、且つ、前記a1の長さ方向に対して最大距離とし、a1=a2の場合には、前記a1及び前記a2の長さ方向に対する最大距離であることを特徴とする請求項1に記載のチップ基板。 The chipping length is such that the first extension line of the ridge line of the first side surface of the chip substrate is drawn, and the edge portion where the chipping of the chip substrate occurs and the first extension line are orthogonal to each other. The maximum distance among the lengths is a1, and the edge portion where chipping has occurred with respect to the second extension line drawn from the ridge line of the second side surface orthogonal to the first side surface and the second side Of the lengths orthogonal to the extension line, the maximum distance is a2, the relationship is a1 <a2, and the maximum distance is in the length direction of a1, where a1 = a2. The chip substrate according to claim 1, wherein is a maximum distance in the length direction of the a1 and the a2. 請求項1又は2に記載のチップ基板と、
前記チップ基板の第1の面に配設された第1の金属電極と、
前記第1の面と対向する前記チップ基板の第2の面に配設された第2の金属電極と、を備えることを特徴とする放射線検出器。
The chip substrate according to claim 1 or 2,
A first metal electrode disposed on a first surface of the chip substrate;
A radiation detector, comprising: a second metal electrode disposed on a second surface of the chip substrate facing the first surface.
CdTe又はCdZnTeからなる基板を準備し、
前記基板の第1の面と、前記第1の面に対向する前記基板の第2の面を研磨し、
前記基板の第1の面に第1の金属電極を形成し、前記第1の金属電極と対向するように前記基板の第2の面に第2の金属電極を形成し、
前記第1の金属電極と前記第2の金属電極とが配設された前記基板を所定の形状に切断し、
前記第1の金属電極と前記第2の金属電極とが配設されたチップ基板の端部に生じるチッピングの長さが300μm以下となるように、前記チップ基板を形成することを含むことを特徴とする放射線検出器の製造方法。
Preparing a substrate made of CdTe or CdZnTe,
Polishing the first surface of the substrate and the second surface of the substrate facing the first surface;
Forming a first metal electrode on the first surface of the substrate, and forming a second metal electrode on the second surface of the substrate so as to face the first metal electrode;
Cutting the substrate on which the first metal electrode and the second metal electrode are disposed into a predetermined shape;
Forming the chip substrate such that a chipping length generated at an end portion of the chip substrate on which the first metal electrode and the second metal electrode are disposed is 300 μm or less. A method of manufacturing a radiation detector.
前記チッピングの長さは、前記チップ基板の第1の側面の稜線の第1の延長線を引き、前記チップ基板のチッピングが生じた縁部と前記第1の延長線とが直交の関係をなす各長さのうち最大距離をa1とし、前記第1の側面と直交関係にある第2の側面の稜線から引いた第2の延長線に対してもチッピングが生じた縁部と前記第2の延長線とが直交の関係をなす各長さのうち最大距離をa2として、a1<a2の関係を有し、且つ、前記a1の長さ方向に対して最大距離であり、a1=a2の場合には、前記a1及び前記a2の長さ方向に対する最大距離であることを特徴とする請求項4に記載の放射線検出器の製造方法。 The chipping length is such that the first extension line of the ridge line of the first side surface of the chip substrate is drawn, and the edge portion where the chipping of the chip substrate occurs and the first extension line are orthogonal to each other. The maximum distance among the lengths is a1, and the edge portion where chipping has occurred with respect to the second extension line drawn from the ridge line of the second side surface orthogonal to the first side surface and the second side Of the lengths orthogonal to the extension line, the maximum distance is a2, the relationship is a1 <a2, and the maximum distance with respect to the length direction of a1, where a1 = a2 The method of manufacturing a radiation detector according to claim 4, wherein the distance is a maximum distance in a length direction of the a <b> 1 and the a <b> 2.
JP2014164207A 2014-08-12 2014-08-12 Chip substrate made of CdTe or CdZnTe, radiation detector using the same, and manufacturing method of radiation detector Active JP6366418B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014164207A JP6366418B2 (en) 2014-08-12 2014-08-12 Chip substrate made of CdTe or CdZnTe, radiation detector using the same, and manufacturing method of radiation detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014164207A JP6366418B2 (en) 2014-08-12 2014-08-12 Chip substrate made of CdTe or CdZnTe, radiation detector using the same, and manufacturing method of radiation detector

Publications (2)

Publication Number Publication Date
JP2016040524A true JP2016040524A (en) 2016-03-24
JP6366418B2 JP6366418B2 (en) 2018-08-01

Family

ID=55540887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014164207A Active JP6366418B2 (en) 2014-08-12 2014-08-12 Chip substrate made of CdTe or CdZnTe, radiation detector using the same, and manufacturing method of radiation detector

Country Status (1)

Country Link
JP (1) JP6366418B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11552174B2 (en) * 2018-02-09 2023-01-10 Jx Nippon Mining & Metals Corporation Compound semiconductor and method for producing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03207158A (en) * 1990-01-09 1991-09-10 Ricoh Co Ltd Complete contact type line sensor
JPH06204545A (en) * 1992-12-28 1994-07-22 Japan Energy Corp Manufacture of semiconductor radiation detector

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03207158A (en) * 1990-01-09 1991-09-10 Ricoh Co Ltd Complete contact type line sensor
JPH06204545A (en) * 1992-12-28 1994-07-22 Japan Energy Corp Manufacture of semiconductor radiation detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11552174B2 (en) * 2018-02-09 2023-01-10 Jx Nippon Mining & Metals Corporation Compound semiconductor and method for producing the same

Also Published As

Publication number Publication date
JP6366418B2 (en) 2018-08-01

Similar Documents

Publication Publication Date Title
KR101155029B1 (en) Silicon Wafer Manufacturing Method and Silicon Wafer
JP5953116B2 (en) Compound semiconductor crystal for radiation detection element, radiation detection element, and radiation detector
TWI615943B (en) Diamond semiconductor system and method
KR102654261B1 (en) Ga2O3-BASED SINGLE CRYSTAL SUBSTRATE
JP6310794B2 (en) Radiation detection element, radiation detector, and manufacturing method of radiation detection element
JP7250919B2 (en) Method for manufacturing semiconductor wafer, radiation detection element, radiation detector, and compound semiconductor single crystal substrate
JP2007207875A (en) Silicon wafer and manufacturing method thereof
KR100637915B1 (en) Silicon electrode plate
JP2011176090A (en) Ultraviolet sensor and method for manufacturing same
JP2022113874A (en) Cadmium zinc telluride single crystal substrate and production method therefor
JP2009200222A (en) Ultraviolet sensor and its manufacturing method
JP2007207876A (en) High-frequency diode and manufacturing method thereof
JP6366418B2 (en) Chip substrate made of CdTe or CdZnTe, radiation detector using the same, and manufacturing method of radiation detector
JP2007204324A (en) Manufacturing method of high purity zinc oxide single crystal, and high purity zinc oxide single crystal
JP6713341B2 (en) Compound semiconductor substrate and manufacturing method thereof
JP7265004B2 (en) Method for manufacturing semiconductor wafer, radiation detection element, radiation detector, and compound semiconductor single crystal substrate
JP6097854B2 (en) Method for producing compound semiconductor crystal for radiation detection element
JP7217715B2 (en) Compound semiconductor substrate and manufacturing method thereof
JP6725212B2 (en) CdTe compound semiconductor and radiation detection element using the same
JP2003007686A (en) Heater made of silicon and semiconductor-manufacturing apparatus using the same
CN111077560B (en) X-ray and gamma-ray detector based on magnesium-doped gallium oxide single crystal
JP6567865B2 (en) Ga2O3 single crystal substrate
JP2019182744A (en) Ga2O3-BASED SINGLE CRYSTAL SUBSTRATE
EP2302110A1 (en) Method of manufacturing a si(1-v-w-x)cwalxnv substrate, method of manufacturing an epitaxial wafer, si(1-v-w-x)cwalxnv substrate, and epitaxial wafer
JP2019212928A (en) Cdte-based compound semiconductor and radiation detector using the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20170313

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20170313

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20171221

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20180123

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20180213

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20180626

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180703

R150 Certificate of patent or registration of utility model

Ref document number: 6366418

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250