JP2016014627A - Semiconductor device, semiconductor device manufacturing method, and infrared sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device that suppresses the deterioration of an S/N ratio.SOLUTION: The present invention provides a semiconductor device having a multilayer substrate in which a support substrate and an insulating film are layered, wherein the semiconductor device has: an integrated circuit formed on the multilayer substrate; a wiring layer formed in the insulating film; an electrode opening, formed on the wiring layer, for supplying ground potential to the support substrate; a connection hole formed near the electrode opening and extending from the face of the wiring layer where the electrode opening is formed to the support substrate; and a conductive material formed in shape of a film in an area that includes the surfaces of the electrode opening and connection hole, the conductive material electrically connecting the support substrate and the electrode opening.

Description

  The present invention relates to a semiconductor device, a semiconductor device manufacturing method, and an infrared sensor.

  Conventionally, a semiconductor device having an SOI (Silicon On Insulator) substrate structure in which a support substrate, an insulating film, and a silicon film are stacked is known.

  As a semiconductor device having an SOI substrate structure, an infrared sensor module having a structure in which an interposer having electrodes and an optical lens for collecting infrared rays sandwich a support substrate on which an infrared sensor and a signal amplification circuit are formed is known. (For example, refer to Patent Document 1).

  However, in the above-described conventional technology, since the support substrate is in an electrically floating state, for example, when it is affected by electromagnetic noise suddenly mixed from the outside, an S / S as an infrared sensor module is used. The N ratio may be deteriorated.

  Therefore, an object of the present invention is to provide a semiconductor device that suppresses the deterioration of the S / N ratio.

  In one proposal, a semiconductor device having a laminated substrate in which a support substrate and an insulating film are laminated, an integrated circuit formed on the laminated substrate, a wiring layer formed on the insulating film, An electrode opening formed in the wiring layer for supplying a ground potential to the support substrate, and formed in the vicinity of the electrode opening, extending from the surface of the wiring layer on which the electrode opening is formed to the support substrate And a conductive material formed in a region including the electrode opening and the surface of the connection hole. The conductive material electrically connects the support substrate and the electrode opening. A semiconductor device is provided which connects to the device.

  According to one embodiment, a semiconductor device that suppresses deterioration of the S / N ratio can be provided.

1 is a diagram illustrating a schematic configuration of a semiconductor device according to a first embodiment. The figure for demonstrating the cross section in the XX line of FIG. The enlarged view of the electrode formation area in FIG. FIG. 6 is a diagram illustrating another schematic configuration of the semiconductor device according to the first embodiment. FIG. 6 is a view for explaining the method for manufacturing the semiconductor device according to the first embodiment. FIG. 6 is a view for explaining the method for manufacturing the semiconductor device according to the first embodiment. FIG. 6 is a view for explaining the method for manufacturing the semiconductor device according to the first embodiment. FIG. 6 is a view for explaining the method for manufacturing the semiconductor device according to the first embodiment. FIG. 6 is a view for explaining the method for manufacturing the semiconductor device according to the first embodiment. The figure which illustrates the shape of the connection hole of the semiconductor device which concerns on 2nd Embodiment. The figure which illustrates the shape of the connection hole of the semiconductor device which concerns on 2nd Embodiment. The figure which illustrates the shape of the connection hole of the semiconductor device which concerns on 2nd Embodiment. The figure which illustrates schematic structure of the semiconductor device which concerns on 3rd Embodiment. The figure which looked at the sensor element from the direction parallel to the Z-axis in FIG. The figure for demonstrating the relationship between a thermopile logarithm and the S / N ratio of an infrared sensor output.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in this specification and drawing, about the component which has the substantially same function structure, the duplicate description is abbreviate | omitted by attaching | subjecting the same code | symbol.

[First Embodiment]
First, an example of a schematic configuration of the semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view illustrating a schematic configuration of the semiconductor device according to the first embodiment. FIG. 2 is a view for explaining a cross section taken along line XX of FIG.

  The semiconductor device according to the first embodiment is a semiconductor device having a stacked substrate (SOI substrate) structure in which a support substrate, an insulating film, and a silicon film are stacked. Further, as shown in FIGS. 1 and 2, the semiconductor device according to the first embodiment includes a sensor formation region A1, an integrated circuit formation region A2, and an electrode formation region A3.

  The sensor formation region A1 is a region where a sensor element 110 described later is formed.

  In the sensor formation region A1, an insulating film 102 supported in a hollow state with respect to the support substrate 101 by one or a plurality of beam portions is formed. That is, the support substrate 101 is removed to form a hollow portion below the insulating film 102 and the beam portion in the sensor formation region A1. Examples of the insulating film 102 include a silicon oxide layer that is a buried oxide (BOX) formed on the support substrate 101.

  A sensor element 110 is formed on the insulating film 102 in the sensor formation region A1. Although it does not specifically limit as the sensor element 110, For example, it is preferable to use optical sensors, such as an infrared sensor.

  The shape and arrangement of the beam portion and the shape and area of the insulating film 102 supported in a hollow state are not particularly limited because they vary depending on the sensor application and use.

  The integrated circuit formation region A2 is a region where an integrated circuit such as a transistor for processing a signal output from the sensor element 110 is formed.

  In the integrated circuit formation region A2, a silicon film 120 in which an integrated circuit is manufactured (built) through an insulating film 102 formed on the support substrate 101 is formed. The integrated circuit is electrically connected to the sensor element 110 and processes a signal output from the sensor element 110. The integrated circuit is not particularly limited, and examples thereof include a signal amplification circuit that amplifies a signal output from the sensor element 110.

  The electrode formation region A3 includes wiring and electrodes for supplying a power supply voltage, a ground voltage, and the like, and wiring and electrodes for taking out a signal voltage and the like for the integrated circuit fabricated in the sensor element 110 and the silicon film 120. This is a region where the wiring layer 131 is formed.

  Hereinafter, as an example of the wiring layer 131 formed in the electrode formation region A3, a region for supplying a ground voltage to the integrated circuit will be described with reference to FIG. FIG. 3 is an enlarged view of the electrode formation region A3 in FIG.

  As shown in FIG. 3, a silicon oxide layer 130 and a wiring layer 131 are formed on the insulating film 102 formed on the support substrate 101 in the electrode formation region A3.

  The silicon oxide layer 130 is used as a base for forming an electrode pad.

  The wiring layer 131 includes wirings ME1, ME2, and ME3 formed in multiple layers, holes TH1 and TH2 that electrically connect the wirings, and an interlayer insulating film 1310 that is provided between the wirings and insulates the wirings. . Specifically, the wiring ME1 and the wiring ME2 are electrically connected through the hole TH1, and the wiring ME2 and the wiring ME3 are electrically connected through the hole TH2. Each wiring and hole is insulated by an interlayer insulating film 1310.

  Further, the wiring ME1 is electrically connected to the integrated circuit formed in the silicon film 120 described above. An electrode opening 131A is formed on the surface in the + Z direction of the wiring ME3.

  The electrode opening 131A is a recess formed on the surface in the + Z direction of the wiring layer 131 (hereinafter referred to as “surface 131B of the wiring layer”), and the wiring ME3 is exposed at the bottom of the recess. When the ground potential is supplied to the electrode opening 131A, the ground potential is supplied to the integrated circuit through the wiring ME3, the hole TH2, the wiring ME2, the hole TH1, and the wiring ME1.

  In addition, a connection hole H1 is formed in the electrode formation region A3.

  The connection hole H1 is formed in the vicinity of the electrode opening 131A, and extends from the surface of the wiring layer 131 where the electrode opening 131A is formed, that is, the surface 131B of the wiring layer to the support substrate 101.

  A conductive material 132 is formed in a region including the electrode opening 131A, the surface 131B of the wiring layer, and the surface of the connection hole H1. The conductive material 132 electrically connects the support substrate 101 and the electrode opening 131A. Although it does not specifically limit as the electroconductive material 132, For example, a metal is mentioned.

  When the ground potential is supplied to the electrode opening 131A, the ground potential is applied to the support substrate 101 via the electrode opening 131A, the surface 131B of the wiring layer, and the conductive material 132 formed on the surface of the connection hole H1. Supplied.

  In the semiconductor device according to the first embodiment, for example, as shown in FIG. 4, the electrode opening 131 </ b> A formed in the wiring layer 131 is bonded to the interposer 105 via the conductive bonding member 133, and the support substrate 101 is The optical substrate 106 may be bonded via a bonding member.

  Hereinafter, a semiconductor device including the interposer 105 and the optical substrate 106 will be described with reference to FIG. FIG. 4 is a diagram illustrating another schematic configuration of the semiconductor device according to the first embodiment.

  The interposer 105 can be a glass substrate such as a TGV substrate on which the electrode 1050 is formed. The interposer 105 is bonded to the wiring layer 131 via a bonding member 107 such as a glass frit. The electrode 1050 of the interposer 105 is electrically connected to an electrode opening 131 </ b> A formed in the wiring layer 131 through the conductive material 132 and the conductive bonding member 133. Although it does not specifically limit as the electroconductive joining member 133, For example, silver (Ag) is mentioned.

  The optical substrate 106 is not particularly limited as long as it is a substrate having an optical part, and may be, for example, an optical window. For example, a condensing device such as a silicon lens that condenses light incident on the sensor element 110 is preferably used. Can be used. The optical substrate 106 is bonded to the support substrate 101 via a bonding member 108 such as a glass frit. When a silicon lens is used as the optical substrate 106, it is formed by, for example, directly processing a Si substrate by anisotropic dry etching or etch back.

  Next, a method for manufacturing the semiconductor device according to the first embodiment will be described with reference to FIGS. 5 to 9 are views for explaining the method of manufacturing the semiconductor device according to the first embodiment. In FIGS. 5 to 7, the diagrams on the right side are enlarged views of the electrode formation region A3 in the diagrams on the left side.

  First, the sensor element 110, the silicon film 120, the wiring layer 131, and the like are formed on the insulating film 102 formed on the support substrate 101. The region where the sensor element 110 is formed is the sensor formation region A1, the region where the silicon film 120 where the integrated circuit is formed is formed is the integrated circuit formation region A2, and the region where the wiring layer 131 is formed is This is an electrode formation region A3.

  Subsequently, the connection hole H1 and the groove H2 are formed (FIG. 5). Specifically, a connection hole H1 extending from the surface 131B of the wiring layer to the support substrate 101 is formed in the vicinity of the electrode opening 131A in the electrode formation region A3. Further, a groove H2 extending from the surface in the + Z direction of the silicon film 120 in the integrated circuit formation region A2 to the support substrate 101 is formed. At this time, it is preferable to perform simultaneously the process of forming the groove part H2, and the process of forming the connection hole H1. Thereby, since the process of forming the connection hole H1 and the process of forming the groove part H2 can be combined, the number of processes can be reduced.

  Subsequently, the support substrate 101 is etched so that the sensor formation region A1 is in a hollow state (FIG. 6). Specifically, the support substrate 101 is anisotropically etched from the surface in the −Z direction using an etchant such as tetramethylammonium hydroxide (TMAH) or potassium hydroxide (KOH). Thereby, the area | region supported in the hollow state by the 1 or several beam part on the support substrate 101 is formed.

  Subsequently, a conductive material 132 is formed (FIG. 7). Specifically, by forming a conductive material 132 in a region including the electrode opening 131A, the surface 131B of the wiring layer, and the surface of the connection hole H1, the support substrate 101 and the electrode opening 131A are electrically connected. Connecting. Thus, since the support substrate 101 has the same potential as the electrode opening 131A, when the ground potential is supplied to the electrode opening 131A, the ground potential is supplied to the support substrate 101. In addition, a conductive bonding member 133 is formed in a region including the electrode opening 131A.

  Subsequently, the support substrate 101 (wiring layer 131) and the interposer 105 are bonded (FIG. 8). Specifically, the support substrate 101 (wiring layer 131) and the interposer 105 are bonded via a bonding member 107 such as glass frit. As a result, the conductive bonding member 133 formed in the region including the electrode opening 131A of the wiring layer 131 and the electrode 1050 of the interposer 105 are electrically connected. That is, the electrode opening 131A and the electrode 1050 of the interposer 105 are electrically connected.

  Subsequently, the support substrate 101 and the optical substrate 106 are bonded (FIG. 9). Specifically, the support substrate 101 and the optical substrate 106 are bonded via a bonding member 108 such as a glass frit.

  Through the above steps, the semiconductor device according to the first embodiment is manufactured.

  Next, operations and effects of the semiconductor device and the method for manufacturing the semiconductor device according to the first embodiment will be described.

  By the way, in the case where the support substrate 101 on which the sensor element 110 and the integrated circuit are formed is formed so as to be sandwiched between the interposer 105 and the optical substrate 106, the support substrate 101 is positioned on one side of the support substrate 101 (+ Z direction in FIG. 4). The interposer 105 is joined. The optical substrate 106 is bonded to the other side of the support substrate 101 (the −Z direction in FIG. 4). For this reason, a potential cannot be directly applied to the support substrate 101. As a result, since the support substrate 101 is in an electrically floating state, the S / N ratio of the signal output from the sensor element 110 is affected, for example, by the influence of electromagnetic noise suddenly mixed from the outside. It may cause deterioration.

  However, according to the semiconductor device of the first embodiment, the connection hole H1 formed in the vicinity of the electrode opening 131A and extending from the surface 131B of the wiring layer to the support substrate 101, and the electrode opening 131A and the connection hole H1. And a conductive material 132 formed in a region including the surface of the substrate. In addition, the conductive material 132 electrically connects the support substrate 101 and the electrode opening 131A. For this reason, the potential of the support substrate 101 can be fixed to the same potential as that of the electrode opening 131A. For example, when a ground potential is supplied to the electrode opening 131A, the potential is applied to the support substrate 101 via the conductive material 132. Is also supplied with ground potential. As a result, the potential of the support substrate 101 can be stabilized.

  Further, since the potential of the support substrate 101 is stabilized, the potential of the support substrate 101 bounces due to unnecessary electromagnetic noise or through current that enters the sensor element 110 and the integrated circuit formed on the support substrate 101 via the insulating film 102. Can be prevented. As a result, the deterioration of the S / N ratio can be suppressed, and a stable operation of the semiconductor device can be realized.

  Furthermore, since the semiconductor device according to the first embodiment includes the optical substrate 106, the amount of light incident on the sensor element 110 can be increased. As a result, the sensitivity of the sensor element 110 can be improved.

  As described above, according to the semiconductor device of the first embodiment, it is possible to provide a semiconductor device that suppresses the deterioration of the S / N ratio.

[Second Embodiment]
Next, a semiconductor device and a method for manufacturing the semiconductor device according to the second embodiment of the present invention will be described.

  The semiconductor device according to the second embodiment is characterized in that the opening diameter of the connection hole H1 in the surface 131B of the wiring layer is larger than the opening diameter of the connection hole H1 in the support substrate 101.

  The semiconductor device according to the second embodiment has the same configuration as that of the semiconductor device according to the first embodiment except for the above. For this reason, in the following description, it demonstrates focusing on the point which is different from 1st Embodiment.

  The semiconductor device according to the second embodiment has a connection hole H1 in which the opening diameter of the connection hole H1 in the surface 131B of the wiring layer is larger than the opening diameter of the connection hole H1 in the support substrate 101. For this reason, the conductive material 132 can be more stably formed on the surface of the connection hole H1.

  The shape of the connection hole H1 is not particularly limited as long as the opening diameter of the connection hole H1 in the surface 131B of the wiring layer is larger than the opening diameter of the connection hole H1 in the support substrate 101. For example, FIG. 10, FIG. Is mentioned.

  10, FIG. 11 and FIG. 12 are diagrams illustrating the shape of the connection hole H1 of the semiconductor device according to the second embodiment.

  As shown in FIG. 10, the shape of the connection hole H1 is a staircase having an opening diameter d1 in the support substrate 101, the insulating film 102, and the silicon oxide layer 130, and having an opening diameter d2 larger than the opening diameter d1 in the wiring layer 131. It is preferable that it is a shape. The connection hole H1 having the shape shown in FIG. 10 is formed by using, for example, a known semiconductor manufacturing process, a resist pattern formation by a photolithography process and an oxide film etching process by a dry etching process (vertical etching twice). Can do.

  Further, as shown in FIG. 11, the shape of the connection hole H1 has an opening diameter d3 in the support substrate 101, the insulating film 102, and the silicon oxide layer 130, and the wiring layer extends from the interface between the wiring layer 131 and the silicon oxide layer 130. It is preferable that the opening diameter is a taper shape extending from d3 to d4 toward the surface of 131. The connection hole H1 having the shape shown in FIG. 11 can be formed, for example, by using a resist pattern formation by a photolithography process and an oxide film etching process by a dry etching process (taper etching).

  Further, as shown in FIG. 12, the connection hole H1 has, for example, a round edge shape having an opening diameter d5 in the support substrate 101, the insulating film 102, and the silicon oxide layer 130, and having an opening diameter d6 on the surface of the wiring layer 131. Preferably there is. The connection hole H1 having the shape shown in FIG. 12 can be formed, for example, by using a resist pattern formation by a photolithography process and an oxide film etching process by a dry etching process (wet etching + vertical etching).

  As described above, according to the semiconductor device of the second embodiment, it is possible to provide a semiconductor device that suppresses the deterioration of the S / N ratio.

  In particular, in the second embodiment, the opening diameter of the connection hole on the surface of the integrated circuit where the electrode opening is formed is larger than the opening diameter of the connection hole in the support substrate. For this reason, a conductive material can be more stably formed on the surface of the connection hole.

[Third Embodiment]
In the third embodiment, a semiconductor device including an infrared sensor as the sensor element 110 will be described.

  The semiconductor device according to the third embodiment is characterized by including an infrared sensor as the sensor element 110. The semiconductor device according to the third embodiment has the same configuration as that of the semiconductor device according to the first embodiment except for the above. For this reason, in the following description, it demonstrates focusing on the point which is different from 1st Embodiment.

  FIG. 13 is a diagram illustrating a schematic configuration of the semiconductor device according to the third embodiment. FIG. 14 is a view of the sensor element viewed from a direction parallel to the Z-axis in FIG. 13, and is a plan view of an infrared sensor using a thermopile.

  As shown in FIG. 14, the infrared sensor includes an infrared absorption unit 203 having a thin film structure made of a material that absorbs infrared rays, and a temperature sensor unit 204 that detects a temperature change caused by the absorption of infrared rays by the infrared absorption unit 203. .

  The infrared absorbing portion 203 is separated from the support substrate 201 by a through hole (not shown) formed in the support substrate 201. That is, the infrared absorbing unit 203 can be configured such that a through hole is disposed below the infrared absorbing unit 203 and does not contact the support substrate 201.

  A thermopile can be used as the temperature sensor unit 204. The thermopile has a configuration in which many thermocouples are connected in series, and the thermocouple has a configuration in which a first semiconductor material 208 and a second semiconductor material 209 are connected in series. As the first semiconductor material 208, a thermopile material such as N-type polysilicon can be used, for example. As the second semiconductor material 209, a thermopile material such as P-type polysilicon can be used. The number of thermocouples connected in series is the number N of thermopile pairs.

  The infrared absorption part 203 and the temperature sensor part 204 can be formed on the heat insulation structure 202 mentioned later.

  The heat insulating structure 202 is formed in order to improve the thermal insulation with the support substrate 201 for the purpose of increasing the sensitivity of the infrared sensor, and the support substrate 201 below the heat insulating structure 202 is formed by a method such as etching. Has been removed using. The heat insulating structure 202 only needs to be configured to support the thin film portion 206 integrated with the infrared absorbing portion 203 in a hollow state, and the specific configuration is not particularly limited. It can be set as the structure which supports the part 206 in a hollow state.

  The openings 207 are provided at, for example, four corners, and determine the shapes of the beam portion 205 and the thin film portion 206.

  Here, as shown in FIG. 13, it is formed by bonding an optical substrate 106 having an optical part, a sensor substrate (support substrate 101) having a sensor element 110, and an electrode substrate (interposer 105) having an electrode 1050. Consider the infrared sensor to be used. The electrode substrate is located on the opposite side of the optical substrate from the sensor substrate. In such an infrared sensor, the distance between the infrared absorbing portion 203 of the sensor element 110 and the interposer 105 (hereinafter referred to as “first distance Dmg”) becomes narrow, and a sufficient distance (for example, 150 μm) is set as the first distance Dmg. There is a problem that the S / N ratio of the infrared sensor output becomes small.

Therefore, as a result of examining the relationship between the thermopile logarithm N and the S / N ratio of the infrared sensor output, the present inventors have found that there is a predetermined relationship between the thermopile logarithm N and the S / N ratio of the infrared sensor output. I found it preferable. Specifically, the present inventors have found that the thermopile logarithm N and the first distance Dmg preferably satisfy the following condition (1), and more preferably satisfy the following condition (2). . The unit of Dmg is μm. For example, when Dmg is 20 μm, Dmg = 20 is substituted in the following formula.
^{0.001467Dmg 4 -0.110667Dmg 3 + 3.143333Dmg 2 -41.533333Dmg} + 255.000000 ≦ N ≦ 0.023200Dmg 4 -1.741333Dmg 3 + 49.400000Dmg 2 -654.966667Dmg + 4039.000000 ··· conditions (1)
^{0.002133Dmg 4 -0.162667Dmg 3 + 4.686667Dmg 2 -63.033333Dmg} + 394.000000 ≦ N ≦ 0.014867Dmg 4 -1.115333Dmg 3 + 31.608333Dmg 2 -418.416667Dmg + 2575.000000 ··· condition (2)
Hereinafter, a detailed description will be given with reference to FIG.

  FIG. 15 is a diagram for explaining the relationship between the thermopile logarithm N and the S / N ratio of the infrared sensor output. The horizontal axis in FIG. 15 represents the thermopile logarithm N, and the vertical axis represents the S / N relative value that is the S / N ratio when normalization is performed with the value at which the S / N ratio of the infrared sensor output is maximized being 1. Represents.

  Further, the solid line, the dotted line, the alternate long and short dash line, and the broken line in FIG. 15 indicate the relationship between the thermopile logarithm N and the S / N relative value when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm, and 25 μm, respectively. It is a curve to represent.

  The correlation between the thermopile logarithm N whose S / N relative value exceeds 0.8 and the first distance Dmg was examined. As a result, it was revealed that the S / N relative value exceeds 0.8 when the condition (1) is satisfied in 5 μm ≦ Dmg ≦ 25 μm. On the other hand, when the value exceeds the upper limit value or falls below the lower limit value, it has become clear that the S / N relative value is less than 0.8 and the S / N ratio becomes worse.

  Note that the left side of the condition (1) is the smaller value of the thermopile logarithm N values where the S / N relative value is 0.8 when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm, and 25 μm, It is a relational expression between 1st distance Dmg. Here, the smaller value of the thermopile logarithm N when the S / N relative value is 0.8 when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm and 25 μm is 113, 58, respectively. , 40, 31 and 25.

  The right side of the condition (1) indicates the larger value of the thermopile logarithm N values when the S / N relative value is 0.8 when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm, and 25 μm. And the first distance Dmg. Here, the larger one of the values of the thermopile logarithm N when the S / N relative value is 0.8 when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm, and 25 μm is 1796, 920, respectively. 627, 481 and 394.

  Similarly, the correlation between the thermopile logarithm N whose S / N relative value exceeds 0.9 and the first distance Dmg was examined. As a result, it was revealed that the S / N relative value exceeds 0.9 when Expression (2) is satisfied in 5 μm ≦ Dmg ≦ 25 μm. On the other hand, when the upper limit value was exceeded or the lower limit value was fallen, it became clear that the S / N relative value was less than 0.9, and the S / N ratio deteriorated.

  Note that the left side and the right side of the condition (2) are relational expressions between the thermopile logarithm N and the first distance Dmg obtained in the same manner as the left side and the right side of the condition (1), respectively. The difference between the condition (1) and the condition (2) is that a value at which the S / N relative value is 0.9 is used instead of a value at which the S / N relative value is 0.8. Here, when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm and 25 μm, the smaller value of the thermopile logarithm N when the S / N relative value is 0.9 is 177, 91, respectively. 62, 48 and 39. Further, the larger one of the values of the thermopile logarithm N when the S / N relative value is 0.9 when the first distance Dmg is 5 μm, 10 μm, 15 μm, 20 μm and 25 μm is 1143, 585, 399, 306 and 250.

  From another viewpoint, when the first distance Dmg is 15 to 25 μm, it is preferable that the thermopile logarithm N satisfies the condition (3) of 40 pairs ≦ N ≦ 394 pairs. Thereby, S / N relative value exceeds 0.8. On the other hand, when the thermopile logarithm N is above the upper limit value or below the lower limit value in the condition (3), the S / N relative value is less than 0.8, and the S / N ratio is deteriorated. If the condition (3) is satisfied, the condition (1) is also satisfied.

  Furthermore, when the first distance Dmg is 15 to 25 μm, it is more preferable that the thermopile logarithm N satisfies 62 pairs ≦ N ≦ 250 pairs, the condition (4). Thereby, S / N relative value exceeds 0.9. On the other hand, when the thermopile logarithm N exceeds the upper limit value or falls below the lower limit value in the condition (4), the S / N relative value is less than 0.9, and the S / N ratio becomes worse. If condition (4) is satisfied, condition (2) is also satisfied.

  In addition, when the first distance Dmg is 5 to 15 μm, it is preferable that the thermopile logarithm N satisfies 113 pairs ≦ N ≦ 627 pairs... Condition (5). Thereby, S / N relative value exceeds 0.8. On the other hand, when the thermopile logarithm N exceeds the upper limit value or falls below the lower limit value in the condition (5), the S / N relative value is less than 0.8, and the S / N ratio becomes worse. If condition (5) is satisfied, condition (1) is also satisfied.

  Furthermore, when the first distance Dmg is 5 to 15 μm, it is more preferable that the thermopile logarithm N satisfies 177 pairs ≦ N ≦ 399 pairs (6). Thereby, S / N relative value exceeds 0.9. On the other hand, when the thermopile logarithm N exceeds the upper limit value or falls below the lower limit value in the condition (6), the S / N relative value is less than 0.9, and the S / N ratio becomes worse. If the condition (6) is satisfied, the condition (2) is also satisfied.

As described above, the semiconductor device according to the third embodiment can provide a semiconductor device that suppresses the deterioration of the S / N ratio.
In the semiconductor device according to the third embodiment, as described above, the connection hole H1 formed in the vicinity of the electrode opening 131A and extending from the surface 131B of the wiring layer to the support substrate 101, and the electrode opening 131A. And a conductive material 132 formed in a region including the surface of the connection hole H1, and the conductive material 132 electrically connects the support substrate 101 and the electrode opening 131A. Also good.

  The semiconductor device and the method for manufacturing the semiconductor device have been described above by way of the embodiment. However, the present invention is not limited to the above embodiment, and various modifications and improvements can be made within the scope of the present invention.

DESCRIPTION OF SYMBOLS 101 Support substrate 102 Insulating film 105 Interposer 106 Optical substrate 110 Sensor element 120 Silicon film 131A Electrode opening part 132 Conductive material 203 Infrared absorption part 204 Temperature sensor part 208 1st semiconductor material 209 2nd semiconductor material H1 Connection hole A1 Sensor Formation area A2 Integrated circuit formation area A3 Electrode formation area Dmg First distance

JP 2013-231738 A

Claims (8)

A semiconductor device having a laminated substrate in which a support substrate and an insulating film are laminated,
An integrated circuit formed on the laminated substrate;
A wiring layer formed on the insulating film;
An electrode opening formed in the wiring layer and supplying a ground potential to the support substrate;
A connection hole formed in the vicinity of the electrode opening and extending from the surface of the wiring layer on which the electrode opening is formed to the support substrate;
A conductive material formed in a region including the electrode opening and the surface of the connection hole;
The conductive material electrically connects the support substrate and the electrode opening.
Semiconductor device. A semiconductor device having a laminated substrate in which a support substrate and an insulating film are laminated, and a sensor element,
An integrated circuit for processing a signal output from the sensor element formed on the multilayer substrate;
An electrode opening for supplying a ground potential to the support substrate via a wiring layer;
A connection hole formed in the vicinity of the electrode opening and extending from the surface of the wiring layer on which the electrode opening is formed to the support substrate;
A conductive material formed in a region including the electrode opening and the surface of the connection hole;
The conductive material electrically connects the support substrate and the electrode opening.
Semiconductor device. An interposer with electrodes formed thereon;
The electrode is electrically connected to the electrode opening via the conductive material;
The semiconductor device according to claim 2. The sensor element is an optical sensor,
A condensing device that condenses the light incident on the optical sensor, which is bonded to the support substrate;
4. The semiconductor device according to claim 2 or 3. The opening diameter of the connection hole in the surface where the electrode opening is formed is larger than the opening diameter of the connection hole in the support substrate;
The semiconductor device according to claim 1. A method for manufacturing a semiconductor device according to claim 2, comprising:
Simultaneously performing the step of forming a groove in the insulating film and the step of forming the connection hole so that the insulating film is supported in a hollow state by the one or more beam portions.
A method for manufacturing a semiconductor device. An optical substrate having an optical part;
A sensor substrate comprising an infrared absorbing part and a temperature sensor part for detecting a temperature change of the infrared absorbing part;
An electrode substrate on which an electrode is formed, located on the opposite side of the optical substrate with respect to the sensor substrate,
A thermopile in which a number of thermocouples made of a first semiconductor material and a second semiconductor material are connected in series is formed on the sensor substrate,
Infrared rays satisfying the following condition (1), where N is the number of serially connected thermocouples constituting the thermopile and Dmg (μm) is the distance between the infrared absorbing portion and the electrode substrate: Sensor.
^{0.001467Dmg 4 -0.110667Dmg 3 + 3.143333Dmg 2 -41.533333Dmg} + 255.000000 ≦ N ≦ 0.023200Dmg 4 -1.741333Dmg 3 + 49.400000Dmg 2 -654.966667Dmg + 4039.000000 ··· conditions (1) The following condition (2) is further satisfied,
The infrared sensor according to claim 7.
^{0.002133Dmg 4 -0.162667Dmg 3 + 4.686667Dmg 2 -63.033333Dmg} + 394.000000 ≦ N ≦ 0.014867Dmg 4 -1.115333Dmg 3 + 31.608333Dmg 2 -418.416667Dmg + 2575.000000 ··· condition (2)