JP2015220929A - Pulse power supply device and design method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a pulse power supply device that generates a high voltage pulse having high voltage and whose rise time is extremely short.SOLUTION: A pulse power supply device 30 includes: a pulse generation circuit 12 that generates pulse current Iby on-control of a semiconductor switch 33 from a first capacitor 13 initially charged; a magnetic pulse compression circuit 14 that takes the pulse current Iin a saturable transformer ST and then performs magnetic compression on the pulse current Ito be supplied to a load. The magnetic pulse compression circuit 14 includes: a second capacitor 18 connected in series to a secondary winding 22 of the saturable transformer ST; and a first recovery diode (FRD) connected in parallel with the serial connection between the secondary winding 22 and the second capacitor 18. A current generated in the secondary winding 22 by the pulse current Iis a forward current Iof the first recovery diode and the saturable transformer ST is magnetically saturated at the vicinity of the maximum value of the forward current I.

Description

The present invention relates to a pulse power supply device and a design method thereof, and more particularly to a pulse power supply device that generates a high-voltage short pulse and a design method thereof.

Conventionally, high-voltage short pulses (hereinafter referred to as “high-voltage pulses”) are used for, for example, high-density plasma generation, ozone generation, exhaust gas treatment, or water treatment. In recent years, research has been conducted on the application of high voltage pulses to plants to destroy plant cell membranes, efficiently extract intracellular active ingredients, or sterilize liquids. In the medical field, application of high voltage pulses to cancer cells has begun to be used for cancer treatment and promotion of recovery of wounds or ulcers.

As a technique for obtaining this high voltage pulse, two types are known: a capacitive energy storage system in which energy is stored in a capacitor in the form of an electric field, and an inductive energy storage system in which energy is stored in an inductor in the form of a magnetic field. In particular, it is known that the energy storage density by the dielectric energy storage system is two orders of magnitude larger than the energy storage density of the capacitive energy storage system. Therefore, it is considered that the dielectric energy storage method has more potential in terms of reducing the size and weight of the device than the capacitive energy storage method.

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Various proposals have been made regarding this dielectric storage type high voltage pulse generator (see Non-Patent Document 1, for example).

Koichi Takagi, Takashi Sakukawa et al., “Design and Practice of Pulse Power Generation Circuits” Journal of Plasma and Fusion Research Vol. 87, no. 3 (2011) p202-p215

According to Non-Patent Document 1, a charging capacitor C1, a gap switch, a pulse transformer, a primary energy storage capacitor C2, a secondary energy storage inductor L, a semiconductor opening switch (SOS) diode, and the like are provided. A pulse power supply is disclosed that generates a high voltage pulse across an SOS diode using reverse current blocking.

The voltage of the high voltage pulse by the pulse power source of Non-Patent Document 1 is about 28 kV, the pulse width is about 50 ns in half width, and the rise time is about 20 ns to 30 ns. However, for example, in recent medical fields, there is a growing need for a technique for applying high repetition stimulation with high voltage pulses with a high voltage and a short rise time in order to link to death or mutation of cancer cells. ing.

Accordingly, the present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a pulse power supply device that generates a high voltage pulse with a high voltage and a very short rise time, and a design method thereof. It is in.

  A first aspect of the present invention is a pulse generation circuit that generates a pulse current from a first capacitor that is initially charged by turning on a semiconductor switch. The pulse current is captured by a saturable transformer, and the pulse current is magnetically compressed and loaded. The magnetic pulse compression circuit includes a second capacitor connected in series to a secondary winding of the saturable transformer, and the secondary winding. And a first recovery diode connected in parallel to the series connection of the second capacitor, the current generated in the secondary winding by the pulse current is a forward current of the first recovery diode, In the pulse power supply device, the saturable transformer is magnetically saturated in the vicinity of the maximum value of the forward current.

The invention according to claim 2 is the pulse power supply device according to claim 1, further comprising one or a plurality of fast recovery diodes connected in parallel to the fast recovery diode.

According to a third aspect of the present invention, in the pulse power supply device according to the first or second aspect, the squareness ratio of the saturable transformer is 0.9 or more.

According to a fourth aspect of the present invention, in the pulse power supply device according to the third aspect, the magnetic core of the saturable transformer includes an amorphous alloy containing cobalt as a main component.

According to a fifth aspect of the present invention, there is provided a pulse generation circuit for generating a pulse current from a first capacitor that is initially charged by on-control of a semiconductor switch, and the pulse current is captured by a saturable transformer, and the pulse current is magnetically compressed and loaded. A magnetic pulse compression circuit for supplying a second capacitor connected in series to a secondary winding of the saturable transformer, the secondary winding and the second capacitor; A first recovery diode connected in parallel to the series connection, and a current generated in the secondary winding by the pulse current is a forward power current of the first recovery diode. And the number of turns of the primary side winding of the saturable transformer and / or the cross-sectional area of the magnetic core of the saturable transformer as parameters, A maximum value near the Allowed to saturation transformer magnetically saturated is the design method of the pulsed power supply.

According to the present invention, a pulse generation circuit that generates a pulse current from a first capacitor that is initially charged by on-control of a semiconductor switch, the pulse current is captured by a saturable transformer, and the pulse current is magnetically compressed to a load. And a magnetic pulse compression circuit for supplying the magnetic pulse compression circuit, wherein the magnetic pulse compression circuit includes a second capacitor connected in series to a secondary winding of the saturable transformer, and the secondary winding. A first recovery diode connected in parallel to the second capacitor in series, and a current generated in the secondary winding by the pulse current is a forward current of the first recovery diode, and the forward recovery diode Since the saturable transformer is magnetically saturated in the vicinity of the maximum value of the directional current, when the saturable transformer is magnetically saturated, The period of the forward current of the first recovery diode is shortened, the forward current near the maximum value suddenly falls and enters the reverse recovery period of the first recovery diode, resulting in a large reverse recovery current. Is suddenly interrupted, the voltage of the output pulse generated at both ends of the fast recovery diode becomes high and the rise time becomes extremely short, so that a high voltage pulse with a high voltage and a very short rise time is generated. A pulse power supply device can be provided.

In addition, since the structure further includes one or a plurality of first recovery diodes connected in parallel to the first recovery diode, the reverse recovery current is further increased, and a pulse capable of generating a high voltage pulse with a short rise time. A power supply device can be provided.

In addition, since the saturable transformer has a squareness ratio of 0.9 or more, the transition of the saturable transformer from the non-saturated state to the magnetic saturated state is abruptly switched, so that the rise time is further short. A pulse power supply device capable of generating a voltage pulse can be provided.

Moreover, since the magnetic core of the saturable transformer includes an amorphous alloy mainly composed of cobalt, a saturable transformer having a high squareness ratio can be realized.

A pulse generation circuit that generates a pulse current from the first capacitor that is initially charged by on-control of a semiconductor switch; A compression circuit, and the magnetic pulse compression circuit includes a second capacitor connected in series to the secondary winding of the saturable transformer, and the series connection of the secondary winding and the second capacitor. A method of designing the pulse power supply device, wherein the current generated in the secondary winding by the pulse current is a forward current of the first recovery diode, the first power recovery diode being connected in parallel; Using the number of turns of the primary winding of the transformer and / or the cross-sectional area of the magnetic core of the saturable transformer as parameters, the forward current near the maximum value Thus, since the saturable transformer is magnetically saturated, when the saturable transformer is saturated, the forward current period of the first recovery diode is shortened, and the forward current that was near the maximum value suddenly rises. When the reverse recovery period of the first recovery diode falls and becomes a large reverse recovery current, and the reverse recovery current is suddenly cut off, the voltage of the output pulse generated at both ends of the fast recovery diode increases and rises. Since the time is extremely short, it is possible to provide a design method of a pulse power supply device that generates a high voltage pulse with a high voltage and a very short rise time.

It is a figure explaining the fundamental view of the present invention. It is a circuit diagram explaining the 1st example of the pulse power supply device concerning the embodiment of the present invention. It is a circuit diagram explaining the 2nd and 3rd Example of the pulse power supply device which concerns on embodiment of this invention. It is a waveform explaining the circuit operation | movement of 1st Example of the pulse power supply device which concerns on embodiment of this invention. It is a waveform explaining the circuit operation | movement of 2nd Example of the pulse power supply device which concerns on embodiment of this invention. It is a waveform explaining the circuit operation | movement of 3rd Example of the pulse power supply device which concerns on embodiment of this invention. It is a conceptual wave form diagram explaining the VT product ratio in this invention. It is a graph explaining the effect of the pulse power supply device concerning the embodiment of the present invention. It is a waveform explaining the circuit operation of a comparative example.

The basic concept of the present invention will be described with reference to FIG. FIG. 1A is a basic circuit configuration diagram of a pulse power supply device according to the present invention. FIG. 1B is a conceptual waveform diagram for explaining a conventional circuit operation. FIG. 1C is a conceptual waveform diagram illustrating the operation of the pulse power supply device according to the present invention.

The basic circuit 10 of the pulse power supply device according to the present invention includes a pulse generation circuit 12 and a magnetic pulse compression circuit 14 as shown in FIG.
First, as shown in FIG. 1A, the pulse generation circuit 12 includes a first capacitor 13 that is initially charged, and a switch S ₁ that is connected in series to one end of the first capacitor 13. As shown in FIG. 1A, the other end of the first capacitor 13 is grounded.

Next, as shown in FIG. 1A, the magnetic pulse compression circuit 14 includes a saturable transformer ST, a second capacitor 18, and a fast recovery diode 16 (hereinafter also referred to as “FRD 16”).
The saturable transformer ST is formed, for example, by providing a primary-side winding 20 and a secondary-side winding 22 in a 1: n winding ratio on a circular magnetic core. As will be described later, the saturable transformer ST is magnetically saturated in the vicinity of the half cycle T _h / 2 of the pulse current I ₀ (hereinafter also simply referred to as “saturation”). The cross-sectional area of the magnetic core of the saturable transformer ST is designed as a parameter. A pulse current is induced in the secondary winding 22 by the pulse current I ₀ flowing through the primary winding. The number of turns of the primary winding 20 may be at least one or more.
Further, FRD16 the reverse recovery time _{T rr} can be used the following commercially available diode element 100 ns.

As shown in FIG. 1A, one end side of the primary winding 20 of the saturable transformer ST is connected to the ground side of the first capacitor 13, and the other end side of the primary winding 20 is , it is connected to the switch _{S 1.} Further, as shown in FIG. 1A, a second capacitor 18 is connected in series to one end of the secondary winding 22 of the saturable transformer ST. The FRD 16 is connected in parallel to the series connection of the secondary winding 22 of the saturable transformer ST and the second capacitor 18. At that time, as shown in FIG. 1A, for example, the anode side of the FRD 16 is connected to the second capacitor 18.

Next, a conventional circuit operation will be described with reference to FIGS. 1 (a) and 1 (b).
First, as shown in FIG. 1A, the first capacitor 13 of the pulse generation circuit 12 is charged with a predetermined voltage V _C , and a pulse current I ₀ is generated when the switch S ₁ is turned on. This pulse current I ₀ is taken into the primary side of the saturable transformer ST, and the secondary winding 22 has the same current as the pulse current I _{0 as} shown in FIGS. 1 (a) and 1 (b). In phase, the forward current I ₁ of the FRD 16 is generated. In other words, the saturable transformer ST is configured such that the forward current I ₁ is generated by the pulse current I ₀ by adjusting the winding direction of the primary winding 20 and / or the secondary winding, for example. The
Period _{T h} of the forward current _{I 1} is the inductance of the saturable transformer ST desaturation state L (non-saturation), the capacitance of the first capacitor 13 and _{C 0,} the period _T h = 2.pi. due to the resonance of the LC (L (unsaturated) × C ₀ ) ^1/2 ).

As shown in FIG. 1B, when the saturable transformer ST is saturated in the vicinity of the half cycle T _h / 2, the polarity of the forward current I ₁ is reversed and the inductance of the saturable transformer ST is decreased. as shown in FIG. 1 (b), the reverse recovery current _{I r} flowing enters the reverse recovery state _{(T rr)} is FRD16.

Then, when the accumulated charge in the depletion layer of the FRD 16 disappears after a certain time, an abrupt current interruption occurs, and an output pulse _Vout is output to both ends of the FRD 16 and supplied to the load LOAD. This output pulse _Vout is represented by the relationship of _Vout = L (dI / dt), where L is the inductance of the magnetic pulse compression circuit 14. Therefore, (shown in Figure 1 (b), [Delta] I portion of _r) of the reverse recovery current _{I r} return enough steep inclination of, short output pulse _{V out} of _the rise time _{T r} (see FIG. 1 (b)) Become.
As described above, the magnetic pulse compression circuit 14 time-compresses the pulse current I ₀ using the saturable transformer ST functioning as a magnetic switch. The inductance L is formed by the parasitic inductance of the magnetic pulse compression circuit 14 because the saturable transformer ST is saturated.

The inventor has paid particular attention to the saturable transformer ST and the fast recovery diode, and has eagerly studied to increase the voltage of the output pulse _Vout and shorten the rise time _Tr . As a result, as shown in FIG. 1 (c), the forward current saturable transformer ST at the maximum value near the I ₁ it is to magnetic saturation, the greater the reverse recovery current I _r of FRD16, resulting, contrary since the return [Delta] I _r of recovery current I _r becomes steeper, with the voltage increases the output pulse V _out, is the rise time T _r has reached the present invention obtained a finding that shortened.

Examples and comparative examples according to embodiments of the present invention will be described below.
The pulse power supply devices 30 of Examples 1 to 3 according to this embodiment will be described with reference to FIGS.
Pulse generation circuit 12 of the first embodiment, as shown in FIG. 2, for example, first capacitor 13 of the capacitance of 100 nF, the charger 31 for charging the first capacitor 13, the semiconductor switch 33 as a switch _{S 1,} the saturable reactor SI ₀ , pulse transformer PT, etc. are provided.
As shown in FIG. 2, the semiconductor switch 33 is connected to the ground side of the first capacitor 13, and the saturable reactor SI ₀ is connected to the high voltage side of the first capacitor 13. Further, as shown in FIG. 2, the pulse transformer PT is formed with a turns ratio of the primary side winding and the secondary side winding of 1: 4, and between the semiconductor switch 33 and the saturable reactor SI _0. The primary winding is connected.
According to the pulse generation circuit 12 of the present embodiment, the first capacitor 13 for power is initially charged by the charger 31, and the pulse transformer is passed from the first capacitor 13 through the saturable reactor SI _{0 by} the ON control of the semiconductor switch 33. It supplies a pulse current _{I 0} to. The saturable reactor SI ₀ functions as a magnetic assist that reduces power loss during switching of the semiconductor switch 33 by generating a pulse current by performing a saturation operation after the semiconductor switch 33 is completely turned on.

Next, the magnetic pulse compression circuit 14 of Example 1 is provided with the saturable transformer ST, the 2nd capacitor | condenser 18, and FRD16 as shown in FIG.
The saturable transformer ST of the present embodiment is formed by winding a primary side winding 20 and a secondary side winding 22 around a toroidal magnetic core. More specifically, the saturable transformer ST is formed by stacking, for example, three toroidal magnetic core members having an outer diameter of 34 mm, an inner diameter of 21 mm, and a thickness of 9 mm. Accordingly, the cross-sectional shape of the magnetic core is formed in a rectangular shape, and the cross-sectional area thereof is ((34-21) × 9) × 3 = 351 mm ² . Note that the number of magnetic core members is not limited to three, and may be one or more, for example, in relation to the number of turns of the primary winding. Thus, the cross-sectional area of the magnetic core can be adjusted by the number of magnetic core members stacked.

The magnetic core material was an amorphous alloy (hereinafter also referred to as “Co-based”) having a cobalt as a main component and having a squareness ratio of 0.91. Here, the squareness ratio is a value obtained by dividing the residual magnetic flux density Br of the saturable transformer ST by the saturation magnetic flux density Bs.
Further, the turn ratio of the primary side winding 20 and the secondary side winding 22 of the saturable transformer ST is 2: 5, so that the number of turns of the secondary side winding 22 is larger than the number of turns of the primary side winding 20. Largely formed. If the pulse transformer PT is omitted and the saturable transformer ST is a single unit, the turns ratio may be 1:10.

As shown in FIG. 2, the primary side winding of the saturable transformer ST is connected to the secondary side winding of the pulse transformer PT, and one end side of the secondary side winding 22 of the saturable transformer ST is For example, a second capacitor 18 having a capacity of 1 nF is connected, and the other end of the second capacitor 18 is grounded. Further, as shown in FIG. 2, the FRD 16 is connected in parallel to the serial connection of the secondary winding of the saturable transformer ST and the second capacitor 18.

Next, the difference between the pulse power supply device 30 of the second and third embodiments and the pulse power supply device 30 of the first embodiment is that a plurality of FRDs 16 are provided in parallel as shown in FIG. Specifically, in Example 2, two FRDs 16 having the same specifications were configured in parallel, and in Example 3, three FRDs 16 having the same specifications were configured in parallel.

An operation waveform example of the first embodiment is shown in FIG. 4, an operation waveform example of the second embodiment is shown in FIG. 5, and an operation waveform example of the third embodiment is shown in FIG. 4 to 6 show examples of waveforms measured by an oscilloscope when the pulse power supply device 30 of each embodiment is operated, the horizontal axis is time t, and the vertical axis is voltage / current. 4 to 6, t ₀ indicates a time when the semiconductor switch 33 is turned on, I ₁ indicates a forward current waveform of the FRD 16, and V _out indicates an output pulse waveform at both ends of the FRD 16.

As shown in FIG. 4, the pulse power supply device 30 of Embodiment 1, the maximum value is over 84.1A reverse recovery current _{I r} of FRD16, the maximum value of the output pulse _{V out} 30.9KV, output pulse _{V out} The rise time is approximately 4 ns, and an output pulse (V _out ) with a high voltage and a very short rise time is generated.
Next, as shown in FIG. 5, the pulsed power supply device 30 of Embodiment 2, the maximum value is over 98.68A reverse recovery current _{I r} of FRD16, the maximum value of the output pulse _{V out 39.41kV,} output The rise time of the pulse V _out is about 3 ns, and an output pulse (V _out ) having a high voltage and a very short rise time is generated.
Further, as shown in FIG. 6, the pulse power supply device 30 of Embodiment 3, the maximum value is over 108A of reverse recovery current _{I r} of FRD16, the maximum value of the output pulse _{V out} 44.9KV, output pulse _{V out} An output pulse (V _out ) of approximately 2 ns is generated during the rise time.

4 to 6, the forward current I ₁ falls from the vicinity of the maximum value I _1MAX . This is because the saturable transformer ST is saturated at the vicinity of the maximum value I _1MAX and the inductance of the saturable transformer ST is increased. In order to decrease to the inductance Lsat at the time of saturation, the period of the forward current I ₁ described above is changed from T _h = 2Π (L (non-saturated) × C ₀ ) ^1/2 ) to T _h ′ = 2Π (Lsat × C ₀ ). ^This is because it becomes shorter to ^1/2 ) and _starts to decrease from the maximum value vicinity I _1MAX .

Moreover, as shown in FIGS. 4-6, by the saturable transformer ST is saturated at the maximum value near _{I 1MAX} forward current _{I 1,} the forward current _{I 1} rapidly falls, a large reverse recovery current in FRD16 I _r flows, that the reverse recovery current I _r is suddenly cut off, the change with time of the return [Delta] I _r of the reverse recovery current I _r becomes steep, as a result, both ends of FRD16, yet a high voltage It can be seen that a high voltage pulse (V _out ) having an extremely short rise time is generated.
The details of the reason is unknown, for example, the number of minority carriers injected into FRD maximum value near the forward current I ₁ of FRD16 also becomes substantially maximum, that at that time the saturable transformer ST rapidly saturate in rapidly reversed polarity of the current flowing through the FRD16, its remains minority carriers hardly disappear rapidly enters a reverse recovery state of FRD16 (T _rr), also considered because it leads to a large reverse recovery current I _r.

Further, according to FIGS. 4 to 6, it can be seen that as the number of FRDs in parallel increases, an output pulse V _out having a higher voltage and a shorter rise time is obtained. It should be noted that the number in parallel is preferably 1 to 4.

[Voltage time product ratio]
Next, in the circuit configurations shown in FIGS. 1, 2 and 3, various embodiments are described using the material of the magnetic core of the saturable transformer ST, the number of turns of the primary winding 20, the cross-sectional area of the magnetic core, and the type of the FRD 16 as parameters. Further, a comparative example was further prepared, and the relationship between the voltage-time product ratio of the saturable transformer ST (hereinafter referred to as “VT product ratio”) and the rise time of the output pulse _Vout was determined.
Hereinafter, a voltage-time product (hereinafter referred to as “VT product”) showing the characteristics of the saturable transformer ST and a VT product ratio using the VT product as a denominator will be described with reference to FIG.
In FIG. 7, the horizontal axis indicates time t. In FIG. 7A, V (t) is a voltage applied to the primary winding 20 of the saturable transformer ST by the pulse current I ₀ shown in FIG. FIG. 7B shows the middle of the time axis of FIG. 7A, and FIG. 7C shows the same conceptual waveform diagram as FIG.

First, the VT product of the saturable transformer is
^TS V (t) dt = A _m × ΔB × N... Expressed by equation (1).
In formula (1), TS is the time the semiconductor switch 33 is up to the saturable transformer is magnetically saturated by ON, A _m is the cross-sectional area of the magnetic core, .DELTA.B the magnetic flux density variation, N represents the primary winding The number of turns. Here, since ΔB is an amount determined by the shape and material of the magnetic core, the integral value on the time axis of V (t), which is the left side of Equation (1), is the number of turns N of the primary winding and the magnetic core. proportional to the product of the cross-sectional area a _m.

Next, the VT product ratio is
^{ＴＳ TS} V (t) dt / ∫ ^Th V (t) dt... Expressed by equation (2).
As shown in FIG. 7A, the denominator of Expression (2) is a value obtained by integrating V (t) from t = 0 to t = TS = Th / 2, and is a region indicated by Vt (100%). Corresponding to That is, the VT product of the saturable transformer ST ′ designed to be magnetically saturated in a time _exceeding the half period T _h / 2 or half period T _h / 2 of the pulse current I ₀ is shown.
Next, as shown in FIG. 7C, the numerator of Expression (2) is a value obtained by integrating V (t) from 0 on the time axis to TS = Tsat, and corresponds to a region indicated by Vts. Here, as shown in FIG. 7C, Tsat indicates the time for which I ₁ is inverted, that is, the time for which the saturable transformer ST in the present embodiment is magnetically saturated. Therefore, the numerator of the formula (2) represents the VT product of the saturable transformer ST in the present embodiment.

FIG. 8 is a plot diagram showing the relationship between the VT product ratio of the saturable transformer ST and the rise time of the output pulse _{Vout according} to the various embodiments described above. In FIG. 8, the horizontal axis represents the VT product ratio of the saturable transformer ST, and the vertical axis represents the rising voltage (V _out / dt) of the output pulse V _out per 1 ns. Therefore, the larger the value on the vertical axis, the steeper the rise of the output pulse _Vout . Further, in FIG. 8, D1 to D6 indicates that the type of FRD16, for example reverse recovery time _{T rr} specs different.

Further, in FIG. 8, a group of data surrounded by a two-dot chain line on the left side shows data of a Co system example in which the magnetic core of the saturable transformer ST is a Co system and the squareness ratio is 0.91. On the other hand, in FIG. 8, a group of data surrounded by a two-dot chain line on the right side is formed by forming the magnetic core of the saturable transformer ST with an iron-based material (amorphous alloy containing iron as a main component), and calculating the squareness ratio. The data of the iron-type Example formed with less than 0.9 are shown.

For example, in FIG. 8, the six plots arranged in the vertical direction with a VT product ratio of 0.4 indicate that the magnetic core is formed of a Co-based material, and the cross-sectional area of the magnetic core is such that the VT product is 0.4. And the saturable transformer ST with the primary winding number adjusted, it is shown that the data is related to six examples configured using six FRDs 16 of D1 to D6.
Further, in FIG. 8, the data plotted at the VT product ratio of 1.00 is the data of the comparative example, and is saturable at the half cycle T _h / 2 of the pulse current I ₀ as shown in FIG. This is data of a pulse power supply device designed to saturate the transformer ST.

As apparent from FIG. 8, the magnetic core of the saturable transformer ST can be formed of a Co-based material to form a pulse power supply device 30 in which the rise of the output pulse _Vout is steeper than that of an iron-based material. This is because the transition from the non-saturated state to the saturated state of the saturable transformer ST of the Co-based magnetic core changes more rapidly than that of the iron-based magnetic core due to the difference in squareness ratio between the Co-based magnetic core and the iron-based magnetic core. This is considered to be because the magnetic switch characteristics of the saturable transformer ST using the iron is superior to the saturable transformer ST using the iron-based magnetic core.

Here, FIG. 9 shows an operation waveform of the pulse power supply device 30 when the saturable transformer ST is formed using an iron-based magnetic core so that the VT product ratio is 0.33.
According to FIG. 9, the polarity of Kirikaeri forward current _{I 1} is Examples 1 to 3 gradual switching Riyori (see FIGS. 4-6), the maximum value of the reverse recovery current _{I r} is also over 20 FRD16 and .4A, it can be seen less than the maximum value of the reverse recovery current _{I r} in examples 1-3. For this reason, the maximum value of the output pulse _Vout is 5.90 kV, which is lower than that of the Co system.

Further, as apparent from FIG. 8, when an iron-based magnetic core is used, V _out / dt is high when the VT product ratio is around 0.7. In other words, when an iron-based magnetic core is used, the rise of the output pulse _Vout is made steep by adjusting the primary winding number and the magnetic core cross-sectional area so that the VT product ratio is approximately 0.7. A device can be formed. This means that, when an iron-based magnetic core is used, the saturable transformer ST is formed by adjusting the primary winding number and / or the magnetic core cross-sectional area so that the VT product ratio is approximately 0.7. it is, saturable transformer ST is considered to be saturated at the maximum value near the forward current I _1.

As is apparent from FIG. 8, when a Co-based magnetic core is used, V _out / dt is high in the vicinity of the VT product ratio of 0.2 to 0.4. That is, when a Co-based magnetic core is used, the rise of the output pulse _{Vout is} increased by adjusting the primary winding number and / or the magnetic core cross-sectional area so that the VT product ratio is 0.2 to 0.4. A steep pulse power supply device can be formed. This is because when a Co-based magnetic core is used, the number of turns of the primary winding and / or the cross-sectional area of the magnetic core is adjusted so that the VT product ratio is 0.2 to 0.4. By forming ST, it is considered that the saturable transformer ST is saturated in the vicinity of the maximum value of the forward current I ₁ .

As described above, according to the pulse power supply device 30 of the above-described embodiment, it is possible to provide a pulse power supply device that generates a high voltage pulse with a high voltage and a very short rise time.

Similarly, the pulse generation circuit 12 that generates the pulse current I ₀ by the ON control of the semiconductor switch 33 from the first capacitor 13 that is initially charged, and the pulse current I ₀ are captured by the saturable transformer ST, and the pulse current I ₀ is captured. The magnetic pulse compression circuit 14 includes a second capacitor 18 connected in series to the secondary winding 22 of the saturable transformer ST, and a secondary winding. A method of designing a pulse power supply device 30 including a fast recovery diode (FRD16) connected in parallel with a series connection of a line 22 and a second capacitor 18, and the number N of turns of the primary winding 20 of the saturable transformer ST And / or the cross-sectional area Am of the magnetic core of the saturable transformer ST as a parameter, and the forward current I ₁ of the fast recovery diode (FRD16), It is possible to provide a design method of the pulse power supply device that saturates the saturable transformer ST at the vicinity of the maximum value I _1max of the forward current I ₁ generated by the pulse current I ₀ .

As described above, some of the embodiments of the present invention have been described in detail with reference to the drawings. However, these are merely examples, and the present invention is variously modified and improved based on the knowledge of those skilled in the art. Can be implemented.

DESCRIPTION OF SYMBOLS 10 Basic circuit of pulse power supply device 12 Pulse generation circuit 13 First capacitor 14 Magnetic pulse compression circuit 16 Fast recovery diode (FRD)
18 Second capacitor 20 Primary winding 22 Secondary winding 33 Semiconductor switch LOAD Load

Claims (5)

A pulse generation circuit that generates a pulse current from a first capacitor that is initially charged by turning on a semiconductor switch, and a magnetic pulse compression circuit that captures the pulse current with a saturable transformer and compresses the pulse current to supply it to a load. A pulse power supply device comprising:
The magnetic pulse compression circuit includes:
A second capacitor connected in series to the secondary winding of the saturable transformer;
A fast recovery diode connected in parallel to the series connection of the secondary winding and the second capacitor;
The pulse generated in the secondary winding by the pulse current is a forward current of the fast recovery diode, and the saturable transformer is magnetically saturated near the maximum value of the forward current. Power supply. The pulse power supply device according to claim 1, further comprising one or more first recovery diodes connected in parallel to the first recovery diode. 3. The pulse power supply device according to claim 1, wherein the saturable transformer has a squareness ratio of 0.9 or more. 4. The pulse power supply device according to claim 3, wherein the magnetic core of the saturable transformer includes an amorphous alloy mainly composed of cobalt. A pulse generation circuit that generates a pulse current from a first capacitor that is initially charged by turning on a semiconductor switch, and a magnetic pulse compression circuit that captures the pulse current with a saturable transformer and compresses the pulse current to supply it to a load. And
The magnetic pulse compression circuit includes:
A second capacitor connected in series to the secondary winding of the saturable transformer;
A first recovery diode connected in parallel to the series connection of the secondary winding and the second capacitor;
The current generated in the secondary winding by the pulse current is a method for designing a pulse power supply device that is a forward current of the first recovery diode,
The number of turns of the primary winding of the saturable transformer and / or the cross-sectional area of the magnetic core of the saturable transformer is used as a parameter, and the saturable transformer is magnetically saturated in the vicinity of the maximum value of the forward current. To design a pulse power supply device.

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