JP2015191211A - display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device that is much higher in reliability of an electric connection between a terminal (bump) of a semiconductor integrated circuit element and wiring on a substrate even when there is a difference between a thermal expansion coefficient of the semiconductor integrated circuit element and a thermal expansion coefficient of a substrate having the semiconductor integrated circuit element mounted.SOLUTION: A display device comprises: a substrate that has a display area where a pixel circuit is formed in each pixel to thereby display an image; a semiconductor integrated circuit element (180) that has a bump (182) to be electrically connected to wiring formed on the substrate via an anisotropic conductive film; and a thermal expansion suppressive film (122) that is arranged between the substrate and the wiring via an insulating film, is overlapped on the semiconductor integrated circuit element in a planar view, has a hole (128) formed in at least one portion, and is composed of a material having a thermal expansion coefficient lower than that of the substrate.

Description

  The present invention relates to a display device.

  Liquid crystal display devices are widely used as display devices for information communication terminals such as computers and television receivers. An organic EL (Electro-Luminescent) display device is also known as a thin display device. The display panel of such a thin display device performs display by operating TFTs (Thin Film Transistors) formed in each pixel in the display area on the substrate. Here, the TFT is driven by a driving IC (Integrated Circuit) which is a semiconductor integrated circuit element mounted outside the display area. Usually, the terminal (bump) of the driving IC and the wiring on the substrate are anisotropic. They are connected using an ACF (Anisotropic Conductive Film) or the like.

  Japanese Patent Application Laid-Open No. H10-228561 discloses that a frame region which is a peripheral region of a display region is reduced by arranging a silicon IC so as to overlap with a circuit of a polysilicon TFT formed on a substrate.

JP 2002-72233 A

  In recent years, a sheet display in which a substrate of a display device is formed of a flexible or flexible material may be used depending on an application to be used. When the driving IC is arranged on the substrate of such a sheet display, it is considered that the position of the electrical connection portion is shifted due to the environmental temperature due to the difference in the thermal expansion coefficient between the substrate and the driving IC, causing a connection failure. . In particular, when a thermosetting anisotropic conductive film is used, there is a risk of misalignment due to heat during bonding, resulting in poor connection.

  The present invention has been made in view of the above circumstances, and even when there is a difference between the thermal expansion coefficient of the semiconductor integrated circuit element and the thermal expansion coefficient of the substrate on which the semiconductor integrated circuit element is placed, An object of the present invention is to provide a display device with higher reliability of electrical connection between terminals (bumps) of a semiconductor integrated circuit element and wiring on a substrate.

  In the display device of the present invention, a pixel circuit is formed in each pixel, and a substrate having a display region for displaying an image and a wiring formed on the substrate are electrically connected to each other through an anisotropic conductive film. A semiconductor integrated circuit element having a bump to be connected, and an insulating film disposed between the substrate and the wiring, overlapping with the semiconductor integrated circuit element in a plan view, and a hole is formed in at least one place; And a thermal expansion suppression film made of a material having a thermal expansion coefficient lower than that of the substrate.

  In the display device of the present invention, the hole is formed in a region overlapping the bump formation region of the semiconductor integrated circuit element, and the thermal expansion suppression film is formed so as to surround the bump formation region. It may be.

  In the display device of the present invention, the bump formation area includes a display area side bump formation area where the bump connected to the wiring extending to the display area side is formed, and an external signal on the opposite side to the display area side. A terminal-side bump forming region in which the bump connected to the wiring extending to the input terminal side is formed, and the hole is formed in a region overlapping the display region-side bump forming region, and the thermal expansion suppression The film may be formed so as to overlap with the terminal-side bump formation region.

  In the display device of the present invention, the bump formation area includes a display area side bump formation area where the bump connected to the wiring extending to the display area side is formed, and an external signal on the opposite side to the display area side. A terminal-side bump forming region in which the bump connected to the wiring extending to the input terminal side is formed, and the thermal expansion suppressing film is formed between the display region-side bump forming region and the terminal-side bump forming region. You may have the strip | belt-shaped part which partitions off.

  In the display device of the present invention, the holes may be formed in the bumps.

  In the display device of the present invention, the anisotropic conductive film may be thermosetting. The thermal expansion suppressing film may include polysilicon. The substrate may contain polyimide.

It is a figure showing roughly about a display concerning an embodiment of the present invention. It is a figure which shows schematically the cross section in the II-II line | wire of FIG. It is the schematic which expands and shows drive IC by planar view, and is a figure shown about arrangement | positioning of a bump and arrangement | positioning of a thermal expansion suppression film | membrane. It is a figure shown about the 1st modification of arrangement | positioning of a thermal expansion suppression film | membrane by the visual field similar to FIG. It is a figure shown about the 2nd modification of arrangement | positioning of a thermal expansion suppression film | membrane by the visual field similar to FIG. It is a figure shown about the 3rd modification of arrangement | positioning of a thermal expansion suppression film | membrane by the visual field similar to FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

  FIG. 1 schematically shows a display device 100 according to an embodiment of the present invention. As shown in this figure, the display device 100 includes a TFT substrate 120 formed of a resin such as polyimide, on which a TFT (Thin Film Transistor) is formed, and a counter substrate 150 disposed to face the TFT substrate 120. Are formed so that they can be bonded together. A display region 205 including pixels 210 arranged in a matrix is formed on the TFT substrate 120 and the counter substrate 150 of the display device 100. Here, polyimide is used as an example of the material of the TFT substrate 120, but other flexible or flexible insulating materials can be used. The counter substrate 150 can also be made of a flexible or flexible insulating material like the TFT substrate 120, but the counter substrate 150 may not be provided and only the TFT substrate 120 may be used.

  Further, the TFT substrate 120 is applied with a potential for conducting between the source and the drain with respect to the scanning signal line of the pixel transistor arranged in each of the sub-pixels 212, and at the same time with respect to the image signal line. A driving IC (Integrated Circuit) 180, which is a semiconductor integrated circuit element that applies a voltage corresponding to the gradation value, is mounted, and an FPC (Flexible Printed Circuits) 181 for inputting an image signal or the like from the outside is mounted. ing. Note that the display method in the display area 205 may be a method of controlling luminance using liquid crystal, a method of controlling luminance using a self-luminous element such as an organic EL, and the like. It may be displayed.

  FIG. 2 is a diagram schematically showing a cross section taken along line II-II in FIG. As shown in this cross-sectional view, the driving IC 180 has a plurality of bumps 182 that are protrusions for electrically connecting to the metal wiring 123 on the TFT substrate 120 on the surface facing the TFT substrate 120. In the drawing, the number of bumps 182 is reduced for easy understanding. An insulating film 121 made of an insulating material such as SiO or SiN is formed on the TFT substrate 120, and a metal wiring 123 having a sandwich structure in which, for example, Ti / Al / Ti are sequentially stacked is formed thereon. Yes. Here, the metal wiring 123 does not have to have a sandwich structure, and a conductive material such as Ag, Cu, or another metal can be used. Further, a transparent conductive film 124 made of, for example, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or other conductive material is formed on the metal wiring 123 to cover the metal wiring 123. On the transparent conductive film 124, an anisotropic conductive film 184 is disposed so as to overlap the formation region of the bump 182. The anisotropic conductive film 184 conducts between the corresponding bump 182 and the transparent conductive film 124, and fixes the driving IC 180 to the TFT substrate 120 while maintaining insulation between the adjacent bumps 182. In this embodiment, the transparent conductive film 124 is provided. However, the transparent conductive film 124 is not formed on the metal wiring 123, and the anisotropic conductive film 184 directly connected to the metal wiring 123 is connected. It may be configured.

  Here, the insulating film 121 has a thermal expansion suppression film 122 made of a material having a thermal expansion coefficient lower than that of the TFT substrate 120 corresponding to the position where the driving IC 180 is placed. . The thermal expansion suppressing film 122 can be, for example, a film made of polysilicon, but any material having a thermal expansion coefficient lower than that of the TFT substrate 120 can be used as appropriate.

  FIG. 3 is a schematic diagram showing the driving IC 180 in an enlarged view in plan view, and is a diagram showing the arrangement of the bumps 182 and the arrangement of the thermal expansion suppression film 122. In FIG. 3, the number of bumps 182 is also reduced for the sake of explanation, and the portion where the thermal expansion suppression film 122 is formed is hatched. As shown in this figure, a plurality of bumps 182 are formed on the drive IC 180, and the transparent conductive film 124 and the metal wiring 123 of the TFT substrate 120 are respectively corresponding to these via the anisotropic conductive film 184. Electrically connected. The thermal expansion suppression film 122 has a hole 128 so as not to overlap the bump 182 formation region 185, and is formed so as to surround the bump formation region 185.

  Since the TFT substrate 120 is made of a flexible or flexible insulating material such as polyimide, the coefficient of thermal expansion is higher than that of a substrate made of glass. When the environmental temperature changes (for example, becomes higher) due to a difference from the thermal expansion coefficient, the expansion of the TFT substrate 120 becomes larger than the expansion of the drive IC 180, and the transparent conductive film of the TFT substrate 120 corresponding to each bump 182 It is conceivable that the positions of 124 and the metal wiring 123 are shifted. Even in such a case, since the thermal expansion suppression film 122 is disposed so as to overlap with the region where the driving IC 180 is disposed, the displacement of the transparent conductive film 124 and the metal wiring 123 corresponding to each bump 182 is shifted. Can be suppressed. That is, even if there is a difference between the thermal expansion coefficient of the driving IC 180 and the thermal expansion coefficient of the substrate on which the driving IC 180 is mounted, and the ambient environmental temperature changes, the terminal (bump 182) of the driving IC 180 and the TFT A positional shift between the wiring of the substrate 120 and the wiring can be suppressed and highly reliable electrical connection can be achieved.

  In particular, when a thermosetting material is used as the anisotropic conductive film 184, the drive IC 180 disposed at a predetermined position is attached to the TFT substrate 120 with a predetermined pressure via the anisotropic conductive film 184. The drive IC 180 and the TFT substrate 120 are fixed to each other by applying heat and applying heat. Although it is conceivable that the transparent conductive film 124 and the metal wiring 123 corresponding to each bump 182 are displaced due to the heat applied at this time, even in such a case, the thermal expansion suppressing film 122 is formed on the TFT substrate. By suppressing the thermal expansion of 120, it is possible to prevent displacement. Here, a thermosetting material is used for the anisotropic conductive film 184, but an anisotropic conductive film 184 having a property of being cured by other methods such as ultraviolet curing may be used. Even in this case, it is possible to suppress displacement due to expansion and contraction such as thermal expansion during manufacture and use.

  Further, in this embodiment, the thermal expansion suppression film 122 is formed only around the bump formation region 185, and the thermal expansion suppression film 122 is not formed in a region overlapping the bump formation region 185. As a result, the parasitic capacitance is not formed between the bump 182 and the transparent conductive film 124 and the metal wiring 123 connected to the bump 182 and the thermal expansion suppression film 122, and the signal between the TFT substrate 120 and the driving IC 180. Can ensure the reliability of the exchange.

  For example, when the semiconductor film formed on the TFT substrate 120 is formed of polysilicon, the thermal expansion suppression film 122 is formed simultaneously with the formation of the semiconductor film by using polysilicon as the thermal expansion suppression film 122. The manufacturing process can be simplified. Further, by using a material similar to that of silicon used for the driving IC 180, for example, the thermal expansion coefficient can be made the same as that of the driving IC 180, and the displacement can be suppressed more effectively.

  FIG. 4 is a view with the same field of view as FIG. 3, and is a diagram showing a first modification of the arrangement of the thermal expansion suppression film 122. As shown in this figure, the bump formation region 185 includes a display region side bump formation region 186 where a bump 182 to which a wiring extending toward the display region 205 is connected is formed, and an FPC 181 opposite to the display region 205 side. And a terminal-side bump forming region 187 in which a bump 182 to which a wiring extending to the input terminal to which an external signal is input is connected is formed. The thermal expansion suppression film 122 has a hole 128 in the display region side bump formation region 186 and is formed so as to overlap the terminal side bump formation region 187. This is because, on the display region 205 side, a terminal for outputting an analog signal indicating the luminance of each pixel 210 is formed, so that compared with the terminal on the side where the terminal to which the FPC 181 is connected is formed, The thermal expansion suppression film 122 that is superimposed on the display area side bump formation area 186 is deleted because the expansion suppression film 122 is easily influenced by the parasitic capacitance formed by the superimposition of the expansion suppression film 122 and affects display quality. Thus, the influence of the parasitic capacitance is efficiently eliminated, and the signal reliability is improved. On the other hand, the wiring extending to the terminal side mainly receives and transmits digital signals, and even if there is a parasitic capacitance, the influence on the signal quality is small and does not affect the display quality. Therefore, the thermal expansion suppression film 122 is formed, The position shift due to expansion and contraction such as thermal expansion is efficiently suppressed. Further, even when the thermal expansion suppression film 122 has such a shape, the same effect as in the case of FIG. 3 can be obtained.

  Further, as shown in this figure, the display area side bump forming area 186 has a higher density of forming the bumps 182 than the terminal side bump forming area 187, and even if the size of the hole is the same. In particular, the number of bumps 182 that are affected by the parasitic capacitance can be reduced, and displacement can be prevented.

  FIG. 5 is a view based on the same field of view as FIG. 3, and is a diagram illustrating a second modification of the arrangement of the thermal expansion suppression film 122. In the second modified example, as in the first modified example, a hole 128 is formed in the display region side bump forming region 186. However, in the second modified example, the terminal side bump forming region 187 is also formed. A hole 128 is formed independently, and two holes 128 are formed together. As a result, a band-shaped portion 129 is formed between the display region side bump forming region 186 and the terminal side bump forming region 187 to partition them. By forming the thermal expansion suppressing film 122 in such a shape, not only the parasitic capacitance is not formed in the bump 182 formed in the display region side bump forming region 186 but also formed in the terminal side bump forming region 187. In addition, parasitic capacitance can be prevented from being formed on the bumps 182 and signal reliability can be further improved. Further, since the thermal expansion suppression film 122 is formed in a band shape between the display region side bump formation region 186 and the terminal side bump formation region 187, the display region side bump formation region 186, the terminal side bump formation region 187, Since the displacement due to thermal expansion can be suppressed even during the interval, the displacement of the transparent conductive film 124 and the metal wiring 123 corresponding to each bump 182 can be further suppressed. Here, it is possible to make the width wider than the bump interval of the display region side bump formation region 186. In this case, while maintaining the photolithography process or the like when forming the thermal expansion suppression film 122 in a relatively simple process, It is possible to efficiently suppress the expansion of the TFT substrate 120 and prevent positional deviation. In the present embodiment, one band-shaped thermal expansion suppression film 122 is formed between the display region side bump formation region 186 and the terminal side bump formation region 187. A plurality of strip-shaped thermal expansion suppression films 122 may be arranged in parallel between, for example, the bumps 182 in the 186 and / or the terminal-side bump formation region 187.

  FIG. 6 is a view based on the same field of view as FIG. 3, and is a diagram illustrating a third modification of the arrangement of the thermal expansion suppression film 122. In this modification, the thermal expansion suppression film 122 has holes 128 corresponding to the respective bumps 182. Even if it is such an aspect, while being able to acquire the same effect as the above-mentioned embodiment, since the thermal expansion suppression film | membrane 122 is formed in the position corresponding between each bump 182, more efficiently TFT substrate Positional displacement due to expansion of 120 can be suppressed, and formation of parasitic capacitance can be suppressed because the thermal expansion suppression film 122 is not formed at the position corresponding to each bump 182.

  In the above-described embodiments and modifications, some examples of the hole 128 formed in the thermal expansion suppression film 122 are shown. However, if the mode is considered to suppress the formation of parasitic capacitance, the above example is used. Without being limited thereto, the position, size, and number can be determined as appropriate.

  In the above-described embodiment, the driving IC 180 mounted on the TFT substrate 120 has been described. However, other semiconductor integrated circuits and semiconductor integrated circuits may be used as long as they are semiconductor integrated circuit elements mounted on a substrate used in a display device. Even in this case, the difference between the thermal expansion coefficient of the semiconductor integrated circuit element and the thermal expansion coefficient of the substrate can suppress the deviation between the bump and the wiring due to the environmental temperature. . That is, even if there is a difference between the thermal expansion coefficient of the semiconductor integrated circuit element that drives the display device and the thermal expansion coefficient of the substrate on which the semiconductor integrated circuit element is mounted, the terminal (bump of the semiconductor integrated circuit element) ) And the wiring of the board can be improved in reliability.

  In the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those in which the person skilled in the art has appropriately added, deleted, or changed the design of the above-described embodiments, or those in which processes have been added, omitted, or changed conditions are also the subject matter of the present invention. As long as it is included in the scope of the present invention.

  DESCRIPTION OF SYMBOLS 100 Display apparatus, 120 TFT substrate, 121 Insulating film, 122 Thermal expansion suppression film, 123 Metal wiring, 124 Transparent conductive film, 128 holes, 129 Band part, 150 Opposite substrate, 180 Driver IC, 182 Bump, 184 Anisotropic conductivity Film, 185 bump formation region, 186 display region side bump formation region, 187 terminal side bump formation region, 205 display region, 210 pixels, 212 subpixels.

Claims (8)

A substrate having a display area for displaying an image by forming a pixel circuit in each pixel;
A semiconductor integrated circuit element having a bump electrically connected to the wiring formed on the substrate through an anisotropic conductive film;
The insulating film is disposed between the substrate and the wiring, overlaps with the semiconductor integrated circuit element in a plan view, has a hole formed in at least one location, and has a thermal expansion coefficient lower than the thermal expansion coefficient of the substrate. And a thermal expansion suppressing film made of a material. The display device according to claim 1,
The hole is formed in a region overlapping the bump formation region of the semiconductor integrated circuit element, and the thermal expansion suppression film is formed so as to surround the bump formation region. Display device. The display device according to claim 1,
The bump formation area includes a display area side bump formation area where the bump connected to the wiring extending to the display area side, and a wiring extending to the input terminal side of the external signal on the side opposite to the display area side And a terminal-side bump forming region in which the bump connected to is formed,
The hole is formed in a region overlapping the display region side bump formation region,
The display device, wherein the thermal expansion suppression film is formed so as to overlap with a terminal-side bump formation region. The display device according to claim 1,
The bump formation area includes a display area side bump formation area where the bump connected to the wiring extending to the display area side, and a wiring extending to the input terminal side of the external signal on the side opposite to the display area side And a terminal-side bump forming region in which the bump connected to is formed,
The display device according to claim 1, wherein the thermal expansion suppressing film has a belt-like portion that partitions the display region side bump formation region and the terminal side bump formation region. The display device according to claim 1,
The display device, wherein the holes are respectively formed in the bumps. The display device according to claim 1,
The display device, wherein the anisotropic conductive film is thermosetting. The display device according to claim 1,
The display device according to claim 1, wherein the thermal expansion suppressing film includes polysilicon. The display device according to claim 1,
The display device, wherein the substrate contains polyimide.

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