JP2015186414A - external power supply system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent occurrence of overcurrent in external power supply.SOLUTION: An external power supply system comprises: a power storage device 10 for outputting DC power; two inverters INV1, INV2, each of which has a plurality of inverter arms including upper and lower switch elements and converts DC power from the power storage device to AC; two motors MG1, MG2 driven by the two inverters; and a control unit 40 for controlling the two inverters. The control unit 40 supplies a drive signal to each of the two inverters; generates predetermined AC power between neutral points of the two motors by adjusting, in the drive signals, carrier frequency difference or carrier phase difference between the two inverters; and compensates DC error voltage caused by dead time error voltage generated in a dead time period in which the drive signal is supplied while the upper and lower switch elements of the respective inverter arms of the two inverters are in an OFF state.

Description

  The present invention relates to an external power feeding system that drives a motor with electric power from a power storage device and supplies electric power to an external electric load.

  Patent Document 1 discloses an electric motor drive and power processing device capable of transferring power between an AC power supply or AC electric load outside a vehicle and an in-vehicle DC power supply (power storage device). This device includes a DC power source, two inverters that are pulse width modulated (hereinafter also referred to as “PWM”), two induction motors, a control unit, an input / output port, an EMI filter, Is provided. Each induction motor includes a Y-connected winding, and an input / output port is connected to the neutral point of each winding.

  In this device, in the recharging mode, the DC power can be charged by converting the AC power applied to the neutral point of each winding from the single-phase power connected to the input / output port into DC power. Further, it is possible to generate sine wave-adjusted AC power between the neutral points of each winding and output the generated AC power to an external device connected to the input / output port.

  Patent Document 2 can sufficiently suppress common mode noise generated when power is transferred between the power storage device and an electric load or power source outside the vehicle, and can reduce the size of the common mode choke coil. As a result, common mode noise can be sufficiently suppressed without hindering downsizing of the vehicle.

JP-A-4-295202 JP 2008-154399 A

  In Patent Documents 1 and 2, there is no recognition that a DC error voltage is generated due to the dead time of the inverter at a light load. For this reason, when an insulation transformer is connected to the output, the transformer may be demagnetized and overheating due to overcurrent may occur, or power quality may deteriorate due to output waveform distortion.

  The present invention includes a power storage device that outputs DC power, a plurality of inverter arms each including upper and lower switch elements, two inverters that respectively convert DC power from the power storage device to AC, and the two inverters And two control units for controlling the two inverters. The control unit supplies drive signals to the two inverters, respectively. In the drive signals, the two inverters By adjusting the carrier frequency difference or the carrier phase difference, predetermined AC power is generated between the neutral points of the two motors, and the upper and lower switch elements of the inverter arms in the two inverters are both turned off. Due to a dead time error voltage generated in a dead time period in which the drive signal is supplied To compensate for the flow error voltage.

  Moreover, in one Embodiment, the said control part determines whether external power feeding is performed, and when performing external power feeding, sets the carrier frequency of two inverters to be the same.

  In another embodiment, the control unit determines whether to perform external power feeding, and synchronizes the carriers of the two inverters when external power feeding is performed, and calculates the phase difference between the carriers of the two inverters. Set to a predetermined value.

  The DC error voltage during the dead time period is reduced, and overcurrent and output waveform distortion due to transformer bias can be prevented.

It is a block diagram which shows a system configuration. It is a figure which shows the generation | occurrence | production state of overcurrent. It is a figure which shows the structure of an inverter, a dead time, and a PWM voltage. It is a figure which shows the influence of the carrier frequency with respect to a neutral point output voltage. It is a figure which shows the influence of the carrier phase with respect to a neutral point output voltage. It is a figure which shows the influence of the carrier phase with respect to a transformer primary current. It is a figure which shows the influence of the carrier frequency with respect to a transformer primary current. It is a figure which shows the internal structure of a control part. It is a flowchart which shows control of a carrier frequency. It is a flowchart which shows control of the phase difference of a carrier.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that the present invention is not limited to the embodiments described herein.

<System configuration>
FIG. 1 is a block diagram showing the overall configuration of an external power feeding system according to Embodiment 1 of the present invention. This system is mounted on a vehicle and feeds an electric load inside or outside the vehicle.

  A capacitor 12 is connected in parallel to a battery 10 that is a power storage device that outputs DC power via a main relay Mr that is an on / off switch. A boost converter 14 is connected to the capacitor 12 and boosts the pre-boosting voltage VL on the battery side 10 to the boosting voltage VH.

  Boost converter 14 includes a coil 16 and switching elements 18 and 20 connected in series. The switching elements 18 and 20 are formed by a parallel connection of a transistor such as an IGBT and a diode that allows a reverse current to flow.

  One end of the coil 16 is connected to the positive electrode of the battery 10, and the other end of the coil 16 is connected to an intermediate point between the switching element 18 and the switching element 20 connected in series. That is, the other end of the coil 16 is connected to the emitter of the switching element 18 and the collector of the switching element 20. The collector of the switching element 18 is connected to the positive bus of the boosted voltage VH that is the output of the boost converter 14, and the emitter of the switching element 20 is connected to the negative bus of the pre-boosting voltage VL and the pre-boosting voltage VH. Yes. A smoothing capacitor 22 is connected between the positive and negative buses of VH.

  The boosted voltage VH is supplied to the MG1 inverter INV1 and the MG2 inverter INV2. That is, the positive and negative buses of the boosted voltage VH are connected to the positive and negative buses of INV1 and INV2, respectively.

  INV1 and INV2 output a three-phase alternating current, and are each composed of six switching elements and have the same configuration. That is, INV1 includes a U-phase arm INV1u, a V-phase arm INV1v, and a W-phase arm INV1w, which are connected in parallel between the positive and negative buses. Each phase arm consists of a switching element connected in series between the positive and negative buses. Each switching element is configured by a parallel connection of a transistor and a diode, like the switching element of the boost converter 14. Each switching element is turned on and off by an inverter drive signal, and a three-phase alternating current is output.

  Motor generators MG1 and MG2, which are three-phase AC motors, are connected to the outputs of INV1 and INV2. That is, the middle points of the three arms INV1u, INV1v, and INV1w are at the U, V, and W phase coil ends of MG1, and the middle points of the three arms INV2u, INV2v, and INV2w are , W phase coil ends are connected. The other end of each phase coil is mutually connected by the neutral point. Therefore, MG1 and MG2 are driven by the three-phase AC power output from INV1 and INV2.

  For example, in a hybrid vehicle, an engine that is an internal combustion engine is separately mounted, and power is generated or driving force of the vehicle is generated by the driving force of the engine. For example, MG1 generates electricity mainly by engine driving force, and MG2 mainly generates vehicle driving force. In this case, MG1, MG2 and the output shaft of the engine may be connected to a power conversion mechanism including a planetary gear mechanism, and the driving force from here may be transmitted to the wheels via the driving shaft of the vehicle.

  A capacitor 28 is connected between the neutral points of the stator coils of MG1 and MG2, and a primary side of the insulating transformer 30 is connected. The insulating transformer 30 is composed of a primary coil and a secondary coil disposed via an iron core, and transmits AC power from the primary side to the secondary side. In particular, the primary side and the secondary side are only magnetically coupled and are electrically insulated.

  The secondary side of the insulation transformer 30 has, for example, an AC output similar to that of a commercial power supply. For example, an outlet is formed, and desired AC power is supplied to the electrical load 32 connected to the outlet. Usually, AC power of 50 Hz or 60 Hz is supplied to the primary side of the insulating transformer 30, and AC power of 100 v is obtained on the secondary side of the insulating transformer 30 at 50 Hz or 60 Hz similar to the commercial power source.

  The control unit 40 includes two independent ECUs MG1ECU and MG2ECU. The MG1ECU generates a PWM signal (drive signal) for driving the INV1 and the MG2ECU, and the generated PWM signals are used as INV1 and INV2. To control the driving of MG1 and MG2. Control unit 40 generates a PWM signal for driving boost converter 14 and supplies the generated PWM signal to boost converter 14. That is, the target output torque is determined from the amount of depression of the accelerator pedal, the target output of MG2 is determined, and the target d and q-axis currents are calculated. The current d and q axis currents (actual d and q axis currents) are calculated from the detection results of the motor current and rotation phase of MG2, and the error between the actual d and q axis currents and the target d and q axis currents is reduced. A PWM signal (drive signal) is generated. Further, the target boost voltage VH * is calculated based on the target output torque and the like, and the switching element of the boost converter 14 is PWM-controlled. Further, based on the state of charge (SOC) of the battery 10, the drive of the engine is controlled, the drive of INV2 is controlled, and the power generation by MG1 is also controlled.

  In this embodiment, in addition to the drive control of MG1 and MG2 as described above, the neutral point voltage of MG1 and MG2 is controlled by the drive control of INV1 and INV2, and the primary side of the insulation transformer 30 is controlled. A predetermined alternating current is supplied. That is, by changing the on-duty of the upper side switching element and the on-duty of the lower side switching element, the neutral point voltages of MG1 and MG2 are changed in the same cycle, and the phases of both are changed by 180 degrees. Is supplied to the primary side of the isolation transformer 30. Then, AC power equivalent to the commercial power source is obtained on the secondary side of the insulating transformer.

  For this purpose, the control unit 40 has an output voltage control command output unit 50, and the output voltage control command output unit 50 is set so that the secondary output of the insulation transformer 30 becomes a target AC output. Generate a control signal. Then, the neutral point voltage of MG1 and MG2 is controlled by superimposing this control signal on the PWM signal from MG1ECU and MG2ECU. Further, in the present embodiment, a carrier frequency / phase control command output unit 52 is provided, and the carrier frequencies and carrier phases of INV1 and INV2 are controlled when the output of the insulating transformer 30 is in a predetermined condition.

  When PWM control of INV1 and INV2 is performed and an alternating current is supplied to the primary side of the insulation transformer 30, a direct current flows due to the dead time of the PWM control, and the insulation transformer 30 is demagnetized and an overcurrent is generated. May flow.

  That is, in the system as shown in FIG. 1, the current at INV1 and INV2 fluctuates when there is no load on the secondary side of the insulating transformer 30, and the voltage at the neutral point of both does not change as expected. An overcurrent may occur in the insulating transformer 30.

  Therefore, in the carrier frequency / phase control command output unit 52 of the control unit 40 of the present embodiment, a signal for adjusting the carrier frequency of the PWM signal generated in each of the MG1ECU and the MG2ECU and controlling the phase difference of the carrier is output. Thus, the neutral point voltage of MG1 and MG2 is controlled to prevent the occurrence of overcurrent. These will be described below.

<Generation of overcurrent>
Fig. 2 shows the situation where AC output is stopped due to overcurrent protection. Thus, a desired AC voltage is output to the secondary side of the insulating transformer 30. However, the current value on the primary side gradually increases in spite of the no-load state in which the secondary side of the insulating transformer 30 is open. In this example, a current of about 100 A flows, an overcurrent protection operation occurs, and the current supply to the primary side of the isolation transformer 30 is stopped. From the state of the circuit and the voltage / current waveform of the isolation transformer 30, it is considered that the self-inductance is reduced due to the demagnetization and magnetic saturation of the isolation transformer 30 and overcurrent is generated.

As a demagnetizing factor of the insulation transformer,
(1) Command value DC error caused by sensor error or calculation error (2) Variation in switching caused by element characteristics and drive circuit (3) Dead time error caused by voltage difference between MG1 and MG2 .

  Here, due to (1) and (2), a direct current component is included in the alternating current output terminal, and when this direct current component is large, the iron core of the insulating transformer 30 is saturated and the excitation inductance decreases, so that the excitation current increases rapidly. However, in (1) and (2), the magnetic saturation of the transformer should occur regardless of no load and no load.

  On the other hand, in this system, a magnetic saturation phenomenon occurs when there is no load, and does not occur when the load is large. From this, it is considered that magnetic saturation occurs due to the factor (3), not (1) and (2).

  In this system, power is supplied by using INV1 and INV2 and controlling the voltage between neutral points of MG1 and MG2. INV1 and INV2 are performed by independent MG1ECU and MG2ECU provided in control unit 40, and these are normally controlled asynchronously.

  The PWM carrier frequency of INV1 is 10 kHz, and the PWM carrier frequency of INV2 is 5 kHz. The higher the carrier frequency, the higher the controllability. However, MG2 needs to output a large driving force, and the carrier frequency cannot be increased very much. Therefore, considering the characteristics of MG1 and MG2, it is preferable to make both carrier frequencies different.

  On the other hand, in this system, the voltage between the neutral points of INV1 and INV2 is used as an AC output to the insulating transformer 30 for external power feeding.

Therefore,
Factor i: carrier frequency difference between MG1 and MG2,
Factor ii: carrier phase difference between MG1 and MG2,
Affects the AC output voltage between neutral points.

  The factor i is a factor that affects the output voltage due to the dead time error and the difference between the carrier frequencies of INV1 and INV2. Factor ii is a factor in which the carrier phase difference between INV1 and INV2 affects the output voltage.

  FIG. 3 shows the relationship between the dead time of INV1 and INV2 and the PWM voltage. As shown in FIG. 3A, the inverter realizes a required output voltage by alternately switching the upper and lower switching elements Q1, Q2 of each arm on and off. Actually, both INV1 and INV2 have three arms and switch six switching elements. However, in FIG. 3A, only the switching elements Q1 and Q2 are simplified to one each above and below. Show.

  Dead time generators 60-1 and 60-2 are provided in the control signal input path to the control terminals (gates) of the upper and lower switching elements Q1 and Q2. The dead time generators 60-1 and 60-2 turn off both of the switching elements Q1 and Q2 in order to prevent an arm short circuit due to both ON and OFF switching of the upper and lower switching elements Q1 and Q2. Is granted. Since both Q1 and Q2 are OFF during the dead time period, a dead time error voltage is generated according to the polarity of the inverter current.

  That is, as shown in the upper part of FIG. 3B, when the inverter output current is positive and + Ia, the positive current is applied during the dead time period until the switching element Q2 is turned off and the switching element Q1 is turned on. + Ia keeps the inverter output voltage at 0V. For this reason, a negative dead time error voltage -Vd is generated. On the other hand, as shown in the lower part of FIG. 3B, when the inverter output current is negative and negative, the inverter output voltage during the dead time period before the switching element Q1 is turned off and the switching element Q2 is turned on. Since Vd continues to be output, a positive error voltage + Vd is generated.

  In the case of this system, since the output current is controlled by INV1 and INV2 that operate asynchronously, the polarity of the inverter output current changes by the switching operation of the inverter on one side. Therefore, the output voltage error due to dead time also depends on the switching operation of each inverter.

  Next, from the relationship between the dead time and the PWM voltage described above, the influence of the carrier frequency difference and the carrier phase difference is examined by circuit operation.

<Influence of carrier frequency difference>
FIG. 4 shows the influence of the carrier frequency difference on the neutral point output voltage. As described in FIG. 3, the dead time error voltage depends on the polarity of the inverter output current. When the inverter output current is near zero, the polarity of the inverter output current changes due to the switching operation of INV1 and INV2, so that the deadtime error voltage is affected by the switching operation of the inverter.

  FIG. 4A shows a case where the carrier frequencies (Fs1, Fs2) are equal to INV1 and INV2 (Fs1 = Fs2). In this example, the phase difference between the INV1 carrier and the INV2 carrier is 60 degrees. As the inverter current, the current between the two inverters INV1 and INV2 is shown. The current between the two inverters INV1 and INV2 is a current between neutral points between MG1 and MG2, and what is shown here is a change in current at the carrier cycle level of PWM. The INV1 gate and INV2 gate indicate PWM signals with a dead time added, and are control signals for the upper switching element.

  In each inverter INV1, INV2, Q1 is turned on when the output current of the inverter is in the negative direction, and Q1 is turned off when the output current is in the positive direction. For this reason, a dead time error voltage does not occur. As a result, no error voltage occurs in the neutral point output voltage that is the voltage difference between the INV1 output voltage Vo1 and the INV2 output voltage Vo2.

  FIG. 4B shows a case where the carrier frequency MG1 is greater than MG2 (twice) (Fs1> Fs2). Further, the INV1 and INV2 carriers have a phase difference of about 30 degrees.

  In this example, the switching element Q1 is turned ON when INV1 is in the positive direction of the output current of the inverter in the first cycle in the figure. Therefore, a dead time error voltage of −Vd is generated at that time. In that period, when the switching element Q1 is turned off, the output current of the inverter is in the positive direction, and no dead time error current occurs. In the second cycle, the switching element Q1 is turned on when the inverter output current is in the negative direction, and turned off when the inverter output current is in the positive direction. Therefore, in the second cycle, no dead time error voltage is generated, and is generated once every two cycles of the PWM carrier cycle of the -Vd dead time error voltage switching element Q1. In addition, since the output current of INV2 is negative when Q1 is turned on and Q1 is turned off when the output current is positive, no dead time error voltage is generated.

  As a result, a negative DC voltage error (−Vd / 2) occurs in the neutral point output voltage which is a potential difference between the outputs of INV1 and INV2.

<Influence of carrier phase difference>
FIG. 5 shows the influence of the carrier phase difference on the neutral point output voltage. That is, the dead time error voltage of the neutral point output voltage also depends on the carrier phase difference.

  FIG. 5A shows the case of FIG. 4B once again. This is a case where INV1 is twice the carrier frequency relative to INV2 and the carrier phase difference is 30 degrees. In this case, as described above, a negative dead time error voltage (−Vd / 2) is generated in the neutral point output voltage.

  FIG. 5B shows a case where the carrier phase difference between INV1 and INV2 is 65 degrees. In this case, in the first cycle, when the switching element Q1 is turned ON, the inverter output current is in the positive direction, and a negative dead time error voltage (−Vd) is generated. Further, when the switching element Q1 of the cycle is turned off, the polarity of the inverter output current is reversed, and the switching element Q1 is turned off when the inverter output current is in the negative direction. Therefore, a positive dead time error voltage (+ Vd) is generated when the switching element Q1 is turned off. In the second cycle, the switching element Q1 is turned on when the inverter output current is in the negative direction, and turned off when the inverter output current is in the positive direction. Therefore, no dead time error voltage occurs in the second cycle.

  On the other hand, in the case of INV2, Q1 is turned on when the output current is negative and Q1 is turned off when the output current is positive, so that no dead time error voltage is generated.

  Therefore, since the error voltage of the neutral point output voltage is canceled by the positive dead time error voltage and the negative dead time error voltage, the average value of the error voltage of the neutral point voltage is eventually 0V.

  Thus, when the carrier frequencies of the two inverters INV1 and INV2 are different, the average value of the generated dead time error voltage can be set to 0 by adjusting the phase difference so that the carrier frequency is at least 1: 2. Is possible.

  In particular, the two motor generators MG1 and MG2 in the hybrid vehicle may use carrier frequencies of 10 kHz and 5 kHz as described above. In such a case, it is preferable to set the phase difference of the carrier frequency to about 65 degrees.

<Mechanism of DC current outflow>
Based on the analysis results of dead time error voltage due to carrier frequency difference and carrier phase difference, the mechanism of DC outflow is examined in comparison with the output waveform of the actual vehicle.

  FIG. 6 shows the DC outflow mechanism and the actual output waveform when there is no load (the state where there is no electrical load 32 on the output side of the isolation transformer 30). These are two types of PWM carrier frequencies of 5 kHz and 10 kHz, where (a) is a carrier phase difference of 30 degrees, (b) is a carrier phase difference of 65 degrees, and (c) is a carrier phase difference of 100 degrees. Is shown. The frequency of the alternating current on the primary side of the insulating transformer 30 is 60 Hz.

  As apparent from the figure, when the carrier frequencies of INV1 and INV2 are different, an output voltage error depending on the carrier phase difference occurs.

  (I) When the carrier phase difference is 30 degrees: Since a negative dead time error voltage is generated in the output voltage between neutral points, a negative DC voltage is generated in the output voltage.

  (Ii) In the case of a carrier phase difference of 65 degrees: Since a positive dead time error voltage and a negative dead time error voltage are canceled, no DC voltage is generated in the output voltage.

  (Iii) When carrier phase difference is 100 degrees: A positive dead time error voltage is generated in the output voltage between neutral points, and a positive DC voltage is generated in the output voltage.

  Thus, when the carrier frequency is different, the dead time error voltage is generated as described above, and when the carrier phase difference is 30, 100 degrees, the primary current and voltage of the isolation transformer 30 are the dead time error voltage. Fluctuates based on

  Further, since the PWM carrier signals of INV1 and INV2 are asynchronous, the carrier phase difference between INV1 and INV2 changes with time. The output voltage when there is no load in the system changes the DC voltage with the carrier phase difference, and the magnetic flux level of the transformer changes according to the polarity, and an overcurrent is generated on the primary side of the transformer.

  FIG. 7 shows actual machine output waveforms when the carrier frequency is 10 kHz for INV1 and 5 kHz for INV2 (FIG. 7A) and when both INV1 and INV2 are 5 kHz (FIG. 7B). When the carrier frequencies of INV1 and INV2 are equal, a dead time error voltage is not basically generated in the output voltage between neutral points, so that the DC component of the output voltage is changed from 17.1 (V) to 2.3 (V). Since the transformer is not demagnetized, the waveform distortion of the output voltage does not occur.

<Countermeasure against transformer bias in this embodiment>
The DC error voltage that is the cause of transformer bias depends on the AC power output (mainly generated at light load), carrier frequency, and carrier phase difference. Therefore, by setting the carrier frequency and the carrier phase difference to values that do not generate the DC output error voltage as much as possible, especially when there is no load, the transformer biasing phenomenon can be avoided. FIG. 8 shows a specific configuration example of the control unit 40.

  Each of MG1ECU and MG2ECU has a control command output unit and a PWM modulation unit. The control command output unit generates a voltage command, supplies the voltage command to the PWM modulation unit, and switching of INV1 and INV2 is controlled by the PWM signal output from the PWM modulation unit. Here, in the present embodiment, by controlling the neutral point voltage of the stator coils of MG1 and MG2 to the zero-phase voltage (neutral point voltage) of INV1 and INV2, a desired AC voltage is set between the neutral points of MG1 and MG2. Generate a voltage and output it.

  Therefore, the output voltage control command output unit 50 compares the output voltage command value Vsr and the output voltage detection value Vs, and outputs a control command for the output voltage to follow the output voltage command value. The control command is distributed at a ratio (k times for MG1 and (1-k) times for MG2) in the zero phase of the generator ion barter and motor inverter control command, and each of the voltage commands from the control command output unit Is added.

  The carrier frequency / phase control command output unit 52 is a control unit for reducing the DC output error voltage that causes the output transformer bias. From the AC power generation command and the operating states of MG1 and MG2, INV1, INV2 The PWM carrier frequency and the carrier phase difference are controlled. That is, in the case where the carrier frequency / phase control command output unit 52 in the control unit 40 has a light load or no load on the AC voltage output, the carrier frequencies of INV1 and INV2 are made the same or the phase difference between the two is set. Control it appropriately.

  As described above, MG1 is for power generation, MG2 is for driving, and MG2 has a larger output. Therefore, the PWM carrier frequency of INV2 is smaller than the carrier frequency of INV1. In the embodiment, the PWM carrier frequency of INV2 is 5 kHz, and the PWM carrier frequency of INV1 is 10 kHz.

  As described above, when the carrier frequency is different, an excessive current due to bias may flow through the primary coil of the insulating transformer 30 as described above. In the present embodiment, the carrier frequency / phase control command output unit 52 of the control unit 40 performs the following processing.

  9A and 9B, the carrier frequency is changed.

  In FIG. 9A, it is first determined whether or not AC output is performed (S11). If this determination is NO, the process ends. When the determination in S11 is YES, the carrier frequencies of INV1 and INV2 are made the same (S12). Here, when the output of MG2 is large, the carrier frequency of INV1 is preferably lowered to 5 kHz or the like, and when the output of MG2 is relatively small, the carrier frequency of INV2 is preferably raised to 10 kHz.

  In this example, if the carrier frequencies of INV1 and INV2 are the same, the DC output error voltage is small. Therefore, in the AC power generation mode, switching is performed so that the carrier frequencies of INV1 and INV2 are the same.

  In FIG. 9B, it is first determined whether or not AC output is performed (S21). If the determination in S21 is YES, it is determined whether the load of the AC output is light (S22). Whether or not the load is light is determined based on whether or not the load is equal to or less than a predetermined threshold value, and this threshold value may be determined based on the possibility of occurrence of an overcurrent due to magnetic bias. If the determination at S22 is YES, the carrier frequencies of INV1 and INV2 are made the same (S23). If the determinations at S21 and S22 are NO, the process is terminated as it is.

  In particular, since a DC output error voltage is generated at a light load, switching is performed so that the carrier frequencies of INV1 and INV2 are equal in the AC power generation mode and at a light load.

  10A and 10B, the carrier frequency is not changed, but the carrier phase difference is changed.

  In FIG. 10A, it is first determined whether or not AC output is performed (S31). If this determination is NO, the process ends. If the determination in S31 is YES, the carrier phase difference between INV1 and INV2 is set to a predetermined value (S32). As described above, when the carrier frequency is 10 kHz or 5 kHz, it is possible to prevent the generation of an excessive current due to the demagnetization by setting the phase difference to about 65 degrees. The carrier frequencies of INV1 and INV2 are preset values, and it is known in advance how to set the phase difference in that case. Therefore, when outputting the AC voltage, the PWM signal is controlled so that the phase difference between the carriers of INV1 and INV2 becomes a preset value, thereby preventing an overcurrent due to biasing.

  Depending on the carrier frequencies of INV1 and INV2, there may be cases where there is no appropriate phase difference between carriers. In that case, it is preferable to set the carrier phase difference by making the carrier frequency the same or changing to a carrier frequency having an appropriate phase difference.

  Since the DC output error voltage depends not only on the carrier frequency but also on the carrier phase difference between INV1 and INV2, in the AC power generation mode, the carrier phases of INV1 and INV2 are synchronized, and the carrier phases of INV1 and INV2 are DC output Set the error voltage to a small value.

  In FIG. 10B, it is first determined whether or not AC output is performed (S41). If the determination in S41 is YES, it is determined whether the load of the AC output is light (S42). If YES in S42, the INV1 and INV2 carriers are synchronized and the phase difference is set to a predetermined value (S43). Note that if the determinations in S41 and S42 are NO, the process ends.

  In particular, since a DC output error voltage is generated at a light load, the carrier phases of INV1 and INV2 are synchronized in the AC voltage output mode and at a light load, and the carrier phases of INV1 and INV2 are Set to a smaller value.

  In FIG. 10C, it is first determined whether or not AC output is performed (S51). If the determination in S51 is YES, it is determined whether or not it is during cranking (S52). If YES in S52, the carriers of INV1 and INV2 are synchronized and the phase difference is set to a predetermined value (S53). Note that if the determinations in S51 and S52 are NO, the process ends.

  MG1 is used for engine start (cranking). At the time of cranking, MG1 outputs a driving force, but when the engine is started, the output fluctuates greatly. Due to the transient fluctuation of the inverter current, a direct current component tends to be generated in the AC output to the insulation transformer 30. In the present embodiment, in such a cranking period, the magnetic phase of the insulating transformer 30 can be prevented by setting the carrier phase to a predetermined one.

  As described above, in the external power feeding system of this embodiment, the output voltage of the two inverters INV1 and INV2 does not generate a dead time error voltage during the dead time period, or the dead time error voltage does not become direct current. Therefore, overcurrent and output waveform distortion can be prevented.

10 Battery, 12, 22, 28 Capacitor, 14 Boost converter, 16 Coil, 18, 20 Switching element, 30 Isolation transformer, 32 Electrical load, 40 Control unit, 50 Output voltage control command output unit, 52 Carrier frequency / phase control command Output unit, 60 dead time generator.

Claims (3)

A power storage device that outputs DC power;
Two inverters each having a plurality of inverter arms including upper and lower switch elements, each for converting DC power from the power storage device into AC;
Two motors driven by the two inverters;
A control unit for controlling the two inverters;
With
The controller is
Supplying a drive signal to each of the two inverters;
In this drive signal, by adjusting the carrier frequency difference or carrier phase difference between the two inverters, a predetermined AC power is generated between the neutral points of the two motors,
An external power feeding system that compensates for a DC error voltage due to a dead time error voltage that occurs during a dead time period in which the drive signals are supplied when the upper and lower switch elements of each inverter arm in the two inverters are both off. The external power feeding system according to claim 1,
The controller is
It is determined whether or not external power feeding is performed, and when external power feeding is performed, the carrier frequencies of the two inverters are set to be the same.
External power supply system. The external power feeding system according to claim 1,
The controller is
It is determined whether or not external power feeding is performed, and when external power feeding is performed, the carriers of the two inverters are synchronized and the phase difference between the carriers of the two inverters is set to a predetermined value.
External power supply system.