JP2015119304A - Amplifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide am amplifier circuit in which frequency band is constantly maintained without switching the feedback capacitance when gain is variably set.SOLUTION: A non-inverting amplifier circuit includes an operational amplifier OP, and a feedback circuit constituted of resistance elements Rf, Ri. A bias current IB to a differential pair constituted of PMOS transistors P1, P2 of the operational amplifier can be amplified to a predetermined amplitude level in spite of an amplitude range of an input signal by adjusting the bias current in accordance with gain set by the resistance elements Rf, Ri. In this case, without switching a capacitance value of the feedback capacitance, the frequency band is kept constantly, and the bias current can be amplified through the same low pass filter characteristics.

Description

  The present invention relates to an amplifier circuit that amplifies a minute signal, and more particularly, to an amplifier circuit that can change a gain.

  Sensor signals output from various sensors such as a geomagnetic sensor and an acceleration sensor are weak signals, and the range of the signal amplitude range may be different from each other. It is necessary to amplify the signal with a different gain for each amplitude range.

  As the amplifier circuit, a so-called non-inverting amplifier circuit, inverting amplifier circuit, or differential amplifier circuit in which negative feedback is applied to the operational amplifier by a feedback circuit including a resistance element or the like is generally used. Here, the operational amplifier has an open loop characteristic as a gain-frequency characteristic of the operational amplifier itself without a feedback circuit. In general, the gain (open loop gain) is sufficiently larger than the gain necessary for the amplifier circuit (for example, Non-Patent Document 1). On the other hand, the non-inverting amplifier circuit, the inverting amplifier circuit, and the differential amplifier circuit configured with the feedback circuit have a characteristic in which the gain is adjusted to a value corresponding to the sensor signal (hereinafter referred to as a closed loop characteristic). Called). Assuming that there are no poles other than the cut-off frequency, this closed loop characteristic is maintained at a constant value in the frequency band below the cut-off frequency, and (− It has a low-pass filter characteristic in which the gain is attenuated at 20 dB / dec). At this time, the characteristic line in the frequency band where the gain is attenuated is the same characteristic line regardless of the magnitude of the gain. As a result, it is known that the smaller the set gain, the wider the frequency band and the higher the cutoff frequency.

Okamura Ikuo, “Sadamoto Op Amp Circuit Design”, CQ Publisher, September 10, 1990 (first edition), p. 31-36

  In the amplification circuit according to the background art, the gain is set by adjusting the resistance ratio of the resistance element or the like provided in the feedback circuit in accordance with the range of the amplitude range of the input sensor signal. At this time, the cut-off frequency moves to the high frequency side by the gain reduction, and the frequency band is expanded. As a result, a signal in a high frequency band that exceeds the frequency band of the sensor signal that needs to be amplified is also amplified with the same gain as the sensor signal. Unnecessary frequency band signal components may be amplified and become a noise source for the sensor signal. In the amplified signal, there is a possibility that the noise band is expanded and the signal quality is deteriorated, which is a problem.

  The reduction of the frequency band can be dealt with by increasing the capacitance value of the feedback capacitor connected to the operational amplifier. However, a large feedback capacitor must be connected according to the gain reduction, and the capacitance value must be switched according to the gain change. In order to switch to a capacitance value according to the gain, a plurality of capacitance elements must be provided so that a large capacitance value is required as the gain is reduced. It is necessary to ensure that there is a problem.

  The technology disclosed in the present application has been proposed in view of the above problems, and provides an amplifier circuit in which the frequency band is maintained constant without switching the feedback capacitance when the gain is set to be variable. With the goal.

  An amplifier circuit according to a technique disclosed in the present application includes an operational amplifier unit and a feedback circuit that sets a gain for non-inverting amplification, inverting amplification, or differential amplification of an input signal up to a predetermined amplitude. The operational amplifier unit includes a bias current source, and the bias current source adjusts the bias current supplied to the differential pair to which the input signal is input, according to the gain set by the feedback circuit.

  As a result, even if the amplitude range of the input signal is different in the amplifier circuit that amplifies the amplitude range of the input signal having a predetermined amplitude range to the predetermined amplitude range required for the signal processing in the subsequent stage, the amplifier circuit The gain can be set and amplified to a predetermined amplitude range by the feedback circuit provided in the above. The input signal can be used for subsequent signal processing regardless of the amplitude range.

  In this case, the frequency band of the amplifier circuit can be kept constant by adjusting the bias current supplied to the differential pair of the operational amplifier unit according to the set gain. Since the input signal is amplified through the same low-pass filter characteristic regardless of the amplitude range, the frequency band of the input signal to be signaled can be made constant. The operation of switching the capacitance value of the feedback capacitance according to the set gain and optimizing the phase compensation becomes unnecessary. In addition, it is not necessary to prepare a plurality of capacitive elements in order to match the capacitance value for each set gain, and selection means for switching the connection to the selected capacitive element is not necessary. The area occupied by circuits and elements can be reduced.

  Further, in the amplifier circuit disclosed in the present application, the bias current source has a configuration in which the bias current with respect to the reference gain is set as the reference bias current, and the bias current with respect to the gain is adjusted as (reference bias current) × (gain / reference gain). It is good. As a result, the relationship between the reference bias current and the bias current corresponding to the set gain is proportional to the relationship between the reference gain and the set gain, and even when the gain is changed, the bias current (reference By setting (bias current) × (gain / reference gain), the same low-pass filter characteristics can be maintained.

  Furthermore, in the amplifier circuit disclosed in the present application, the reference gain may be a gain that is set when the minimum amplitude range of the input signal is amplified to the maximum amplitude range. As a result, the gain that amplifies the minimum amplitude range assumed as the input signal to the maximum amplitude range assumed as the signal processing in the subsequent stage is used as the reference gain, so the reference gain is the maximum value of the set gains. The reference bias current at this time is also the maximum value. Therefore, the bias current may be reduced from the reference bias current according to the gain set by the feedback circuit. The gain that is set is a gain that is less than or equal to the maximum gain, and accordingly, the bias current is also reduced below the reference bias current, and the current consumption can be reduced.

  Further, in the amplifier circuit disclosed in the present application, the bias current source includes a plurality of MOS transistors arranged in parallel to each other, and the bias current flows through each of the selected MOS transistors among the plurality of MOS transistors. It can also be set as the sum total of electric current. The current value of the bias current can be adjusted by providing a plurality of MOS transistors according to the bias current value in advance and selecting the MOS transistor to be used as a current source according to the set gain. In this case, the plurality of MOS transistors may be arranged such that transistors having the same size such as channel width are arranged in parallel, or transistors having different sizes may be arranged in parallel, and these are appropriately combined. May be.

  According to the amplifier circuit related to the technique disclosed in the present application, in the amplifier circuit related to non-inverting amplification, inverting amplification, or differential amplification in which the feedback circuit is connected to the operational amplifier unit, the gain variably set by the feedback circuit is set. Accordingly, by adjusting the bias current of the differential pair of the operational amplifier unit, it is possible to obtain a low-pass filter characteristic having the same frequency band regardless of the gain.

It is a figure which shows an example of the amplifier circuit in embodiment. It is a circuit diagram which shows the non-inverting amplifier circuit of embodiment. It is a figure which shows the frequency-gain characteristic of the non-inverting amplifier circuit in embodiment. It is a figure which shows the relationship between a bias current and noise in the non-inverting amplifier circuit of embodiment.

  FIG. 1 shows an example of an amplifier circuit composed of an operational amplifier and a feedback circuit. A typical circuit is illustrated as an amplifier circuit using an operational amplifier. (A) is a non-inverting amplifier circuit. A resistance element Rf for feedback is provided between the output terminal of the operational amplifier OP and the inverting input terminal (−). In addition, a resistance element Ri is connected between the inverting input terminal (−) and the ground potential GND. The resistance element Rf feeds back an output signal output from the output terminal of the operational amplifier OP to the inverting input terminal (−). The resistance elements Rf and Ri constitute a feedback circuit. The input / output response in this circuit is Vo = Vi × (1 + Rf / Ri). The gain (AV) indicated by the ratio of the amplitude ranges of the input / output signals is G (AV) = (1 + Rf / Ri).

(B) is an inverting amplifier circuit. A resistance element Rf for feedback is provided between the output terminal of the operational amplifier OP and the inverting input terminal (−). A resistance element Ri is connected between the inverting input terminal (−) and a terminal to which the input signal Vi is input. The resistance element Rf feeds back the output signal output from the output terminal of the operational amplifier OP to the inverting input terminal. The resistance elements Rf and Ri constitute a feedback circuit. The input / output response in this circuit is Vo = −Vi × (Rf / Ri). The gain (AV) indicated by the ratio of the amplitude ranges of the input / output signals is G (AV) = − (Rf / Ri).

(C) is a differential amplifier circuit. A resistance element Rf for feedback is provided between the output terminal of the operational amplifier OP and the inverting input terminal (−). A resistance element Ri is connected between the inverting input terminal (−) and a terminal to which the input signal V2 is input. A resistance element Rf is connected between the non-inverting input terminal (+) and the ground potential GND, and a resistance element Ri is connected between the non-inverting input terminal (+) and a terminal to which the input signal V1 is input. Is done. The input / output response in this circuit is Vo = (V1−V2) × (Rf / Ri). The gain (AV) indicated by the ratio of the amplitude ranges of the input / output signals is G (AV) = (Rf / Ri).

  As an application in which the amplifier circuit is used, for example, amplification of a sensor signal output from a sensor can be considered. In order to amplify the sensor signal output from the sensor and use it for signal processing in the subsequent processing circuit, the amplified signal is set to an amplitude range in a predetermined amplitude range suitable for signal processing in the subsequent processing circuit. There is a need. On the other hand, the sensor signal output from the sensor is output in a certain amplitude range according to the detected physical quantity, and the amplitude range may differ depending on the characteristics of the sensor. For example, in some geomagnetic sensors, the output sensor signal may be a minute signal having an amplitude range in a small amplitude range. On the other hand, in some acceleration sensors, the output sensor signal has an amplitude range with a relatively large amplitude range, and the sensor signal output from the geomagnetic sensor has an amplitude range. May be different. Therefore, even when the amplitude range of the input signal differs due to differences in sensor type, etc., in order to perform signal processing in the same subsequent processing circuit, the gain in the amplifier circuit can be varied according to the amplitude range of the sensor signal. Must be set.

  In the amplifier circuit of FIG. 1, the gain can be variably set by the resistance elements Rf and Ri. However, it is known that when the gain is set by the resistance elements Rf and Ri in the amplifier circuit, the frequency-gain characteristic changes. Specifically, the cut-off frequency increases as the gain is reduced, and the frequency band spreads to the high frequency side when the amplifier circuit also has a low-pass filter function. This is because, in the frequency-gain characteristic of the amplifier circuit, the attenuation line of (-20 dB / dec) is fixed regardless of the set gain. This is because when the gain is reduced by setting, the characteristic having the reduced gain is extended from the low frequency side to the high frequency side until it crosses the attenuation line, and this intersection becomes the cutoff frequency for the set gain.

  The low-pass filter characteristic exhibited by the amplifier circuit should be determined according to the frequency band required in the subsequent processing circuit, and preferably has a certain characteristic even if the set gain is changed. When the frequency band of the low-pass filter characteristic is expanded in accordance with the gain reduction, generally, noise in the higher frequency band than the frequency band of the significant signal is amplified in the same way as the significant signal, and the noise band This is because there is a risk of the enlargement.

  Therefore, it is desirable to keep the low-pass filter characteristics constant by keeping the cutoff frequency constant regardless of the gain change. In the following description, the maximum gain set in the amplifier circuit is used as a reference gain, and this is achieved by reducing the bias current of the differential pair of the operational amplifier in proportion to the gain reduction ratio from the reference gain. is there.

  In the following description, the non-inverting amplifier circuit of FIG. FIG. 2 shows a circuit diagram of the non-inverting amplifier circuit. A simple two-stage amplifier circuit is exemplified as the circuit configuration of the operational amplifier OP. The PMOS transistors P1 and P2 are differential pairs and constitute a first stage amplifier. Each gate terminal is an inverting input terminal (−) and a non-inverting input terminal (+). The drain terminal is connected to an active load. The active loads are diode-connected NMOS transistors N1 and N2, respectively. The drain terminals of the PMOS transistors P1 and P2 are connected to the drain and gate terminals of the NMOS transistors N1 and N2, respectively.

  The source terminals of the PMOS transistors P1 and P2 are connected to the bias current sources I1 to I3 via the selector S. Here, the bias current sources I1 to I3 may be current sources that supply the same current value or current sources that supply different current values. Each current source may be composed of a MOS transistor. The selector S selects which of the bias current sources I1 to I3 is connected by a select signal SE supplied from the outside. As will be described later, the select signal SE is instructed according to the gain (G (AV) = (1 + Rf / Ri)) of the non-inverting amplifier circuit, and becomes a bias current source I1 that becomes a bias current IB proportional to the set gain. A combination of .about.I3 is selected to supply a bias current IB to the differential pair. The sum of the current values from the selected bias current sources I1 to I3 is supplied to the differential pair as the bias current IB.

  The second-stage amplifying unit includes a current source I4 and an NMOS transistor N3 connected in series between the power supply voltage VCC and the ground potential GND. The gate terminal of the NMOS transistor N3 is connected to a connection point between the PMOS transistor P2 constituting the differential pair and the NMOS transistor N2 constituting the active load. The output signal of the first stage amplification unit output from the connection point between the PMOS transistor P2 and the NMOS transistor N2 is inverted and amplified by the NMOS transistor N3, and output terminal (OUT) which is the connection point between the current source I4 and the NMOS transistor N3. ) Is output.

  In the operational amplifier OP, as an element for phase compensation, a feedback capacitor CFB is a connection point between an output terminal (OUT) that is an output point of the two-stage amplification unit and a PMOS transistor P2 and an NMOS transistor N2 that are output points of the first-stage amplification unit. Connected between and.

  A resistor element Rf is connected as a feedback circuit between the output terminal (OUT) and the inverting input terminal (−) of the operational amplifier OP.

  FIG. 3 shows frequency-gain characteristics. Here, as an example, 60 dB is set as the maximum gain required in the non-inverting amplifier circuit. Therefore, the gain (60 dB) is the reference gain. Three types of gains of 60 dB, 40 dB, and 20 dB are illustrated. The gain expressed in decibels (dB) is a value calculated by the equation G (dB) = 20 × log (Vo / Vi) (log is a common logarithm). Accordingly, the gains (60 dB, 40 dB, 20 dB) correspond to 1000 times, 100 times, and 10 times as gains (AV) displayed as amplitude ratios. Moreover, in this embodiment, the case where only one pole exists is illustrated.

  The gain characteristic line 1 is the frequency-gain characteristic at the reference gain (maximum gain). The cutoff frequency f0 is the pole P1, and a gain (60 dB) is obtained in the frequency band BW below the frequency f0. In a band exceeding the cut-off frequency f0, the frequency-gain characteristic is a characteristic that attenuates at −20 dB / dec. That is, when the frequency becomes 10 times, the gain (dB) is (−20 dB), that is, the gain (AV) is attenuated to 1/10 times. It has a low-pass filter characteristic having a frequency band BW.

  The resistance values of the resistance elements Rf and Ri are adjusted, and the gain (dB) is reduced by (−20 dB) to obtain the gain (dB) (40 dB). That is, the gain (AV), which was 1000 times, is reduced to 1/10 to obtain a gain (AV) of 100 times. In this case, if the bias current IB of the operational amplifier OP is not changed, the frequency-gain characteristic becomes the characteristic line 20 having the cutoff frequency 10 · f0 as the pole P20. By setting the bias current IB to 1/10 times the reference bias current IB with the select signal SE, the cutoff frequency f0 is set as the pole P2, and the gain (40 dB) is obtained in the frequency band BW below the frequency f0. It can be. The cut-off frequency f0 is not changed by the gain reduction, and the frequency band BW in the low-pass filter characteristic can be maintained unchanged.

  Further, the gain (dB) is reduced by (−20 dB) to obtain the gain (dB) (20 dB). That is, the gain (AV), which was 100 times, is reduced to 1/10 to obtain a gain (AV) of 10 times. In this case, if the bias current IB of the operational amplifier OP is not changed, the frequency-gain characteristic becomes the characteristic line 30 having the cutoff frequency 100 · f0 as the pole P30. By setting the bias current IB to 1/100 times the reference bias current by the select signal SE, the cutoff frequency f0 is the pole P3, and a frequency-gain characteristic for obtaining a gain (20 dB) in the frequency band BW below the frequency f0 can do. The cut-off frequency f0 is not changed by the gain reduction, and the frequency band BW in the low-pass filter characteristic can be maintained unchanged.

  As described above, even when the gain setting is changed, the low-pass filter characteristic in which the cutoff frequency f0 is constant and the frequency band BW is constant can be obtained. Regardless of the set gain, the low-pass filter characteristic can be made constant, and the frequency band of the signal amplified by the amplifier circuit can be made constant. There is no change in the noise band due to the difference in gain, and it is possible to stably amplify to a desired gain.

  Here, since the reduction of the bias current IB supplied to the differential pair of the operational amplifier OP may adversely affect the input conversion noise, the relationship between the reduction of the bias current IB accompanying the gain reduction and the input conversion noise is examined. .

  When amplifying to a predetermined amplitude range by the amplifier circuit, it is necessary to increase the gain (AV) as the amplitude range of the input signal is smaller, and to decrease the gain (AV) as the amplitude range of the input signal is larger. In this case, the larger the amplitude range of the input signal, the larger the ratio of the noise to the amplitude range, that is, the signal-to-noise ratio (hereinafter abbreviated as S / N ratio), and there is room for the allowable S / N ratio. It becomes. Conversely, the smaller the amplitude range of the input signal, the smaller the S / N ratio, and there is no margin for the allowable S / N ratio. Therefore, as represented by the noise characteristic line 5 in FIG. 4, the relationship of the allowable noise (Vn) to the set gain (AV) is such that the larger the gain (AV) is, the smaller the amplitude range of the input signal is. Vn) needs to be reduced. As the gain (AV) decreases, the amplitude range of the input signal increases, and the allowable noise (Vn) can increase.

  On the other hand, it is known that when the bias current IB in the differential pair of the operational amplifier OP is reduced in accordance with the reduction of the set gain, the level of noise (input conversion noise) in the operational amplifier OP increases.

In the case of the circuit configuration shown in FIG. 2, the input conversion noise of the operational amplifier OP is a total of 4 of the thermal noise and 1 / f noise of the PMOS transistors P1 and P2 of the differential pair and the NMOS transistors N1 and N2 of the active load. Known to be of type. When each noise is expressed by the energy of the noise,
Thermal noise:
In the differential pair of PMOS transistors P1 and P2,
Vt ^ 2 = 8/3 · k · T · (1 / gmp) · BW (1)
In the active load NMOS transistors N1 and N2,
Vt ^ 2 = 8/3 · k · T · gmn / gmp ^ 2 · BW (2)
1 / f noise:
In the differential pair of PMOS transistors P1 and P2,
Vf ^ 2 = ∫ {kp / (Cox · L · W) · (1 / f)} df (3)
In the active load NMOS transistors N1 and N2,
Vf ^ 2 = ∫ {kn / (Cox · L · W) · (gmn / gmp) ^ 2 · (1 / f)} df (4)
It is.

  Here, gmp is the conductance of the PMOS transistors P1 and P2 of the differential pair, gmn is the conductance of the NMOS transistors N1 and N2 of the active load, and BW is the frequency band of the operational amplifier OP. Cox is a capacitance value of a capacitive element formed by sandwiching the gate oxide film of the MOS transistor, L is a channel length of the MOS transistor, W is a channel width of the MOS transistor, and f is a frequency of the input signal. T is an absolute temperature, k is a Boltzmann constant, and kp and kn are physical constants. Here, BW is proportional to the bias current IB (BW∝IB).

Also, the conductance gmp of the PMOS transistors P1 and P2 of the differential pair is as follows when the PMOS transistors P1 and P2 operate in a weak inversion state.
gmp = IB / (k · T / q) (5)
It is. From equation (5), the conductance gmp is proportional to the bias current IB (gmp） IB).
The conductance gmn of the NMOS transistors N1 and N2 of the active load is
gmn = √ (2 · IB · μn · Cox · W / L) (6)
It is. From equation (6), the conductance gmn is proportional to the square root of the bias current IB (gmn∝√IB).
Here, q is the amount of electricity (absolute value) of electrons, and μn is the mobility of electrons.

From the above relationship (BW∝IB, gmp∝IB, gmn∝√IB) and the equations (1) to (4), the dependency relationship between each noise and the bias current IB when expressed in voltage value is as follows. Is required.
The thermal noise of the differential pair of PMOS transistors P1 and P2 is Vt∝1 (independent).
The 1 / f noise of the PMOS transistors P1 and P2 of the differential pair is Vf∝1 (independent).
The thermal noise of the active load NMOS transistors N1 and N2 is Vt∝√ (1 / √IB).
The 1 / f noise of the active load NMOS transistors N1 and N2 is Vf∝1 / √IB.

  The thermal noise and 1 / f noise of the PMOS transistors P1 and P2 of the differential pair do not depend on the bias current IB, and the thermal noise and 1 / f noise of the NMOS transistors N1 and N2 of the active load have a dependency relationship. Thereby, the input conversion noise Vn of the operational amplifier OP has a relationship shown by the characteristic line 7 in FIG. As the bias current increases, the value converges to a constant value, and as the bias current IB decreases, the value increases. As the bias current IB is reduced, the value gradually increases from a value converged to a constant value, and a characteristic (characteristic line) indicating the relationship of the input conversion noise Vn allowed with respect to the bias current by the S / N ratio. It will be more gradual than 5). This is the characteristic indicated by the characteristic line 7 in FIG.

  Thereby, when the gain (AV) of the amplifier circuit is reduced, the input conversion noise Vn of the operational amplifier OP is reduced in accordance with the reduction of the bias current IB of the operational amplifier OP in order to keep the frequency band BW (cutoff frequency f0) constant. However, the increase is smaller than the allowable value of the input conversion noise Vn permitted by the S / N ratio (characteristic line 5) and within the allowable noise range. The bias current IB can be adjusted. The bias current IB is reduced with respect to the set gain, so that the current consumption can be reduced, and the input conversion noise Vn can be suppressed within an allowable range.

  As described above in detail, according to the amplifier circuit according to the embodiment, when the amplitude range of the input signal having a predetermined amplitude range is amplified to the predetermined amplitude range necessary for the subsequent signal processing. Even when the amplitude range of the input signal is different, the gain can be set variably according to the resistance ratio of the resistance elements Rf and Ri provided as a feedback circuit in the amplifier circuit, and can be amplified to a predetermined amplitude range. Regardless of the amplitude range of the input signal, a signal having a predetermined amplitude range can be provided for subsequent signal processing.

  In this case, if a combination of the bias current sources I1 to I3 that becomes the bias current IB proportional to the set gain is selected, the sum of the current values from the bias current sources I1 to I3 becomes the bias current IB and the PMOS transistors P1 and P2 Is supplied to the differential pair. The cutoff current f0 of the amplifier circuit can be kept constant by adjusting the bias current IB supplied to the differential pair of the operational amplifier OP according to the set gain. Regardless of the amplitude range of the input signal, the low-pass filter characteristics of the amplifier circuit can be made constant, and the noise band can be kept constant. The work of switching the capacitance value of the feedback capacitor according to the set gain and optimizing the phase compensation is not required, and there is no need to prepare a plurality of capacitive elements, and means such as switching the connection of the capacitive elements according to the gain. Is also unnecessary. The area occupied by circuits and elements can be reduced.

  Further, if the maximum gain set in the amplifier circuit is set as a reference gain and the bias current IB at that time is set as a reference bias current, the bias current IB with respect to the set gain is expressed by (reference bias current) × (gain / reference gain). ) Can be adjusted.

  Here, the maximum gain set as the reference gain is a gain that amplifies the minimum amplitude range assumed as the input signal to the maximum amplitude range assumed as the signal processing of the subsequent stage. For this reason, the gain set by the resistance elements Rf and Ri may be set in a direction to be reduced from the reference gain, and the bias current IB is adjusted in a direction to be reduced from the reference bias current. The bias current IB is reduced according to the gain setting, and the current consumption can be reduced.

  Further, in the amplifier circuit disclosed in the present application, the bias current sources I1 to I3 are arranged in parallel to each other, and each can be configured by a MOS transistor. If a plurality of MOS transistors are provided in advance so that a bias current IB assumed according to a set gain can be supplied, and the MOS transistors are selected in combination according to the set gain, the bias current IB can be set to a desired value. It can be a current value. In this case, the individual MOS transistors may be arranged in parallel with transistors having the same channel width or the like, or transistors with different sizes may be arranged in parallel, and these may be arranged in an appropriate combination. May be.

Needless to say, the present invention is not limited to the above-described embodiment, and various modifications and changes can be made without departing from the spirit of the present invention.
For example, the present application can be applied to any of a non-inverting amplifier circuit, an inverting amplifier circuit, and a differential amplifier circuit as the amplifier circuit.
Moreover, although the case where PMOS transistors P1 and P2 were comprised as a differential pair was illustrated as operational amplifier OP, this application is not limited to this. The same applies to a configuration in which an NMOS transistor is a differential pair.

CFB feedback capacitor I4 current source N1, N2, N3 NMOS transistor OP operational amplifier (OUT) output terminal P1, P2 PMOS transistor Rf, Ri resistive element S selector 1 gain characteristic lines 5, 7, 30 characteristic line BW frequency band f0 cutoff frequency I1 ~ I3 Bias current source IB Bias current P1, P2, P20, P30 pole SE Select signal V1, V2, Vi Input signal (Vn) Allowable noise

Claims (4)

An operational amplifier section;
A feedback circuit that sets a gain for non-inverting amplification, inverting amplification, or differential amplification of the amplitude range of the input signal to a predetermined amplitude range;
The operational amplifier section is
An amplifying circuit comprising: a bias current source that adjusts a bias current supplied to a differential pair to which the input signal is input according to the gain set by the feedback circuit.   The bias current source has a bias current with respect to a reference gain as a reference bias current, and the bias current with respect to the gain is (reference bias current) × (the gain / reference gain). The amplifier circuit according to 1.   The amplifier circuit according to claim 2, wherein the reference gain is a gain that is set when a minimum amplitude range of the input signal is amplified to a maximum amplitude range. The bias current source includes a plurality of MOS transistors arranged in parallel with each other,
4. The amplifier circuit according to claim 1, wherein the bias current is a sum of currents flowing through each of the selected MOS transistors among the plurality of MOS transistors. 5.

Images