JP2015114243A - Testing device and method; and program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform accurate defective/nondefective determination for electronic devices having temperature characteristics or time degradation characteristics while reducing test costs by reducing test manhours.SOLUTION: In performing a functional test at a predetermined temperature for each of a plurality of semiconductor chips formed on a substrate, a testing device: determines an operation lower limit value of voltage or frequency for each of the semiconductor chip (determines operation lower limit values by a plurality of operations by a detailed lower limit voltage search and simple lower limit voltage search by using a search upper limit value and search lower limit value which are obtained in the functional test); and totals the determined operation lower limit values to calculate distribution and performs defective/nondefective determination for the semiconductor chips by using the calculated distribution.

Description

  The present invention relates to an electronic device testing apparatus and method, and a program.

  One of the tests for determining pass / fail of a semiconductor chip that is an electronic device is a function test. In the function test, a test pattern is applied to an integrated circuit of a semiconductor chip with a circuit-recommended operating voltage, and pass / fail is determined for each semiconductor chip depending on whether the required specifications are satisfied.

JP 2009-147015 A Japanese Patent Laid-Open No. 10-144096

  Some semiconductor chips to be tested include device guarantee temperatures up to low temperatures (eg, −40 ° C.). In this case, it is necessary to execute a function test at a low temperature in addition to a function test at a high temperature (or room temperature). Some semiconductor chips having temperature characteristics or aging deterioration characteristics are determined to be pass at high temperatures but determined to be fail at low temperatures. In such a semiconductor chip, a defective product cannot be detected unless a function test is performed at a low temperature in addition to a high temperature.

  As described above, when the object to be tested is a semiconductor chip having temperature characteristics or aging deterioration characteristics, it is necessary to perform a function test at a plurality of different temperatures, which increases test man-hours and test costs. There are challenges.

  The present invention has been made in view of the above problems, and for electronic devices having temperature characteristics or aging deterioration characteristics, the test man-hours can be reduced to reduce the test cost. It is an object of the present invention to provide a test apparatus and method that enable determination.

  One aspect of the test apparatus is a test apparatus that performs a function test at a predetermined temperature for each of the plurality of electronic devices. In the function test, an operation lower limit value of voltage or frequency is determined for each of the electronic devices. A determination unit that calculates the distribution by aggregating the determined operation lower limit values, and a determination unit that determines a non-defective product or a defective product for the electronic device using the calculated distribution. .

  One aspect of the test method is the step of determining an operation lower limit value of voltage or frequency for each electronic device when performing a function test at a predetermined temperature for each of the electronic devices, and the determined operation A step of calculating a distribution by counting the lower limit values, and a step of determining a non-defective product or a defective product for the electronic device using the calculated distribution.

  One aspect of the program is a procedure for determining an operation lower limit value of voltage or frequency for each electronic device when performing a function test at a predetermined temperature for each of the electronic devices, and the determined operation lower limit. This is for causing a computer to execute a procedure for calculating a distribution by collecting values and a procedure for determining a non-defective product or a defective product for the electronic device using the calculated distribution.

  According to the present invention, for an electronic device having temperature characteristics or aging deterioration characteristics, it is possible to accurately determine a non-defective product or a defective product while reducing the test man-hour and reducing the test cost.

1 is a block diagram showing a test system according to a first embodiment. It is a flowchart which shows the test method by 1st Embodiment in order of a step. It is a schematic plan view which shows typically the test order of the semiconductor chip in a semiconductor wafer. It is a flowchart including the detailed lower limit voltage search in 1st Embodiment. It is a schematic diagram which shows the image of a detailed lower limit voltage search. It is a flowchart including the simple lower limit voltage search in 1st Embodiment. It is a schematic diagram which shows the image of a simple lower limit voltage search. It is a schematic diagram which shows the image of a simple lower limit voltage search. It is a schematic diagram which shows the image of a simple lower limit voltage search. It is a schematic diagram which shows the image of a simple lower limit voltage search. It is a schematic diagram which shows the image of a simple lower limit voltage search. It is a schematic diagram which shows a part of acquired shmoo. It is a characteristic view for demonstrating the various effects show | played by the test method in 1st Embodiment. It is a block diagram which shows the test system by 2nd Embodiment. It is a flowchart which shows the test method by 2nd Embodiment in order of a step. It is a flowchart including the detailed lower limit frequency search in 2nd Embodiment. It is a flowchart including the simple lower limit frequency search in 2nd Embodiment.

  In the following embodiments, a semiconductor chip is exemplified as an electronic device, and a semiconductor chip test apparatus and test method are disclosed.

(First embodiment)
First, the first embodiment will be described.
FIG. 1 is a block diagram showing a test system according to the present embodiment. FIG. 2 is a flowchart showing the test method according to this embodiment in the order of steps.

As shown in FIG. 1, the test system includes a tester 1, a probe 2, a computer 3, and a final determination server 4.
The tester 1 performs a function test of the semiconductor chip according to the test program 10, and executes a lower limit voltage search, which will be described later, together with the normal test during the function test. Thereby, the operation lower limit voltage value is determined as the operation lower limit value. The tester 1 includes a determination unit 11 that determines an operation lower limit voltage value by executing the test program 10 and a data storage unit 12 such as an HDD.
The probe 2 is connected to the tester 1 and performs a function test by contacting a connection terminal of the semiconductor chip based on the test program 10.

The computer 3 includes a calculation unit 13 and a determination unit 14.
The calculation unit 13 totals the operation lower limit voltage values determined for each semiconductor chip during the function test, and calculates the median or average value of the operation lower limit voltage values and the distribution of the operation lower limit voltage values.
The determination unit 14 uses the calculated distribution to determine whether the semiconductor chip is a non-defective product or a defective product based on a set reference.

  The final determination server 4 determines the non-defective semiconductor chip in the semiconductor wafer by combining the result of the normal test and the determination result of the non-defective product or the defective product by the determination unit 14.

Hereinafter, a semiconductor chip test method using the above test system will be described with reference to FIG.
In the present embodiment, as shown in FIG. 3, a semiconductor wafer in which a plurality of (for example, several hundred) semiconductor chips are formed in a matrix is used as a test object.

The tester 1 performs a normal test and a lower limit voltage search together with the normal test according to the test program 10 (step ST1). The lower limit voltage search includes a detailed lower limit voltage search and a simple lower limit voltage search.
As step ST1, a flow including a detailed lower limit voltage search is shown in FIG. 4-1, and a flow including a simple lower limit voltage search is shown in FIG. 5-1.

As shown in FIG. 4A, the normal test and the lower limit of detail for the first several dozen (several hundreds) semiconductor chips shown in FIG. A voltage search is performed.
For each semiconductor chip formed on the semiconductor wafer, the probe 2 is sequentially brought into contact with the connection terminal, and a normal test is executed at a high temperature or a normal temperature based on the test program 10 (step ST11). The normal test is performed at an operating working voltage (normal test point) at a test frequency k = 1 (relative value). FIG. 6 is a shmoo diagram showing the relationship between the operating voltage and the operating frequency temporarily acquired during semiconductor device evaluation or device investigation, and shows the present invention for the purpose of explanation.

  The result of the normal test acquired in step ST11 is determined (step ST12). When the test result is “fail” in step ST11, it is determined that the semiconductor chip is defective, and the test of the semiconductor chip is finished (step ST13). When the test result is pass, the process proceeds to step ST21. The data of the determination result of the normal test for each semiconductor chip is stored in the data storage unit 12.

In steps ST21 to ST25 of FIG. 4A, a detailed lower limit voltage search is executed based on the test program 10. An image of the detailed lower limit voltage search is shown in Fig. 4-2. The detailed lower limit voltage search is performed at a test frequency k = 1 (relative value) where a particularly significant difference is observed depending on the test temperature.
In step ST21, S1 (= (SL + SU) / 2) is calculated using the search lower limit voltage (SL) and the search upper limit voltage (SU) as shown in FIG. 6, and pass / fail in S1 is determined. SU is the operating voltage for normal testing.

  Subsequently, step ST22 is executed. In step ST22, when the determination result of S1 is pass, S2 (= (S1 + SL) / 2) is calculated using S1 and SL, and pass / fail in S2 is determined. If the determination result of S2 is fail, S2 (= (S1 + SU) / 2) is calculated using S1 and SU, and pass / fail in S2 is determined.

The detailed lower limit voltage search is performed until the final count is M times, and the difference from M-1 times is the minimum search unit (defined by the resolution), the operation lower limit voltage value is determined, and is terminated. In FIG. 4A, the Mth step is denoted as ST (M).
As an example, the case where M = 5 (when steps ST23 to ST25 are further performed) is shown below.

Subsequently, step ST23 is executed. In step ST23, S3 (= (S1 + S2) / 2) is calculated using S1 and S2, and pass / fail in S3 is determined.
Subsequently, step ST24 is executed. In step ST24, S4 (= (S2 + S3) / 2) is calculated using S2 and S3, and pass / fail in S4 is determined.
Subsequently, step ST25 is executed. In step ST25, S5 (= (S3 + S4) / 2) is calculated using S3 and S4, and pass / fail in S5 is determined.
In step ST (M), S (M) (= (S (M−2) + S (M−1)) / 2) is calculated using S (M−2) and S (M−1). Then, pass / fail in S (M) is determined.

As a specific example, a case where the minimum search unit is 0.0125V, SL is 0.8V, and SU is 1.2V will be described. At this time, it is assumed that the actual operation lower limit voltage value is 0.937V.
In step ST21, S1 = (0.8 + 1.2) /2=1.00, and it is determined as pass.
In step ST22, S2 = (1.0 + 0.8) /2=0.90, and it is determined as fail. The difference (S2-S1) is 0.1V.
In step ST23, S3 = (0.9 + 1.0) /2=0.95, which is determined to be pass. The difference (S2-S1) is 0.05V.
In step ST24, S4 = (0.95 + 0.9) /2=0.925, and it is determined as fail. The difference (S3-S2) is 0.025V.
In step ST25, S5 = (0.925 + 0.95) /2=0.9375, and it is determined as pass. The difference (S3-S2) is 0.0125V. Since the difference has reached the minimum search unit, the operation lower limit voltage value is determined to be 0.9375 V in step ST25.

In the detailed lower limit voltage search, steps ST11 to ST13 and ST21 to ST (M) are sequentially performed for each of the first to Nth semiconductor chips, and in step ST14, an operation lower limit voltage value for each semiconductor chip is determined. . Hereinafter, the operation lower limit voltage value is described as V _min . The data of V _min is stored in the data storage unit 12.

After the detailed lower limit voltage search, other tests are performed (step ST15). As shown in FIG. 5A, the calculation unit 13 is determined by the detailed lower limit voltage search for the first to Nth semiconductor chips. The median value or average value of each V _min is calculated (step ST31). This median or average value is SA. Of the N semiconductor chips from 1 to N, a predetermined semiconductor chip is assumed to have a value V _{min that} is relatively large compared to other semiconductor chips. It is desirable to do.

A normal test and a simple lower limit voltage search are performed on the remaining semiconductor chips (from (N + 1) th to the last) other than the semiconductor chip that is the target of the detailed lower limit voltage search.
For each semiconductor chip formed on the semiconductor wafer, the probe 2 is sequentially brought into contact with the connection terminal, and a normal test is executed based on the test program 10 (step ST11). The normal test is performed at an operating working voltage at a test frequency k = 1 (relative value) at a high temperature or normal temperature.

  The result of the normal test acquired in step ST11 is determined (step ST12). When the test result is “fail” in step ST11, it is determined that the semiconductor chip is defective, and the test of the semiconductor chip is finished (step ST13). When the test result is pass, the process proceeds to step ST41. The data of the determination result of the normal test for each semiconductor chip is stored in the data storage unit 12.

A simple lower limit voltage search is executed based on the test program 10 in steps ST41 to ST (M) in FIG. Images of the detailed lower limit voltage search are shown in FIGS. The simple lower limit voltage search is performed at a test frequency k = 1 (relative value) where a particularly remarkable difference is observed depending on the test temperature.
As shown in FIG. 5B, in step ST41, pass / fail in S1 = SA is determined.
When the determination result of S1 is “fail” in step ST41, the process proceeds to step ST42. In step ST42, S2 (= (SA + SU) / 2) is calculated using SA and SU, and pass / fail in S2 is determined. If the determination result of S2 is pass, S2 is determined to be V _min and the simple lower limit voltage search is terminated. This case is referred to as case (1).

As illustrated in FIG. 5C, when the determination result of S1 is “pass” in step ST41, the process proceeds to step ST43. In step ST43, S3 (= (SA + SL) / 2) is calculated using SA and SL, and pass / fail in S3 is determined. When the determination result of S3 is “fail”, S1 (= SA) is determined as V _min and the simple lower limit voltage search is terminated. This case is referred to as case (2).

As shown in FIG. 5-4, if the determination result in S3 is “pass” in step ST43, the process proceeds to step ST44. In step ST44, S4 (= (S3 + SL) / 2) is calculated using S3 and SL, and pass / fail in S4 is determined. If the determination result in S4 is fail, S3 is determined to be V _min and the simple lower limit voltage search is terminated. This case is referred to as case (3).

As shown in FIG. 5-5, when the determination result of S2 is “fail” in step ST42, the simple lower limit voltage search is terminated. This case is referred to as case (4). Thereafter, the detailed lower limit voltage search described above is executed for the semiconductor chip, and V _min is determined.

As shown in FIG. 5-6, when the determination result of S4 is “pass” in step ST44, the simple lower limit voltage search is terminated. This case is referred to as case (5). Thereafter, the detailed lower limit voltage search described above is executed for the semiconductor chip, and V _min is determined.

In the simple lower limit voltage search, _Vmin is determined by two searches in cases (1) and (2). In case (3), V _min is determined by three searches. As described above, in the cases (1) to (3), the number of test steps required for the search is reduced, and the test cost can be reduced by suppressing an increase in test time. On the other hand, in the cases (4) and (5), a detailed lower limit voltage search is required. However, as will be described later, it has been confirmed that most (98% or more) of the semiconductor chips for which V _min is determined correspond to cases (1) to (3). That is, most of the semiconductor chips that perform the simple lower limit voltage search correspond to cases (1) to (3) (98% or more), and cases (4) and (5) are extremely rare (2% or less). . Therefore, by employing the simple lower limit voltage search together with the detailed lower limit voltage search, the test man-hours are reduced, and the test time and test cost can be reduced.

As described above, step ST1 is completed for all of the plurality of semiconductor chips formed on the semiconductor wafer. The V _min data of each semiconductor chip acquired by the detailed lower limit voltage search and the simple lower limit voltage search is stored in the data storage unit 12. Thereafter, the process proceeds to step ST2.

At step ST2, the computing unit 13 adds up the data of V _min of each semiconductor chip stored in the data storage unit 12, calculates the median or the distribution of the average value and V _min of V _min (e.g. 6 [sigma) . Thereafter, the process proceeds to step ST3.

In step ST3, the determination unit 14 uses the calculated _Vmin distribution to determine that all of the plurality of semiconductor chips formed on the semiconductor wafer except for those determined to be defective in step ST12 are non-defective. Or, a defective product is determined. If V _{min of the} semiconductor chip satisfies the set standard, the semiconductor chip is determined as a non-defective product. If the set standard is not satisfied, it is determined that the semiconductor chip has an abnormal operation lower limit voltage and is defective.

The determination result of the data of the normal test by step ST12 stored in the data storage unit 12, and the determination result of the data relating to V _min by step ST3, the input to the final determination server 4. The final determination server 4 determines the final non-defective product among the plurality of semiconductor chips formed on the semiconductor wafer by combining the data of both determination results.

  Hereinafter, the results of examining various effects exhibited by the test method according to the present embodiment will be described.

The occurrence frequency of cases (1) to (5) in the simple lower limit voltage search was examined. The result is shown in FIG. FIG. 7A is a histogram of V _min for each semiconductor chip acquired by a simple lower limit voltage search at a high temperature (for example, 85 ° C.) for the semiconductor chip of the logic circuit. Here, statistical processing was performed on the distribution of V _{min, and} a semiconductor chip that deviated from the distribution (for example, 6σ or more) was determined as a low temperature defect. As shown in FIG. 7A, it was confirmed that most (98% or more) of the semiconductor chips for which the operation lower limit voltage value is determined correspond to cases (1) to (3).

Along with V _min at a high temperature obtained in FIG. 7A, V _min was similarly obtained at a low temperature (for example, −10 ° C.), and the relationship between the two V _min was examined. The result is shown in FIG. In FIG. 7B, the standard for determining good / defective products at high temperatures is indicated by a solid line, and the criterion for determining good / defective products at low temperatures is indicated by a broken line. As shown in FIG. 7B, it was confirmed that the semiconductor chip determined to have a low temperature defect in FIG. 7A was detected as a defective product even in a low temperature test.

  As described above, according to the present embodiment, by adopting the simple lower limit voltage search together with the detailed lower limit voltage search, the test man-hours can be reduced, the test time can be shortened, and the test cost can be reduced. It is possible to accurately determine defective products.

  In this embodiment, the operating lower limit voltage value is determined by fixing the operating frequency. For example, by applying it to a low voltage test of a RAM or a scan chain test of a logic circuit, high defective product detection accuracy is achieved. Can be obtained.

(Second Embodiment)
Next, the second embodiment will be described.
FIG. 8 is a block diagram showing a test system including the determination apparatus according to the present embodiment. In FIG. 8, the same components as those in FIG. FIG. 9 is a flowchart showing the test method according to this embodiment in the order of steps.

This test system is configured to include a tester 1, a probe 2, a computer 3, and a final determination server 4 as in FIG. 1 in the first embodiment.
The tester 1 performs a function test of the semiconductor chip according to the test program 20, and executes a lower limit frequency search to be described later together with the normal test during the function test. Thereby, the operation lower limit frequency is determined as the operation lower limit value. The tester 1 includes a determination unit 11 that determines an operation lower limit frequency by executing the test program 20 and a data storage unit 12 such as an HDD.
The probe 2 is connected to the tester 1 and performs a function test by contacting a connection terminal of the semiconductor chip based on the test program 20.

The computer 3 includes a calculation unit 13 and a determination unit 14.
The calculation unit 13 aggregates the operation lower limit frequencies determined for each semiconductor chip during the function test, and calculates the median or average value of the operation lower limit frequencies and the distribution of the operation lower limit frequencies.
The determination unit 14 uses the calculated distribution to determine whether the semiconductor chip is a non-defective product or a defective product based on a set reference.

  The final determination server 4 determines the non-defective semiconductor chip in the semiconductor wafer by combining the result of the normal test and the determination result of the non-defective product or the defective product by the determination unit 14.

Hereinafter, a semiconductor chip test method using the above test system will be described with reference to FIG.
In the present embodiment, as in the first embodiment, a semiconductor wafer in which a plurality of (for example, several hundred) semiconductor chips are formed in a matrix is used as a test object.

The tester 1 performs a normal test and a lower limit frequency search together with the normal test according to the test program 10 (step ST1). The lower limit frequency search includes a detailed lower limit frequency search and a simple frequency search.
As step ST1, a flow including a detailed lower limit frequency search is shown in FIG. 10, and a flow including a simple lower limit frequency search is shown in FIG.

As shown in FIG. 10, a normal test and a detailed lower limit frequency search are performed on the first several tens (N to 1 to N) of a plurality (for example, several hundred) of semiconductor chips. .
For each semiconductor chip formed on the semiconductor wafer, the probe 2 is sequentially brought into contact with the connection terminal, and a normal test is executed based on the test program 20 (step ST11). The normal test is performed at an operating use frequency at a high temperature or normal temperature, for example, at a test voltage v = 1.08V.

  The result of the normal test acquired in step ST11 is determined (step ST12). When the test result is “fail” in step ST11, it is determined that the semiconductor chip is defective, and the test of the semiconductor chip is finished (step ST13). When the test result is pass, the process proceeds to step ST21. The data of the determination result of the normal test for each semiconductor chip is stored in the data storage unit 12.

In steps ST <b> 21 to ST <b> 25 in FIG. 10, the detailed lower limit frequency search is executed based on the test program 20. The image of the detailed lower limit frequency search is the same as that in FIG. 4-2 of the first embodiment. The detailed lower limit frequency search is performed, for example, at a test voltage v = 1.08 V where a particularly significant difference is observed depending on the test temperature.
In step ST21, S1 (= (SL + SU) / 2) is calculated using the search lower limit frequency (SL) and the search upper limit frequency (SU), and pass / fail in S1 is determined. SU is the operating frequency for normal testing.

  Subsequently, step ST22 is executed. In step ST22, when the determination result of S1 is pass, S2 (= (S1 + SL) / 2) is calculated using S1 and SL, and pass / fail in S2 is determined. If the determination result of S2 is fail, S2 (= (S1 + SU) / 2) is calculated using S1 and SU, and pass / fail in S2 is determined.

The detailed lower limit frequency search is performed until the final count is M times, and the difference from M-1 times is the minimum search unit (defined by the resolution), the operation lower limit frequency is determined, and is terminated. In FIG. 11, the Mth step is denoted as ST (M).
As an example, the case where M = 5 (when steps ST23 to ST25 are further performed) is shown below.

Subsequently, step ST23 is executed. In step ST23, S3 (= (S1 + S2) / 2) is calculated using S1 and S2, and pass / fail in S3 is determined.
Subsequently, step ST24 is executed. In step ST24, S4 (= (S2 + S3) / 2) is calculated using S2 and S3, and pass / fail in S4 is determined.
Subsequently, step ST25 is executed. In step ST25, S5 (= (S3 + S4) / 2) is calculated using S3 and S4, and pass / fail in S5 is determined.
In step ST (M), S (M) (= (S (M−2) + S (M−1)) / 2) is calculated using S (M−2) and S (M−1). Then, pass / fail in S (M) is determined.

In the detailed lower limit frequency search, steps ST11 to ST13 and ST21 to ST (M) are sequentially performed for each of the first to Nth semiconductor chips, and in step ST14, an operation lower limit frequency for each semiconductor chip is determined. Hereinafter, the operation lower limit frequency is described as K _min . The data of K _min is stored in the data storage unit 12.

After the detailed lower limit frequency search, other tests are performed (step ST15). As shown in FIG. 11, the arithmetic unit 13 determines each K determined by the detailed lower limit frequency search for the first to Nth semiconductor chips. The median value or average value of _min is calculated (step ST31). This median or average value is SA. Of the N semiconductor chips from 1 to N, a predetermined semiconductor chip is assumed to have a value that K _min is relatively large compared to other semiconductor chips, so the SA adopts the median value. It is desirable to do.

A normal test and a simple lower limit frequency search are performed on the remaining semiconductor chips (from (N + 1) th to the last) other than the semiconductor chip that has been subjected to the detailed lower limit voltage search.
For each semiconductor chip formed on the semiconductor wafer, the probe 2 is sequentially brought into contact with the connection terminal, and a normal test is executed based on the test program 20 (step ST11). The normal test is performed at an operating use frequency at a high temperature or normal temperature, for example, at a test voltage v = 1.08V.

  The result of the normal test acquired in step ST11 is determined (step ST12). When the test result is “fail” in step ST11, it is determined that the semiconductor chip is defective, and the test of the semiconductor chip is finished (step ST13). When the test result is pass, the process proceeds to step ST41. The data of the determination result of the normal test for each semiconductor chip is stored in the data storage unit 12.

  A simple lower limit frequency search is executed based on the test program 20 in steps ST41 to ST (M) in FIG. The image of the detailed lower limit frequency search is the same as in FIGS. 5-2 to 5-6 of the first embodiment. The simple lower limit frequency search is performed, for example, at a test voltage v = 1.08 V where a particularly significant difference is observed depending on the test temperature.

Similar to FIG. 5B, in step ST41, pass / fail is determined when S1 = SA.
When the determination result of S1 is “fail” in step ST41, the process proceeds to step ST42. In step ST42, S2 (= (SA + SU) / 2) is calculated using SA and SU, and pass / fail in S2 is determined. If the determination result of S2 is pass, S2 is determined as K _min and the simple lower limit frequency search is terminated. This case is referred to as case (1).

Similarly to FIG. 5C, when the determination result of S1 is “pass” in step ST41, the process proceeds to step ST43. In step ST43, S3 (= (SA + SL) / 2) is calculated using SA and SL, and pass / fail in S3 is determined. If the determination result in S3 is “fail”, S1 (= SA) is determined as K _min and the simple lower limit frequency search is terminated. This case is referred to as case (2).

Similarly to FIG. 5-4, when the determination result in S3 is “pass” in step ST43, the process proceeds to step ST44. In step ST44, S4 (= (S3 + SL) / 2) is calculated using S3 and SL, and pass / fail in S4 is determined. If the determination result in S4 is “fail”, S3 is determined as K _min and the simple lower limit frequency search is terminated. This case is referred to as case (3).

Similarly to FIG. 5-5, when the determination result of S2 is “fail” in step ST42, the simple lower limit frequency search is terminated. This case is referred to as case (4). Thereafter, for the semiconductor chip, the above-described detailed lower limit frequency search is executed, and K _min is determined.

Similarly to FIG. 5-6, when the determination result in S4 is “pass” in step ST44, the simple lower limit frequency search is terminated. This case is referred to as case (5). Thereafter, for the semiconductor chip, the above-described detailed lower limit frequency search is executed, and K _min is determined.

In the simple lower limit frequency search, in cases (1) and (2), K _min is determined by two searches. In case (3), K _min is determined by three searches. As described above, in the cases (1) to (3), the number of test steps required for the search is reduced, and the test cost can be reduced by suppressing an increase in test time. On the other hand, in the cases (4) and (5), a detailed lower limit frequency search is required. However, it has been confirmed that most (98% or more) of semiconductor chips for which V _min is determined correspond to cases (1) to (3). That is, most of the semiconductor chips that perform the simple lower limit frequency search correspond to cases (1) to (3) (98% or more), and cases (4) and (5) are extremely rare (2% or less). . Therefore, by employing the simple lower limit frequency search together with the detailed lower limit frequency search, the test man-hours are reduced, and the test time and test cost can be reduced.

As described above, step ST1 is completed for all of the plurality of semiconductor chips formed on the semiconductor wafer. K _min data of each semiconductor chip obtained by the detailed lower limit frequency search and the simple lower limit frequency search is stored in the data storage unit 12. Thereafter, the process proceeds to step ST2.

At step ST2, the computing unit 13 adds up data of K _min of each semiconductor chip stored in the data storage unit 12, calculates the median or the distribution of the mean values and the K _min of K _min (e.g. 6 [sigma) . Thereafter, the process proceeds to step ST3.

In step ST3, the determination unit 14 uses the calculated _Kmin distribution to determine that all of the plurality of semiconductor chips formed on the semiconductor wafer excluding those determined to be defective in step ST12 are non-defective. Or, a defective product is determined. If K _{min of the} semiconductor chip satisfies the set standard, the semiconductor chip is determined as a non-defective product. When the set standard is not satisfied, it is a semiconductor chip having an abnormal operation lower limit frequency, and is determined as a defective product.

The determination result of the data of the normal test by step ST12 stored in the data storage unit 12, and the determination result of the data relating to K _min by step ST3, the input to the final determination server 4. The final determination server 4 determines the final non-defective product among the plurality of semiconductor chips formed on the semiconductor wafer by combining the data of both determination results.

  As described above, according to the present embodiment, by adopting the simple lower limit frequency search together with the detailed lower limit frequency search, the test man-hour is reduced, the test time is shortened, and the test cost is reduced. It is possible to accurately determine whether the product is non-defective / defective.

  In this embodiment, the operating voltage is fixed and the lower limit operating frequency is determined. For example, by applying it to a test for confirming the operating speed of a logic circuit, high defective product detection accuracy can be obtained. .

(Other embodiments)
The functions of predetermined components (the determination unit 11, the calculation unit 13, the determination unit 14, and the like in FIGS. 1 and 8) in the test system according to the first and second embodiments described above are the same as the test program 10 in FIG. This can be realized by operating a program stored in a RAM or ROM of a computer together with the test program 20 of FIG. Similarly, each step of the test method (steps ST1 to ST3 in FIGS. 11 and 9, steps ST11 to ST15 in FIGS. 4-1 and 10, steps ST31 to ST44 in FIGS. 5-1 and 11, etc.) This can be realized by operating the programs 10 and 20 and programs stored in the RAM or ROM of the computer. The test programs 10 and 20, the programs, and computer-readable storage media storing these programs are included in this embodiment.

  Specifically, the above program is recorded on a recording medium such as a CD-ROM, or provided to a computer via various transmission media. As a recording medium for recording the program, a flexible disk, a hard disk, a magnetic tape, a magneto-optical disk, a nonvolatile memory card, and the like can be used in addition to the CD-ROM. On the other hand, as the program transmission medium, a communication medium in a computer network system for propagating and supplying program information as a carrier wave can be used. Here, the computer network is a WAN such as a LAN or the Internet, a wireless communication network, or the like, and the communication medium is a wired line such as an optical fiber or a wireless line.

  Further, the program included in the present embodiment is not limited to the one in which the functions of the first and second embodiments are realized by the computer executing the supplied program. For example, even when the function of the first and second embodiments is realized in cooperation with an OS (operating system) or other application software running on a computer, the program is not limited to this embodiment. include. In addition, when all or part of the processing of the supplied program is performed by the function expansion board or function expansion unit of the computer and the functions of the first and second embodiments are realized, the program is implemented in this embodiment. Included in the form.

  Hereinafter, various aspects of the test apparatus and the test method are collectively described as appendices.

(Appendix 1) A test apparatus that performs a function test at a first temperature for each of the plurality of electronic devices,
In the function test, a determination unit that determines an operation lower limit value of voltage or frequency for each electronic device,
A calculation unit that calculates the distribution by aggregating the determined operation lower limit values;
And a determination unit configured to determine whether the electronic device is a non-defective product or a defective product using the calculated distribution.

  (Additional remark 2) The said determination part determines the said operation lower limit by multiple times of calculation using the search upper limit value and search lower limit value which were acquired in the said functional test, The test apparatus of Additional remark 1 characterized by the above-mentioned .

  (Supplementary Note 3) The determination unit performs a first lower limit voltage search for determining the operation lower limit value by performing a plurality of operations up to a minimum search unit for the first number of the electronic devices, and the remaining electronic devices. The second lower limit voltage search for determining the operation lower limit value by performing two or three operations using the operation lower limit value determined in the first lower limit voltage search is performed. 2. The test apparatus according to 2.

  (Additional remark 4) The said determination part performs the said 1st lower limit voltage search, when the said operation | movement minimum value is not determined by three calculations in the said 2nd lower limit voltage search, The test apparatus described.

(Supplementary Note 5) Regarding a plurality of electronic devices, when performing a functional test at a first temperature for each electronic device, a step of determining an operation lower limit value of voltage or frequency for each electronic device;
A step of calculating the distribution by aggregating the determined operation lower limit values;
Using the calculated distribution to determine whether the electronic device is a non-defective product or a defective product.

  (Supplementary Note 6) The step of determining the operation lower limit value includes determining the operation lower limit value by performing a plurality of calculations using the search upper limit value and the search lower limit value acquired in the functional test. Test method described in 1.

  (Supplementary Note 7) The step of determining the operation lower limit value includes a first lower limit voltage search for determining the operation lower limit value by performing a plurality of operations up to a minimum search unit for the first number of the electronic devices, and the remaining A second lower limit voltage search for determining the operation lower limit value by performing the operation twice or three times using the operation lower limit value determined in the first lower limit voltage search for the electronic device. The test method according to appendix 6, characterized by:

  (Supplementary Note 8) In the step of determining the operation lower limit value, the first lower limit voltage search is performed when the operation lower limit value is not determined by three operations in the second lower limit voltage search. The test method according to appendix 7.

(Supplementary Note 9) When performing a functional test at a first temperature for each of the plurality of electronic devices, a procedure for determining an operation lower limit value of voltage or frequency for each of the electronic devices;
A procedure for calculating the distribution by aggregating the determined operation lower limit values;
A program for causing a computer to execute a procedure for determining whether the electronic device is a non-defective product or a defective product using the calculated distribution.

  (Supplementary Note 10) The procedure for determining the operation lower limit value includes determining the operation lower limit value by performing a plurality of calculations using the search upper limit value and the search lower limit value acquired in the functional test. The program described in.

  (Supplementary Note 11) The procedure for determining the operation lower limit value includes a first lower limit voltage search for determining the operation lower limit value by performing a plurality of operations up to a minimum search unit for the first number of the electronic devices, and the remaining A second lower limit voltage search for determining the operation lower limit value by performing the operation twice or three times using the operation lower limit value determined in the first lower limit voltage search for the electronic device. The program according to appendix 10, characterized by:

  (Supplementary Note 12) In the procedure for determining the operation lower limit value, the first lower limit voltage search is performed when the operation lower limit value is not determined in three calculations in the second lower limit voltage search. The program according to appendix 11.

DESCRIPTION OF SYMBOLS 1 Tester 2 Probe 3 Computer 4 Final determination server 10 and 20 Test program 11 Determination part 12 Data storage part 13 Calculation part 14 Determination part

Claims (10)

A test apparatus that performs a function test at a first temperature for each of the plurality of electronic devices,
In the function test, a determination unit that determines an operation lower limit value of voltage or frequency for each electronic device,
A calculation unit that calculates the distribution by aggregating the determined operation lower limit values;
And a determination unit configured to determine whether the electronic device is a non-defective product or a defective product using the calculated distribution.   2. The test apparatus according to claim 1, wherein the determination unit determines the operation lower limit value by a plurality of calculations using a search upper limit value and a search lower limit value acquired in the function test.   The determination unit performs a plurality of operations up to a minimum search unit for the first number of the electronic devices to determine the operation lower limit value, and the first lower limit voltage search for the remaining electronic devices. 3. The second lower limit voltage search for determining the operation lower limit value by performing the operation twice or three times using the operation lower limit value determined by the lower limit voltage search. Testing equipment.   4. The test according to claim 3, wherein the determination unit performs the first lower limit voltage search when the operation lower limit value is not determined in three operations in the second lower limit voltage search. 5. apparatus. When performing a function test at a first temperature for each electronic device for a plurality of electronic devices, determining a voltage or frequency operating lower limit value for each electronic device;
A step of calculating the distribution by aggregating the determined operation lower limit values;
Using the calculated distribution to determine whether the electronic device is a non-defective product or a defective product.   The step of determining the operation lower limit value determines the operation lower limit value by performing a plurality of calculations using the search upper limit value and the search lower limit value acquired in the functional test. Test method.   The step of determining the operation lower limit value includes a first lower limit voltage search for determining the operation lower limit value by performing a plurality of operations up to a minimum search unit for the first number of the electronic devices, and the remaining electronic devices. A second lower limit voltage search for determining the operation lower limit value by performing the operation twice or three times using the operation lower limit value determined in the first lower limit voltage search. The test method according to claim 6. For a plurality of electronic devices, when performing a function test at a first temperature for each electronic device, a procedure for determining an operation lower limit value of voltage or frequency for each electronic device;
A procedure for calculating the distribution by aggregating the determined operation lower limit values;
A program for causing a computer to execute a procedure for determining whether the electronic device is a non-defective product or a defective product using the calculated distribution.   9. The procedure for determining the operation lower limit value, wherein the operation lower limit value is determined by a plurality of calculations using a search upper limit value and a search lower limit value acquired during the functional test. program.   The procedure for determining the operation lower limit value includes a first lower limit voltage search for determining the operation lower limit value by performing a plurality of operations up to a minimum search unit for the first number of the electronic devices, and the remaining electronic devices. A second lower limit voltage search for determining the operation lower limit value by performing the operation twice or three times using the operation lower limit value determined in the first lower limit voltage search. The program according to claim 9.

Images