JP2015103755A - Magnetoresistive memory element and magnetoresistive memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a magnetoresistive memory element in which thermal decay characteristics are improved without enlarging a re-writing current (switching current) and whose offset magnetic field is close to zero, and a magnetoresistive memory.SOLUTION: A perpendicular magnetization type magnetoresistive memory element includes: a tunnel barrier layer 31; a magnetization fixed layer 32 arranged at one side of the tunnel barrier layer; and a storage layer 40 arranged at the other side of the tunnel barrier layer. The storage layer includes: a first magnetic layer M1 which has come into contact with the tunnel barrier layer and has perpendicular magnetic anisotropy; a first non-magnetic layer N1 which has come into contact with the first magnetic layer, comprises Ta as a material, and has a film thickness of 0.25 nm or more and 0.35 nm or less; a second non-magnetic layer N2 which has come into contact with the first non-magnetic layer, comprises Ru, Rh, or Pd as a material, and has a film thickness of 0.4 nm or more and 2.0 nm or less; and a second magnetic layer M2 which has the perpendicular magnetic anisotropy. A value obtained by multiplying the saturation magnetization and the thickness of the first magnetic layer M1 is larger than a value obtained by multiplying the saturation magnetization and the thickness of the second magnetic layer M2.

Description

  The present invention relates to a magnetoresistive memory element and a magnetoresistive memory having a magnetic tunnel junction (MTJ).

  In recent electronic devices, the importance of large-capacity nonvolatile memories that can be embedded at low cost with respect to silicon (Si) CMOS logic is increasing.

  Magnetoresistive random access memory (MRAM) is capable of unlimited rewriting of information in addition to non-volatility of information. For this reason, attention is paid to a novel nonvolatile memory that can replace not only a ROM memory such as a flash memory but also a RAM memory such as an SRAM or a DRAM.

  In the MRAM, a ferromagnetic metal electrode is disposed above and below a tunnel barrier layer, and a memory function is realized by using a magnetic tunnel junction in which a tunnel resistance changes depending on the relative magnetization direction of the ferromagnetic metal electrode. A ferromagnetic metal electrode whose magnetization direction is fixed is called a magnetization fixed (pinned) layer, and a ferromagnetic metal electrode whose magnetization direction can be reversed is called a magnetization free (free) layer. Since the resistance varies depending on the magnetization direction of the free layer, binary data of “0” and “1” is associated with the magnetization direction of the free layer. Since data is stored according to the magnetization direction of the free layer as described above, the free layer is referred to as a storage layer here.

  Until now, the direction of the magnetization free layer has been reversed using a magnetic field induced by passing a current through the wiring. However, in recent years, it has been found that magnetization reversal of the magnetization free layer is possible by spin-transfer torque (STT) (spin injection magnetization reversal). In the case of magnetization reversal by a magnetic field, the smaller the element, the larger the magnetic field required for reversal and the difficulty in miniaturization. In the case of spin injection magnetization reversal, the smaller the element, the smaller the switching current, so that the current required for rewriting can be greatly reduced, and the possibility of practical use of MRAM is further increased.

  In the following description, MgO used as a material for realizing the magnetic tunnel junction is magnesium oxide, Co is cobalt, Fe is iron, B is boron (boron), Ta is tantalum, Ru is ruthenium, Ni represents nickel. Furthermore, Pt is platinum, Ar is argon, Pd is palladium, Rh is rhodium, Nb is niobium, and PMA material is a generic name for a perpendicular magnetic anisotropy material.

  High integration of the MRAM is advantageous because the size of the MTJ is reduced and the switching current becomes smaller in proportion to the area of the MTJ, but at the same time, there is a problem that the data retention characteristic is reduced. As one of the methods for improving the holding characteristics without increasing the rewrite current Ic, it has been proposed that the storage layer has a SAF (Synthetic Anti Ferromagnetic or Ferrimagnetic) structure in the case of in-plane magnetization MTJ. Generally, in the case of in-plane magnetization, the long-side magnetization is stabilized by increasing the planar aspect ratio. Therefore, although the thermal fluctuation parameter Δ can be increased to 60 or more by using the SAF structure storage layer, there is a problem that the rewrite current Ic cannot be reduced because the area of the MTJ cannot be reduced even if the short side is reduced. It was.

  The energy for maintaining the direction of magnetization in one direction (retention characteristic, thermal fluctuation resistance) is represented by the product of magnetic anisotropy energy and magnetization reversal unit volume. In the case of the in-plane magnetization MTJ, the shape magnetic anisotropy that gives the shape anisotropy in the aspect is used, but in the case of the perpendicular MTJ, the magnetocrystalline anisotropy is large, and the shape anisotropy is increased. There is no need to rely on it.

Also in this perpendicular magnetization MTJ, it has been proposed that the storage layer has a SAF structure. For example, in an MTJ composed of two storage layers and one fixed magnetization layer, the second storage layer is prevented from being inverted before the first storage layer by adopting an SAF structure in which the first storage layer is antiferromagnetically coupled. ing.
In addition, a storage layer in which SF (Synthetic reinforcing) coupling is performed with perpendicular magnetization MTJ has been proposed.

JP 2008-010590 A JP 2008-252036 A JP2013-016560A

Hayakawa et al., “Current-Induced Magnetization Switching in MgO Barrier Based Magnetic Tunnel Junctions with CoFeB / Ru / CoFeB Synthetic Ferrimagnetic Free Layer”, JJAP Express letter, Vol. 45, No. 40, 2006, pp.L1057-L1060 S. Ikeda et al., “A perpendicular-anisotropy CoFeB-MagO magnetic tunnel junction”, Nature materials, Vol. 9, pp.721-724, September 2010 M. Pakala et al., “Critical current distribution in spi-transfer-switched magnetic tunnel junctions”, Journal of Appl. Phys. 98. 056107 (2005) Y, Saito et al., “Thermal stability parameters in synthetic antiferromagnetic free layers in magnetic tunnel junctions”, Journal of Appl. Phys. 97. 10C914 (2005) P.J.H.Bloemen et al., “Oscillatory composite exchange coupling in Co / Ru multilayers and bilayers”, Phys. Rev. B 50, 13505, 1994

In the MTJ composed of the above-described two storage layers and one magnetization fixed layer, the thermal stability may be improved by simply adopting the SAF structure, but the rewriting (switching) current Ic is also large. May be.
Furthermore, in the case of the SF-coupled memory layer, the rewrite current Ic increases or the leakage magnetic field from the memory becomes very large, so that there is a problem that the magnetization pinned layer is not fixed by the influence and is easily reversed. I understood that.

  As described above, it has been found that the above problem cannot be solved simply by forming a SAF structure in the storage layer using a magnetic material having perpendicular magnetic anisotropy as the two ferromagnetic layers. This is because, depending on the SAF structure of the storage layer, the switching current becomes large and the thermal fluctuation stability is lowered.

  Furthermore, in order to memorize | store information by making a high resistance state and a low resistance state correspond to "1" and "0" as a memory element, the part which shows the hysteresis characteristic of a magnetization curve exists in the range where an external magnetic field is zero. It is desirable.

  A perpendicular magnetization type magnetoresistive memory element that satisfies the above requirements is desired.

  According to the first aspect, the magnetoresistive memory includes a tunnel barrier layer, a magnetization fixed layer provided on one side of the tunnel barrier layer, and a storage layer provided on the other side of the tunnel barrier layer. Have. The storage layer includes a first magnetic layer, a first nonmagnetic layer, a second nonmagnetic layer, and a second magnetic layer. The first magnetic layer is in contact with the tunnel barrier layer, has perpendicular magnetic anisotropy, and is made of any one of CoFeB, CoFe, Fe, Co, FeB, and CoB. The first nonmagnetic layer is in contact with the first magnetic layer, is made of Ta, and has a thickness of 0.25 nm to 0.35 nm. The second nonmagnetic layer is in contact with the first nonmagnetic layer, and is made of any one of Ru, Rh, and Pd, and has a thickness of 0.4 nm or more and 2.0 nm or less. The second magnetic layer is in contact with the second nonmagnetic layer and has perpendicular magnetic anisotropy. The first magnetic layer and the second magnetic layer are magnetically coupled by antiferromagnetic exchange coupling, and the value obtained by multiplying the saturation magnetization and thickness of the first magnetic layer is the saturation magnetization and thickness of the second magnetic layer. Greater than the value multiplied by

  According to the second aspect, the magnetoresistive memory includes a tunnel barrier layer, a magnetization fixed layer provided on one side of the tunnel barrier layer, and a storage layer provided on the other side of the tunnel barrier layer. Have. The storage layer includes a first magnetic layer, a first nonmagnetic layer, a second nonmagnetic layer, and a second magnetic layer. The first magnetic layer is in contact with the tunnel barrier layer and has perpendicular magnetic anisotropy. The first nonmagnetic layer is in contact with the first magnetic layer, is made of Ta, and has a thickness of 0.1 nm to 0.5 nm. The second nonmagnetic layer is in contact with the first nonmagnetic layer, and is made of any one of Ru, Rh, and Pd, and has a thickness of 0.4 nm or more and 2.0 nm or less. The second magnetic layer is in contact with the second nonmagnetic layer and has perpendicular magnetic anisotropy. The first magnetic layer and the second magnetic layer are magnetically coupled by antiferromagnetic exchange coupling, and the value obtained by multiplying the saturation magnetization and thickness of the first magnetic layer is the saturation magnetization and thickness of the second magnetic layer. Greater than the value multiplied by The first magnetic layer has a first submagnetic layer and a second submagnetic layer. The first submagnetic layer is in contact with the tunnel barrier layer and has a thickness of 0.3 nm or more and 2.0 nm or less made of CoFeB, CoFe, Fe, Co, FeB, or CoB. The second submagnetic layer is in contact with the first submagnetic layer and is made of CoFeB, CoFe, Fe, Co, FeB, or CoB containing 10% to 30% Ta, and is 0.2 nm to 0.6 nm. The film thickness is as follows.

  According to the third aspect, the magnetoresistive memory includes a plurality of memory cells, a first wiring connected to one terminal of each memory cell, and a second wiring connected to the other terminal of each memory cell. A selection line, a write amplifier, a sense amplifier, and a decoder circuit for controlling the selection line. The write amplifier applies a voltage so that a current flows in both directions between the first wiring and the second wiring, and the sense amplifier detects a voltage difference between the first wiring and the second wiring. Each memory cell has the perpendicular magnetization type magnetoresistive memory element of the first or second aspect, and a selection transistor connected to the perpendicular magnetization type magnetoresistive memory element. The selection line is connected to the gate of the selection transistor of each memory cell.

  According to the embodiment, the rewrite current Ic (switching current) is not increased, the thermal fluctuation characteristic is improved, and the portion showing the hysteresis characteristic of the magnetization curve is the magnetoresistive memory element and magnetoresistive element in which the external magnetic field is in the zero range. Memory is realized.

FIG. 1 is a diagram illustrating a memory cell of an interface perpendicular magnetization type STT-MRAM according to an embodiment. FIG. 2 shows an example of a cross-sectional structure of two adjacent memory cells connected to the same bit line and source line and a transistor in a peripheral circuit portion in the layout of the memory cell shown in FIG. FIG. 3A and 3B are views showing the structure of an MTJ, where FIG. 3A shows the structure of a top pin type MTJ, and FIG. 3B shows the structure of a bottom pin type MTJ. 4A and 4B are diagrams showing structures of a tunnel barrier layer and a storage layer described in the prior art, and FIG. 4A shows a case of a top pin type MTJ, and FIG. 4B shows a case of a bottom pin type MTJ. . FIG. 5 is a diagram showing the structure of a sample described in the prior art. FIGS. 6A and 6B are diagrams showing an example of the structure of an MTJ showing good characteristics described in the prior art, and FIG. 6A shows an example of a top pin type, and FIG. 6B shows a bottom pin type. An example of FIG. 7 is a magnetization curve of element resistance due to an external magnetic field of a general MTJ. FIG. 8 is a graph of magnetization curves showing the MTJ characteristics of the magnetoresistive memory having the magnetization fixed layer (pinned layer) and the storage layer (free layer) shown in FIG. FIG. 9 is a diagram showing changes in Hoff and Hc when the two layers of the ferromagnetic layer of the SAF structure of the free layer are made constant and −Jex is changed. FIG. 10 shows a CoPd 1.4 nm / Ru 0.6 nm / Ta (t-nm) / CoFeB 0.7 nm / Mgo structure with the Ta layer thickness changed to 0.2, 0.25, 0.3, and 0.4 nm. The magnetization curve at the time of making it show is shown. FIG. 11 is a diagram showing the relationship between -Jex and the thickness of the Ta layer. FIG. 12 is a view showing the structure of the MTJ of the first embodiment produced based on the analysis result. FIG. 13 is a diagram showing measurement results of the MTJ characteristics of the first embodiment of FIG. 12, which is a prototype, where (A) shows the RH hysteresis curve and (B) shows the distribution of Hoff and Hc of a plurality of samples. It is. FIG. 14 is a diagram illustrating a structure of a tunnel barrier layer and a free layer of the MTJ of the second embodiment. FIG. 15 is a diagram illustrating the magnetization curve of the sample of the MTJ of the second embodiment, in which the solid line represents the magnetization curve of the sample, the dotted line represents the magnetization curve of the comparative example, and (B) represents the broken line circle of (A). It is the figure which expanded the part. FIG. 16 is a diagram showing a result of performing a micromagnetic simulation with the MTJ structure of the second embodiment, assuming a CoFeBTa / CoFeB layer, and increasing Hk to about 4500 Oe by about 1.5 times. FIG. 17 is a view showing the structure of the MTJ of the second embodiment manufactured based on the analysis result. 18A and 18B are diagrams showing measurement results of the MTJ characteristics of the prototyped second embodiment of FIG. 17, in which FIG. 18A shows an RH hysteresis curve, and FIG. 18B shows a distribution of Hoff and Hc of a plurality of samples. It is. FIG. 19 is a block diagram of a semiconductor device in which the interface perpendicular magnetization MRAM of the first or second embodiment is embedded in a CMOS circuit. FIG. 20 is a block diagram of the MRAM.

In Japanese Patent Application No. 2012-271077, the present applicant discloses an MRAM having a low switching current and a high retention characteristic by making the storage layer into the SAF structure. First, the prior art MRAM structure disclosed in Japanese Patent Application No. 2012-271077 will be described.
FIG. 1 is a diagram showing a prior art interface perpendicular magnetization type MRAM memory cell, in which (A) shows an electrically equivalent circuit of one memory cell, and (B) shows a memory in which a plurality of memory cells are arranged. A cell array is shown.

  As shown in FIG. 1A, the memory cell 10 includes a transistor (nMOSFET) 11 and a variable resistance element 12 in which a resistance value is set. The variable resistance element 12 includes the interface perpendicular MTJ, and the magnetization direction of the storage layer (magnetization free layer) is set according to the storage data. One end of the variable resistance element 12 is connected to the bit line 14, and the other end of the variable resistance element 12 is connected to one controlled terminal (drain) of the transistor 11. The control terminal (gate) of the transistor 11 is connected to the word line 13, and the other controlled terminal (source) of the transistor 11 is connected to the source line 15.

  When data is written to the memory cell 10, the selection voltage (H) is applied to the word line 13 to turn on the transistor 11, and between the bit line 14 and the source line 15 according to the data (H or L) to be written. A voltage is applied so that currents having different polarities flow. Thereby, the magnetization direction of the magnetization free layer of MTJ is set according to the data to be written, and the variable resistance element 12 exhibits different resistance values. When reading data from the memory cell 10, a selection voltage (H) is applied to the word line 13 to turn on the transistor 11, and a voltage smaller than that at the time of writing is applied between the bit line 14 and the source line 15. As a result, a current flows between the bit line 14 and the source line 15 via the transistor 11 and the variable resistance element 12, but the current flowing according to the resistance value of the variable resistance element 12 varies, so that the difference in the amount of current is caused. Correspondingly stored data is detected.

  In FIG. 1A, the bit line 14 and the source line 15 are orthogonal to each other, but it is desirable that the bit line 14 and the source line 15 are adjacently arranged in parallel from the relationship between the write and read operations. FIG. 1B shows a layout of the memory cell when the bit line 14 and the source line 15 are arranged in parallel. As shown in FIG. 1B, the word line 13 is arranged in a direction orthogonal to the set of the bit line 14 and the source line 15. In FIG. 1B, the sources of the transistors 11 of two adjacent memory cells connected to the same bit line 14 and source line 15 are connected, and the connection node is connected to the source line 15.

FIG. 2 shows an example of a cross-sectional structure of two adjacent memory cells connected to the same bit line 14 and source line 15 and transistors in the peripheral circuit portion in the memory cell layout shown in FIG. FIG.
As shown in FIG. 2, functional elements such as transistors are formed in the layer 22 on the substrate 21 in the memory cell portion and the peripheral circuit portion. In the contact layer CT, gate electrodes 23A and 23B, drain electrodes 24A and 24B, and a source electrode 25 are formed. M1 to M5 represent metal layers, respectively, and V1 to VM4 represent via layers. Although not shown, the gate electrodes 23A and 23B are connected to a word line provided in one of the metal layers and extending in a direction perpendicular to the paper surface. The source electrode 25 is connected to a source line provided in any metal layer and extending in the horizontal direction on the paper surface. The drain electrodes 24A and 24B are guided to the upper layer through the metal layers M1 to M4 and the via layers V1 to V4, and are connected to the lower electrode 26. The above structure is the same in the memory cell portion and the peripheral circuit portion. In the memory cell portion, the MTJ 30 is formed between the lower electrode 26 and the upper electrode 28. The upper electrode 28 is disposed on the metal layer M5 and connected to a bit line extending in the horizontal direction on the paper surface.

  Since parts other than the MTJ 30 are realized by applying a wiring layout and manufacturing method that have been widely used so far, description thereof will be omitted, and only the MTJ will be described.

3A and 3B are diagrams showing the structure of the MTJ 30, where FIG. 3A shows the structure of the top pin type MTJ 30 and FIG. 3B shows the structure of the bottom pin type MTJ 30.
As shown in FIG. 3A, the top pin type MTJ 30 includes a storage (free: free magnetization) layer 40 that contacts the upper surface of the lower electrode 26, and a tunnel barrier layer 31 that contacts the upper surface of the storage layer 40. And a magnetization pinned (pinned) layer 32 in contact with the upper surface of the tunnel barrier layer 31. The upper electrode 28 is formed in contact with the upper surface of the magnetization fixed layer 32.

  As shown in FIG. 3B, the bottom pin type MTJ 30 includes a magnetization fixed layer 32 in contact with the upper surface of the lower electrode 26, a tunnel barrier layer 31 in contact with the upper surface of the magnetization fixed layer 32, and a tunnel barrier. And a storage layer 40 in contact with the upper surface of the layer 31. The upper electrode 28 is formed so as to be in contact with the upper surface of the memory layer 40.

  As described above, the top pin type MTJ 30 and the bottom pin type MTJ 30 differ in whether the magnetization fixed (pin) layer 32 is formed on the upper side or the lower side of the tunnel barrier layer 31. In other words, whether the storage layer 40 is formed on the upper side or the lower side of the tunnel barrier layer 31 is different. In either case, there is no difference in the operating principle.

  4A and 4B are diagrams showing structures of the tunnel barrier layer 31 and the storage layer 40 in the prior art, in which FIG. 4A shows a case of a top pin type MTJ30 and FIG. 4B shows a case of a bottom pin type MTJ30.

  As shown in FIG. 4A, the memory layer 40 of the top-pin type MTJ 30 includes a first memory magnetic layer M1 that is in contact with the lower surface of the tunnel barrier layer 31, and a paramagnetic (nonmagnetic) that is in contact with the lower surface of M1. ) Layer N and second memory magnetic layer M2 in contact with the lower surface of nonmagnetic layer N. Therefore, the lower electrode 26 is in contact with the lower surface of the second memory magnetic layer M2.

  In the prior art, the nonmagnetic layer N has a first nonmagnetic layer N1 that contacts the lower surface of the first memory magnetic layer M1, and a second nonmagnetic layer N2 that contacts the lower surface of the first nonmagnetic layer N1. . Therefore, the second nonmagnetic layer N2 is in contact with the upper surface of the second memory magnetic layer M2. The nonmagnetic layer N has two layers of the first nonmagnetic layer N1 and the second nonmagnetic layer N2 in the prior art, but may be one layer, three layers or more, and is not limited to two layers. . Furthermore, in the prior art, the first memory magnetic layer M1 and the second memory magnetic layer M2 are antiferromagnetically coupled as will be described later.

  As shown in FIG. 4B, the memory layer 40 of the bottom pin type MTJ 30 has a structure in which the memory layer 40 of the top pin type MTJ 30 of FIG.

  As shown in FIGS. 4A and 4B, the storage layer 40 of the prior art has the above-mentioned SAF (Synthetic Anti Ferromagnetic or Ferrimagnetic) structure. A storage layer with a perpendicular magnetization film SAF structure. By simply using a magnetic material with perpendicular magnetic anisotropy as two ferromagnetic layers and forming a SAF structure in the storage layer, the stability of thermal fluctuation increases. To do. However, it has been found that there is a possibility that the switching current becomes large and the magnetization reversal is not easy. Therefore, when the conditions under which the switching current can be reduced and good thermal fluctuation stability is obtained, the magnetization of the first magnetic layer M1 in contact with the tunnel barrier layer and the magnetization of the second magnetic layer M2 away from the tunnel barrier are It has been found that this relationship greatly affects the characteristics of the memory layer. Specifically, by using a structure in which the magnetization of the first magnetic layer M1 is larger than the magnetization of the second magnetic layer M2, it is possible to improve the thermal fluctuation characteristics without increasing the switching current. Hereinafter, the memory layer 40 of the bottom pin type MTJ 30 of the embodiment of the prior art will be described.

  As the tunnel barrier layer 31 of the MTJ 30, usually MgO is widely used. In order to obtain high magnetic resistance, MgO needs to be (001) oriented. For that purpose, the upper and lower layers of the MgO tunnel barrier layer 31, that is, the first magnetic layer M1 and the magnetization fixed layer 32 are formed of any one of Fe, Co, CoFe, CoFeB, CoB, and FeB having good crystal matching. It is desirable. These magnetic materials are known to exhibit perpendicular magnetic anisotropy in the case of an extremely thin film.

  On the other hand, the M2 layer may be formed of any material as long as it is basically a magnetic body having perpendicular magnetic anisotropy. However, as will be described later, the material and the film thickness thereof are limited in order to make it smaller than the magnetization of the M1 layer.

  For the second nonmagnetic layer N2, elements such as Ru, Rh, Pd are used, and the film thickness is in the range of 0.4 nm to 2.0 nm. The film thickness is such that antiferromagnetic exchange interaction acts between the M1 layer and the M2 layer due to the RKKY exchange interaction. The RKKY exchange interaction is a correlation coupling caused by the wave motion of an electron orbit that occurs when a metal layer is interposed.

  The first nonmagnetic layer N1 is inserted so that crystallization proceeds from the interface of the MgO tunnel barrier layer 31 without the first ferromagnetic layer M1 being affected by the second ferromagnetic layer M2. , Nb and the like are used, and the film thickness is in the range of 0.1 nm to 0.5 nm.

  A sample in which the second ferromagnetic layer M2 was made of CoPd and the first ferromagnetic layer M1 was made of CoFeB was manufactured, and the characteristics thereof were examined. Here, CoPd of the M2 layer is a set of Co having a thickness of 0.3 nm and Pd having a thickness of 0.7 nm, and this is deposited n = 1 to 3 times, and the last Co is deposited with a thickness of 0.3 nm. did. In the future, such a layer structure [Co0.3 nm / Pd0.7 nm] n = iCo0.3 nm will be referred to as CoPd (n = i).

  FIG. 5 is a diagram showing the structure of the sample. In this sample, the lower metal 26 and the upper metal 28 are Ta films having a thickness of 5 mn, the tunnel barrier layer 31 is an MgO film having a thickness of 0.9 mn, and the first memory magnetic layer M1 is a CoFeB film having a thickness of 0.7 nm. And Then, the second memory magnetic layer M1 is a layer structure film of [Co0.3nm / Pd0.7nm] n = iCo0.3nm, the first nonmagnetic layer N1 is a Ta film having a thickness of 0.2nm, (2) The nonmagnetic layer N2 is a Ru film having a thickness of 0.6 nm. In this case, since the thickness of the second nonmagnetic layer N2 is as thin as 0.2 nm, an antiferromagnetic exchange interaction acts between the M1 layer and the M2 layer. Therefore, in this sample, only the memory layer 40 is provided, and the magnetization fixed (pinned) layer 32 is not provided. From the measurement result when n was changed from 1 to 3 in the sample of FIG.

6A and 6B are diagrams showing an example of the structure of an MTJ showing good characteristics disclosed in the prior art, in which FIG. 6A shows an example of a top pin type and FIG. 6B shows an example of a bottom pin type.
In FIG. 6, the bottom electrode corresponds to the lower metal 26, the top electrode corresponds to the upper metal 28, and MgO corresponds to the tunnel barrier layer 31. In FIG. 6A, the storage layer corresponds to the free layer 40, and CoFeB 0.7 nm contained therein is in the first storage magnetic layer M1, CoPd 1.1 nm is in the second storage magnetic layer M2, and Ta 0.2 nm is in. Ru 0.6 nm corresponds to the first nonmagnetic layer N1 and the second nonmagnetic layer N2. Other CoFeB 1.2 nm, Ta 0.3 nm, CoPt 4 nm, Ru 1.0 nm, and CoPt 14 nm form the magnetization fixed (pinned) layer 32.

  In FIG. 6B, the storage layer corresponds to the free layer 40, CoFeB 1.2 nm contained therein is in the first storage magnetic layer M1, and CoPd1.1 (n = 2) is in the second storage magnetic layer M2. Ta0.3 nm corresponds to the first nonmagnetic layer N1, and Ru0.6 nm corresponds to the second paramagnetic layer N2. Other CoFeB 1.0 nm, Ta 0.3 nm, CoPt 4 nm, Ru, and CoPt 14 nm form the magnetization fixed (pinned) layer 32.

  In the memory layer shown in FIG. 6, the magnetization of the first magnetic layer that is in contact with the tunnel barrier layer is larger than the magnetization of the second magnetic layer that is not in contact with the tunnel barrier layer. In other words, the value obtained by multiplying the saturation magnetization and thickness of the first magnetic layer is larger than the value obtained by multiplying the saturation magnetization and thickness of the second magnetic layer.

The prior art disclosed in Japanese Patent Application No. 2012-271077 has been described above. The above description is a part of the technology disclosed in Japanese Patent Application No. 2012-271077, and even the technology disclosed in Japanese Patent Application No. 2012-271077 is not described here. Applicable.
When the characteristics of the MTJ shown in FIG. 6 were tested, it was found that the MTJ was insufficient for use in the MRAM. This will be described below.

FIG. 7 is a magnetization curve of element resistance due to an external magnetic field of a general MTJ.
Information is stored by associating the high resistance state and the low resistance state with “1” and “0”. For example, the magnetization curve indicated by the solid line in FIG. 7 is shifted to the positive side of the external magnetic field. This deviation is defined as an offset magnetic field (Hoff). In this case, when the external magnetic field is zero, since only the “0” state exists, it cannot be switched to the “1” state.

  In a magnetoresistive semiconductor memory using MTJ, an external magnetic field cannot be applied during operation, and the external magnetic field applied to MTJ is zero. In this state, in order to switch (switch) the state by applying current (voltage) to the MTJ, it is required that there are two states “1” and “0” with respect to the axis where the external magnetic field is zero. Therefore, the offset magnetic field is required to be close to zero.

  Even if the offset magnetic field is not zero, if Hoff <Hc (Hc = width of the hysteresis part of the magnetization curve / 2), the axis of the external magnetic field is zero as shown by the dotted magnetization curve in FIG. On the other hand, there can be two states, “1” and “0”. Therefore, when Hc increases, the Hoff margin increases.

  As described in Patent Document 3, in order to bring the offset magnetic field close to zero, the pinned layer has a SAF structure, and the film thickness of the two-layered ferromagnetic material forming the SAF structure is controlled. However, when the storage layer (free layer) is an MTJ having a SAF structure, the magnetization pinned layer (pinned layer) can be made to have a SAF structure, and the offset magnetic field can be controlled to be near zero even if the film thickness is changed. was difficult.

For example, FIG. 8 is a magnetization curve diagram showing the MTJ characteristics of the magnetoresistive memory having the magnetization fixed layer (pinned layer) and the storage layer (free layer) shown in FIG. In this case, Hoff was 3000 Oe.
In the embodiments described below, an MTJ with Hoff close to zero is disclosed.

First, the first embodiment will be described.
It was discovered by micromagnetic simulation that the offset magnetic field can be controlled by controlling the “magnification of exchange interaction” (−Jex) of the SAF structure of the storage layer (free layer). The following are the results of study by simulation.

FIG. 9 is a diagram illustrating changes in Hoff and Hc when the two layers (M1 and M2 in FIG. 4) of the ferromagnetic layer having the SAF structure of the free layer are made constant and −Jex is changed. From this figure, it can be seen that as -Jex decreases, Hoff also decreases monotonously, and when -Jex is about 0.18 erg / cm ² , Hoff becomes almost zero.

  Furthermore, it has been found that the magnitude of -Jex can be controlled by controlling the thickness of the first nonmagnetic layer having the SAF structure.

  FIG. 10 shows a CoPd 1.4 nm / Ru 0.6 nm / Ta (t-nm) / CoFeB 0.7 nm / Mgo structure with the Ta layer thickness changed to 0.2, 0.25, 0.3, and 0.4 nm. The magnetization curve at the time of making it show is shown. The simulation of FIG. 10 is performed for a structure that does not have a pinned layer, and is different from the MTJ that also includes the pinned layer, but the characteristics can be predicted.

From FIG. 10, it can be seen that the magnetic field (Hsf) in which the hysteresis on the high magnetic field side of the magnetization curve tends to decrease as the film thickness of Ta increases. -Jex and Hsf are known to have the following relationship as described in Non-Patent Document 5.
-Jex = (Hsf / 2) Ms1t1Ms2t2 / (Ms2t2-Ms1t1)
From this relationship, -Jex is proportional to Hsf, and Hsf changes according to the thickness of the first nonmagnetic layer (Ta), so that the relationship between -Jex and the thickness of the Ta layer can be obtained.

FIG. 11 is a diagram showing the relationship between -Jex and the thickness of the Ta layer.
From FIG. 11, −Jex is almost proportional to the Ta film thickness, and in order to make the above Hoff zero, that is, to make −Jex about 0.18 erg / cm ² , the Ta film thickness is about 0.3 nm. It turned out that it should do. If the thickness of Ta is in the range of 0.25 nm to 0.35 nm, the magnetization curve can be in the state of “0” and “1” even if the external magnetic field is zero.

FIG. 12 is a view showing the structure of the MTJ of the first embodiment produced based on the above analysis results.
The MTJ of the first embodiment is a top pin type, and includes a tunnel barrier layer 31 formed on a storage layer (free layer) 40 and a free layer 40, and a magnetization formed on the tunnel barrier layer 31. A fixed layer (pinned layer) 30. The element size is about 70 nmφ. The free layer 40 includes, in order from the tunnel barrier layer 31 side, a first magnetic layer M1, a first nonmagnetic layer N1, a second nonmagnetic layer N2, and a second magnetic layer M2. The first magnetic layer M1 is CoFeB having a thickness of 0.7 nm. The first nonmagnetic layer N1 is Ta with a thickness of 0.3 nm. The second nonmagnetic layer N2 is Ru having a thickness of 0.6 nm. The second magnetic layer M2 is CoPd having a thickness of 1.4 nm. In other words, the free layer 40 is CoPd 1.4 nm / Ru 0.6 nm / Ta 0.3 nm / CoFeB 0.7 nm. The tunnel barrier layer 31 is an MgO film.

  The pinned layer 30 includes, in order from the tunnel barrier layer 31 side, a CoFeB layer 51, a Ta layer 52, a 6 nm thick CoPt layer 53, a Ru layer 54, and a 14 nm thick CoPt layer 55.

  FIG. 13 is a diagram showing measurement results of the MTJ characteristics of the first embodiment of FIG. 12, which is a prototype, where (A) shows the RH hysteresis curve and (B) shows the distribution of Hoff and Hc of a plurality of samples. It is.

As shown in FIG. 13A, it can be seen that Hoff is almost zero and Hc is larger than that in FIG. Further, as shown in FIG. 13B, it can be seen that Hoff is distributed around zero and Hc is distributed in the range of 600 to 1100 Oe.
As described above, the MTJ of the first embodiment has a substantially zero Hoff and an improved Hc, and is suitable for use as an MTJ of a magnetoresistive memory.

Next, a second embodiment will be described.
In the first embodiment, Hoff is brought close to zero by setting the thickness of the Ta layer, which is the first nonmagnetic layer of the storage layer (free layer), to around 0.3 nm. On the other hand, in the second embodiment, the first magnetic layer has a laminated structure, whereby Hoff is brought close to zero and Hc (width of the hysteresis portion of the magnetization curve / 2) is increased. By increasing Hc, even if Hoff is deviated from zero, switching is performed between “1” and “0” in a state where the external magnetic field is zero. In other words, by increasing Hs, the margin of Hoff is widened so that the problem due to Hoff from zero does not occur in practice.

  FIG. 14 is a diagram illustrating the structure of the tunnel barrier layer 31 and the free layer 40 of the MTJ of the second embodiment. The tunnel barrier layer 31 is an MgO film. The free layer 40 includes, in order from the tunnel barrier layer 31 side, a first magnetic layer M1, a first nonmagnetic layer N1, a second nonmagnetic layer N2, and a second magnetic layer M2. The first nonmagnetic layer N1 is Ta with a thickness of 0.2 nm. The second nonmagnetic layer N2 is Ru having a thickness of 0.6 nm. The second magnetic layer M2 is CoPd. In the second embodiment, the first magnetic layer M1 has a stacked structure including a first submagnetic layer M11 and a second submagnetic layer M12. The first submagnetic layer M11 is a magnetic layer made of CoFeB, CoFe, Fe, Co, FeB, or CoB, and has a film thickness between 0.3 nm and 2.0 nm, preferably 0.3 nm to 0.9 nm. is there. The second subferromagnetic layer is a magnetic layer made of CoFeB, CoFe, Fe, Co, FeB or CoB containing 10% or more and 30% or less of Ta, and the film thickness is between 0.2 nm and 0.6 nm. Desirably, it is 0.2 nm or more and 0.4 nm or less.

  In the MTJ of the second embodiment of FIG. 14, M2, N2, N1, M12, M11 and MgO were prototyped as CoPd 1.4 nm / Ru 0.6 nm / Ta 0.2 nm / CoFeBTa 0.4 nm / CoFeB 0.4 nm / MgO. Magnetization curves were measured using VSM. As a comparative example, a comparative plot was also made for a reference structure of CoPd 1.4 nm / Ru 0.6 nm / Ta 0.2 nm / CoFeB 0.7 nm / MgO.

  FIG. 15 is a diagram illustrating a magnetization curve, where a solid line indicates the magnetization curve of the MTJ of the second embodiment of FIG. 14, a dotted line indicates the magnetization curve of the reference MTJ of the comparative example, and (B) is a broken line of (A). It is the figure which expanded the part of the circle.

  By replacing the CoFeB layer that is the first submagnetic layer M1 with two layers of CoFeBTa / CoFeB, as shown in FIG. 15A, the Hsf of the magnetization curve can be reduced, in other words, −Jex can be reduced.

  Further, as shown in FIG. 15B, it was found that the saturation magnetization (Ms) of the loop in a low magnetic field decreased from Ms ′ to Ms, and the hysteresis width increased from Hc ′ to Hc. In the case of a single magnetic domain, Hc is proportional to the magnetocrystalline anisotropy energy (Hk). Therefore, in the MTJ of the second embodiment, Hk increases and the perpendicular magnetization exists more stably.

Here, a micromagnetic simulation was performed with a structure of CoPd 1.4 nm / Ru 0.6 nm / Ta 0.2 nm / CoFeB 0.7 nm / MgO as a comparative example, with -Jex being about 0.1 erg / cm ² and CoFeB Hk. It was. As a result of calculating the offset magnetic field Hoff based on this simulation, Hoff = −3500 Oe.

  FIG. 16 is a diagram showing a result of performing a micromagnetic simulation with the MTJ structure of the second embodiment, assuming a CoFeBTa / CoFeB layer, and increasing Hk to about 4500 Oe by about 1.5 times. In FIG. 16, the region above the broken line is a region where Hoff <Hc, and can be operated without applying an external magnetic field when the MTJ is applied to the interface perpendicular magnetization type MRAM. According to FIG. 16, it was found that Hoff only decreased about 600 Oe, but Hc increased about 1400 Oe. As a result, although Hoff is about 600 Oe, Hoff <Hc can be satisfied, and the MTJ can be operated without applying an external magnetic field. In this way, the Hoff margin is increased, and operation is possible even if Hoff is not zero.

FIG. 17 is a view showing the structure of the MTJ of the second embodiment manufactured based on the above analysis result.
The MTJ of the second embodiment is a top pin type, and includes a storage layer (free layer) 40, a tunnel barrier layer 31 formed on the free layer) 40, and a magnetization formed on the tunnel barrier layer 31. A fixed layer (pinned layer) 30. The element size is about 50 nmφ. The free layer 40 includes, in order from the tunnel barrier layer 31 side, a first submagnetic layer M11, a second submagnetic layer M12, a first nonmagnetic layer N1, a second nonmagnetic layer N2, and a second magnetic layer M2. The first submagnetic layer M11 is CoFeBTa having a thickness of 0.4 nm. The second submagnetic layer M12 is CoFeB having a thickness of 0.4 nm. The first nonmagnetic layer N1 is Ta with a thickness of 0.2 nm. The second nonmagnetic layer N2 is Ru having a thickness of 0.6 nm. The second magnetic layer M2 is CoPd having a thickness of 1.4 nm. In other words, the free layer 40 is CoPd 1.4 nm / Ru 0.6 nm / Ta 0.3 nm / CoFeBTa 0.4 nm / CoFeB 0.4 nm. The tunnel barrier layer 31 is an MgO film.

  The pinned layer 30 includes a CoFeB layer 51 having a thickness of 1.2 nm, a Ta layer 52, a CoPt layer 53 having a thickness of 7 nm, a Ru layer 54, a CoPt layer 55 having a thickness of 14 nm, in order from the tunnel barrier layer 31 side. Have

  18A and 18B are diagrams showing measurement results of the MTJ characteristics of the prototyped second embodiment of FIG. 17, in which FIG. 18A shows an RH hysteresis curve, and FIG. 18B shows a distribution of Hoff and Hc of a plurality of samples. It is.

  As shown in FIG. 18A, Hoff is 37 Oe, which is almost zero, and Hc is the same as in FIG. Further, as shown in FIG. 18B, it can be seen that Hoff is distributed around 200 Oe and Hc is distributed in the range of 150 to 500 Oe.

As described above, the MTJ of the second embodiment has a substantially zero Hoff and an improved Hc, and is suitable for use as an MTJ of a magnetoresistive memory.
The MTJ of the first and second embodiments is applied to the interface perpendicular magnetization type MRAM in the form described with reference to FIGS. Further, the MTJ manufacturing process of the first and second embodiments is realized by a widely known manufacturing process, and is also disclosed in Japanese Patent Application No. 2012-271077, so the description thereof is omitted.

FIG. 19 is a block diagram of a semiconductor device in which the interface perpendicular magnetization type MRAM of the embodiment having the MTJ described so far is embedded in a CMOS circuit.
As illustrated in FIG. 19, the semiconductor device (chip) 200 includes an MRAM 220 and a CMOS circuit unit 210 other than the MRAM 220. The CMOS circuit unit 210 includes, for example, a logic circuit unit 211 such as a processor, an analog circuit unit 212, a power supply circuit, and the like.

FIG. 20 is a block diagram of the MRAM 220.
As shown in FIG. 20, the MRAM 220 includes a memory cell array 301, a row decoder 302, a column decoder 303, a selection switch row 304, a write amplifier 305, a sense amplifier 306, a data I / O unit 307, and a control unit 308. The row decoder 302, the column decoder 303, the data I / O unit 307, and the control unit 308 receive the address signal, input / output data, and control signal from the CMOS circuit unit 210 and access the memory cell array 301. Since the configuration and operation of the MRAM 220 are widely known, a description thereof will be omitted.

  The embodiment has been described above, but all examples and conditions described herein are described for the purpose of helping understanding of the concept of the invention applied to the invention and technology. In particular, the examples and conditions described are not intended to limit the scope of the invention, and the construction of such examples in the specification does not indicate the advantages and disadvantages of the invention. Although embodiments of the invention have been described in detail, it should be understood that various changes, substitutions and modifications can be made without departing from the spirit and scope of the invention.

12 Variable resistance element 26 Lower electrode 28 Upper electrode 30 MTJ (Magnetic Tunnel Junction)
31 Tunnel barrier layer 32 Magnetization fixed (pin) layer 40 Memory (free) layer (magnetization free layer)
M1 first magnetic layer M11 first submagnetic layer M12 second submagnetic layer M2 second magnetic layer N1 first non-paramagnetic layer N2 second non-paramagnetic layer

Claims (3)

A tunnel barrier layer;
A magnetization fixed layer provided on one side of the tunnel barrier layer;
A storage layer provided on the other side of the tunnel barrier layer,
The storage layer is
A first magnetic layer in contact with the tunnel barrier layer, having perpendicular magnetic anisotropy and made of any one of CoFeB, CoFe, Fe, Co, FeB or CoB;
A first nonmagnetic layer in contact with the first magnetic layer, made of Ta, and having a thickness of 0.25 nm to 0.35 nm;
A second nonmagnetic layer in contact with the first nonmagnetic layer, made of any of Ru, Rh, or Pd and having a thickness of 0.4 nm or more and 2.0 nm or less;
A second magnetic layer in contact with the second nonmagnetic layer and having perpendicular magnetic anisotropy,
The first magnetic layer and the second magnetic layer are magnetically coupled by antiferromagnetic exchange coupling,
A value obtained by multiplying the saturation magnetization and the thickness of the first magnetic layer is larger than a value obtained by multiplying the saturation magnetization and the thickness of the second magnetic layer. A tunnel barrier layer;
A magnetization fixed layer provided on one side of the tunnel barrier layer;
A storage layer provided on the other side of the tunnel barrier layer,
The storage layer is
A first magnetic layer in contact with the tunnel barrier layer and having perpendicular magnetic anisotropy;
A first nonmagnetic layer in contact with the first magnetic layer, made of Ta and having a thickness of 0.1 nm to 0.5 nm;
A second nonmagnetic layer in contact with the first nonmagnetic layer, made of any of Ru, Rh, or Pd and having a thickness of 0.4 nm or more and 2.0 nm or less;
A second magnetic layer in contact with the second nonmagnetic layer and having perpendicular magnetic anisotropy,
The first magnetic layer and the second magnetic layer are magnetically coupled by antiferromagnetic exchange coupling,
The value obtained by multiplying the saturation magnetization and thickness of the first magnetic layer is greater than the value obtained by multiplying the saturation magnetization and thickness of the second magnetic layer,
The first magnetic layer includes
A first submagnetic layer in contact with the tunnel barrier layer and made of CoFeB, CoFe, Fe, Co, FeB or CoB and having a thickness of 0.3 nm to 2.0 nm;
The first submagnetic layer is in contact with the first submagnetic layer and is made of CoFeB, CoFe, Fe, Co, FeB, or CoB containing 10% to 30% Ta, and has a thickness of 0.2 nm to 0.6 nm. And a perpendicular magnetization type magnetoresistive memory element. A plurality of memory cells;
A first wiring connected to one terminal of each memory cell;
A second wiring connected to the other terminal of each memory cell;
A selection line,
A write amplifier that applies a voltage so that a current flows bidirectionally between the first wiring and the second wiring;
A sense amplifier for detecting a voltage difference between the first wiring and the second wiring;
A decoder circuit for controlling the selection line,
Each memory cell
The perpendicular magnetization type magnetoresistive memory element according to claim 1 or 2,
A select transistor connected to the perpendicular magnetization type magnetoresistive memory element,
2. The magnetoresistive memory according to claim 1, wherein the selection line is connected to a gate of the selection transistor of each memory cell.

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