JP2015102867A - Organic light-emitting diode storage capacitor structure and manufacturing method of the same - Google Patents

Organic light-emitting diode storage capacitor structure and manufacturing method of the same Download PDF

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JP2015102867A
JP2015102867A JP2014082859A JP2014082859A JP2015102867A JP 2015102867 A JP2015102867 A JP 2015102867A JP 2014082859 A JP2014082859 A JP 2014082859A JP 2014082859 A JP2014082859 A JP 2014082859A JP 2015102867 A JP2015102867 A JP 2015102867A
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metal layer
layer
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リナ シャオ
li na Xiao
リナ シャオ
フアナン ワン
Huannan Wang
フアナン ワン
ユシュン フェン
Youxiong Feng
ユシュン フェン
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EverDisplay Optronics Shanghai Co Ltd
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PROBLEM TO BE SOLVED: To lighten a capacitance area while holding capacitance.SOLUTION: A storage capacitor structure includes a polycrystalline silicon layer, a first isolation layer, a first metal layer, a second isolation layer, a second metal layer, and a third isolation layer which are sequentially set on a glass base. The first metal layer and the second metal layer are parallel to each other and form a first capacitance, a third metal layer is formed on the third isolation layer, the third metal layer and the second metal layer are parallel to each other and form a second capacitance. A contact hole is formed at a position where the second isolation layer and the third isolation layer are symmetrical to the first metal layer and the third metal layer, the second metal layer forms a space avoiding the contact hole, the third metal layer and the first metal layer are connected and conduct via the contact hole, and form parallel connection of the first capacitance and the second capacitance. By adding one third metal layer to the first capacitance, the layer and the second metal layer form the second capacitance, and the second capacitance and the first capacitance are parallelly connected by the contact hole.

Description

本発明は、一種のAMOLEDバックプレーンの画素レイアウト技術、特に、一種の有機発光ダイオードストレージキャパシタ構造及びその製造方法に関する。   The present invention relates to a pixel layout technique of a kind of AMOLED backplane, and more particularly to a kind of organic light emitting diode storage capacitor structure and a method for manufacturing the same.

現在、AMOLEDバックプレーンの画素レイアウトの面積を一番大きく占めるのがストレージキャパシタンスである。図1と図2が示すとおり、ストレージキャパシタンスは上下二層の平行金属層21及び22で構成している。金属層の面積が大きいほど、キャパシタンスが大きく、ストレージ容量が大きい。ストレージキャパシタンスの面積を縮小できれば、ピクセルパネルの面積を大幅に縮小できるため、正確な画素補間(Precise Pixel Interpolation、略称PPI)需求の需要を満足できる。但し、ストレージキャパシタンス面積が縮小されれば、キャパシタンスのストレージ容量も小さくなり、画素回路の駆動能力に影響を与える。   Currently, the storage capacitance is the largest component of the pixel layout area of the AMOLED backplane. As shown in FIGS. 1 and 2, the storage capacitance is composed of two upper and lower parallel metal layers 21 and 22. The larger the area of the metal layer, the greater the capacitance and the greater the storage capacity. If the area of the storage capacitance can be reduced, the area of the pixel panel can be greatly reduced, so that the demand for accurate pixel interpolation (abbreviated as PPI) demand can be satisfied. However, if the storage capacitance area is reduced, the storage capacity of the capacitance is also reduced, which affects the driving capability of the pixel circuit.

AMOLED製品解像度の向上に伴い、画面品質要求が向上し、画素サイズが益々小さくなり、画素回路がますます複雑になる。ストレージキャパシタンス平面面積が縮小する同時に、キャパシタンス容量を維持、電気的要求を保持することが、キーとなる技術研究方向である。   As the resolution of AMOLED products increases, screen quality requirements increase, pixel sizes become smaller, and pixel circuits become more complex. At the same time as the storage capacitance plane area is reduced, maintaining the capacitance capacity and maintaining the electrical requirements are the key technical research directions.

本発明は、キャパシタンス容量に変更が起こらない前提で、キャパシタンスの平面面積を縮小し、画素品質を改善する有機発光ダイオードストレージキャパシタ構造を実現するという技術問題を解決する。   The present invention solves the technical problem of realizing an organic light emitting diode storage capacitor structure that reduces the planar area of the capacitance and improves the pixel quality on the premise that the capacitance does not change.

前記課題を解決するために、本発明は、一種の有機発光ダイオードストレージキャパシタ構造を公開した。前記構造は、ガラスベースに順次設定された多結晶シリコン層一つ、第一絶縁層一つ、第一金属層一つ、第二絶縁層一つ、第二金属層一つ及び第三絶縁層一つで構成している、前記第一金属層と前記第二金属層は相互平行で、第一キャパシタンス一つを形成した。その中、前記第三絶縁層に第三金属層が一つ設定された、前記第三金属層と前記第二金属層が相互平行で、第二キャパシタンスを一つ形成した、前記第二絶縁層と前記第三絶縁層が前記第一金属層と前記第三金属層と対照する位置にコンタクトホールが形成した、前記第二金属層が前記コンタクトホールを回避する回避スペースを形成した、前記第三金属層と前記第一金属層は前記コンタクトホールで接触、伝導するため、前記第一キャパシタンスと前記第二キャパシタンスの並列接続を形成する。   In order to solve the above problems, the present invention discloses a kind of organic light emitting diode storage capacitor structure. The structure includes one polycrystalline silicon layer, one first insulating layer, one first metal layer, one second insulating layer, one second metal layer, and a third insulating layer sequentially set on a glass base. The first metal layer and the second metal layer, which are composed of one, are parallel to each other to form one first capacitance. Among them, the second insulating layer in which one third metal layer is set on the third insulating layer, the third metal layer and the second metal layer are parallel to each other, and one second capacitance is formed. And the third insulating layer has a contact hole formed at a position opposite to the first metal layer and the third metal layer, and the second metal layer has formed an avoidance space to avoid the contact hole. Since the metal layer and the first metal layer contact and conduct through the contact hole, a parallel connection of the first capacitance and the second capacitance is formed.

本発明は、前記技術案を採用するため、下記の有益な効果を有する。立体空間の第一金属層と第二金属層で構成した第一キャパシタンスに第三金属層を一つ追加することにより、それと第二金属層で第二キャパシタンスを一つ構成し、次は、コンタクトホールにて第一金属層と第三金属層を接触、伝導させ、第二キャパシタンスと第一キャパシタンスが、相互並列接続する二つのキャパシタンス構造を構成している。これにより、ストレージキャパシタンスの平面面積を軽減する同時に、キャパシタンスの容量を保持し、画素回路の駆動能力に影響を与えない。   The present invention employs the above technical solution, and thus has the following beneficial effects. By adding one third metal layer to the first capacitance composed of the first metal layer and the second metal layer in the three-dimensional space, one second capacitance is composed of it and the second metal layer. The first metal layer and the third metal layer are contacted and conducted in the hole, and the second capacitance and the first capacitance constitute two capacitance structures connected in parallel with each other. As a result, the planar area of the storage capacitance is reduced, and at the same time, the capacitance is retained and the driving capability of the pixel circuit is not affected.

本発明による一層の改善は以下とおりである。前記回避スペースの面積が前記コンタクトホールの面積より大きい。また、前記第三絶縁層の材料が前記回避スペースとコンタクトホールの間に堆積、充填されている。第二金属層を制作する時、コンタクトホールの対照位置を回避する必要がある。また、回避範囲はコンタクトホールより大きいため、第三絶縁層は堆積するようになり、コンタクトホールエッチングが終わった後、第二金属層の側壁に一定の第三絶縁層材料を留保し、第三金属層が堆積する時、コンタクトホールに流れ込んで、側面の第二金属層に接触するこを避ける。   Further improvements according to the present invention are as follows. The area of the avoidance space is larger than the area of the contact hole. The material of the third insulating layer is deposited and filled between the avoidance space and the contact hole. When creating the second metal layer, it is necessary to avoid the contact hole contrast position. Also, since the avoidance range is larger than the contact hole, the third insulating layer is deposited. After the contact hole etching is finished, a certain third insulating layer material is retained on the side wall of the second metal layer, and the third insulating layer is retained. When the metal layer is deposited, avoid flowing into the contact hole and contacting the second metal layer on the side.

本発明は、また、一種の有機発光ダイオードストレージキャパシタ構造の製造方法を公開した。ガラスベースに多結晶シリコン層一つ、第一絶縁層一つ、第一金属層一つ、第二絶縁層一つ、第二金属層一つ及び第三絶縁層一つを順次に形成し、前記第一金属層と前記第二金属層が相互平行で、第一キャパシタンスを一つ形成する。その中、前記第二金属層を形成する時、一つの回避スペースを形成し、前記第二金属層に前記第三絶縁層を形成する。また、前記第三絶縁層の材料を前記回避スペースに堆積させる。   The present invention also discloses a method of manufacturing a kind of organic light emitting diode storage capacitor structure. In order to form one polycrystalline silicon layer, one first insulating layer, one first metal layer, one second insulating layer, one second metal layer, and one third insulating layer on a glass base, The first metal layer and the second metal layer are parallel to each other to form a first capacitance. Among them, when forming the second metal layer, one avoidance space is formed, and the third insulating layer is formed on the second metal layer. The material of the third insulating layer is deposited in the avoidance space.

前記第二絶縁層と前記第三絶縁層が前記第一金属層と回避スペースに対称する位置でコンタクトホールを形成する。   Contact holes are formed at positions where the second insulating layer and the third insulating layer are symmetrical to the first metal layer and the avoidance space.

前記第三絶縁層に第三金属層を一つ形成し、前記第三金属層と前記第二金属層が相互平行で、第二キャパシタンスを一つ形成する。また、前記コンタクトホールにて、前記第三金属層と前記第一金属層を接触、伝導させるため、前記第一キャパシタンスと前記第二キャパシタンスの並列接続を形成する。   One third metal layer is formed on the third insulating layer, and the third metal layer and the second metal layer are parallel to each other to form one second capacitance. Further, in order to contact and conduct the third metal layer and the first metal layer in the contact hole, a parallel connection of the first capacitance and the second capacitance is formed.

図1は、既存ストレージキャパシタ構造のイメージである。FIG. 1 is an image of an existing storage capacitor structure. 図2は、図1の局部断面図である。FIG. 2 is a local cross-sectional view of FIG. 図3は、本発明の有機発光ダイオードストレージキャパシタ構造のイメージである。FIG. 3 is an image of the organic light emitting diode storage capacitor structure of the present invention. 図4は、図3の局部断面図である。4 is a local cross-sectional view of FIG. 図5は、本発明の有機発光ダイオードストレージキャパシタ構造の局部回路図である。FIG. 5 is a local circuit diagram of the organic light emitting diode storage capacitor structure of the present invention.

次は、図と具体実施方式で、本発明をより詳しく説明する。   Next, the present invention will be described in more detail with reference to the drawings and specific implementation methods.

本発明は、一種の有機発光ダイオードストレージキャパシタ構造を公開した。図3〜図5が示すとおり、ガラスベース11に多結晶シリコン層12が一つ、第一絶縁層13が一つ、第一金属層14が一つ、第二絶縁層15が一つ、第二金属層16が一つと第三絶縁層17が一つ、順次に設定された。第一金属層14と第二金属層16が相互平行で、第一キャパシタンスC1を一つ形成した。   The present invention has disclosed a kind of organic light emitting diode storage capacitor structure. 3 to 5, the glass base 11 has one polycrystalline silicon layer 12, one first insulating layer 13, one first metal layer 14, one second insulating layer 15, One bimetallic layer 16 and one third insulating layer 17 were sequentially set. The first metal layer 14 and the second metal layer 16 are parallel to each other to form one first capacitance C1.

第三絶縁層17に第三金属層18が一つあり、第三金属層18と第二金属層16が相互平行で第二キャパシタンスC2を一つ形成している。第二絶縁層15と第三絶縁層17が第一金属層14及び第三金属層18に対称する位置にコンタクトホール19が形成され、第二金属層16は、コンタクトホール19を回避する回避スペース190を形成した。回避スペース190の面積がコンタクトホール19の面積より大きく、また、第三絶縁層17の材料が回避スペース190とコンタクトホール19の間に堆積、充填され、コンタクトホール19のエッチングが終わった後、第二金属層16の側壁に一定の第三絶縁層17の材料を残し、第三金属層18が堆積する時、コンタクトホール19に流れ込んで、側面第二金属層16に接触することを回避する。第三金属層18はコンタクトホール19にて、第一金属層14に直接に接触、伝導する、第一キャパシタンスC1と第二キャパシタンスC2が並列接続する構造を構成した。   The third insulating layer 17 has one third metal layer 18, and the third metal layer 18 and the second metal layer 16 are parallel to each other to form one second capacitance C2. A contact hole 19 is formed at a position where the second insulating layer 15 and the third insulating layer 17 are symmetric with respect to the first metal layer 14 and the third metal layer 18, and the second metal layer 16 has a space to avoid the contact hole 19. 190 was formed. After the area of the avoidance space 190 is larger than the area of the contact hole 19, and the material of the third insulating layer 17 is deposited and filled between the avoidance space 190 and the contact hole 19 and the etching of the contact hole 19 is finished, A certain material of the third insulating layer 17 is left on the side wall of the bimetallic layer 16, and when the third metallic layer 18 is deposited, it flows into the contact hole 19 to avoid contact with the lateral second metallic layer 16. The third metal layer 18 has a structure in which the first capacitance C1 and the second capacitance C2 are connected in parallel through the contact hole 19 in direct contact with and conduction with the first metal layer 14.

本発明の有機発光ダイオードストレージキャパシタ構造の製造方法は主に下記工程が含まれる。   The manufacturing method of the organic light emitting diode storage capacitor structure of the present invention mainly includes the following steps.

ガラスベース11に多結晶シリコン層12を堆積する、多結晶シリコン層12に第一絶縁層13を形成する、第一絶縁層13に第一金属層14を形成し、エッチングを行う。第一金属層14に第二絶縁層15を再形成し、第二絶縁層15に第二金属層16を再形成し、エッチングを行う。第一金属層14と第二金属層16が相互平行で、第一キャパシタンスC1を形成する、第二金属層16を形成する時、第二金属層16にエッチングを行い、回避スペース190を形成する、第二金属層16に第三絶縁層17を堆積し、第三絶縁層17の材料を回避スペース190の内側に堆積させ、第二金属層16の側壁に一定の第三絶縁層17の材料を残す。   A polycrystalline silicon layer 12 is deposited on the glass base 11, a first insulating layer 13 is formed on the polycrystalline silicon layer 12, a first metal layer 14 is formed on the first insulating layer 13, and etching is performed. The second insulating layer 15 is re-formed on the first metal layer 14, the second metal layer 16 is re-formed on the second insulating layer 15, and etching is performed. The first metal layer 14 and the second metal layer 16 are parallel to each other to form the first capacitance C1, and when the second metal layer 16 is formed, the second metal layer 16 is etched to form an avoidance space 190. The third insulating layer 17 is deposited on the second metal layer 16, the material of the third insulating layer 17 is deposited inside the avoidance space 190, and a certain material of the third insulating layer 17 is formed on the side wall of the second metal layer 16. Leave.

次は、第二絶縁層15と第三絶縁層17が第一金属層14と回避スペース190に対称する位置にコンタクトホール19を形成する。   Next, the contact hole 19 is formed at a position where the second insulating layer 15 and the third insulating layer 17 are symmetric with respect to the first metal layer 14 and the avoidance space 190.

第三絶縁層17に第三金属層18を一つ堆積し、エッチングを行い、第三金属層18と第二金属層16が相互平行で、第二キャパシタンスC2を一つ形成し、コンタクトホール19にて第三金属層18と第一金属層14を接触、伝導させる。第一キャパシタンスC1と第二キャパシタンスC2が並列接続する構造を構成する。   One third metal layer 18 is deposited on the third insulating layer 17 and etching is performed. The third metal layer 18 and the second metal layer 16 are parallel to each other to form one second capacitance C2. The third metal layer 18 and the first metal layer 14 are brought into contact with each other and conducted. A structure in which the first capacitance C1 and the second capacitance C2 are connected in parallel is configured.

本発明の有機発光ダイオードストレージキャパシタ構造は、立体空間の第一金属層14と第二金属層16で構成した第一キャパシタンスC1に第三金属層18を一つ追加することにより、それと第二金属層16で第二キャパシタンスC2を一つ構成し、次は、コンタクトホール19にて第一金属層14と第三金属層18を接触、伝導させ、第二キャパシタンスC2と第一キャパシタンスC1が、相互並列接続する二つのキャパシタンス構造を構成している。これより、ストレージキャパシタンスの平面面積を軽減する同時に、キャパシタンスの容量を保持し、画素回路の駆動能力に影響を与えない。   The organic light emitting diode storage capacitor structure of the present invention is obtained by adding one third metal layer 18 to the first capacitance C1 composed of the first metal layer 14 and the second metal layer 16 in the three-dimensional space, thereby adding the second metal layer 18 to the first metal layer 18. One second capacitance C2 is formed by the layer 16, and then the first metal layer 14 and the third metal layer 18 are contacted and conducted in the contact hole 19, and the second capacitance C2 and the first capacitance C1 are mutually connected. Two capacitance structures connected in parallel are formed. As a result, the planar area of the storage capacitance is reduced, and at the same time, the capacitance is retained and the driving capability of the pixel circuit is not affected.

以上は、図と実施例で本発明を詳しく説明したが、本分野の普通の技術者は前記説明に基づき、本発明の各種の変化例を作り出せる。そのため、実施例のある細部は、本発明の限定とならない。本発明は附録とする権利要求書で陳述した範囲を本発明の保護範囲にする。   Although the present invention has been described in detail with reference to the drawings and embodiments, ordinary engineers in the field can make various modifications of the present invention based on the above description. Thus, certain details of the embodiments are not a limitation of the present invention. The scope of protection of the present invention shall be the scope described in the appendices.

Claims (3)

ガラスベースに順次に設定された多結晶シリコン層を一つ、第一絶縁層を一つ、第一金属層を一つ、第二絶縁層を一つ、第二金属層を一つ、及び第三絶縁層を一つで構成し、前記第一金属層と前記第二金属層は相互平行で、第一キャパシタンスを一つ形成し、前記第三絶縁層に第三金属層が一つあり、前記第三金属層と前記第二金属層が相互平行で、第二キャパシタンスを一つ形成し、前記第二絶縁層と前記第三絶縁層が前記第一金属層と前記第三金属層に対照する位置にコンタクトホールを形成し、前記第二金属層は前記コンタクトホールの回避スペースを形成し、前記第三金属層と前記第一金属層は前記コンタクトホールにて接触し伝動するため、前記第一キャパシタンスと前記第二キャパシタンスの並列接続を形成することを特徴とする一種の有機発光ダイオードストレージキャパシタ構造。   One polycrystalline silicon layer, one first insulating layer, one first metal layer, one second insulating layer, one second metal layer, The three insulating layers are composed of one, the first metal layer and the second metal layer are parallel to each other to form one first capacitance, and the third insulating layer has one third metal layer, The third metal layer and the second metal layer are parallel to each other to form a second capacitance, and the second insulating layer and the third insulating layer are contrasted with the first metal layer and the third metal layer. A contact hole is formed at a position where the second metal layer forms an avoidance space for the contact hole, and the third metal layer and the first metal layer are contacted and transmitted through the contact hole. Forming a parallel connection of one capacitance and the second capacitance; OLED storage capacitor structure type. 前記回避スペースの面積が前記コンタクトホールの面積より大きく、また、前記第三絶縁層の材料堆積は、前記回避スペースとコンタクトホールの間に充填されたことを特徴とする請求項1に記載の一種の有機発光ダイオードストレージキャパシタ構造。   The kind of claim 1, wherein an area of the avoidance space is larger than an area of the contact hole, and material deposition of the third insulating layer is filled between the avoidance space and the contact hole. Organic light-emitting diode storage capacitor structure. ガラスベースに多結晶シリコン層を一つ、第一絶縁層を一つ、第一金属層を一つ、第二絶縁層を一つ、第二金属層を一つ及び第三絶縁層を一つを順次に制作し、前記第一金属層と前記第二金属層が相互平行で第一キャパシタンスを一つ形成し、
前記第二金属層を制作する時、回避スペースを一つ形成し、前記第二金属層に前記第三絶縁層を制作し、また、前記第三絶縁層の材料は前記回避スペースに堆積し、
前記第二絶縁層と前記第三絶縁層が前記第一金属層と回避スペースに対照する位置でコンタクトホールを形成し、
前記第三絶縁層に第三金属層を一つ制作し、前記第三金属層と前記第二金属層が相互平行で、第二キャパシタンスを一つ形成し、また、前記コンタクトホールを通じ、前記第三金属層と前記第一金属層を接触、伝道させ、前記第一キャパシタンスと前記第二キャパシタンスの並列接続を形成する一種の有機発光ダイオードストレージキャパシタ構造の製造方法。
One polycrystalline silicon layer, one first insulating layer, one first metal layer, one second insulating layer, one second metal layer and one third insulating layer on a glass base In order, the first metal layer and the second metal layer are parallel to each other to form a first capacitance,
When producing the second metal layer, one avoidance space is formed, the third insulation layer is produced on the second metal layer, and the material of the third insulation layer is deposited on the avoidance space,
Forming a contact hole at a position where the second insulating layer and the third insulating layer contrast with the first metal layer and the avoidance space;
One third metal layer is formed on the third insulating layer, the third metal layer and the second metal layer are parallel to each other, and one second capacitance is formed. A method of manufacturing a type of organic light emitting diode storage capacitor structure in which three metal layers and the first metal layer are contacted and transmitted to form a parallel connection of the first capacitance and the second capacitance.
JP2014082859A 2013-11-22 2014-04-14 Organic light-emitting diode storage capacitor structure and manufacturing method of the same Pending JP2015102867A (en)

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