JP2015041453A - Drive circuit for light-emitting element, light exposure head, and image formation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drive circuit for a light-emitting element capable of making a plurality of scanning lines enter into pixel circuits without increasing a pixel size.SOLUTION: A drive circuit for a light-emitting element comprises: a plurality of pixel circuits arranged in a line; a scanning circuit 4 outputting a scanning signal; and a scanning line 8 for inputting the scanning signal to the pixel circuits. In each pixel circuit, a length in a direction vertical to the arrangement direction is longer than a length in the arrangement direction. The scanning circuit 4 is arranged in a region on an extended line in a longitudinal direction of the pixel circuits. The scanning line 8 enters from a transverse direction of the pixel circuits between the pixel circuits into the pixel circuits.

Description

  The present invention relates to a driving circuit for a light emitting element, an exposure head, and an image forming apparatus.

  An example of a driving circuit using a light emitting element is an exposure head driving circuit. Among exposure heads using light emitting elements, in particular, exposure heads using organic electroluminescence (EL) elements are generally configured by arranging a plurality of pixels composed of light emitting elements on a substrate in a straight line. The In order to accurately emit the light emission amount of each pixel with the luminance according to the data, it is desired to accurately control the amount of current flowing through each light emitting element.

  In general, in order to accurately control the amount of current flowing through each light emitting element, each pixel has a configuration including a switching element (active element, hereinafter referred to as “TFT”) such as a thin film transistor (TFT). As a technique for suppressing variation in TFT characteristics, a pixel circuit technique for controlling using a plurality of scanning lines is used.

  The exposure head is desired to have a high resolution. Patent Document 1 discloses a layout in which pixels are arranged at high density. FIG. 12 shows the configuration of an exposure head including the layout shown in Patent Document 1. In FIG. 12, 1 is a substrate, 2 is a pixel, 3 is a data line, 4 is a scanning circuit, 5 is a first power supply wiring, 6 is a second power supply wiring, 7 is a terminal portion, and 8 is a scanning line. The pixel 2 includes a pixel circuit and a light emitting element.

JP 2009-6718 A

  However, when the pixels are arranged at high density as in Patent Document 1, the short side width of the pixel circuit in the pixel 2 is reduced. For this reason, if the scanning lines 8 are allowed to enter from the short side of the pixel circuit, when other signal lines such as the data lines 3 enter from the same direction, the wirings are dense and layout becomes difficult. Further, as described above, when there are a plurality of scanning lines 8 extending from the scanning circuit 4 in order to suppress variation in TFT characteristics, it is more difficult to enter a plurality of wirings from the short side of the pixel circuit. It becomes. If the scanning line 8 is to be arranged on the short side of the pixel circuit, the width on the short side of the pixel circuit must be increased. In this case, however, the pixel pitch increases and the pixels 2 cannot be arranged at high density. End up.

  The present invention has been made in view of the above-described conventional problems, and in a driving circuit for a light emitting element, the driving of the light emitting element that allows a plurality of scanning lines to enter the pixel circuit without increasing the pixel size. The purpose is to provide a circuit.

In order to solve the above problems, the present invention includes a plurality of pixel circuits arranged in a line, a scanning circuit that outputs a scanning signal, and a scanning line that inputs the scanning signal to the pixel circuit,
The pixel circuit is longer in a direction perpendicular to the arrangement direction of the pixel circuits than in the arrangement direction of the pixel circuits,
The scanning circuit is disposed in a region on an extension line in the longitudinal direction of the pixel circuit,
The scanning line provides a driving circuit for a light emitting element, wherein the scanning line enters the pixel circuit from a short direction of the pixel circuit between the pixel circuits.

  According to the present invention, a large number of scanning lines can enter the pixel circuit without increasing the pixel size. As a result, functions such as transistor variation compensation and light-emitting element ON period control can be mounted in the pixel circuits arranged at high density, so that the drive circuit can be enhanced.

It is the schematic which shows an example of the structure of the exposure head using the drive circuit of the light emitting element of this invention. FIG. 2 is a partially enlarged configuration diagram illustrating a pixel portion in FIG. 1. It is another partial expansion block diagram which shows the part similar to FIG. It is another partial expansion block diagram which shows the part similar to FIG. It is an example figure which shows the connection state of the circuit of a pixel. FIG. 3 is an example of a layout of the pixel circuit in FIG. 2. It is the schematic which shows the other example of the structure of the exposure head using the drive circuit of the light emitting element of this invention. It is an example figure of the layout of the pixel circuit of FIG. It is the schematic which shows the other example of the structure of the exposure head using the drive circuit of the light emitting element of this invention. FIG. 10 is an example of a layout of the pixel circuit of FIG. 9. 1 is a schematic view of an image forming apparatus having an exposure head using a drive circuit for a light emitting element of the present invention. It is the schematic which shows the structure of the conventional exposure head.

  Hereinafter, the present invention will be described in detail with reference to the drawings.

≪Light emitting element drive circuit and exposure head≫
[First embodiment]
An example in which the light emitting element driving circuit of the present invention is used in an exposure head for exposing a photosensitive drum to light to expose a latent image will be described with reference to FIGS. FIG. 1 is a schematic view showing the arrangement of an exposure head using a drive circuit for a light emitting device according to the present invention. FIG. 2 is a partially enlarged configuration diagram showing a portion of the pixel 2 in FIG. In FIG. 2, the data line 3 and the first power supply wiring 5 are omitted.

  A plurality of exposure heads of the present invention are formed on a substrate 1 so that pixels 2 are arranged in one direction. As the substrate 1, for example, a glass substrate or a silicon substrate can be used. As shown in FIG. 2, the pixel 2 includes a light emitting element 11 and a pixel circuit 10, and the light emitting element 11 and the pixel circuit 10 are both arranged in a line. As the light emitting element 11, for example, a light emitting diode (LED), an inorganic EL element, an organic EL element, or the like can be used.

  The pixel circuit 10 is longer in the direction perpendicular to the arrangement direction of the pixel circuits 10 than in the arrangement direction of the pixel circuits 10. The pixel circuit 10 shown in FIG. 2 has a substantially rectangular shape. The pixel circuit 10 is divided into a plurality of blocks including a plurality of adjacent pixel circuits. Specifically, the pixel circuit 10 is arranged as one block with m pixels (m is an integer of 2 or more) adjacent to each other, and N blocks (N is an integer of 2 or more) are arranged as a whole. Further, the blocks are arranged in a line in the same direction as the arrangement direction of the pixel circuits 10.

  The data line 3 is a wiring for transmitting a data signal. In this embodiment, m data lines corresponding to the number of pixel circuits 10 constituting one block are arranged. Control signals such as clock signals CK and CKB and gate signals ST and P are input to the scanning circuit 4, and the scanning signals (P1 and P2) are output to the scanning line 8 for each block. The scanning circuit 4 includes a shift register, and the scanning signal is output with the timing shifted in units of blocks. The scanning circuit 4 is disposed in any region on the extension line in the longitudinal direction of the pixel circuit 10. The shift register in the scanning circuit 4 is arranged so that the signal advances in the arrangement direction of the pixel circuits 10.

  The scanning line 8 has a wiring portion extending from the scanning circuit 4 in a direction perpendicular to the arrangement direction of the pixel circuits 10, and extends between blocks in a region where the pixel circuits 10 are arranged. The interval between the pixel circuits 10 where the wiring portions extending in the direction perpendicular to the arrangement direction of the pixel circuits are arranged is wider than the interval between the other pixel circuits 10. That is, the interval between blocks (in FIG. 2, the interval between the m-th pixel circuit 10 in the k block and the first pixel circuit 10 in the k + 1 block) is wider than the interval between the pixel circuits 10 in the block. The scanning line 8 bends vertically between the blocks, enters the pixel circuit 10 from the short direction (long side) of the pixel circuit 10, and extends in the arrangement direction of the pixel circuits 10 across the plurality of pixel circuits 10 in the block. Stretch to. Since the timing of the scanning signal is different for each block, a different scanning line 8 is provided for each block. In FIG. 1 and FIG. 2, two scanning signals are input to the pixel circuit 10 by two scanning lines 8, but the number of scanning lines 8 is not limited to this.

  A power supply voltage is supplied to each pixel circuit 10 through power supply wirings 5 and 6. The above signals and power supply voltage are supplied onto the substrate 1 by the terminal portion 7. An output current corresponding to the input data is generated in the pixel circuit 10, and a current flows through the light emitting element 11. The current flows through the second power supply wiring 6 connected to the light emitting element 11.

  In FIG. 2, in order to arrange the scanning lines 8 between the blocks, the intervals between the pixel circuits 10 are arranged such that the interval between the blocks is larger than the interval between the pixel circuits in the block. However, the intervals between the light emitting elements 11 between the blocks and the intervals between the light emitting elements 11 within the blocks are the same. That is, by arranging all the light emitting elements 11 at equal intervals, the interval of the pixel circuits 10 between the blocks is wider than the interval of the light emitting elements 11 between the blocks.

  FIG. 3 is another partial enlarged configuration diagram showing the same part as in FIG. 2, and is a diagram in the case where the interval between the blocks and the pixel circuit 10 are the same. The intervals between the blocks and the pixel circuits 10 are the same, and the light emitting elements 11 are also arranged at equal intervals. This can be used when the pixel interval can be made wider than the total width and interval of the scanning lines 8 corresponding to the number of lines entering the pixel circuit 10. In other words, when there is a space for arranging the necessary number of scanning lines 8 between the pixel circuits 10, the spacing between the pixel circuits 10 can be made the same between the blocks when the spacing between the pixel circuits 10 is wide.

  FIG. 4 is another partially enlarged configuration diagram showing the same part as FIG. 2, and is the same as FIG. 3 in that the interval between the blocks and the pixel circuit 10 is the same, but the light emitting elements 11 are equally spaced. Arranged and staggered. By staggered arrangement, the light emitting elements 11 can be arranged without gaps in the arrangement direction of the light emitting elements 11. When the light emitting elements 11 are arranged linearly as shown in FIGS. 2 and 3, there is a high possibility that there is a gap between the light emitting elements 11, and light cannot be emitted in the gap portion. However, with the arrangement as shown in FIG. 4, there is no gap between the adjacent light emitting elements 11 with respect to the arrangement direction of the light emitting elements 11, and therefore the light emitting elements 11 in the adjacent rows arranged in a staggered manner between the light emitting elements 11. Can be supplemented by light emission. In the configuration of FIG. 2, the light emitting elements can be arranged in a staggered manner as shown in FIG.

  FIG. 5 is an example diagram illustrating a connection state of the circuit of the pixel 2. A circuit configuration will be described. The pixel circuit 10 includes three PMOS transistors and one holding capacitor C1. The scanning signal P1 is input to the gate electrode of the switch transistor Tr1, which is a selection transistor, and the data line 3 is connected to one of the source and the drain. The other of the source and the drain is connected to the gate of the drive transistor Tr2, the source of Tr2 is connected to the first power supply wiring 5, and the drain is connected to the source of Tr3. The scanning signal P <b> 2 is input to the gate of Tr <b> 3, and the drain is connected to the anode electrode of the light emitting element 11. A holding capacitor C1 is disposed between the gate and source of Tr2, and holds the data voltage written in the pixel circuit 10. Further, the cathode of the light emitting element 11 is connected to the second power supply wiring 6 which is a common potential provided in common for all pixels. One of the anode electrode and the cathode electrode is formed of a transparent electrode (for example, indium tin oxide (ITO) or indium zinc oxide (IZO)) to serve as a light extraction surface.

  The circuit operation will be described. At the timing when data corresponding to the corresponding pixel is set in the data line 3, the switching transistor Tr1 is turned on. Data is written to the storage capacitor C1. Thereafter, the data is held in the pixel circuit 10 by turning off Tr1. At the same time, a drive current corresponding to the gate-source voltage of the drive transistor Tr2 flows from Tr2. Tr3 functions as a switch for controlling a period during which a current flows through the light emitting element 11. Since Tr3 is turned on when the scanning signal P2 is at the low level, the light emission period and timing of the light emitting element 11 can be controlled by the scanning signal P2. Although FIG. 5 shows an example of the pixel circuit 10 having two scanning lines 8, the present invention is not limited to the number of scanning lines 8, and can be applied to any pixel circuit configuration. In the present embodiment, an example in which the pixel circuit 10 is configured by PMOS is shown, but the pixel circuit 10 is not limited to this transistor (Tr) polarity. Specifically, a circuit constituted by a single channel of NMOS or a circuit in which NMOS and PMOS are mixed may be used.

  FIG. 6 is an example of a layout of the pixel circuit 10 of FIG. FIG. 6 is a view as seen from the back side of the substrate 1, in which the polysilicon layer, the gate electrode layer, and then the aluminum power wiring layer are arranged in the foreground. Specifically, the transistor part 12 is formed of a polysilicon layer. The scanning line 8, the transistor gate electrode 13, and one end 14 of the storage capacitor C1 are formed of a gate electrode layer. The other end 15 of the storage capacitor C1 connected to the data line 3, the first power supply wiring 5, and the first power supply wiring 5 is formed of an aluminum power supply wiring layer. A contact hole 16 is formed to connect the polysilicon layer to another layer and member.

  The scanning line 8 is provided with two scanning lines 8 for transmitting scanning signals P1 and P2, respectively. The scanning line 8 extends from the scanning circuit 4 in a direction perpendicular to the arrangement direction of the pixel circuits 10 and extends between the blocks of the pixel circuit 10. The scanning line 8 bends vertically between the blocks, enters the pixel circuit 10 from the short side (long side) of the pixel circuit 10, and is adjacent to the pixel circuit 10 across the plurality of pixel circuits 10 in the block. Extending in the arrangement direction of the pixel circuits 10 so as to cross the boundary line.

  As shown in FIG. 6, when the length of the pixel circuit 10 in the direction perpendicular to the arrangement direction of the pixel circuit 10 is longer than the length in the arrangement direction of the pixel circuit 10 (when the pixel circuit 10 is vertically long), scanning is performed in the pixel circuit 10. It is difficult to enter a plurality of lines 8 from the longitudinal direction (short side). Therefore, the interval between the blocks is made wider than the interval between the pixel circuits 10 in the block, the scanning lines 8 are extended between the blocks, bent between the blocks, and extended in the arrangement direction of the pixel circuits 10. Thereby, the scanning line 8 can enter the pixel circuit 10 from the short side (long side) of the pixel circuit 10.

  In the present embodiment, even if there is no room on the layout in which the plurality of scanning lines 8 are arranged in the longitudinal direction (short side) of the pixel circuit 10, the interval between the blocks of the pixel circuit 10 is set between the other pixel circuits 10. Wiring portions extending wider than the interval and extending in a direction perpendicular to the arrangement direction of the pixel circuits of the plurality of scanning lines 8 can be arranged there. Then, by extending the scanning lines 8 in the arrangement direction of the pixel circuits 10 between the blocks, the plurality of scanning lines 8 can be entered from the short direction (long side) of the pixel circuits 10.

  In the drive circuit for the light emitting element of the present invention, Tr3 in FIG. 5 can be omitted, and one scanning line 8 entering the pixel circuit 10 can be provided as shown in FIG. FIG. 8 is an example of a layout of the pixel circuit 10 of FIG. 7 and is a view seen from the back side of the substrate 1. In FIG. 6, the wiring layer is laid out in three layers, but in FIG. 8, the wiring layer is composed of a polysilicon layer and a gate electrode layer next to the frontmost layer. Therefore, there is no space when the scanning line 8 is arranged in the same layer as the data line 3 arranged in the longitudinal direction (short side) of the pixel circuit 10. However, since the driving circuit of the light emitting element of the present invention allows the scanning line 8 to enter from the short side (long side) of the pixel circuit 10, a plurality of scanning lines can be used regardless of the space in the long side (short side). 8 can enter the pixel circuit 10.

  In the said embodiment, although the kind of light emitting element is not limited, this invention is used suitably for the drive circuit which controls lighting of an organic EL element. Further, although the example in which the light emitting element is used for the exposure head has been described, the present invention can also be applied to a drive circuit for a line light source in which the light emitting elements are arranged in a row.

[Second Embodiment]
A second embodiment of the exposure head using the light emitting element driving circuit of the present invention will be described with reference to FIGS. FIG. 9 is a schematic view showing the arrangement of an exposure head using the light emitting element driving circuit of the present invention. The present embodiment is characterized in the arrangement method of the scanning lines 8 when the intervals between the blocks and the pixel circuits 10 are the same. This is suitable when the interval between the pixel circuits 10 cannot be made so wide compared to the width of the scanning line 8 and the interval between the blocks is desired to be the same as the interval between the pixel circuits 10. Except for the arrangement of the scanning lines 8 and the pixels 2, the description is omitted because it is the same as that of the first embodiment.

  The pixel circuits 10 are arranged at equal intervals, and the intervals between the blocks and the pixel circuits 10 are the same. One of the plurality of scanning lines 8 extends from the scanning circuit 4 in a direction perpendicular to the arrangement direction of the pixel circuits 10, passes through a gap between the pixel circuits 10 and the pixel circuits 10, and is an area in which the pixel circuits 10 are arranged. Extend to. Then, the scanning line 8 is bent in a T shape between the pixel circuits 10 to the left and right, enters the pixel circuit 10 from the short direction (long side) of the pixel circuit 10, and spans the plurality of pixel circuits 10 in the block. The pixel circuit 10 extends in the arrangement direction. The other scanning lines 8 extend from the scanning circuit 4 in a direction perpendicular to the arrangement direction of the pixel circuits 10, pass through a gap between the pixel circuits 10 at positions different from the first scanning line 8, and the pixel circuits 10 are arranged. The first scanning line 8 intersects the first scanning line 8 without being in electrical contact. Then, similarly to the first scanning line 8, the pixel circuit 10 extends in the arrangement direction.

  FIG. 10 is an example of a layout of the pixel circuit 10 of FIG. FIG. 10 is a view as seen from the rear surface side of the substrate 1, in which the polysilicon layer, the gate electrode layer, and then the aluminum power wiring layer are arranged in the foreground. The scanning line 8 is formed in the gate electrode layer. However, in order to avoid electrical contact between the scanning line 8 that transmits the scanning signal P1 and the scanning line 8 that transmits the scanning signal P2, the scanning line 8 that transmits the scanning signal P2 is a contact hole from the gate electrode layer to the aluminum power supply wiring layer. 16 and then crosses the scanning line 8 that transmits the scanning signal P1. Then, it returns to the gate electrode layer again via the contact hole 16 and extends from there in the direction in which the pixel circuits 10 are arranged. Even when there are third and subsequent scanning lines 8, they can be arranged in the same manner as the scanning lines 8 that transmit the scanning signal P2.

  In the present embodiment, even if there is no room on the layout in which the plurality of scanning lines 8 are arranged in the longitudinal direction (short side) of the pixel circuit 10, all the intervals between the pixel circuits 10 remain the same, and different positions are provided. A plurality of scanning lines 8 can be passed between the pixel circuits 10. Then, by bending the scanning lines 8 between the pixel circuits 10 in the arrangement direction of the pixel circuits 10, the plurality of scanning lines 8 can enter the pixel circuits 10 from the short direction (long side) of the pixel circuits 10. .

≪Image forming device≫
One embodiment of an image forming apparatus including an exposure head using the drive circuit for a light emitting element of the present invention will be described with reference to FIG. The image forming apparatus 100 includes a recording unit 104 including a photosensitive drum 105, a charger 106, an exposure head 107 including a driving circuit for a light emitting element of the present invention, a developing unit 108, and a transfer unit 109. In addition, the image forming apparatus includes a conveyance roller 103 and a fixing device 110.

  In the recording unit 104, first, the surface of the cylindrical photosensitive drum 105 is uniformly charged by the charger 106, and the exposure head 107 emits light according to data to form an electrostatic latent image on the photosensitive drum 105. The electrostatic latent image can be controlled by the exposure amount (illuminance, time) of the exposure head 107. Next, in the recording unit 104, toner is attached to the electrostatic latent image by the developing device 108, and the toner attached to the electrostatic latent image is transferred to the paper 102 by the transfer device 109. In this manner, the paper 102 onto which the image data has been transferred via the recording unit 104 has the toner fixed by the fixing device 110 and is discharged. Note that the timing at which the sheet 102 is conveyed to the recording unit 103 by the conveying roller 103 can be set as appropriate. In this embodiment, the recording unit 104 is described as an example of a monochrome image forming apparatus. However, the present invention is not limited to this, and a color image forming apparatus including a plurality of recording units 104 may be used.

1: substrate, 2: pixel, 3: data line, 4: scanning circuit, 5: first power supply wiring, 6: second power supply wiring, 7: terminal portion, 8: scanning line, 10: pixel circuit, 11: light emission Element 100: Image forming apparatus, 107: Exposure head

Claims (10)

A plurality of pixel circuits arranged in a line; a scanning circuit that outputs a scanning signal; and a scanning line that inputs the scanning signal to the pixel circuit;
The pixel circuit is longer in a direction perpendicular to the arrangement direction of the pixel circuits than in the arrangement direction of the pixel circuits,
The scanning circuit is disposed in a region on an extension line in the longitudinal direction of the pixel circuit,
The driving circuit of a light emitting element, wherein the scanning line enters the pixel circuit from a short direction of the pixel circuit between the pixel circuits.   The plurality of pixel circuits are divided into a plurality of blocks including a plurality of adjacent pixel circuits, the scanning circuit scans the pixel circuits in units of blocks, and the scanning line is connected between the blocks. 2. The light emitting element driving circuit according to claim 1, wherein the light emitting element driving circuit extends in the arrangement direction of the pixel circuits across the plurality of pixel circuits in the block.   The plurality of pixel circuits are divided into a plurality of blocks including a plurality of adjacent pixel circuits, the scanning circuit scans the pixel circuits in units of blocks, and the scanning line is the pixel circuit in the block. 2. The drive circuit for a light emitting element according to claim 1, wherein the light emitting element drive circuit enters the pixel circuit between the plurality of pixel circuits in the block and extends in the arrangement direction of the pixel circuits. The pixel circuit includes a driving transistor that supplies a driving current to a light emitting element connected to the pixel circuit;
4. The light emitting element driving circuit according to claim 1, further comprising: a selection transistor that supplies a data signal supplied via a data line to the driving transistor. 5.   The light emitting element driving circuit according to claim 4, wherein the scanning line is connected to a gate electrode of the selection transistor and transmits a control signal.   The light emitting element driving circuit according to claim 1, wherein a plurality of scanning lines enter the pixel circuit.   The light-emitting element driving circuit according to claim 1, wherein the shift register in the scanning circuit is arranged so that a signal travels in an arrangement direction of the pixel circuits.   8. The driving circuit for a light emitting element according to claim 1, wherein an interval between pixel circuits into which the scanning line enters is wider than an interval between other pixel circuits. 9.   An exposure head comprising the light emitting element drive circuit according to claim 1.   An image forming apparatus comprising the exposure head according to claim 9.

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