JP2015023390A - Differential amplifier - Google Patents

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JP2015023390A
JP2015023390A JP2013149427A JP2013149427A JP2015023390A JP 2015023390 A JP2015023390 A JP 2015023390A JP 2013149427 A JP2013149427 A JP 2013149427A JP 2013149427 A JP2013149427 A JP 2013149427A JP 2015023390 A JP2015023390 A JP 2015023390A
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field effect
differential amplifier
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effect transistors
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JP6002097B2 (en
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宏行 高橋
Hiroyuki Takahashi
宏行 高橋
竹内 淳
Atsushi Takeuchi
淳 竹内
枚田 明彦
Akihiko Hirata
明彦 枚田
久々津 直哉
Naoya Kukutsu
直哉 久々津
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Nippon Telegraph and Telephone Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a differential amplifier that can expect to perform a favorable differential amplification operation even in a high frequency band.SOLUTION: As a current source of the differential amplifier comprising two field effect transistors TR1, TR2, a grounded stub comprising a length of transmission line corresponding to a quarter wavelength at the frequency of input differential signals is used. This can expect to perform a favorable differential amplification operation even in a high frequency band above 100 GHz. A resistance component of the transmission line constituting the grounded stub 30 can be lower than a parasitic resistance of a general transistor to implement a higher gain than the case of using the transistor as the current source.

Description

本発明は、高周波の差動信号を入力する差動増幅器に関する。   The present invention relates to a differential amplifier that inputs a high-frequency differential signal.

差動増幅器は、互いに逆相の2つの信号(以下、「差動信号」という)を受信して、2つの信号の差分を増幅した信号を再び差動信号として出力する。また、互いに同相の2つの信号が入力された場合は増幅しないという特性を持つ。従来の差動増幅器の回路構成例を図6に示す。2つの電界効果トランジスタTR1,TR2の各ゲート端子に入力端子が接続され、各ドレイン端子に出力端子が接続され、ソース端子は共通の電流源に接続されている。電流源は通過する信号の電圧に関わらず一定の電流を維持する回路であり、2つの電界効果トランジスタTR1,TR2からみると無限大の大きさを持ったインピーダンスに接続されていることになる。   The differential amplifier receives two signals having opposite phases (hereinafter referred to as “differential signal”) and outputs a signal obtained by amplifying the difference between the two signals as a differential signal again. Further, when two signals having the same phase are input, they are not amplified. A circuit configuration example of a conventional differential amplifier is shown in FIG. An input terminal is connected to each gate terminal of the two field effect transistors TR1 and TR2, an output terminal is connected to each drain terminal, and a source terminal is connected to a common current source. The current source is a circuit that maintains a constant current regardless of the voltage of the signal that passes through it, and is connected to an impedance having an infinite magnitude when viewed from the two field effect transistors TR1 and TR2.

図7に、電流源を実現する回路の一例を示す。電界効果トランジスタはドレイン端子に印加されるドレイン電圧が所定の範囲内の場合は電流が一定となる特性を持つ。図7のように電界効果トランジスタTR3を接続し、ドレイン端子に所定の電圧が印加されるように駆動電圧を調整することによって、電流源としての動作を得ることができる。   FIG. 7 shows an example of a circuit that realizes a current source. The field effect transistor has a characteristic that the current is constant when the drain voltage applied to the drain terminal is within a predetermined range. Operation as a current source can be obtained by connecting the field effect transistor TR3 as shown in FIG. 7 and adjusting the drive voltage so that a predetermined voltage is applied to the drain terminal.

差動増幅器の2つの入力端子に互いに逆相の信号が入力された場合は、片側のトランジスタがオン状態のときは、もう一方がオフ状態となるため、2つの電界効果トランジスタTR1,TR2に流れる電流の総和を一定に保ったままの増幅動作が可能となる。しかしながら、2つの入力端子に同相の信号が入力された場合は、2つの電界効果トランジスタTR1,TR2を同時にオン・オフすることができないため、増幅動作は行われない。また、一方の入力端子のみに信号が入力され、他方の入力端子は終端されている場合は、信号が入力された側の電界効果トランジスタがオン・オフする動作に伴い、電流の総和が一定になるように他方の電界効果トランジスタが連動して動作するため、結果的に2つの出力端子から互いに逆相の信号が出力される。すなわち、一方の入力端子のみに信号を入力することによって、2つの出力端子から互いに逆相の信号を得ることができる。   When signals having opposite phases to each other are input to the two input terminals of the differential amplifier, when one of the transistors is on, the other is off, and therefore flows through the two field effect transistors TR1 and TR2. An amplification operation can be performed while keeping the total current constant. However, when in-phase signals are input to the two input terminals, the two field effect transistors TR1 and TR2 cannot be turned on / off at the same time, so that the amplification operation is not performed. In addition, when a signal is input only to one input terminal and the other input terminal is terminated, the current sum is kept constant as the field effect transistor on the signal input side is turned on / off. Thus, the other field effect transistor operates in conjunction with each other, and as a result, signals having opposite phases are output from the two output terminals. That is, by inputting a signal to only one input terminal, signals having opposite phases can be obtained from the two output terminals.

上記のような特性を持つ差動増幅器は、様々なシステムのアナログ回路に使用されている。   Differential amplifiers having the above characteristics are used in analog circuits of various systems.

伊藤康之、高木直著、「MMIC技術の基礎と応用」、株式会社リアライズ社、平成8年5月31日、p. 65Yasuyuki Ito and Naoki Takagi, “Basics and Applications of MMIC Technology”, Realize Inc., May 31, 1996, p. 65 相川正義、大平孝、徳満恒雄、広田哲夫、村口正弘著、「モノリシックマイクロ波集積回路(MMIC)」、社団法人電気情報通信学会、平成9年1月15日、p. 54-55Masayoshi Aikawa, Takashi Ohira, Tsuneo Tokuman, Tetsuo Hirota, Masahiro Muraguchi, “Monolithic Microwave Integrated Circuit (MMIC)”, The Institute of Electrical, Information and Communication Engineers, January 15, 1997, p. 54-55

しかしながら、100GHzを超えるような高周波の差動信号を入力する場合は、電流源を構成するトランジスタが有する様々な寄生成分が伝送特性に影響を与え、電界効果トランジスタTR1,TR2にとって理想的な電流源ではなくなり、高周波帯では所望の差動増幅動作が得られないという問題があった。   However, when a high-frequency differential signal exceeding 100 GHz is input, various parasitic components of the transistors constituting the current source affect the transmission characteristics, and the current source is ideal for the field effect transistors TR1 and TR2. Therefore, there is a problem that a desired differential amplification operation cannot be obtained in the high frequency band.

図7で電流源として用いた電界効果トランジスタの等価回路を図8に示す(非特許文献1)。電界効果トランジスタの等価回路化は、電流源の他に、ゲート端子、ドレイン端子、ソース端子の抵抗Rg,Rd,Rsやゲート・ドレイン間の寄生容量Cdg、ゲート・ソース間の寄生容量Cgs、ソース・ドレイン間の寄生容量Cds、チャネル抵抗Rds、空乏層直下の抵抗Riなどの寄生成分を用いて記述できる。使用周波数帯が低い場合は寄生容量Cdg,Cgs,Cdsの影響は無視できる。またトランジスタ自体の利得や応答速度も十分であるため、寄生抵抗成分による影響も小さい。しかしながら、使用周波数帯が高周波となると、寄生容量Cdg,Cgsの影響が無視できず、電流源としての入力インピーダンスが低くなってしまう。また、電界効果トランジスタTR1,TR2で信号を増幅した際に得られる利得が小さくなるため、電流源として用いている電界効果トランジスタTR3の寄生抵抗による利得低下の影響が大きい。これらの寄生成分の影響が存在する場合、差動増幅器としては、出力される信号の位相関係が逆相からずれる、同相の信号も増幅してしまう、利得が不足し信号が減衰してしまう、などの悪影響が生じる。これら寄生成分による悪影響はトランジスタとしてバイポーラトランジスタを用いた場合でも同様である。   An equivalent circuit of the field effect transistor used as a current source in FIG. 7 is shown in FIG. 8 (Non-Patent Document 1). In addition to the current source, the equivalent circuit of the field-effect transistor includes resistances Rg, Rd, Rs of the gate terminal, drain terminal, and source terminal, parasitic capacitance Cdg between the gate and drain, parasitic capacitance Cgs between the gate and source, source It can be described using parasitic components such as parasitic capacitance Cds between drains, channel resistance Rds, and resistance Ri immediately under the depletion layer. When the operating frequency band is low, the influence of the parasitic capacitances Cdg, Cgs, Cds can be ignored. Moreover, since the gain and response speed of the transistor itself are sufficient, the influence of the parasitic resistance component is small. However, when the frequency band used is high, the influence of the parasitic capacitances Cdg and Cgs cannot be ignored, and the input impedance as a current source becomes low. Further, since the gain obtained when the signal is amplified by the field effect transistors TR1 and TR2 is reduced, the influence of the gain reduction due to the parasitic resistance of the field effect transistor TR3 used as the current source is large. When the influence of these parasitic components exists, as a differential amplifier, the phase relationship of the output signal deviates from the reverse phase, the in-phase signal is also amplified, the gain is insufficient, and the signal is attenuated. Adverse effects occur. The adverse effects of these parasitic components are the same even when bipolar transistors are used as transistors.

一方、100GHz超の周波数帯において差動信号を得るため、伝送線路を組み合わせてラットレースカプラと呼ばれる回路を設計し、互いに逆相の信号を得る手法がある(非特許文献2)。ラットレースカプラは、1/4波長線路と3/4波長線路を組み合わせ、所定のポートから信号を入力すると、互いに逆相の信号が得られる回路である。ラットレースカプラは、伝送線路を用いるために、寄生成分の影響が小さい点が利点である。しかしながら、受動回路であるため信号増幅の効果は得ることができず、逆に挿入損失が大きいことが課題となる。また、ラットレースカプラは原理的に1点の周波数でのみ正確な逆相の信号が得られ、当該周波数から離れるにつれて逆相信号間の位相誤差が大きくなるという問題がある。   On the other hand, in order to obtain a differential signal in a frequency band exceeding 100 GHz, there is a technique of designing a circuit called a rat race coupler by combining transmission lines and obtaining signals having opposite phases (non-patent document 2). A rat race coupler is a circuit in which signals having opposite phases are obtained when a signal is input from a predetermined port by combining a 1/4 wavelength line and a 3/4 wavelength line. Since the rat race coupler uses a transmission line, it is advantageous in that the influence of parasitic components is small. However, since it is a passive circuit, the effect of signal amplification cannot be obtained, and conversely, a large insertion loss is a problem. In addition, the rat race coupler has a problem that, in principle, an accurate anti-phase signal can be obtained only at one frequency, and the phase error between the anti-phase signals increases with distance from the frequency.

本発明は、上記に鑑みてなされたものであり、高周波帯においても良好な差動増幅動作が期待できる差動増幅器を提供することを目的とする。   The present invention has been made in view of the above, and an object of the present invention is to provide a differential amplifier that can be expected to have a good differential amplification operation even in a high frequency band.

本発明に係る差動増幅器は、2つの電界効果トランジスタと、前記電界効果トランジスタそれぞれのゲート端子に接続され、波長λの周波数の差動信号が入力される2つの入力端子と、駆動電圧が供給される前記電界効果トランジスタそれぞれのドレイン端子に接続される2つの出力端子と、前記2つの電界効果トランジスタのソース端子に接続される、前記波長λの4分の1波長に相当する長さの伝送線路で構成された接地スタブと、を有することを特徴とする。   The differential amplifier according to the present invention is supplied with two field effect transistors, two input terminals connected to the gate terminals of the field effect transistors, to which a differential signal having a frequency of wavelength λ is input, and a driving voltage. Transmission having a length corresponding to a quarter wavelength of the wavelength λ connected to two output terminals connected to the drain terminals of each of the field effect transistors and a source terminal of the two field effect transistors And a ground stub composed of a track.

上記差動増幅器において、前記ゲート端子と前記入力端子との間に、前記ゲート端子と前記入力端子との間のインピーダンスを前記周波数の近傍において整合させる整合回路と、前記ゲート端子に制御電圧を供給する制御電圧供給回路とを有する入力信号整合回路を備えたことを特徴とする。   In the differential amplifier, a matching circuit for matching an impedance between the gate terminal and the input terminal in the vicinity of the frequency is provided between the gate terminal and the input terminal, and a control voltage is supplied to the gate terminal. And an input signal matching circuit having a control voltage supply circuit.

上記差動増幅器において、前記ドレイン端子と前記出力端子との間に、前記ドレイン端子と前記出力端子との間のインピーダンスを前記周波数の近傍において整合させる整合回路と、前記ドレイン端子に駆動電圧を供給する駆動電圧供給回路とを有する出力信号整合回路を備えたことを特徴とする。   In the differential amplifier, a matching circuit for matching an impedance between the drain terminal and the output terminal in the vicinity of the frequency between the drain terminal and the output terminal, and a drive voltage to the drain terminal And an output signal matching circuit having a driving voltage supply circuit.

上記差動増幅器において、少なくとも接地スタブを1つ含み、接地スタブ、開放スタブおよび接地キャパシタを複数個並列に接続し、前記周波数において入力インピーダンスが最大となる回路を前記2つの電界効果トランジスタのソース端子に接続したことを特徴とする。   In the differential amplifier, at least one ground stub is included, a plurality of ground stubs, open stubs, and ground capacitors are connected in parallel, and a circuit having the maximum input impedance at the frequency is a source terminal of the two field effect transistors. It is characterized by being connected to.

上記差動増幅器において、前記電界効果トランジスタをバイポーラトランジスタに置き換え、ゲート端子をベース端子に、ドレイン端子をコレクタ端子に、ソース端子をエミッタ端子に、それぞれ置き換えたことを特徴とする。   In the differential amplifier, the field effect transistor is replaced with a bipolar transistor, the gate terminal is replaced with a base terminal, the drain terminal is replaced with a collector terminal, and the source terminal is replaced with an emitter terminal.

本発明によれば、差動増幅器の電流源として、差動増幅する周波数の4分の1波長に相当する長さの伝送線路による接地スタブを用いることにより、高周波帯においても良好な差動増幅動作が期待できる差動増幅器を提供することができる。   According to the present invention, by using a ground stub with a transmission line having a length corresponding to a quarter wavelength of the differential amplification frequency as a current source of the differential amplifier, good differential amplification even in a high frequency band. A differential amplifier that can be expected to operate can be provided.

第1の実施の形態における差動増幅器の構成を示す機能ブロック図である。It is a functional block diagram which shows the structure of the differential amplifier in 1st Embodiment. 上記差動増幅器の入力側整合回路の回路構成例を示す図である。It is a figure which shows the circuit structural example of the input side matching circuit of the said differential amplifier. 上記差動増幅器の出力側整合回路の回路構成例を示す図である。It is a figure which shows the circuit structural example of the output side matching circuit of the said differential amplifier. 上記差動増幅器の接地スタブの入力インピーダンスを示したスミスチャートである。It is a Smith chart which showed the input impedance of the ground stub of the differential amplifier. 第2の実施の形態における差動増幅器の構成を示す機能ブロック図である。It is a functional block diagram which shows the structure of the differential amplifier in 2nd Embodiment. 従来の差動増幅器の回路構成例を示す図である。It is a figure which shows the circuit structural example of the conventional differential amplifier. 従来の差動増幅器で用いられる電流源を実現する回路の一例を示す図である。It is a figure which shows an example of the circuit which implement | achieves the current source used with the conventional differential amplifier. 電界効果トランジスタの等価回路を示す図である。It is a figure which shows the equivalent circuit of a field effect transistor.

[第1の実施の形態]
図1は、第1の実施の形態における差動増幅器の構成を示す機能ブロック図である。
[First Embodiment]
FIG. 1 is a functional block diagram showing the configuration of the differential amplifier according to the first embodiment.

図1に示す差動増幅器は、互いに逆相の2つの高周波信号を入力して差分を増幅して出力する増幅器であり、2つの電界効果トランジスタTR1,TR2と、電界効果トランジスタTR1,TR2の各ゲート端子に接続した入力側整合回路10A,10Bと、電界効果トランジスタTR1,TR2の各ドレイン端子に接続した出力側整合回路20A,20Bと、電界効果トランジスタTR1,TR2のソース端子に接続した接地スタブ30を有する。   The differential amplifier shown in FIG. 1 is an amplifier that inputs two high-frequency signals having opposite phases and amplifies and outputs a difference. Each of the two field effect transistors TR1 and TR2 and each of the field effect transistors TR1 and TR2 Input-side matching circuits 10A and 10B connected to the gate terminals, output-side matching circuits 20A and 20B connected to the drain terminals of the field effect transistors TR1 and TR2, and ground stubs connected to the source terminals of the field effect transistors TR1 and TR2. 30.

入力側整合回路10A,10Bは、電界効果トランジスタTR1,TR2の各ゲート端子と入力端子との間のインピーダンスを動作周波数近傍において整合させる。また、入力側整合回路10A,10Bは、電界効果トランジスタTR1,TR2の各ゲート端子に適切な制御電圧を与えるための電圧回路も含有している。図2に、入力側整合回路10A,10Bの回路構成例を示す。同図に示す入力側整合回路10A,10Bは伝送線路からなる分布定数回路であり、伝送線路がその長さによって誘導性、容量性の特性を持つことを利用している。なお、入力側整合回路10A,10Bは、抵抗などを用いた整合回路でもよい。また、トランジスタに制御電圧を印加することが不要な場合は、入力側整合回路10A,10Bに電圧回路を含まなくてもよい。   Input-side matching circuits 10A and 10B match the impedances between the gate terminals and input terminals of field effect transistors TR1 and TR2 in the vicinity of the operating frequency. The input side matching circuits 10A and 10B also include a voltage circuit for applying an appropriate control voltage to each gate terminal of the field effect transistors TR1 and TR2. FIG. 2 shows a circuit configuration example of the input side matching circuits 10A and 10B. Input side matching circuits 10A and 10B shown in the figure are distributed constant circuits composed of transmission lines, and utilize that the transmission lines have inductive and capacitive characteristics depending on their lengths. The input side matching circuits 10A and 10B may be matching circuits using resistors or the like. Further, when it is not necessary to apply a control voltage to the transistor, the input side matching circuits 10A and 10B may not include a voltage circuit.

出力側整合回路20A,20Bは、電界効果トランジスタTR1,TR2の各ドレイン端子と出力端子との間のインピーダンスを動作周波数近傍において整合させる。また、出力側整合回路20A,20Bは、電界効果トランジスタTR1,TR2の各ドレイン端子に適切な駆動電圧を与えるための電圧回路も含有している。図3に、出力側整合回路20A,20Bの回路構成例を示す。同図に示す出力側整合回路20A,20Bは伝送線路からなる分布定数回路である。なお、出力側整合回路20A,20Bは、抵抗などを用いた整合回路でもよい。   The output side matching circuits 20A and 20B match impedances between the drain terminals and the output terminals of the field effect transistors TR1 and TR2 in the vicinity of the operating frequency. The output side matching circuits 20A and 20B also include voltage circuits for applying appropriate drive voltages to the drain terminals of the field effect transistors TR1 and TR2. FIG. 3 shows a circuit configuration example of the output side matching circuits 20A and 20B. The output side matching circuits 20A and 20B shown in the figure are distributed constant circuits made of transmission lines. The output side matching circuits 20A and 20B may be matching circuits using resistors or the like.

接地スタブ30は、差動増幅する周波数の4分の1波長に相当する長さの伝送線路であり、動作周波数近傍において共振器として高インピーダンスの負荷として動作する。   The ground stub 30 is a transmission line having a length corresponding to a quarter wavelength of the frequency to be differentially amplified, and operates as a high impedance load as a resonator in the vicinity of the operating frequency.

次に、本実施の形態における接地スタブの動作について説明する。   Next, the operation of the ground stub in the present embodiment will be described.

差動増幅器のトランジスタTR1,TR2のソース端子は、入力インピーダンスが無限大に見える電流源に接続されることが理想である。接地スタブ30が持つインピーダンスZは次式(1)で表現できる。

Figure 2015023390
Ideally, the source terminals of the transistors TR1 and TR2 of the differential amplifier are connected to a current source whose input impedance looks infinite. The impedance Z of the ground stub 30 can be expressed by the following equation (1).
Figure 2015023390

ここで、jは複素単位、Z0は接地スタブ30を構成する伝送線路の特性インピーダンス、λは差動増幅器の増幅周波数における波長、Lはスタブ長である。簡単のため、接地スタブ30を構成する伝送線路は無損失だとしている。 Here, j is a complex unit, Z 0 is the characteristic impedance of the transmission line constituting the ground stub 30, λ is the wavelength at the amplification frequency of the differential amplifier, and L is the stub length. For simplicity, the transmission line constituting the ground stub 30 is assumed to be lossless.

式(1)より、Lを使用周波数帯の4分の1波長となるλ/4にするとZは無限大となり、十分に高い入力インピーダンスを得ることができる。すなわち、接地スタブ30は、λの波長をもつ周波数において電流源と同じ動作を行うことになる。実際上は、接地スタブ30を構成する伝送線路が無損失ということはなく、インピーダンスには抵抗成分が含まれる。しかしながら、伝送線路の抵抗成分は、電界効果トランジスタを用いて構成した電流源の等価回路における寄生抵抗Rg,Rd,Rs,Rdsと比較して十分小さく、十分に高いインピーダンスを得るという動作を損なうことはない。   From equation (1), when L is λ / 4, which is a quarter wavelength of the used frequency band, Z becomes infinite, and a sufficiently high input impedance can be obtained. That is, the ground stub 30 performs the same operation as the current source at a frequency having a wavelength of λ. Actually, the transmission line constituting the ground stub 30 is not lossless, and the impedance includes a resistance component. However, the resistance component of the transmission line is sufficiently smaller than the parasitic resistances Rg, Rd, Rs, Rds in the equivalent circuit of the current source configured using the field effect transistor, and the operation of obtaining a sufficiently high impedance is impaired. There is no.

図4は、式(1)を用いて計算した接地スタブの入力インピーダンスを示したスミスチャートである。同図に示すように、波長λをもつ周波数f0を中心に±5%の周波数帯域において、特性インピーダンスZ0の10倍以上の入力インピーダンスが得られ、接地スタブが周波数f0の±5%程度の範囲で電流源と同様の振る舞いをすることがわかる。 FIG. 4 is a Smith chart showing the input impedance of the ground stub calculated using Equation (1). As shown in the figure, an input impedance more than 10 times the characteristic impedance Z 0 is obtained in a frequency band of ± 5% centered on the frequency f0 having the wavelength λ, and the ground stub is about ± 5% of the frequency f0. It can be seen that the range behaves like a current source.

以上説明したように、本実施の形態によれば、2つの電界効果トランジスタTR1,TR2で構成した差動増幅器の電流源として、入力する差動信号の周波数の4分の1波長に相当する長さの伝送線路による接地スタブを用いることにより、100GHz超の高周波数帯においても良好な差動増幅動作が期待できる。また、接地スタブ30を構成する伝送線路が持つ抵抗成分は一般的にトランジスタの寄生抵抗よりも小さいので、電流源としてトランジスタを用いる場合に比べて、より高い利得を得ることができる。これらの特徴により、本実施の形態における差動増幅器は、従来技術よりも高い位相精度の差動信号を発生可能となり、また利得を大きく取ることができるという利点がある。   As described above, according to the present embodiment, the current source of the differential amplifier composed of the two field effect transistors TR1 and TR2 has a length corresponding to a quarter wavelength of the frequency of the input differential signal. By using a ground stub by the transmission line, a good differential amplification operation can be expected even in a high frequency band exceeding 100 GHz. Further, since the resistance component of the transmission line constituting the ground stub 30 is generally smaller than the parasitic resistance of the transistor, a higher gain can be obtained as compared with the case where the transistor is used as a current source. With these features, the differential amplifier in the present embodiment has an advantage that it can generate a differential signal with higher phase accuracy than the prior art and can have a large gain.

[第2の実施の形態]
図5は、第2の実施の形態における差動増幅器の構成を示す機能ブロック図である。第2の実施の形態における差動増幅器では、第1の実施の形態の接地スタブ30の代わりに、電界効果トランジスタTR1,TR2のソース端子に、少なくとも1つの接地スタブを含む、複数の接地スタブ30A,30B、開放スタブ31A、および接地キャパシタ32Aを並列に接続した回路を接続した。図5では、開放スタブ31A、接地キャパシタ32Aをそれぞれ1つのみ図示しているが、いずれも2つ以上存在してもよいし、存在しなくてもよい。
[Second Embodiment]
FIG. 5 is a functional block diagram showing the configuration of the differential amplifier according to the second embodiment. In the differential amplifier according to the second embodiment, a plurality of ground stubs 30A including at least one ground stub at the source terminals of the field effect transistors TR1 and TR2 instead of the ground stub 30 according to the first embodiment. , 30B, an open stub 31A, and a grounded capacitor 32A are connected in parallel. In FIG. 5, only one open stub 31A and one grounded capacitor 32A are shown, but two or more of them may or may not exist.

接地スタブ30A,30Bの入力インピーダンスは式(1)のとおりであり、開放スタブ31Aと接地キャパシタ32Aの入力インピーダンスはそれぞれ式(2),(3)で表される。

Figure 2015023390
The input impedances of the ground stubs 30A and 30B are as shown in Expression (1), and the input impedances of the open stub 31A and the ground capacitor 32A are expressed as Expressions (2) and (3), respectively.
Figure 2015023390

ここで、ωは角周波数、Cは接地キャパシタの容量である。   Here, ω is the angular frequency, and C is the capacitance of the grounding capacitor.

式(1),(2),(3)で表されるインピーダンスを合成した入力インピーダンスが、波長λの周波数において無限大となるようにスタブの長さLや容量Cを調整する。このように設計した回路は、第1の実施の形態の接地スタブよりも周波数に対するインピーダンスの変化が早くなり、周波数の選択性が高まる。また、所定の周波数のみ差動増幅を行う差動増幅器を提供できる。   The stub length L and the capacitance C are adjusted so that the input impedance obtained by synthesizing the impedances represented by the equations (1), (2), and (3) becomes infinite at the frequency λ. In the circuit designed in this way, the impedance change with respect to the frequency is faster than the ground stub of the first embodiment, and the frequency selectivity is increased. In addition, a differential amplifier that performs differential amplification only at a predetermined frequency can be provided.

なお、第1、第2の実施の形態では電界効果トランジスタを用いたが、電界効果トランジスタをバイポーラトランジスタに置き換え、ゲート端子をベース端子に、ドレイン端子をコレクタ端子に、ソース端子をエミッタ端子に、それぞれ置き換えて差動増幅器を構成してもよい。   In the first and second embodiments, the field effect transistor is used. However, the field effect transistor is replaced with a bipolar transistor, the gate terminal is a base terminal, the drain terminal is a collector terminal, the source terminal is an emitter terminal, A differential amplifier may be configured by replacing them.

TR1,TR2,TR3…電界効果トランジスタ
10A,10B…入力側整合回路
20A,20B…出力側整合回路
30,30A,30B…接地スタブ
31A…開放スタブ
32A…接地キャパシタ
TR1, TR2, TR3 ... Field effect transistors 10A, 10B ... Input side matching circuit 20A, 20B ... Output side matching circuit 30, 30A, 30B ... Ground stub 31A ... Open stub 32A ... Ground capacitor

Claims (5)

2つの電界効果トランジスタと、
前記電界効果トランジスタそれぞれのゲート端子に接続され、波長λの周波数の差動信号が入力される2つの入力端子と、
駆動電圧が供給される前記電界効果トランジスタそれぞれのドレイン端子に接続される2つの出力端子と、
前記2つの電界効果トランジスタのソース端子に接続される、前記波長λの4分の1波長に相当する長さの伝送線路で構成された接地スタブと、
を有することを特徴とする差動増幅器。
Two field effect transistors;
Two input terminals connected to the gate terminals of each of the field effect transistors, to which a differential signal having a frequency of wavelength λ is input;
Two output terminals connected to the drain terminals of each of the field effect transistors to which a drive voltage is supplied;
A ground stub composed of a transmission line having a length corresponding to a quarter wavelength of the wavelength λ connected to the source terminals of the two field effect transistors;
A differential amplifier comprising:
前記ゲート端子と前記入力端子との間に、前記ゲート端子と前記入力端子との間のインピーダンスを前記周波数の近傍において整合させる整合回路と、前記ゲート端子に制御電圧を供給する制御電圧供給回路とを有する入力信号整合回路を備えたことを特徴とする請求項1記載の差動増幅器。   A matching circuit for matching an impedance between the gate terminal and the input terminal in the vicinity of the frequency between the gate terminal and the input terminal; and a control voltage supply circuit for supplying a control voltage to the gate terminal; The differential amplifier according to claim 1, further comprising an input signal matching circuit including: 前記ドレイン端子と前記出力端子との間に、前記ドレイン端子と前記出力端子との間のインピーダンスを前記周波数の近傍において整合させる整合回路と、前記ドレイン端子に駆動電圧を供給する駆動電圧供給回路とを有する出力信号整合回路を備えたことを特徴とする請求項1又は2記載の差動増幅器。   A matching circuit for matching an impedance between the drain terminal and the output terminal in the vicinity of the frequency between the drain terminal and the output terminal; and a drive voltage supply circuit for supplying a drive voltage to the drain terminal; The differential amplifier according to claim 1, further comprising an output signal matching circuit including: 少なくとも接地スタブを1つ含み、接地スタブ、開放スタブおよび接地キャパシタを複数個並列に接続し、前記周波数において入力インピーダンスが最大となる回路を前記2つの電界効果トランジスタのソース端子に接続したことを特徴とする請求項1乃至3のいずれかに記載の差動増幅器。   A structure including at least one ground stub, a plurality of ground stubs, open stubs, and ground capacitors connected in parallel, and a circuit having the maximum input impedance at the frequency connected to the source terminals of the two field effect transistors. The differential amplifier according to claim 1. 前記電界効果トランジスタをバイポーラトランジスタに置き換え、ゲート端子をベース端子に、ドレイン端子をコレクタ端子に、ソース端子をエミッタ端子に、それぞれ置き換えたことを特徴とする請求項1乃至4のいずれかに記載の差動増幅器。   5. The field effect transistor according to claim 1, wherein the field effect transistor is replaced with a bipolar transistor, a gate terminal is replaced with a base terminal, a drain terminal is replaced with a collector terminal, and a source terminal is replaced with an emitter terminal. Differential amplifier.
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