JP2015017832A - Current detection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current detection device with a resistor that enables a parasitic inductance of the resistor to be adjusted according to a circuit constant of a low-pass filter.SOLUTION: The current detection device consists of: a resistor 13 including a resistance body 11 and electrodes 12; and a base material 16 provided with a pair of detection wiring patterns 15 for picking up a voltage from the resistor. The current detection device enables a parasitic inductance of the resistor to be adjusted by removing a part of the detection wiring patterns. By removing a part of the detection wiring patterns by trimming, a parasitic inductance Le formed by the resistor and the detection wiring patterns can be adjusted according to a circuit constant of a low-pass filter 21. Thus, a magnitude of the parasitic inductance can be matched with the circuit constant of the low-pass filter, thereby an error voltage can be adjusted to zero by the low-pass filter, and a correct current detection can be realized by eliminating the error voltage even when a detection target current includes a high frequency component.

Description

  In the present invention, a current to be monitored is passed through a shunt resistor (a resistor having a low resistance value of several mΩ or less), a voltage generated between electrodes at both ends of the resistor is measured, and a current is detected from a known resistance value. The present invention relates to a current detecting device.

  When the current detection device is used to detect a current including a high-frequency component flowing through the resistor, a slight parasitic inductance of the resistor causes a large error in the detection value. In order to prevent this, a wiring structure has been proposed in which the parasitic inductance existing in the surface mount type resistor can be adjusted to zero (see Patent Document 1). However, in particular, a resistor for large current use is generally large in size, and it may be difficult to apply the above wiring structure because it cannot be surface-mounted on the voltage detection circuit board.

  Thus, a current detection device has been proposed that can eliminate an error voltage based on the parasitic inductance of a resistor by providing a low-pass filter (see Patent Document 2). However, the parasitic inductance of the resistor is theoretically difficult to calculate, depends on the wiring structure, and cannot be eliminated by the filter, resulting in an error voltage. In addition, since the circuit constant of the low-pass filter is determined by the value of the resistor and capacitor, it can be set with high precision using a high-precision fixed resistor and fixed capacitor. However, the parasitic resistance of the resistor can be set using a variable resistor or variable capacitor. It is difficult to adjust flexibly according to the inductance.

JP 2003-121481 A International Publication WO2013 / 15219

  The present invention has been made based on the above-described circumstances, and an object thereof is to provide a current detection device that can adjust the parasitic inductance of a resistor in accordance with the circuit constant of a low-pass filter.

  A current detection device of the present invention comprises a resistor having a resistor and an electrode, and a base material on which a pair of detection wiring patterns for taking out a voltage from the resistor is formed, and a part of the detection wiring pattern The parasitic inductance of the resistor can be adjusted by removing.

  According to the present invention, a base material on which a pair of detection wiring patterns for extracting a voltage from a resistor is provided, and a part of the detection wiring pattern is removed by trimming to match the circuit constant of the low-pass filter. The parasitic inductance formed by the resistor and the voltage detection wiring can be adjusted. As a result, the parasitic inductance can be adjusted to the circuit constant of the low-pass filter, the error voltage can be adjusted to zero by the low-pass filter, and even if the detection target current contains high-frequency components, the error voltage is eliminated and accurate current detection is performed. Is possible.

1 is a circuit diagram of a current detection device according to a first embodiment of the present invention. It is a figure which shows the example of a pattern of the detection wiring pattern of 1st Example. 6 is a waveform diagram of current and voltage for the trimming method 1. FIG. 6 is a waveform diagram of current and voltage for trimming method 2. FIG. FIG. 6 is a voltage waveform diagram for the trimming method 3; It is the perspective view which enclosed the base material provided with the resistor and the detection wiring pattern in the exterior member. It is a figure which shows the example of a pattern of the detection wiring pattern of 2nd Example. It is a perspective view of the base-material part provided with the detection wiring pattern of 2nd Example. It is a wave form diagram about the trimming method of 2nd Example. It is a perspective view of the electric current detection apparatus of 3rd Example of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 10. In addition, in each figure, the same code | symbol is attached | subjected and demonstrated to the same or equivalent member or element.

  FIG. 1 shows a current detection apparatus according to a first embodiment of the present invention. This current detection device includes a resistor 13 having a resistor 11 and an electrode 12, a base material 16 on which a pair of detection wiring patterns 15 for taking out a voltage from the resistor are formed, and a detection voltage from the resistor 13. Is provided with a signal processing unit 20 on which a microcomputer or the like is processed. A low-pass filter 21 is disposed at the input portion to the signal processing unit 20, and the outputs of the pair of detection wiring patterns 15 are connected to the choke coil 22 via the connection line 18 and further connected to the input of the low-pass filter 21. .

  When a current containing a high-frequency component is passed through the resistor 13, an error voltage proportional to the self-inductance of the resistor is superimposed on a voltage proportional to the resistance value at both ends of the resistor 11, particularly when the resistance value is low. It cannot be ignored. Since an error voltage proportional to the mutual inductance is generated in the detection wiring pattern 15 surrounding the area S and the direction is opposite to the error voltage proportional to the self-inductance, the difference is low-pass filter 21 via the connection line 18. Is input. In the low-pass filter 21, when the circuit constant composed of C and r satisfies a certain requirement described later, the error voltage is eliminated and only the voltage proportional to the resistance value is output to the signal processing unit 20.

  In this current detection device, a loop having an area S surrounded by the pair of detection wiring patterns 15 and the resistor 11 generates a parasitic inductance Le of the resistor 13. Here, the parasitic inductance of the resistor means an effective inductance that distorts the current detection waveform, and “detection voltage = resistor resistance value R × current I + effective inductance L × dI / dt”. The inductance L × dI / dt distorts the detected voltage waveform. Therefore, the parasitic inductance Le indicates an effective inductance L that distorts this waveform.

  When the resistance value of the resistor is R, the parasitic inductance Le is connected in series with this R on the equivalent circuit. In such a system, in order to obtain an I × R potential difference based only on the resistance value R in which the voltage based on the parasitic inductance Le is canceled between both ends of the capacitor C that is the output of the filter 21, Le / R = C · What is necessary is just to provide the filter 21 used as r. However, the impedance when the detection wiring pattern side is viewed from the filter side must be sufficiently smaller than the impedance when the detection wiring pattern side is viewed from the filter side. Note that the common mode choke coil 22 in front of the filter 21 is not important in this case, and is therefore short-circuited.

  In obtaining a detection voltage waveform proportional to the current I, in order to eliminate an error voltage due to the parasitic inductance Le, when C and r of the filter 21 are configured with a fixed capacitor and a fixed resistance, C and r are determined in advance. Therefore, the error voltage based on the parasitic inductance Le cannot be excluded unless the parasitic inductance Le is accurately a value of Le = C · r · R.

  However, it is difficult to theoretically accurately calculate the parasitic inductance Le. Therefore, in the present invention, the parasitic inductance Le of the resistor is adjusted (trimmed) by the structure of the detection wiring pattern shown in FIG. That is, by removing a part of the detection wiring pattern, the area S surrounded by the detection wiring pattern is changed, and the error voltage can be eliminated by finely adjusting the parasitic inductance Le. Le = C · r · R It is possible to create a parasitic inductance Le having the following relationship.

  This current detection device includes a resistor 13 and a substrate 16 on which a detection wiring pattern 15 is formed. The resistor 13 includes a low-resistance resistor 11 made of a Cu—Ni-based material and the like, and an electrode 12 made of Cu or the like connected and fixed to both ends of the resistor. Further, voltage terminals 15a are provided on both sides of the resistor. As the substrate 16, a glass epoxy substrate or the like is used. A detection wiring pattern 15 made of copper foil or the like is formed on one surface of the substrate. The voltage terminal 15a is welded to one end portion of the detection wiring pattern, and the connection line 18 is welded to the other end. A stranded wire or a shielded wire is used for the connecting wire 18.

  Since the area S surrounded by the detection wiring pattern 15 generates the parasitic inductance Le, the parasitic inductance Le can be increased (finely adjusted) by removing a part of the inner side of the detection wiring pattern and increasing the area S. it can. As a removing method, laser, leuter, sandblast, etc. can be used. As a method of removal, as shown in FIG. 2, a method in which a window portion W is formed in the detection wiring pattern 15 in advance and the outer peripheral portion of the window portion is removed (cut portion A), along the outer periphery of the area S. A method of expanding the area S (cut portion B), a method of forming a cut groove in the width direction of the detection pattern (cut portion C), or the like can be employed.

  As a specific trimming method, a sawtooth wave current as shown in FIG. Then, a sawtooth voltage having a peak ΔV as shown in FIG. 3B is generated at both ends of the capacitor C which is the output of the filter 21. This level difference ΔV is a residual voltage generated because the voltage ΔV = Le × dI / dt generated by the parasitic inductance cannot be compensated by the filter 21.

  Therefore, as shown in FIG. 3C, the window pattern cut A and the notch trimming are performed so that the step ΔV is zero, that is, the filter output voltage waveform is similar to the waveform of the applied current I. B and C are performed, the area S inside the detection wiring pattern 15 is enlarged, and the parasitic inductance Le is increased. In this case, since the parasitic inductance Le can only be adjusted in the increasing direction, the detection wiring pattern is formed so that the voltage waveform before trimming is undercorrected, or the filter 21 is set so as to be undercorrected. It is necessary to select circuit constants C and r.

  4A to 4C show other trimming methods. When the filter 21 cannot be prepared for trimming the parasitic inductance Le, when the sawtooth wave current I is energized, the step ΔV of the voltage waveform appearing between the output terminals is adjusted to a constant target value ΔV ′ to obtain a desired value. A parasitic inductance Le can be obtained.

That is, when the inclined sawtooth wave current I shown in FIG. 4A is applied to the resistor 13, the step ΔV of the voltage waveform shown in FIG. expressed.
ΔV = Le · (Ir / Tr + If / Tf)
Therefore, “Ir / Tr” and “If / Tf” are inputted with a known sawtooth wave, and the step ΔV of the output voltage V between the output terminals is a desired parasitic assumed by the low-pass filter 21 shown in FIG. Trimming may be performed so that the target level difference ΔV ′ obtained with the inductance Le is obtained.

  Trimming of the parasitic inductance Le using the above-described filter 21 (trimming method 1) and a method of trimming the parasitic inductance Le so as to obtain the step ΔV ′ assumed by the filter 21 without using the filter 21 (trimming method) 2) may be used in combination.

  That is, the voltage shown in FIG. 5 that appears at both ends of the capacitor C of the filter 21 when the resistor 13 is supplied with the sawtooth wave current I whose “Ir / Tr” and “If / Tf” are known in the trimming method 2. It is only necessary to adjust the waveform step ΔV. In this case, the parasitic inductance Le of the adjusted resistor is the parasitic inductance Le (= C · r · R) corrected by the filter and the parasitic inductance Le (= ΔV / (Ir / Tr + If / Tf) that causes the step ΔV to appear. )) Sum. This trimming method 3 is effective when it is desired to trim a relatively large parasitic inductance Le accurately.

  FIG. 6 shows an example in which a base material provided with a resistor and a detection wiring pattern is enclosed in an exterior member. The resistor 13 and the substrate 16 on which the detection wiring pattern 15 is mounted may be enclosed in a case such as ceramic or resin, or an exterior member 25 formed by resin molding. The electrode 12 is exposed, and a flat portion may be provided so that it can be connected to a bus bar or the like, and a cylindrical electrode may be a prismatic electrode so that it can be surface-mounted.

  FIGS. 7A and 7B show pattern examples of the detection wiring pattern of the second embodiment, and FIG. 8 shows a configuration example of a main part of a current detection device in which a resistor is connected to the detection wiring pattern. 7A shows the wiring pattern 15 on the front side of the substrate, FIG. 7B shows the wiring pattern 15 on the back side of the substrate, and the wiring pattern 15 on the front side of the substrate and the wiring pattern 15 on the back side of the substrate are via D and via E, respectively. And the detection wiring pattern 15 is formed in an 8-letter shape extending over the front and back surfaces of the substrate. Therefore, a loop having an area S2 is formed on the front side of the substrate, and a loop having an area S1 is formed on the back side of the substrate by being connected to a resistor, each having a trimming window W. Other configurations including the filter 21 and the like are the same as those of the first embodiment shown in FIGS.

  The point that the parasitic inductance Le of the resistor 13 is adjusted by trimming the detection wiring pattern 15 and the error voltage is made zero by the low-pass filter 21 is the same as in the above embodiment. That is, in order to increase the area S1 and / or the area S2, a part of the inner part of the detection wiring pattern on the front side of the substrate and / or the inner part of the detection wiring pattern on the rear side of the board is removed by trimming.

  The parasitic inductance Le is increased (adjusted) by enlarging (adjusting) one or both of the area S1 constituting the first loop and the area S2 constituting the second loop, and the circuit constant of the filter 21 As in the first embodiment, the error voltage based on the parasitic inductance Le can be made substantially zero at the output end.

  In the above-described embodiment, the example in which the error voltage is removed by increasing the area of the detection wiring pattern and increasing the parasitic inductance Le to match the circuit constant of the low-pass filter 21 has been described. However, during actual trimming, depending on the circuit constants of the filter 21, as shown in FIG. 9C, the parasitic inductance Le may be too large before trimming, resulting in overcompensation.

  In such a case, the area of the detection wiring patterns S1 and S2 is reduced by adding a conductive material, the parasitic inductance Le is reduced, and the error voltage is removed by matching with the circuit constant of the low-pass filter 21. Can do. The conductive material can be added, for example, by adding a pattern with a conductive resin or the like using an ink jet or a dispenser.

  FIGS. 10A and 10B show a configuration example of the current detection device according to the third embodiment of the present invention. When the resistor 13 is mounted on the main current path 31 a on the front surface of the wiring board 30 for current detection, the main current path is bent at a substantially right angle and routed to the back surface of the board 30. That is, on the back surface of the substrate 30, the main current path 31b is arranged in parallel to the main current path 31a on the substrate surface at least around the mounting portion of the resistor 13. Thereby, the mounting portion of the resistor 13 is bent at a substantially right angle with respect to the main current path, and a pattern for turning back the main current path is formed. In the structure in which the main current path is folded, the upper and lower main current paths may be made conductive by the vias 31c, and the upper and lower main current paths may be made conductive by using the connection portion 31d on the end face of the wiring board 30.

  A base material 16 on which a pair of detection wiring patterns for extracting a voltage from the resistor is formed is fixed to the resistor 13, and an output of the detection wiring pattern is passed through a connection line 18 and a low-pass filter 21 and a signal processing unit 20. It is the same as that of the said Example that it is connected to.

  By adopting such a pattern structure that folds the main current path, the magnetic flux generated in the main current path on the front surface of the board including the mounted resistor and the magnetic flux generated in the main current path on the back surface of the board as a feedback path are offset. . For this reason, even in the measurement of a current containing a high frequency component, it becomes possible to take out the detection voltage of the resistor 13 more stably.

  Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.

  The present invention can be suitably used for measuring a current including a high-frequency component using a low-resistance resistor.

Claims (3)

A resistor comprising a resistor and an electrode;
A substrate on which a pair of detection wiring patterns for taking out a voltage from the resistor is formed;
A current detection device characterized in that a parasitic inductance of the resistor can be adjusted by removing a part of the detection wiring pattern.   The current detection device according to claim 1, wherein an inner side of the pair of detection wiring patterns is removed.   The current detection device according to claim 1, wherein the pair of detection wiring patterns are formed over a front surface and a back surface of the base material.

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