JP2015015834A - Dc/dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that a DC/DC converter is designed to maximize efficiency in a maximum load from a thermal viewpoint generally but in such a case, equipment where loads are significantly different between a standby state and an active state, efficiency may be reduced in the standby state (under light load) and since energy saving is promoted in the recent years and it is necessary to reduce power consumption during the standby state, a power supply circuit with high efficiency even under light load is required.SOLUTION: An operation mode of a power source is separated into an efficiency-preferential low frequency oscillation mode and an accuracy-preferential high frequency oscillation mode between light load and heavy load. Specifically, a plurality of choke coils of a discontinuous DC/DC converter are connected in series and at least one of them is bypassed by a switch element, thereby changing an oscillation frequency. In such a case, in order to switch the number of serial coils, the switch element is turned on and off synchronously with turn-on of a main switching element of the DC/DC converter.

Description

  The present invention relates to a switching power supply device mounted on a device having several operation modes with greatly different power consumption, such as standby and operation.

  In particular, the non-insulated / non-continuous DC / DC converter is intended to enable transition when the operation mode of the power supply circuit is changed at light load or heavy load.

  DC / DC converters are employed from the viewpoint of power conversion efficiency for the power source of equipment having a somewhat heavy load, and they are usually designed to be most efficient at the maximum load from a thermal viewpoint. However, depending on the device, the weight of the load may be greatly different between the operation time and the standby time. With the DCDC converter as described above, the efficiency is significantly lowered during the standby time when the load is light. In particular, in recent years, energy saving of devices has progressed, and the need to reduce power consumption during standby has increased. Therefore, an efficient circuit is required even at light loads. One possible measure is to divide the power supply operating mode at maximum load and light load.

  Specifically, the operation mode is to intermittently oscillate at a light load or to lower the oscillation frequency. For example, Patent Document 1 discloses a method of changing the number of choke coils of a DCDC converter according to a load. Since the oscillation frequency changes when the number of choke coils is changed, the efficiency can be increased by lowering the frequency at light load.

  However, Patent Document 1 is an invention for solving the problem that the output voltage ripple decreases due to the continuous DCDC converter shifting to a discontinuous operation at a light load. In other words, the circuit cannot be applied to the DCDC converter that performs the above-described process, and the circuit is complicated due to the structure that automatically switches the number of coils according to the load.

JP 2006-109559 A JP 2005-224072 A

  In addition, there are many devices that require high-accuracy voltage during operation, such as a laser beam printer, but do not require much accuracy during standby, so it is not always necessary to suppress ripple at light loads. Therefore, it is possible to take measures to give priority to efficiency by allowing a drop in ripple at light loads.

  In view of the above, an object of the present invention is to provide an efficient power supply for both heavy load and light load with a simple circuit. In that case, it illustrates based on the non-continuous type DCDC converter of patent document 2.

  The continuous type is a DCDC converter that turns on the main switch again while a current is flowing through the choke coil. The non-continuous type is a DCDC converter that waits for the regenerative current to flow through the choke coil and then turns the main switch on again. This is a DC-DC converter that is turned on.

  In order to achieve the above object, the invention according to claim 1 comprises at least two choke coils connected in series and a switch connected in parallel to the choke coil, wherein each switch is turned on and off by a DCDC converter. This is a discontinuous DCDC converter that is performed in synchronization with the turn-on of the main switching element.

  According to a second aspect of the present invention, in the DCDC converter according to the first aspect, the switch ON / OFF instruction is given from a device control device of a CPU.

  The invention according to claim 3 is characterized in that each inductance value of the choke coil has a value that is X times or more of the total inductance value with respect to X coils. It is.

  As described above, according to the present invention, the discontinuous DCDC converter can have a mode in which the priority of the efficiency and the output voltage ripple is reversed in accordance with the operation state of the device. In addition, the number of coils can be switched with a simple circuit.

It is explanatory drawing of the 1st Example of this invention. It is a figure explaining basic operation of the DCDC converter of the present invention. It is explanatory drawing of the 1st Example of this invention. It is a 2nd Example of this invention.

[Example 1]
A first embodiment of the present invention is shown in FIG. This embodiment is based on the circuit of Patent Document 2 and has a function of switching choke coils. In FIG. 1, R1 to R13 are resistors, C1 to C3 are capacitors, D1 and D3 are diodes, D2 is a Zener diode, Q1, Q4, and Q5 are bipolar transistors, Q2 is a P-channel MOSFET, Q3 is an N-channel MOSFET, and IC1 is The comparator, IC2D flip-flop, and IC3 are CPUs. The IC 3 knows whether the product is operating or on standby, and outputs a signal Low to the IC 2 when operating, and outputs High when it is on standby.

  First, in order to explain the basic operation of the DCDC converter, it is assumed that the output of IC3 is high, Q3 is off, and L1 and L2 are connected in series.

  First, IC1 compares the reference voltage generated by the voltage division of R5 and R6 with the output reference voltage input via R6. When the output reference voltage falls below the reference voltage, IC1 outputs Low and Q2 is turned on. Then, the current flows through R1, Q2, L1, L2, and C3, and rises linearly due to the effect of the combined inductance of L1 and L2. At this time, a voltage close to Vcc is applied between Q2 and L1, and the reference voltage is pulled up by D2. At the same time, a voltage is generated at both ends of R1 in proportion to the flowing current. When the voltage exceeds Vbe of Q1, Q1 is turned on. When Q1 is turned on, the output reference voltage rises and exceeds the reference voltage, so that IC1 outputs High and Q2 is turned off.

  When Q2 is turned off, L1 and L2 generate back electromotive force, and D1 and D2 are conducted. Then, the reference voltage is lowered to near 0V this time, and the OFF state of Q2 is forcibly maintained. This state continues until the regenerative current flows through L1 and L2. After the regeneration is completed, a current from C3 flows between Q2 and L1, and the reference voltage is restored to return to the initial state. The above operation waveforms are shown in FIG.

  Since the reference voltage is raised while Q2 is ON, the off factor of Q2 is limited only to the current flowing through R1, resulting in a DCDC converter that always operates with the same ON time. Since the ON time is the same, this is dealt with by changing the oscillation frequency depending on the load. Therefore, the output voltage ripple only changes in frequency and does not change depending on the load.

  The above is the basic operation description of the DCDC converter portion, and corresponds to the operation when the product is in the standby mode. The operation when shifting from the standby mode to the operation mode will be described below.

  When the product enters the operation mode, IC3 outputs Low. Although Low is input to the D terminal of the IC2, the input state of the D terminal is reflected on the Q terminal in accordance with the rising edge of the CLK terminal, so that it does not move if only Low is input to the D terminal. On the other hand, the DCDC converter part centering on IC1 continues self-oscillation, and when IC1 switches the output from High to Low at the nearest timing after IC3 outputs Low, the circuit by Q4 is low to high. And input to the CLK terminal of IC2. Then, Low, which is a signal, is output from IC3 to the Q terminal of IC2, Q4 is turned on, Q3 is turned on, and L2 is bypassed. That is, the mode switching instruction from the IC 3 is executed in accordance with the turn-on of the main switching element Q2.

  The reason why the switching is executed in accordance with the turn-on of Q2 is that it is necessary to perform the switching when no current flows through L1 and L2. Since this DCDC converter is a non-continuous type, the fact that the current flowing through L1 and L2 is always zero immediately before the main switching element Q2 is turned on is realized. If Q3 is turned on while current is flowing through L1 and L2, L2 releases the energy stored so far and a large current flows through Q3. In addition, spike-shaped voltage ripple and noise may be generated at the time of switching.

  Note that Q2 is a P-channel MOSFET, and Q3 is an N-channel MOSFET. In general, the N-channel MOSFET has a smaller parasitic capacitance and faster operation than the P-channel MOSFET if the ratings are the same. The L2 bypass is performed first. In this sense, the current path can be switched more reliably when no current flows through L1 and L2.

  As an example, FIG. 3A shows actual values for each resistor / capacitor / coil, and FIG. 3B shows waveforms when the circuit is operated by the circuit. As can be seen from FIG. 3B, after the switching instruction is issued from the IC3, it can be seen that the oscillation frequency is lowered from the next timing when the output of the IC1 becomes Low (timing when the Q2 is turned on). In this case, the output voltage ripple was quadrupled from 0.025 V to 0.1 V by shifting from the high frequency mode to the low frequency mode, but the conversion efficiency was improved by 10%.

  Patent Document 1 is characterized in that n coils are used and the overall inductance value can be arbitrarily varied between 1 and n times. For example, when two coils having the same inductance value are used, the entire inductance value is 1 time compared to the case where only one coil is used by turning on / off a switch connected to one coil. Or it means that it can select between 2 times. However, in the case of the present invention, it is necessary to clearly separate the characteristics of the two modes, so that the inductance value of each coil is weighted as in this embodiment, and the combined inductance value is compared with the case where only one coil is used. It is desirable to set the inductance value of each coil to be twice or more.

[Example 2]
In the second embodiment, it is assumed that the present invention is applied to a product having different power consumption in three stages, such as when the power is turned off, during standby, and during operation. In each of the three stages, the circuit is switched so as to be most efficient in terms of power consumption. A circuit diagram is shown in FIG.

  The parts added from FIG. 2 are L3, D4, Q6, R14, Q7 and IC4. The basic operation is the same as in the first embodiment, and one instruction system from the IC 3 is added and a coil and its ON / OFF circuit are also added. The same CLK signal is used for IC2 and IC4 for determining the switching timing, and which coil is to be bypassed is determined by an instruction from IC3.

  As for switching, both Q3 and Q6 are OFF in the power off mode. In standby mode, only Q6 is ON. During operation, both Q3 and Q6 are ON. In this circuit, if Q3 is turned on while Q6 is turned off, the gate voltage of Q3 may be insufficient and cannot be turned off. Therefore, Q3 must be turned on in a mode after Q6.

L1-3 ... choke coils R1-R13 ... resistors C1-C3 ... capacitors D1, D3, D4 ... diodes D2 ... zener diodes Q1, Q4, Q5, Q7 ... bipolar transistors Q2 P channel MOSFET (main switching element)
Q3, Q6 ... N-channel MOSFET
IC1 ... Comparator IC2 ... D flip-flop IC3 ... CPU (device control device)
IC4 ... D flip-flop

Claims (3)

  At least two choke coils connected in series and at least one switch connected in parallel to the choke coils are provided. Each switch is turned on / off in synchronization with the turn-on of the main switching element of the DCDC converter. A non-continuous DCDC converter characterized by this.   2. The discontinuous DCDC converter according to claim 1, wherein the switch ON / OFF instruction is given from a device control device of a CPU.   Each inductance value of the choke coil has a different value, and the difference between the inductance value of the choke coil having the minimum value and the combined inductance value when all the choke coils are connected in series is a multiple of the number of choke coils. The discontinuous DCDC converter according to claim 1, which is as described above.