JP2015002135A - Light source drive unit and light irradiation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To integrally control a plurality of drive circuits, and independently set a target output power to each of the drive circuits, and achieve the target output power by feedback control.SOLUTION: A light source drive unit comprises: a plurality of drive circuits controlling output power for each of a plurality of light source elements; and an integrated control circuit transmitting to the drive circuits signals prescribing ON transition timing of switching operations of the respective drive circuits, and pieces of target power information. Each of the drive circuits belongs to any one of a plurality of light source drive groups, and the integrated control circuit generates the ON transition timing signals so that any two ON transitions in the light source drive groups are not performed simultaneously. The drive circuit performs ON transition of the switch element according to the ON transition timing signal assigned to itself, and then, decides timing for performing OFF transition of the switch element by feedback control so that a difference between a target power signal and a power correlation signal can be small.

Description

  The present invention, for example, can be used in an optical device such as a light irradiation device for irradiating a surface to be irradiated with visible, ultraviolet, or infrared light with a specified power density distribution. The present invention relates to a light source driving apparatus for lighting a plurality of light source elements such as LEDs and LDs.

  For example, in the ultraviolet wavelength region, discharge lamps using mercury or the like as luminescent materials have been used as light sources for light irradiation devices for curing adhesives, inks, etc., or for decomposing and sterilizing organic substances. I came. However, in the case of a discharge lamp, the circuit configuration of the drive circuit is as complicated as an inverter, and it is difficult to handle because a high voltage is required for starting and lighting, or the heat loss in the lamp is relatively large. Have shortcomings.

  In recent years, solid-state light source elements such as LEDs have attracted attention as alternative light sources that overcome these drawbacks. In particular, in the case of LEDs, the driving circuit for lighting can be basically realized by a DC constant current circuit, so that the circuit configuration is relatively simple compared to that for a discharge lamp and the cost can be easily reduced. There is an advantage. However, when light irradiation is performed with a high power density over a large area, it is necessary to drive a large number of light source elements at the same time, and there are some problems to be solved in order to realize this.

  First, the prior art will be described with reference to FIG. 17, which is a block diagram showing a simplified type of a conventional light source driving device. The light source driving device includes light source driving circuits (P1 ', P2', P3 ', ...) corresponding to each of the light source elements (Y1, Y2, Y3, ...) for lighting. The light source driving circuit (P1 ′, P2 ′, P3 ′,...) Converts the output from the DC power source (Mx) to supply predetermined power to each of the light source elements (Y1, Y2, Y3,...). Converters (Ux1 ′, Ux2 ′, Ux3 ′,...) For

  In order to switch the output from the DC power source (Mx) to either an on state or an off state, the converters (Ux1 ′, Ux2 ′, Ux3 ′,...) Are respectively switch elements using FETs (not shown). The switch element is turned on / off so that the target power based on the target power signals (Ss1 ′, Ss2 ′, Ss3 ′,...) Transmitted from the control circuit (Fx ′) is realized. The ratio of the on-state period to the period, that is, the duty cycle ratio is feedback controlled. The ON transition timing and ON / OFF cycle of the switch element described above are obtained from the oscillators (Osc1, Osc2, Osc3,...) Provided in the light source drive circuits (P1 ′, P2 ′, P3 ′,...), Respectively. Stipulated by the switch timing signals (Ec1 ′, Ec2 ′, Ec3 ′,...).

  However, since the oscillators (Osc1, Osc2, Osc3,...) Operate independently, the switch timing signals (Ec1 ′, Ec2 ′, Ec3 ′,...) Are asynchronous with each other, for example, the light source driving circuit (P1 ′). , P2 ′, P3 ′,...)), The phenomenon in which the on transitions of the two switch elements each overlap is a frequency determined by the frequency difference between the switch timing signals. It occurs periodically, and at this time, a large noise is generated.

  There are various circuit systems for realizing the feedback control described above, and in particular, in the case of a feedback control system based on a current mode that has been widely used in recent years, operation is performed by detecting a peak current flowing in the circuit. However, in order to avoid an increase in loss and deterioration of characteristics, it is necessary to use a current detection resistor with a small value. Therefore, the current detection signal must be weak, especially when multiple switching converters are operated in parallel. In this case, there is a drawback that the current waveform is likely to be disturbed due to mutual interference of the switching noise. Therefore, due to the noise generated when the ON transitions of the two switching elements overlap. This causes power control disturbance. As described above, this disturbance is generated in a beat manner due to the frequency difference between the two switch timing signals.

  This state is as shown in FIG. 18, which is a conceptual diagram showing a simplified operation of a part of a conventional light source driving device. In FIG. 18, a is the current waveform of the light source element (Y1), b is the current waveform of the light source element (Y2), and c is the current waveform of the light source element (Y3). This is drawn by removing the ripples). Since the frequency difference inevitably occurs no matter how accurately the oscillation frequencies of the oscillators (Osc1, Osc2, Osc3,...) Are matched, as long as the oscillators (Osc1, Osc2, Osc3,...) Are independent. The phenomenon that the disturbance of power control described above occurs in a beat manner is unavoidable, and there is a problem that stable power control is difficult.

  In order to solve the above-described problem, instead of independently providing the oscillators (Osc1, Osc2, Osc3,...) In each of the light source driving circuits (P1 ′, P2 ′, P3 ′,. It is conceivable to operate all converters based on this. As a means for realizing this, a description will be given with reference to FIG. 19, which is a block diagram showing a simplified type of light source driving apparatus improved over the prior art. The control circuit (Fx ′) generates switch timing signals (Ec ′) necessary for the operations of the converters (Ux1 ′, Ux2 ′, Ux3 ′,...), And the light source driving circuits (P1 ′, P2 ′, P3 ′). ,...), The above-described multiple cases of the case where the ON transitions of the two switch elements overlap and the case where they do not overlap do not occur. The phenomenon that occurs automatically may be suppressed to some extent.

  However, in the light source driving device having this configuration, since the converters (Ux1 ′, Ux2 ′, Ux3 ′,...) Operate at the same timing, the ON transitions of the respective switch elements are still at the same timing, and a large noise is generated. There is no change, and a new problem arises that all the converters (Ux1 ′, Ux2 ′, Ux3 ′,...) Draw current from the DC power supply (Mx) at the same timing. Therefore, there is a problem that the output voltage of the DC power supply (Mx) is reduced at that moment. To avoid this, the output section of the DC power supply (Mx) or the converters (Ux1 ′, Ux2 ′) , Ux3 ′,...) Needs to be equipped with a large-capacity smoothing capacitor at each input section. As a result, there is a problem that the DC power source (Mx) or the light source driving circuit (P1 ', P2', P3 ', ...) is increased in size and cost.

  In order to control the light source drive circuits (P1 ′, P2 ′, P3 ′,...) In an integrated manner from the control circuit (Fx ′), a method for individually transmitting a target power signal and a switch timing signal to each of them. When the number of the light source driving circuits (P1 ′, P2 ′, P3 ′,...) Increases, the number of signal lines and the number of IO ports of the control circuit (Fx ′) increase. There is a problem that the cost increases due to an increase in circuit resources.

  On the other hand, Japanese Patent Application Laid-Open No. 2011-192399 alternately describes a period in which the switching element is continuously on / off controlled at a predetermined oscillation frequency to supply power to the LED and a period in which oscillation is stopped and the LED is not supplied with power. There is an LED power supply circuit that can be dimmed by setting and setting the ratio of these periods, and in the case where a plurality (n) of the LED power supply circuits are operated in parallel, each LED power supply within a predetermined period T There is a description that provides a time difference of T / n with respect to the start timing of the oscillation period of the circuit. However, with this technology, it is possible to control the macroscopic operation period of all the LED power supply circuits so that they do not concentrate on the same period, so that noise generation and current drawing from the DC power supply are concentrated on a macroscopic period. However, since the on / off operations of the plurality of LED power supply circuits are asynchronous with each other, it is impossible to avoid the overlap of the microscopic on transition timings of the switching elements described above. The problem described above could not be solved.

JP 2011-192399 A

  The problem to be solved by the present invention is achieved by controlling a plurality of light source driving circuits in an integrated manner, and setting a target output power independently for each of the light source driving circuits, which is achieved by food back control. An object of the present invention is to provide a light source driving device.

  The light source driving device according to the first aspect of the present invention corresponds to each of the light source elements (Y1a, Y1b,..., Y2a,...) In order to drive a plurality of light source elements (Y1a, Y1b,..., Y2a,...). Provided at least one switch element (Q1a,...), And the light source elements (Y1a, Y1b) by a switching operation using the switch elements (Q1a,...) With respect to a current from a DC power source (Mx). ,..., Y2a,...), A plurality of light source driving circuits (P1a, P1b,..., P2a,...) And switching of the light source driving circuits (P1a, P1b,. ON transition timing signals (Et1, Et2,...) That define the ON transition timing of the operation and the light source drive circuits (P1a, P1b,..., P2a,...). An integrated control circuit (Fx) that transmits target power information (Ez1, Ez2,...) That defines a target value of each output power to the light source drive circuit (P1a, P1b,..., P2a,...); Each of the light source drive circuits (P1a, P1b,..., P2a,...) Belongs to one of a plurality of light source drive groups (U1, U2,...) Each of the light source drive circuits (P1a, P1b,...) Belonging to the same light source drive group (U1) is configured to receive the same target power information (Ez1) as the same on transition timing signal (Et1). In addition, the integrated control circuit (Fx) does not simultaneously turn on any two of the light source drive groups (U1, U2,...). t1, Et2,..., and the target power information (Ez1, Ez2,...) is independently generated for each of the light source drive groups (U1, U2,. The circuits (P1a, P1b,..., P2a,...) Are controlled in an integrated manner, and the light source drive circuits (P1a, P1b,..., P2a,...) Are further correlated with their own output power. Power detection means (Px1,...) That detects and generates power correlation signals (Sp1, Sp2,...), And the light source drive circuits (P1a, P1b,..., P2a,...) Are assigned to themselves. The obtained target power information (Ez1, Ez2,...) Is generated to generate a target power signal (Ss1, Ss2,...), And the on-transition timing signal (Et1, Et2,. , The switch elements (Q1a,...) Are turned on, and the switch elements (Q1a,...) Are turned off according to the target power signal (Ss1, Ss2,...) And the power correlation signal (Sp1, The light source drive circuit (P1a, P1b,..., P2a,...) Further includes an off-transition timing circuit (Uf1,...) That is determined by feedback control so that the difference from Sp2,. It is.

  In the light source drive device according to a second aspect of the present invention, the integrated control circuit (Fx) starts from the on transition for one of the light source drive groups (U1, U2,...), And then turns on. The on transition timing signals (Et1, Et2,...) Are generated so that the time intervals until the on transition for the light source drive groups (U1, U2,. It is what.

  In the light source driving device according to the third aspect of the present invention, the on transition timing signals (Et1, Et2,...) Are transmitted separately to the light source driving groups (U1, U2,...). It is characterized by.

  In the light source drive device according to a fourth aspect of the present invention, the on transition timing signals (Et1, Et2,...) Are transmitted to all the light source drive groups (U1, U2,. A sequence initialization signal (Si) synchronized with the ON transition for a specific one of the light source drive groups (U1, U2,...) Is all of the light source drive circuits (P1a, P1b,..., P2a,...). Are transmitted in common.

  In the light source drive device according to a fifth aspect of the present invention, the target power information (Ez1, Ez2,...) Is the on-transition timing signal (Et1, Et2,...) As the pulse width of the on-transition timing signal (Et1, Et2,. Et2, ...).

  In the light source drive device according to a sixth aspect of the present invention, the target power information (Ez1, Ez2,...) Is the on-transition timing signal (Et1, Et2) as the amplitude of the on-transition timing signal (Et1, Et2,...). ,...).

  In the light source driving device according to the seventh aspect of the present invention, the target power regulation signal (Sa) is further transmitted in common to all of the light source driving circuits (P1a, P1b,..., P2a,. (Ez1, Ez2,...) Are characterized in that they are put on the target power regulation signal (Sa) as the amplitude at the on transition timing of the on transition timing signals (Et1, Et2,...).

  In the light source drive device according to an eighth aspect of the present invention, the integrated control circuit (Fx) further includes a plurality of setting patterns for setting a target value of output power for each of the light source drive groups (U1, U2,...). A power setting pattern data storage unit (Um) for storing data (Sr) and an external interface (Ut) for communicating with an external device (Uo), and the integrated control circuit (Fx) When the power setting pattern selection signal (Sg) is received via the external interface (Ut), the setting pattern data (Sr) is stored in the power setting pattern data storage unit (Um) based on the power setting pattern selection signal (Sg). One of them is read, and based on the read setting pattern data (Sr), the light source drive groups (U1, U2,... Wherein for each ON transition timing signal (Et1, Et2, ...) generated and the target power information is characterized in carrying out the generation of (Ez1, Ez2, ...).

  A light source driving device according to a ninth aspect of the present invention is a set comprising the light source elements (Y1a, Y1b,..., Y2a,...) And the light source driving circuits (P1a, P1b,..., P2a,. When the failure is detected, the integrated control circuit (Fx) stops the operation of the light source drive circuits (P1a, P1b,..., P2a,. In order to compensate for the decrease in the amount of light, the setting pattern of the target value of the output power for each of the light source driving circuits (P1a, P1b,..., P2a,...) Is changed.

  Provided is a light source driving apparatus that controls a plurality of light source driving circuits in an integrated manner, sets a target output power independently for each of the light source driving circuits, and achieves this by food back control. Can do.

The block diagram which simplifies and shows the light source drive device of this invention is represented. The schematic diagram which simplifies and shows a part of light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The schematic diagram which simplifies and shows a part of light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The block diagram which simplifies and shows the light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The schematic diagram which simplifies and shows a part of light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The block diagram which simplifies and shows the light source drive device of this invention is represented. The conceptual diagram which simplifies and shows a part of operation | movement of the light source drive device of this invention is represented. The block diagram which simplifies and shows the light source drive device of this invention is represented. The schematic diagram and conceptual diagram which simplify and show a part of light source drive device of this invention are represented. The conceptual diagram which simplifies and shows a part of light source drive device of this invention is represented. The block diagram which simplifies and shows 1 type of the conventional light source drive device is represented. The conceptual diagram which simplifies and shows the operation | movement of a kind of conventional light source drive device is represented. The block diagram which simplifies and shows the kind of light source drive device improved rather than before is represented.

  First, the form for implementing this invention is demonstrated using FIG. 1 which is a block diagram which simplifies and shows the light source drive device of this invention. The light source driving device of the present invention is a light source driving circuit (P1a, P1b, P2a,...) For independently driving corresponding to each of a plurality of light source elements (Y1a, Y1b, Y2a,. It has. Here, the light source elements (Y1a, Y1b, Y2a,...) Are exemplified as those in which a plurality of light emitting elements such as LDs and LEDs are connected in series. A parallel connection, a plurality of parallel connections, a plurality of series connections, or the like may be used.

  The light source driving circuits (P1a, P1b, P2a,...) Belong to a light source driving group (U1, U2,...), Respectively. In the figure, the light source driving group (U1) includes two light sources. The drive circuit (P1a, P1b) is shown as an example in which one light source drive circuit (P2a) is arranged in the light source drive group (U2). Each of the light source driving circuits (P1a, P1b, P2a,...) Includes a converter (Ux1a, Ux1b, Ux2a,...), And supplies a current to the light source elements (Y1a, Y1b, Y2a,...).

  As shown in FIG. 2 to be described later, the converters (Ux1a, Ux1b, Ux2a,...) Are each provided with a switch element (Q1a,...), And the current from the DC power source (Mx) is supplied by the switching operation. The light source elements (Y1a, Y1b, Y2a,...) Can be supplied. Further, the switch elements (Q1a,...) Of the converters (Ux1a, Ux1b, Ux2a,...) Are driven by a switch gate drive circuit (Uv1a,...), And the switch gate drive circuits (Uv1a,. Switch timing signals (Ec1, Ec2,...) Corresponding to the switch elements (Q1a,...) And target power signals (Ss1, Ss2,...) Corresponding to the light source elements (Y1a, Y1b, Y2a,. Are supplied from timing signal receiving circuits (Uw1a, Uw1b, Uw2a,...).

  Each of the timing signal receiving circuits (Uw1a, Uw1b, Uw2a,...) Receives one on-transition timing signal (Et1, Et2,...) From the integrated control circuit (Fx). Ec1, Ec2,...) And the target power signal (Ss1, Ss2,...) Serving as target power information are generated. That is, the on-transition timing signals (Et1, Et2,...) Are fed back in the converters (Ux1a, Ux1b, Ux2a,...) In addition to the function of defining the on-transition timing of the switch elements (Q1a,...). It has two functions, the function that defines the goal of

  In other words, the integrated control circuit (Fx) places the target power information (Ez1, Ez2,...) On the timing signal receiving circuit (Uw1a, Uw1b,. The ON transition timing signals (Et1, Et2,...) Are generated so as to reach Uw2a,. In that sense, the target power information (Ez1, Ez2,...) Cannot be said to be an independent signal, and is therefore indicated by a broken line in the figure. However, there are a plurality of forms for sending the target power information (Ez1, Ez2,...) As will be described later.

  In this way, by sending the target power information (Ez1, Ez2,...), The target power signal (Ss1, Ss2,...) Is sent for each light source drive group (U1, U2,...). Since the number of signal lines can be reduced as compared with the case, it is effective in reducing circuit resources especially when the number of the light source drive groups (U1, U2,...) Is large. The integrated control circuit (Fx) is preferably configured using a microprocessor or the like because it needs to realize the advanced functions as described above.

  The light source drive circuits (P1a, P1b,..., P2a,...) Of the light source drive device are grouped by the light source drive groups (U1, U2,...), And the integrated control circuit (Fx) The on transition timing signals (Et1, Et2,...) Corresponding to the respective light source drive groups (U1, U2,...) Are transmitted. In some cases, a plurality of the light source drive circuits (P1a, P1b) are arranged in one light source drive group (U1), and one light source drive circuit (in the single light source drive group (U2)). P2a) may be arranged, and the pattern of the arrangement form can be freely set according to each design case.

  However, it is important to send the on-transition timing signals (Et1, Et2,...) So that any two of the light source driving groups do not simultaneously turn on. By doing so, it is possible to suppress the phenomenon that the disturbance of the power control described above occurs in a beat manner. As described above, in particular, in the case of the feedback control method based on the current mode that has been frequently used in recent years, the peak current flowing in the circuit is detected and operated. However, in order to avoid an increase in loss and deterioration of characteristics, current detection is performed. It is necessary to use a resistor with a small value. Therefore, the current detection signal must be weak. Especially when multiple switching converters are operated in parallel, the current waveform is affected by the mutual interference of switching noise. However, the technique of the present invention is preferably applied under such conditions.

  In addition, in FIG. 1, although what has provided the said timing signal receiving circuit (Uw1a, Uw1b) with respect to each of the said light source drive circuit (P1a, P1b) of the said light source drive group (U1), these are shown. In order to receive the same on transition timing signal (Et1) and the target power information (Ez1) and generate the same switch timing signal (Ec1) and the target power signal (Ss1), By making it process, it is possible to reduce the number of parts. Conversely, when the timing signal receiving circuit (Uw1a, Uw1b, Uw2a,...) Is provided in each of the light source drive circuits (P1a, P1b, P2a,...) As in the configuration of FIG. If the specifications of Y1a, Y1b, Y2a,... Are all the same, the light source drive circuits (P1a, P1b, P2a,...) Are all realized by arranging modules having the same specifications (difference is supported by mounting options). There are advantages that can be made.

  Further, although the DC power supply (Mx) is not shown in FIG. 1, the DC power supply (Mx) may be arranged for each light source driving circuit (P1a, P1b, P2a,...). The light source drive groups (U1, U2,...) May be arranged for each of the light source drive groups (U1, U2,...). .

  Next, the configuration of the converter (Ux1a) will be described with reference to FIG. 2 which is a schematic diagram showing a part of the light source driving device of the present invention. The converter (Ux1a) is realized by a step-up chopper type switching converter circuit, and outputs a suitable voltage / current according to the state of the light source element (Y1a) or lighting sequence using the DC power supply (Mx) as a power supply. To do.

  The switching converter circuit includes an inductor (Lx), the switch element (Q1a), a smoothing capacitor (Cx), and a switch gate drive circuit (Uv1a). In addition to the step-up chopper method shown here, the switching converter circuit depends on various conditions such as the magnitude relationship between the output voltage of the DC power supply (Mx) and the voltage applied to the light source element (Y1a). For example, an optimum circuit such as a step-down chopper method or an inversion chopper method may be employed.

  The converter (Ux1a) includes power detection means (Px1,...) For feedback control. The converter (Ux1a) detects a current flowing through the light source element (Y1a) by a potential difference between both ends of the shunt resistor (R3). Is sent to the switch gate drive circuit (Uv1a) as a power correlation signal (Sp1) correlated with the input power to the light source element (Y1a) by the converter (Ux1a). However, in the figure, the power correlation signal (Sp1) is substituted by a resistance both-end potential signal (Sip, Sin) which is a potential at both ends of the shunt resistor (R3), and the potential difference is calculated by the switch gate driving circuit. It is assumed to be realized by analog computation in (Uv1a). If necessary, a voltage applied to the light source element (Y1a) is detected by a voltage dividing resistor (R1, R2) to generate a light source element applied voltage signal (Sv), and the switch gate drive circuit (Uv1a) Send it out.

  The reason why the current flowing through the light source element (Y1a) is adopted as the power correlation signal is that, particularly when the light source element (Y1a) is a diode element such as an LED or LD, even if the current flowing through the light source element is changed, The change in the voltage generated at both ends is small, and if this is considered to be approximately constant, the power value is approximately proportional to the flowing current value, and even if it cannot be considered constant, This is because the power value strongly correlates with the current value. When it is desired to perform control by an accurate input power value including variations in the characteristics of the generated voltage with respect to the current of the light source element (Y1a), the light source element applied voltage signal (Sv) and the resistance both-end potential signal (Sip, Sin) The power correlation signal (Sp1) may be generated by the product of the current value based on ().

  In the switch gate drive circuit (Uv1a), feedback control is performed so that the difference between the power correlation signal (Sp1) and the target power signal (Ss1) becomes small. Specifically, the output current is controlled such that a desired target power is input to the light source element (Y1a) by controlling the duty cycle ratio of the switch element (Q1a) in the ON state.

  Each time the switch gate drive circuit (Uv1a) receives the on-transition timing signal (Et1) that defines the on-timing of the switch element (Q1a), the switch element (Q1a) transitions on in synchronism with this. The switch element (Q1a) is repeatedly turned off after an on period (τ1) having a certain length of time. Then, feedback control is performed on the length of the ON period (τ1) so that the difference between the power correlation signal (Sp1) and the target power signal (Ss1) is reduced. As will be described later, a shunt resistor (R4) is provided to generate a switch current detection signal (Siq) that is necessary for feedback control in the current mode and correlates with the current value flowing through the switch element (Q1a). .

  Further, the operation of the converter (Ux1a) will be described with reference to FIG. 3 which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention. 3a schematically shows a current waveform flowing through the switch element (Q1a), b shows a gate signal (Sq) for driving the switch element (Q1a), and c shows a current waveform flowing through the inductor (Lx). Show.

  The converter (Ux1a) receives the gate signal (Sq) for driving the switch element (Q1a) from the switch gate drive circuit (Uv1a) and turns on the switch element (Q1a). Then, the switch element (Q1a) flows through the inductor (Lx) so that a current increases, and magnetic energy is stored in the inductor (Lx). Thereafter, when the switch element (Q1a) is turned off, a current continues to flow from the inductor (Lx) while releasing the stored magnetic energy, and this current charges the smoothing capacitor (Cx).

  The waveforms shown in the figure are of an operation mode called continuous mode, in which case the output voltage of the converter (Ux1a) is determined by the duty cycle ratio of the switch element (Q1a). That is, since the output voltage is determined by the product of (τ1 + τ2) / τ2 and the input power supply voltage with respect to the on period (τ1) and the off period (τ2) of the switching element (Q1a), the switching cycle τ1 + τ2 is constant. For example, it can be understood that the input power to the light source element (Y1a) can be adjusted by adjusting the ON period (τ1) or the OFF period (τ2). As described above, feedback control can be performed on the length of the ON period (τ1) so that the difference between the power correlation signal (Sp1) and the target power signal (Ss1) is reduced.

  Next, the configuration of the switch gate driving circuit (Uv1a) will be described with reference to FIG. 4, which is a schematic diagram showing a part of the light source driving device of the present invention. This figure shows a simplified configuration of a typical switching LED controller IC (for example, LT3755 manufactured by Linear Technology Corporation) in the current mode, and the gate signal (Sq) for controlling the switch element (Q1a). ), An input terminal for the switch timing signal (Ec1), an input terminal for the switch current detection signal (Siq) for detecting a current flowing through the switch element (Q1a), and the power correlation signal (Sp1). An input terminal for a resistance both-end potential signal (Sip, Sin) and an input terminal for the target power signal (Ss1) are provided.

  The switch element (Q1a) is controlled by the operation of a flip-flop (FF) through a gate circuit (Gg). Each time the monostable multivibrator (MM) receives the switch timing signal (Ec1), the monostable multivibrator (MM) generates an active initialization signal (Sfs) for a short period of time. Since the initialization signal (Sfs) is connected to the set terminal of the flip-flop (FF), the output of the flip-flop (FF) is turned on every time the switch timing signal (Ec1) is received. . The flip-flop (FF) that has made an on transition makes an off transition when it receives the current excess signal (Sfr) generated by the off transition timing circuit (Uf1) at its reset terminal.

  By the way, the switch current detection signal (Siq) has a waveform similar to that of a in FIG. 3, which is amplified to a necessary amplitude by an amplifier (Amp1) and then sent to the off-transition timing circuit (Uf1). Entered. In the off-transition timing circuit (Uf1), the slope correction signal generation circuit (Ramp) receives the initialization signal (Sfs) and outputs a slope correction signal having a waveform similar to that of the switch current detection signal (Siq). This is added to the amplified signal of the switch current detection signal (Siq) by an adder (Σ) to generate a current peak signal (St), and this and an error conversion circuit (Uh1) The error conversion signal (Sir) is compared with a comparator (Cmp), and the current excess signal (Sfr) is sent out when the current peak signal (St) exceeds the error conversion signal (Sir). .

  In the error conversion circuit (Uh1), the electric potential correlation signal (Sip, Sin) as the power correlation signal (Sp1) is converted into a potential difference signal, that is, a light source current signal (Sj) by a differential amplifier (Amp2). It is input to the error conversion circuit (Uh1). The target power signal (Ss1) is further input to the error conversion circuit (Uh1), and the error conversion signal (Sir) depending on the magnitude relationship between the target power signal (Ss1) and the light source current signal (Sj) is generated. If the light source current signal (Sj) is smaller than the target power signal (Ss1), that is, if the power of the light source is less than the target, the error conversion signal (Sir) is operated to increase, conversely. When the light source current signal (Sj) is larger than the target power signal (Ss1), that is, when the power of the light source exceeds the target, the error conversion signal (Sir) is reduced.

  As a result, the off transition of the switch element (Q1a) is delayed when the power of the light source is insufficient than the target, and conversely, when the power of the light source exceeds the target, the switch element (Q1a) is operated so as to be early. Feedback control is achieved so that the difference between the power correlation signal (Sp1) and the target power signal (Ss1) is reduced.

  Next, an embodiment for carrying out the present invention will be described with reference to FIG. 5 which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention. Here, as an example, it is assumed that the light source driving device is configured by three light source driving groups (U1, U2, U3). 5a is an on transition timing signal (Et1) for the light source driving group (U1), b is an on transition timing signal (Et2) for the light source driving group (U2), and c is an on transition timing signal for the light source driving group (U3). The waveform of each transition timing signal (Et3) is typically shown.

  In this case, the integrated control circuit (Fx) transmits a rectangular wave three-phase on transition timing signal (Et1, Et2, Et3) to each of the three light source drive groups (U1, U2, U3). . Each of the light source drive groups (U1, U2, U3) switches on the switch elements (Q1a,...) Belonging to the light source drive group (U1, U2, U3) at the rising edge of the received on transition timing signal (Et1, Et2, Et3). At this time, the integrated control circuit (Fx) has a period (t1) from the on transition of the light source drive group (U1) to the on transition of the light source drive group (U2), and the on transition of the light source drive group (U2). T1 = t2 for a period (t2) from the on transition of the light source driving group (U3) to the on transition of the light source driving group (U3) to the on transition of the light source driving group (U1) (t3) It is preferable to generate the on-transition timing signals (Et1, Et2, Et3) so that the relationship of = t3 is substantially satisfied.

  In this case, even when a single DC power supply (Mx) is collectively arranged for all of the light source drive groups (U1, U2,...), The light source drive circuits (P1a, P2a). ,..., Which can cause ripple fluctuations in the output of the DC power supply (Mx) to be equalized, reduce the burden on the smoothing capacitor installed at the output of the DC power supply (Mx), and convert the converters (Ux1a, Ux2a, It is not necessary to provide a large smoothing capacitor at the input part.

  Naturally, any two of the light source drive groups do not have their on transitions at the same time, so that the above-described phenomenon of power control disturbance occurring in a beat manner can be suppressed. This state is as shown in FIG. 6, which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention. This represents the current waveform of the light source element by the light source driving device of the present invention that operates based on the on transition timing signals (Et1, Et2, Et3) shown in FIG. In FIG. 6, a is the current waveform of the light source element (Y1a), b is the current waveform of the light source element (Y2a), and c is the current waveform of the light source element (Y3a). As shown in FIG. 18 showing the current waveform, the normal fluctuation component (fine ripples, etc.) resulting from the original switching operation is removed, and as described above, as described above, The effect of suppressing disturbance was seen.

  Next, the form for implementing this invention is demonstrated using FIG. 7 which is a block diagram which simplifies and shows the light source drive device of this invention. In the light source driving device of this embodiment, the integrated control circuit (Fx) supplies a common on transition timing signal (Et) to all of the light source driving groups (U1, U2,...). However, in addition to the on transition timing signal (Et), a common sequence initialization signal (Si) is supplied to all the light source drive groups (U1, U2,...).

  Further, the present embodiment will be described with reference to FIG. 8 which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention. Here, as an example, it is assumed that the light source driving device is configured by three light source driving groups (U1, U2, U3). 8a is the on transition timing signal (Et) from the integrated control circuit (Fx), b is the sequence initialization signal (Si) from the integrated control circuit (Fx), and c is the light source drive group ( The switch timing signal (Ec1) in U1), d represents the switch timing signal (Ec2) in the light source drive group (U2), and e represents the waveform of the switch timing signal (Ec3) in the light source drive group (U3).

  The timing signal receiving circuit (Uw1a, Uw2a,...) Of each of the light source drive groups (U1, U2,...) Is any of the pulses included in the on transition timing signal (Et) assigned to itself. It is necessary to be able to determine whether or not. For this purpose, the integrated control circuit (Fx) sends the sequence initialization signal (Si) prior to a pulse for a specific light source drive group, and each of the timing signal receiving circuits (Uw1a, Uw2a,...) Includes a counter that counts the rising signal of the on transition timing signal (Et), and the counter is reset when the sequence initialization signal (Si) is received.

  With this configuration, the integrated signal analysis unit of the light source drive group (U1) recognizes the first pulse as being from the reception of the sequence initialization signal (Si), and the light source drive The integrated signal analyzer of the group (U2) recognizes the second pulse as to itself, and the integrated signal analyzer of the light source driving group (U3) recognizes the third pulse as to itself, Pulses to be delivered to each of the light source drive groups (U1, U2, U3) are received from the integrated control circuit (Fx) without confusion. In this way, by sending the timing information, the signal line is compared with the case where the on-transition timing signals (Et1, Et2,...) Are sent for each light source drive group (U1, U2,...). Since the number of the light source driving groups (U1, U2,...) Is large, the circuit resources can be reduced.

  Next, the form for implementing this invention is demonstrated using FIG. 9 which is a schematic diagram which simplifies and shows a part of light source drive device of this invention. This figure shows the configuration of one of the timing signal receiving circuits (Uw1a, Uw1b, Uw2a,...) Described above with reference to FIG.

  The timing signal receiving circuit (Uw1a) receives the on-transition timing signal (Et1) of the rectangular wave pulse transmitted from the integrated control circuit (Fx) by the buffer (B1), and is functionally the same signal. Is converted to a switch timing signal (Ec1), and is converted into a substantially analog analog voltage by a low-pass filter circuit including resistors (R20, R21) and a capacitor (C20), and the buffer (Amp4) is To generate a target power signal (Ss1). As described above, the switch timing signal (Ec1) is used to define the ON transition timing of the switch element (Q1a).

  A mode for carrying out the present invention will be described with reference to FIG. 10, which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention in the timing signal receiving circuit (Uw1a) of FIG. 10a is an on transition timing signal (Et1) when the target power signal (Ss1) is set large, b is an on transition timing signal (Et1) when the target power signal (Ss1) is set small, c Indicates an on transition timing signal (Et1) when the target power signal (Ss1) is set to be smaller.

  When the integrated control circuit (Fx) increases the output power of the light source drive group (U1), that is, when the target power signal (Ss1) is set large, the on-transition timing as shown in FIG. When the duty cycle ratio of the signal (Et1) is increased and, conversely, when the target power signal (Ss1) is set small, the duty cycle ratio of the on-transition timing signal (Et1) is decreased as shown in FIG. Thus, a method of transmitting target power information by so-called PWM modulation is used. In the timing signal receiving circuit (Uw1a) in FIG. 9, the voltage of the target power signal (Ss1) increases as the duty cycle ratio of the on-transition timing signal (Et1) increases due to the action of the low-pass filter. In the case of the form of the on transition timing signal (Et1) in FIG. 10, the buffer (B1) in FIG. 9 can be moved to the position of the buffer (B1 ').

  A mode for carrying out the present invention will be described with reference to FIG. 11, which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention in the timing signal receiving circuit (Uw1a) of FIG. . In FIG. 11, a is an on transition timing signal (Et1) when the target power signal (Ss1) is set large, b is an on transition timing signal (Et1) when the target power signal (Ss1) is set small, c Indicates an on transition timing signal (Et1) when the target power signal (Ss1) is set to be smaller.

  When the integrated control circuit (Fx) increases the output power of the light source drive group (U1), that is, when the target power signal (Ss1) is set large, the on-transition timing as shown in FIG. When the voltage amplitude of the signal (Et1) is increased and, conversely, when the target power signal (Ss1) is set small, the voltage amplitude of the on-transition timing signal (Et1) is decreased as shown in FIG. A method of transmitting target power information by so-called amplitude modulation is used. In the timing signal receiving circuit (Uw1a) of FIG. 9, the voltage of the target power signal (Ss1) increases as the voltage amplitude of the on-transition timing signal (Et1) increases due to the action of the low-pass filter.

  Next, a mode for carrying out the present invention will be described with reference to FIG. 12, which is a simplified block diagram showing the light source driving device of the present invention. In the light source driving device of this embodiment, the integrated control circuit (Fx) supplies a common target power regulation signal (Sa) to all of the light source driving groups (U1, U2,...).

  Furthermore, this embodiment will be described with reference to FIG. 13 which is a conceptual diagram showing a simplified operation of a part of the light source driving device of the present invention. In FIG. 13, a is an on transition timing signal (Et1) in the light source driving group (U1), b is an on transition timing signal (Et2) in the light source driving group (U2), and c is an on transition timing signal in the light source driving group (U3). (Et3) and d indicate the waveforms of the target power regulation signal (Sa).

  The timing signal receiving circuit (Uw1a, Uw2a,...) Of each of the light source driving groups (U1, U2, U3) has its own on-transition timing in order to obtain its target power signal (Ss1, Ss2,...). The target power regulation signal (Sa) is read in synchronization with the ON transition timing based on the signals (Et1, Et2, Et3), and the voltage value is held. For example, the voltage value (V1) of the target power regulation signal (Sa) may be read at the rising timing of the on transition timing signal (Et1) and held as the target power signal (Ss1). The voltage value (V2) of the target power regulation signal (Sa) is read at the rising timing of the signal (Et1), held as the target power signal (Ss2), and the target power at the rising timing of the on transition timing signal (Et1). The voltage value (V3) of the regulation signal (Sa) is read and held as the target power signal (Ss3).

  In order to read and hold the voltage value of the analog target power regulation signal (Sa) described here, it can be configured using a sample and hold circuit (or track and hold circuit), The digital value may be converted by an AD converter and held in a memory. Of course, this embodiment can be combined with the embodiment described above with reference to FIG.

  Next, the form for implementing this invention is demonstrated using FIG. 14 which is a block diagram which simplifies and shows the light source drive device of this invention. The integrated control circuit (Fx) outputs an on transition timing signal (Et1, Et2,...) And target power information (Ez1, Ez2,...) For each of the light source drive groups (U1, U2,...) And a microprocessor (MPU). , And a power setting pattern data storage unit (Um) that stores a plurality of setting pattern data (Sr) for the setting pattern of the target value of output power for each of the light source driving groups (U1, U2,...). The power setting pattern data storage unit (Um) stores the setting pattern data (Sr), and the microprocessor (MPU) can read out data by selecting a suitable pattern. In order to be able to select a pattern to be selected from an external device (Uo), for example, an external interface (Ut) for performing serial communication is provided.

  When the integrated control circuit (Fx) receives the power setting pattern selection signal (Sg) from the external device (Uo) via the external interface (Ut), the setting is made from the power setting pattern data storage unit (Um) based on the power setting pattern selection signal (Sg). One of the pattern data (Sr) is read. The integrated control circuit (Fx), based on the read setting pattern data (Sr), the ON transition timing signals (Et1, Et2,...) And the target power information ( Ez1, Ez2,...) Are output.

Further, this embodiment will be specifically described with reference to FIG. 15 which is a schematic diagram and a conceptual diagram showing a part of the light source driving device of the present invention in a simplified manner. FIG. 15a is a schematic diagram showing a part of a light irradiation device using the light source driving device of the present invention in a simplified manner,
b shows an example of setting pattern data (Sr) held by the light source driving device of the present invention included in the light irradiation device described in a. Hereinafter, the light irradiation device and the setting pattern data (Sr) will be described in detail.

  The light irradiation device using the light source driving device of the present invention shown in FIG. 15A has five light source mounting boards (Pcb1, Pcb2, Pcb3, Pcb4, Pcb5) and five light source driving groups (U1, U2). , U3, U4, U5), and one light source mounting board receives power from one light source driving group. On each of the light source mounting substrates (Pcb1, Pcb2,...), Light source elements (Y1a, Y2a, Y3a, Y4a, Y5a) are mounted, and each of the light source elements (Y1a, Y2a,...) For example, 16 LEDs are connected in series. The light source mounting substrates (Pcb1, Pcb2,...) Are mounted on a heat sink (Hs) for releasing heat generated by the light source elements. Each of the light source drive groups (U1, U2,...) Includes one light source drive circuit (P1a, P1b,...).

  In the row with the pattern number 1 shown in FIG. 15b, the left three light source drive groups (U1, U2, U3) are dimmed at 80% of the maximum output power, and the remaining two light source drive groups ( U4, U5) indicate that setting pattern data to be turned off is stored. In the row of pattern number 2, the right three light source drive groups (U3, U4, U5) are dimmed at 80% of the maximum output power, and the remaining two light source drive groups (U1, U2) are turned off. The setting pattern data to be stored is stored. The row of pattern number 3 indicates that setting pattern data for dimming all light source drive groups (U1, U2, U3, U4, U5) at 50% of half of the maximum output power is stored. The row with the pattern number 4 indicates that setting pattern data for dimming all the light source drive groups (U1, U2, U3, U4, U5) with the maximum output power is stored. The row of pattern number 5 indicates that setting pattern data for dimming all light source drive groups (U1, U2, U3, U4, U5) at 10% of the maximum output power is stored. For example, it is used in the standby mode of the light irradiation device. The row of the pattern number 6 indicates that setting pattern data for decreasing the light amount little by little from the left to the right of the light irradiation device is stored. Thus, by storing the power setting pattern data storage unit (Um) in advance, it is possible to freely and easily select the driving pattern of the light source from the external device (Uo).

  Next, the form for implementing this invention is demonstrated using FIG. 16 which is a conceptual diagram which simplifies and shows a part of light source drive device of this invention. In this embodiment, when a failure of any of the light irradiation devices including the light source elements (Y1a, Y1b,..., Y2a,...) And the light source drive circuits (P1a, P1b,..., P2a,. It is for responding to.

  When the integrated control circuit (Fx) detects a failure, the integrated light source element (Y1a, Y1b,..., Y2a,...) Or the light source drive circuit (P1a, P1b,..., P2a,...) In order to stop the operation of the light source driving circuit with respect to the light source, and to compensate for the decrease in the light amount due to the failure, the setting pattern of the target value of the output power for each of the light source driving circuits (P1a, P1b,. FIG. 16A shows a setting pattern before failure, and b shows a setting pattern of a target value of output power when a light source driving circuit (P3a, P3b,...) Included in the light source driving group (U3) is damaged. The setting pattern when changing is shown. In this case, the operation of the damaged light source drive group (U3) is stopped, and the light source drive groups (U1, U2) adjacent to the light source drive group (U3) are set to be brighter than before the failure. Yes. In this way, even if a part of the light source elements (Y1a, Y1b,..., Y2a,...) Fails, it is possible to continue operation without immediately stopping the function of the light irradiation device. Can do.

  In the present specification, the application in the light irradiation device has been mainly described. However, the light source driving device of the present invention can be used for any purpose as long as it is a light source driving device for lighting light source elements such as LEDs and LDs. It can also be applied to and exhibits good effects.

  The circuit configuration described in this specification describes the minimum necessary components for the purpose of explaining the operation, function, and operation of the light source device of the present invention. Therefore, the details of the circuit configuration and operation described, such as signal polarity, selection, addition, omission of specific circuit elements, or ingenuity such as changes based on the convenience of obtaining elements and economic reasons Is assumed to be performed at the time of designing the actual device.

  In particular, a mechanism for protecting circuit elements such as switching elements such as FETs of the power supply device from damage factors such as overvoltage, overcurrent, and overheating, or radiation noise and conduction noise generated by the operation of circuit elements of the power supply device Mechanisms that reduce the occurrence of noise and prevent the generated noise from being output to the outside, such as snubber circuits, varistors, clamp diodes, current limiting circuits (including pulse-by-pulse systems), common mode or normal mode noise filter chokes It is assumed that a coil, a noise filter capacitor, and the like are added to each part of the circuit configuration described in the embodiment as necessary. The configuration of the light source driving device according to the present invention is not limited to the circuit type described in the present specification, and is not limited to the waveform and timing diagram described.

  The present invention provides a plurality of visible, ultraviolet, and infrared light that can be used in an optical device such as a light irradiation device for irradiating an irradiated surface with visible, ultraviolet, or infrared light with a specified power density distribution. The present invention can be used in an industry that designs and manufactures a light source driving device for lighting light source elements such as individual LEDs and LDs.

Amp1 amplifier Amp2 differential amplifier Amp4 buffer B1 buffer B1 ′ buffer C20 capacitor Cmp comparator Cx smoothing capacitor Ec ′ switch timing signal Ec1 switch timing signal Ec1 ′ switch timing signal Ec2 switch timing signal Ec2 ′ switch timing signal Ec3 switch timing signal Ec3 ′ Switch timing signal Et on transition timing signal Et1 on transition timing signal Et2 on transition timing signal Et3 on transition timing signal Ez1 target power information Ez2 target power information FF flip-flop Fx integrated control circuit Fx ′ control circuit Gg gate circuit Hs heat sink Lx inductor MM Monostable multivibrator MPU Microprocessor Mx DC power supply Osc1 Oscillator Osc 2 Oscillator Osc3 Oscillator P1 ′ Light source drive circuit P1a Light source drive circuit P1b Light source drive circuit P2 ′ Light source drive circuit P2a Light source drive circuit P3 ′ Light source drive circuit P3a Light source drive circuit P3b Light source drive circuit Pcb1 Light source mounting board Pcb2 Light source mounting board Pcb3 Light source mounting Substrate Pcb4 Light source mounting substrate Pcb5 Light source mounting substrate Px1 Power detection means Q1a Switch element R1 Voltage dividing resistor R2 Voltage dividing resistor R20 Resistor R21 Resistor R3 Shunt resistor R4 Shunt resistor Ramp Inclination correction signal generation circuit Sa Target power regulation signal Sfr Current excess signal Sfs Initialization signal Sg Power setting pattern selection signal Si Sequence initialization signal Sin Resistance both-end potential signal Sip Resistance both-end potential signal Siq Switch current detection signal Sir Error conversion signal Sj Light source current signal Sp1 Power correlation signal Sp2 Power phase Signal Sq Gate signal Sr Setting pattern data Ss1 Target power signal Ss1 ′ Target power signal Ss2 Target power signal Ss2 ′ Target power signal Ss3 Target power signal Ss3 ′ Target power signal St Current peak signal Sv Light source element applied voltage signal t1 Period t2 Period t3 Period U1 Light source drive group U2 Light source drive group U3 Light source drive group U4 Light source drive group U5 Light source drive group Uf1 Off transition timing circuit Uh1 Error conversion circuit Um Power setting pattern data storage unit Uo External device Ut External interface Uv1a Switch gate drive circuit Uw1a Timing Signal receiving circuit Uw1b Timing signal receiving circuit Uw2a Timing signal receiving circuit Ux1 ′ Converter Ux1a Converter Ux1b Converter Ux2 ′ Converter Ux2a Converter Ux3 ′ Converter V1 Voltage value V2 Voltage value V3 Voltage value Y1 Light source element Y1a Light source element Y1b Light source element Y2 Light source element Y2a Light source element Y3 Light source element Y3a Light source element Y4a Light source element Y5a Light source element Σ Adder τ1 On period τ2 Off period

Claims (9)

In order to drive a plurality of light source elements (Y1a, Y1b,..., Y2a,...), At least one switch element (Q1a) is provided corresponding to each of the light source elements (Y1a, Y1b,..., Y2a,...). ,..., And the output power to each of the light source elements (Y1a, Y1b,..., Y2a,...) Is controlled by the switching operation using the switch elements (Q1a,...) With respect to the current from the DC power source (Mx). A plurality of light source driving circuits (P1a, P1b,..., P2a,...),
ON transition timing signals (Et1, Et2,...) For defining the ON transition timing of each switching operation of the light source driving circuits (P1a, P1b,..., P2a,...), And the light source driving circuits (P1a, P1b,. , P2a,...)) Integrated control circuit that transmits target power information (Ez1, Ez2,...) That defines the target value of each output power to the light source drive circuits (P1a, P1b,..., P2a,...). (Fx),
A light source driving device comprising:
Each of the light source drive circuits (P1a, P1b,..., P2a,...) Belongs to one of a plurality of light source drive groups (U1, U2,...) And belongs to the same light source drive group (U1). Each of the light source drive circuits (P1a, P1b,...) Is configured to receive the same target power information (Ez1) as the same on transition timing signal (Et1).
The integrated control circuit (Fx) generates the on transition timing signals (Et1, Et2,...) So that any two of the on transitions of the light source drive groups (U1, U2,. And generating the target power information (Ez1, Ez2,...) Independently for each of the light source drive groups (U1, U2,...), Thereby generating the light source drive circuits (P1a, P1b,..., P2a). , ...) in an integrated manner,
The light source driving circuits (P1a, P1b,..., P2a,...) Further detect power that correlates with their output power and generate power correlation signals (Sp1, Sp2,...). )
The light source driving circuit (P1a, P1b,..., P2a,...) Acquires the target power information (Ez1, Ez2,...) Assigned to itself and generates target power signals (Ss1, Ss2,...). Further, after the switch elements (Q1a,...) Are turned on in accordance with the on transition timing signals (Et1, Et2,...) Assigned to themselves, the timing for turning off the switch elements (Q1a,...) An off transition timing circuit (Uf1,...) That is determined by feedback control so that a difference between the target power signal (Ss1, Ss2,...) And the power correlation signal (Sp1, Sp2,. P1a, P1b,..., P2a,.   The integrated control circuit (Fx) has the light source drive group (U1, U2,...) That generates the next on transition from the on transition to one of the light source drive groups (U1, U2,...). 2. The light source driving device according to claim 1, wherein the on-transition timing signals (Et1, Et2,...) Are generated so that all of the time intervals until the on-transition are substantially equal intervals.   3. The light source according to claim 1, wherein the ON transition timing signal (Et 1, Et 2,...) Is transmitted as a separate signal to each of the light source driving groups (U 1, U 2,...). Drive device.   The on-transition timing signals (Et1, Et2,...) Are transmitted to all the light source drive groups (U1, U2,...), And the light source drive groups (U1, U2,. A sequence initialization signal (Si) synchronized with the ON transition for a specific one of the light source driving circuits (P1a, P1b,..., P2a,...) Is transmitted in common to all the light source driving circuits. Item 3. The light source driving device according to Item 1 or 2.   The target power information (Ez1, Ez2,...) Is carried on the on transition timing signals (Et1, Et2,...) As a pulse width of the on transition timing signals (Et1, Et2,...). Item 5. The light source driving device according to any one of Items 1 to 4.   The target power information (Ez1, Ez2, ...) is carried on the on-transition timing signals (Et1, Et2, ...) as the amplitude of the on-transition timing signals (Et1, Et2, ...). The light source driving device according to any one of 1 to 4.   Further, a target power regulation signal (Sa) is transmitted in common to all the light source driving circuits (P1a, P1b,..., P2a,...), And the target power information (Ez1, Ez2,. 5. The light source driving device according to claim 1, wherein the signal is put on the target power regulation signal (Sa) as an amplitude at an on transition timing of the signals (Et <b> 1, Et <b> 2,...).   The integrated control circuit (Fx) further stores a plurality of setting pattern data (Sr) for setting patterns of target values of output power for the light source drive groups (U1, U2,...). (Um) and an external interface (Ut) for communicating with the external device (Uo), and the integrated control circuit (Fx) receives a power setting pattern selection signal via the external interface (Ut). When (Sg) is received, one of the setting pattern data (Sr) is read from the power setting pattern data storage unit (Um) based on the power setting pattern selection signal (Sg), and the read setting pattern Based on the data (Sr), the on transition timing signal for each of the light source drive groups (U1, U2,...). (Et1, Et2, ...) generated between the target power information (Ez1, Ez2, ...) light source driving device according to any one of claims 1 to 7, characterized in that to perform the generation of the.   When the failure of any of the set consisting of the light source elements (Y1a, Y1b,..., Y2a,...) And the light source driving circuits (P1a, P1b,..., P2a,. The circuit (Fx) stops the operation of the light source drive circuits (P1a, P1b,..., P2a,...) Of the set in which a failure is detected, and also compensates for a decrease in light amount due to the failure. , P1b,..., P2a,...), The setting pattern of the target value of the output power is changed for each of the light source driving devices according to claim 1.

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