JP2014204300A - Interference wave suppression receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which: when an excessive interference wave is input into a receiver, an amplifier or A/D converter in an analog circuit is saturated, and waveform distortion occurs: this deteriorates communication quality of not only a signal receiving the interference wave but also an adjacent signal: and if an automatic gain control circuit is provided, saturation of the amplifier or A/D converter can be avoided, but automatic gain control is triggered by the interference wave, a desired signal level becomes smaller, and communication quality is deteriorated.SOLUTION: An interference wave suppression receiver comprises a level detection circuit for detecting presence or absence of an interference wave in an analog unit, and a gain control circuit for detecting presence or absence of an interference wave and the frequency of the interference wave per channel in a digital unit, and secures communication quality by selecting a tunable notch filter on the basis of information from the two detection circuits and suppressing the interference wave.

Description

  The present invention relates to an interference wave suppression receiving apparatus that suppresses an interference wave included in a received signal.

  Satellite-mounted digital receivers receive multiple communication signals with different frequency bands converted from analog signals to digital signals, amplify signals separated by frequency band, exchange channels corresponding to each frequency band, etc. Is processed. The satellite-mounted digital receiver is a reception level detector circuit that compensates for variations in the transmission level of the ground station transmitter and reception level variations in the satellite-mounted digital receiver caused by various losses such as rainfall attenuation or propagation loss. And a gain control circuit or an AGC (Auto Gain Control) circuit based on a control command from the ground station (see, for example, Patent Documents 1 and 2).

JP 09-284242 A JP 07-94984 A

  In a conventional satellite-mounted digital receiver, when an excessive interference wave different from a desired communication signal is input to the receiver, an analog circuit amplifier or A / D (analog / digital) converter upstream stage is used. The D converter is saturated and waveform distortion occurs. Thereby, not only the signal of the frequency band which received the interference wave but also the communication quality of the signal of the adjacent frequency band deteriorates.

  When an AGC circuit is provided, saturation of the amplifier or A / D converter can be avoided. However, when an excessive interference wave is received, AGC is applied to suppress the signal level, so that the desired signal level is reduced at the same time, and the communication quality of the satellite-mounted digital receiver deteriorates. It was.

  The present invention has been made to solve the problem, and an object of the present invention is to suppress interference waves while ensuring communication quality even when excessive interference waves are received.

  An interference wave suppression receiving apparatus according to the present invention includes a level detection circuit that detects a reception signal and detects the presence or absence of an interference wave based on a reception level, a tunable notch filter that suppresses an interference wave in a specific frequency band, and A variable gain attenuator for adjusting the gain of the received signal detected by the level detection circuit, an A / D converter for converting the received signal whose gain is adjusted by the variable gain attenuator to a digital signal, and the A / D conversion An automatic gain control circuit that automatically adjusts the gain of the variable gain attenuator so that the level of the input signal to the detector is constant, and the presence or absence of an interference wave detected by the level detection circuit. A selector that selectively switches between a path that passes through and a path that does not pass through the notch filter, and a digital signal converted by the A / D converter is split into a plurality of channels having different frequency bands. A channel having a detected interference wave as well as detecting the presence / absence of an interference wave for each channel by measuring a branching circuit and a reception level for each channel split by the branching circuit and comparing with a predetermined threshold When there is an interference wave in the level control circuit and the gain control circuit, the channel in which the interference wave exists is detected by the tunable notch filter. And a control circuit set as a specific frequency band to be suppressed.

  According to the present invention, a level detection circuit for detecting the presence or absence of an interference wave is provided in the analog portion, and a gain control circuit for detecting the presence or absence of the interference wave and the frequency of the interference wave is provided for each channel in the digital portion. By selecting a tunable notch filter based on detection information, it is possible to suppress interference waves while ensuring communication quality.

1 is a diagram showing a configuration of an interference wave suppression receiving apparatus according to Embodiment 1. FIG. 5 is a diagram illustrating an example of a processing procedure for interference wave removal according to Embodiment 1. FIG. 1 is a diagram illustrating a configuration of an AGC circuit according to a first embodiment. 1 is a diagram illustrating a configuration of a gain control circuit according to a first embodiment. 2 is a diagram illustrating a configuration of an amplitude and phase correction circuit according to Embodiment 1. FIG. 3 is a diagram showing a configuration of a tunable notch filter according to Embodiment 1. FIG.

Embodiment 1 FIG.
1 is a diagram showing a configuration of an interference wave suppression receiving apparatus according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating an example of a processing procedure of interference wave removal of the interference wave suppression receiving apparatus 100 according to the first embodiment. In FIG. 1, an interference wave suppression receiving apparatus 100 according to the first embodiment includes a level detection circuit 1, a selector (SEL) 2, a variable gain attenuator 3, an A / D converter 4, an AGC circuit 5, a branching circuit 6, It comprises a gain control circuit 7, a switch 8, a multiplexing circuit 9, a D / A converter 10, a tunable notch filter 11, and a control circuit 12.

  The level detection circuit 1 receives a reception signal from a reception antenna (not shown). The first output terminal of the level detection circuit 1 is connected to the first input terminal of the subsequent selector 2 and the input side of the tunable notch filter 11. The second input terminal of the selector 2 is connected to the output side of the tunable notch filter 11. The output side of the selector 2 is connected to the input side of the subsequent gain variable attenuator 3. The output side of the variable gain attenuator 3 is connected to the input side of the A / D converter 4 at the subsequent stage. The output side of the A / D converter 4 is connected to the input side of the subsequent branching circuit 6. The AGC circuit 5 has an input side connected to the output side of the A / D converter 4 and an output side connected to the input side of the variable gain attenuator 3. The output side of the branching circuit 6 is connected to the input side of the subsequent gain control circuit 7. The output side of the gain control circuit 7 is connected to the input side of the subsequent switch 8. The output side of the switch 8 is connected to the input side of the subsequent multiplexing circuit 9. The output side of the multiplexing circuit 9 is connected to the input side of the subsequent D / A converter 10. The first input terminal of the control circuit 12 is connected to the second output terminal of the level detection circuit 1 at the first input terminal. A second input terminal of the control circuit 12 is connected to a control signal output terminal of the gain control circuit 7. The first output terminal of the control circuit 12 is connected to the control signal input terminal of the selector 2. The second output terminal of the control circuit 12 is connected to the control signal input terminal of the gain control circuit 7. A third output terminal of the control circuit 12 is connected to a control signal input terminal of the tunable notch filter 11.

  FIG. 3 is a diagram showing a configuration of the AGC circuit 5 according to the first embodiment. In FIG. 3, the AGC circuit 5 includes a power conversion unit 51, an averaging unit 52, a comparison unit 53, a control value generation unit 54, and a voltage conversion unit 55. The input side of the power conversion unit 51 is connected to the output side of the A / D converter 4 described above. The input side of the averaging unit 52 is connected to the input side of the comparison unit 53. The output side of the comparison unit 53 is connected to the input side of the control value generation unit 54. The voltage converter 55 is connected to the output side of the control value generator 54. The output side of the voltage converter 55 is connected to the input side of the variable gain attenuator 3 described above.

  FIG. 4 is a diagram showing the configuration of the gain control circuit 7 according to the first embodiment. In FIG. 4, the gain control circuit 7 includes an amplitude and phase correction circuit 71, a power conversion unit 72, an averaging unit 73, and a comparison and determination unit 74. The input side of the amplitude and phase correction circuit 71 is connected to the output side of the branching circuit 6 described above. The output side of the amplitude and phase correction circuit 71 is connected to the input side of the switch 8 described above. The power conversion unit 72 has an input side connected to the output side of the branching circuit 6 and an output side connected to the input side of the averaging unit 73. The output side of the averaging unit 73 is connected to the input side of the comparison and determination unit 74. The output side of the comparison and determination unit 74 is connected to the control signal output terminal of the control circuit 12.

FIG. 5 is a diagram showing a configuration of the amplitude and phase correction circuit 71 according to the first embodiment. In FIG. 5, the amplitude and phase correction circuit 71 includes a multiplier 711, a multiplier 712, a multiplier 713, a multiplier 714, a subtractor 715, and an adder 716. The in-phase component I output terminal of the branching circuit 6 is input to the first in-phase component input terminal of the multiplier 711 and the first in-phase component input terminal of the multiplier 713. The quadrature component Q output terminal of the branching circuit 6 is input to the first quadrature component input terminal of the multiplier 712 and the first quadrature component input terminal of the multiplier 714. The amplitude and phase correction circuit 71 receives a frequency characteristic correction request signal. The in-phase component X of the correction value S ₂ in the frequency characteristic correction request signal is input to the second in-phase component input terminal of the multiplier 711 and the second in-phase component input terminal of the multiplier 714. Orthogonal component Y of the correction value S ₂ in the frequency characteristic correction request signal is input to the second quadrature component input terminal of the second quadrature component input terminal and the multiplier 713 of the multiplier 712.

  FIG. 6 is a diagram showing a configuration of the tunable notch filter 11 according to the first embodiment. In FIG. 6, the tunable notch filter 11 is composed of variable capacitor elements 111, 112, 113 and resistors 114, 115, 116. A series circuit of the resistor 114 and the resistor 115 and a series circuit of the variable capacitor element 112 and the variable capacitor element 113 are connected in parallel. A connection point between the resistor 114 and the resistor 115 is connected to one end side of the variable capacitor element 111. The other end side of the variable capacitor element 111 is grounded. A connection point between the variable capacitor element 112 and the variable capacitor element 113 is connected to one end side of the resistor 116. The other end side of the resistor 116 is grounded. As described above, the third output terminal of the control circuit 12 is connected to the control signal input terminal of the tunable notch filter 11, and the control voltage is input to the variable capacitor elements 111, 112, and 113, respectively. At this time, the control voltage input to the variable capacitor elements 111, 112, and 113 may be the same control signal or different control signals.

Next, the operation of interference wave suppression receiving apparatus 100 according to Embodiment 1 will be described using FIG. 1 to FIG.
In FIG. 1, the received signal of the interference wave suppression receiving apparatus 100 is input to the level detection circuit 1. The level detection circuit 1 measures the received power of the received signal and detects the received power level (reception level). The level detection circuit 1 detects the presence or absence of an interference wave based on this reception level, and outputs the information to the first input terminal of the control circuit 12. For example, when the reception level of the level detection circuit 1 is equal to or higher than a predetermined threshold, it is determined that the interference wave exists, and information indicating the presence of the interference wave is output to the control circuit 12. Further, when the reception level of the level detection circuit 1 is smaller than a predetermined threshold value, it is determined that there is no interference wave, and information indicating the absence of interference wave is output to the control circuit 12.

  First, in the selector 2, a path for directly inputting the output of the level detection circuit 1 to the variable gain attenuator 3 is selected and switched to the first input terminal. The selector 2 inputs an input signal from the first input terminal to the variable gain attenuator 3. The variable gain attenuator 3 changes the attenuation based on the control voltage from the AGC circuit 5, and adjusts the gain of the input voltage from the selector so that the voltage level inputted to the A / D converter 4 is always constant. Variable.

The demultiplexing circuit 6 demultiplexes the input signal into N (N is an integer of 2 or more) different frequency bands (channels) using a digital filter, and inputs the demultiplexed signal for each channel to the gain control circuit 7. . The gain control circuit 7 calculates the power for each channel and determines the presence / absence of an interference wave for each channel. When there is an interference wave, the gain control circuit 7 outputs channel number information for identifying the channel in which the interference wave exists from the control signal output terminal to the second input terminal of the control circuit 12. In the gain control circuit 7, based on the frequency characteristic correction request from the second output terminal of the control circuit 12 input to the control signal input terminal, the gain control circuit 7 includes the input signal for each channel demultiplexed by the demultiplexing circuit 6. Then, the amplitude and phase of the signal are corrected for a specific channel, and the corrected signal is output to the switch 8. Further, in the gain control circuit 7, the input signal for each channel demultiplexed by the demultiplexing circuit 6 based on the frequency characteristic correction request from the second output terminal of the control circuit 12 input to the control signal input terminal. Among them, for other channels other than the specific channel, the input signal is output to the switch 8 as it is without correcting the amplitude and phase of the signal.
In the gain control circuit 7, when the frequency characteristic correction request from the second output terminal of the control circuit 12 is not input, the input signal for each channel demultiplexed by the demultiplexing circuit 6 is set as the signal amplitude. The signal is output to the switch 8 as it is without correcting the phase.

  The switch 8 selects an output path for each output signal from the gain control circuit 7 and inputs the output signal to the multiplexing circuit 9. In the multiplexing circuit 9, N input signals are multiplexed, and the combined digital signal is converted into an analog signal via the D / A converter 10. A transmitter (see FIG. (Not shown) performs frequency modulation and signal amplification, generates a transmission signal, and outputs the generated transmission signal to a transmission antenna (not shown).

  When both the level detection circuit 1 and the gain control circuit 7 determine that an interference wave exists, the control circuit 12 outputs a switching request from the first output terminal based on the information indicating the presence of the interference wave, and A switching request is input to the control signal input terminal of the selector 2. At the same time, when both the level detection circuit 1 and the gain control circuit 7 determine that an interference wave exists, the control circuit 12 outputs the frequency characteristic correction request from the second output terminal, and the frequency characteristic The correction request is input to the control signal input terminal of the gain control circuit 7. When the level detection circuit 1 or the gain control circuit 7 determines that the interference wave exists, the control circuit 12 does not output the frequency characteristic correction request from the second output terminal.

  When a switching request is input from the control circuit 12, the selector 2 selects a path through which the output of the level detection circuit 1 is input to the second input terminal of the selector 2 via the tunable notch filter 11. The tunable notch filter 11 changes the frequency characteristics by changing the capacitance of the variable capacitor elements (111, 112, 113) based on the control voltage output from the third output terminal of the control circuit 12, and the interference wave Repress. The control circuit 12 outputs a control voltage for changing the capacitance of the variable capacitor elements (111, 112, 113) so as to change the frequency specification of the tunable notch filter 11 so as to form a notch portion in a specific channel. .

  Further, after the level detection circuit 1 determines that the reception level is larger than the predetermined threshold value and the presence of the interference wave exists, the level detection circuit 1 detects the disappearance of the interference wave when the reception level becomes lower than the predetermined threshold value. Information on the absence of a wave is sent to the control circuit 12. At this time, when the control circuit 12 receives the information indicating that there is no interference wave from the level detection circuit 1 and detects that the state has changed from the presence of the interference wave to the absence of the interference wave, the control circuit 12 applies to the control signal input terminal of the selector 2. Output a switch request. When a switching request is input from the control circuit 12, the selector 2 switches to a path through which the output of the level detection circuit 1 is input to the first input terminal of the selector 2 without passing through the tunable notch filter 11. At the same time, the output of the frequency characteristic correction request to the control signal input terminal of the gain control circuit 7 is canceled. Further, when the gain control circuit 7 detects a state in which the frequency characteristic correction request from the second output terminal of the control circuit 12 is not input to the control signal input terminal, the gain control circuit 7 determines for each channel demultiplexed by the demultiplexing circuit 6. The input signal is output to the switch 8 as it is without correcting the amplitude and phase of the signal.

Next, a detailed processing procedure of interference wave removal of the interference wave suppression receiving apparatus 100 according to Embodiment 1 will be described with reference to FIGS.
FIG. 2A shows an example of a baseband signal input from the A / D converter 4 to the branching circuit 6. The baseband signal includes a desired main signal and an interference wave, and FIG. 2A shows their spectrum. In the example shown in FIG. 2A, the spectrum of the interference wave overlaps a part of the spectrum band of the main signal. The demultiplexing circuit 6 demultiplexes the signal illustrated in FIG. 2A into N frequency bands (channels). FIG. 2 shows an example in which N = 8.

  FIG. 2B shows the frequency characteristics of eight channels for performing demultiplexing in the baseband signal input from the A / D converter 4 to the demultiplexing circuit 6. The dotted lines shown in FIG. 2 (b) indicate the frequency characteristics of the eight channels for demultiplexing. The demultiplexing circuit 6 may be a digital filter that demultiplexes by connecting a plurality of low-pass filters (half-band filters) in a tree shape. Alternatively, it may be a digital filter using a demultiplexing method combining a polyphase filter and FFT (Fast Fourier Transform). The branching circuit 6 having a structure in which half-band filters are connected in a tree shape is described in, for example, International Publication No. WO2010 / 064485 and International Publication No. WO2011 / 065287, and therefore detailed description thereof is omitted here.

  FIG. 2C shows an example of a spectrum obtained by cutting out the signals (signal (1) to signal (8)) of each channel demultiplexed into eight by the demultiplexing circuit 6. Here, an example is shown in which the gain control circuit 7 detects the presence of an interference wave in the third channel.

  FIG. 2D shows an example of the filter characteristic of the tunable notch filter 11 in the third channel, and the frequency characteristic is a curve having a null whose amplitude drops at a V-shaped notch (notch portion). There is no. FIG. 2D shows that the interference wave existing in the third channel is suppressed by the tunable notch filter 11. As described above, the tunable notch filter 11 can remove the interference wave existing in the specific channel by making the notch portion correspond to the specific frequency (channel). Further, as shown in FIG. 2 (d), the corners of the spectrum waveform are dropped by the tunable notch filter 11 in the signals of the second and fourth channels (peripheral channels) adjacent to the third channel, and the frequency characteristics are reduced. It has deteriorated.

  FIG. 2E shows a spectrum after the gain control circuit 7 corrects the amplitude and phase of the signals of the second and fourth channels adjacent to the third channel. Thus, the application of the tunable notch filter 11 eliminates the interference wave of the third channel. As a result, the second and fourth adjacent channels whose frequency characteristics deteriorate are corrected for the amplitude and phase of the spectrum, the deteriorated spectrum waveform is restored, and the frequency characteristics are corrected.

Here, the detailed operation of each component of the AGC circuit 5 will be described with reference to FIG.
The power converter 51 of the AGC circuit 5 obtains the power value of the signal output from the A / D converter 4. The averaging unit 52 averages the power value obtained by the power conversion unit 51 and outputs it as an average power value. The comparison unit 53 compares the average power value of each channel obtained by the averaging unit 52 with a preset threshold value, and determines whether the difference between the average power value and the threshold value and whether the average power value is larger or smaller than the threshold value. Input to the generation unit 54. The control value generator 54 generates an attenuation control value that is variable by the variable gain attenuator 3 based on the input information from the comparator 53. The voltage converter 55 converts the control value generated by the control value generator 54 into a control voltage, and sets the control voltage of the variable gain attenuator 3. The variable gain attenuator 3 varies the amount of attenuation based on the control voltage input from the voltage converter 55.

Next, detailed operation of each component of the gain control circuit 7 will be described with reference to FIG.
The power conversion unit 72 of the gain control circuit 7 obtains the power value of the signal of each channel that is demultiplexed into eight by the demultiplexing circuit 6. The averaging unit 73 averages the power value obtained by the power conversion unit 72 and outputs it as an average power value. The comparison and determination unit 74 compares the average power value of each channel obtained by the averaging unit 73 with a predetermined threshold value. For each channel, the comparison and determination unit 74 determines that the interference wave exists when the average power value is equal to or greater than the threshold value, and determines that the interference wave does not exist when the average power value is equal to or less than the threshold value. The determination result and the channel number for which the determination has been made are output to the control circuit 12. The control circuit 12 inputs the information indicating the presence of the interference wave and the channel number where the interference wave exists to the amplitude and phase correction circuit 71. The amplitude and phase correction circuit 71 of the gain control circuit 7 shows the frequency characteristics deteriorated by the tunable notch filter 11 based on the information on the presence of the interference wave input from the control circuit 12 and the channel number where the interference wave exists. Correct to the original characteristics.
Since this correction value is uniquely determined from the frequency to be removed at the notch portion of the tunable notch filter 11, it can be obtained in advance.

Next, the detailed operation of the amplitude and phase correction circuit 71 will be described with reference to FIG.
If the signal output from the branching circuit 6 of the amplitude and phase correction circuit 71 is S ₁ , its in-phase component is I, its quadrature component is Q, and its phase is θ ₁ , S ₁ is expressed by the following equation (1). The

Here, the amplitude and phase of S ₁ are corrected by the correction value S ₂ included in the frequency characteristic correction request signal from the control circuit 12. Assuming that the in-phase component of S ₂ is X, the quadrature component is Y, and the phase is θ ₂ , S ₂ is expressed by the following equation (2).

Here, B is a value that varies depending on the amplitude to be corrected, and θ ₂ is a value that varies depending on the phase to be corrected. The signal after amplitude and phase correction is expressed by the following equation (3), and can be generated using the multipliers 711 to 714, the subtracter 715, and the adder 716 shown in FIG.

As a result, the frequency characteristic deteriorated in the tunable notch filter 11 as shown in FIG. 2 (e) is obtained for the channel having the deteriorated frequency characteristic adjacent to the channel in which the interference wave exists as shown in FIG. 2 (d). It becomes possible to correct the amplitude and phase. If there is no interference wave, the amplitude and phase correction function by the amplitude and phase correction circuit 71 is not necessary. In this case, B = 1 and θ ₂ = 0 in equation (2). These correction values may be given to the amplitude and phase correction circuit 71 as vector information of {X, Y}.

Next, the detailed operation of the tunable notch filter 11 will be described with reference to FIG.
As the variable capacitor elements 111 to 113 of the tunable notch filter 11, elements whose capacitance is changed by a control voltage such as a varicap diode are used. By changing the capacitance of the variable capacitor elements 111 to 113 based on the control voltage output from the control circuit 12, the filter frequency characteristic of the tunable notch filter 11 is changed, and the interference wave is suppressed in the channel where the interference wave exists. To do. For example, by reducing the capacitance of the variable capacitor element 111, the frequency f ₀ of the variable capacitor element 111 is grounded shifts to a higher frequency range. At this time, in the frequency region from the low region toward the frequency f ₀ , the current flowing through the resistor 114 and the resistor 115 gradually decreases. On the other hand, by reducing the capacitance of the variable capacitor element 112, the cut-off frequency _{f 0} by a variable capacitor element 112, 113 is shifted to the higher frequency range. At this time, in the frequency region from the frequency f ₀ toward the high region, the current passing through the variable capacitor elements 112 and 113 gradually increases. That is, when the capacitances of the variable capacitor elements 111 to 113 are reduced, the null position of the tunable notch filter 11 is shifted to the high frequency region side, so that interference waves can be removed by a channel in a higher frequency region. On the contrary, when the capacitance of the variable capacitor elements 111 to 113 is increased, the null position of the tunable notch filter 11 is shifted to the low frequency region side so that the interference wave can be removed by the channel in the lower frequency region. Become. Based on the channel number information in which the interference wave exists, the control circuit 12 adjusts the variable capacitor element so that the specific channel corresponding to the channel number information is a frequency band in which the interference wave of the specific channel is suppressed. A control voltage for setting the capacitances 111 to 113 is output.

  As shown in FIG. 2E, each signal after demultiplexing with the corrected amplitude and phase is input to the multiplexing circuit 9 via the switch 8 at the final stage. The switch 8 is not necessarily required. For example, the switch 8 is used when it is desired to combine with other signals that are similarly demultiplexed, or when it is desired to change the center frequency of the signal. In this case, for each signal after demultiplexing that has passed through the gain control circuit 7, the connection destination to the plurality of input ports of the multiplexing circuit 9 is controlled by switching the connection between the input source and the output destination by the switch 8. It becomes.

  The multiplexing circuit 9 multiplexes N input signals from the switch 8 into one channel by a digital filter. By this multiplexing, it is possible to obtain a signal spectrum in which only positions where interference waves are mixed are removed. The D / A converter 10 performs D / A conversion on the combined signal and transmits the signal to a transmitter, a transmission antenna, and the like.

  Through such a series of processing, the interference wave suppression receiving apparatus according to Embodiment 1 can realize signal relay that automatically removes interference waves using a tunable notch filter.

  In the interference wave suppression receiving apparatus according to the first embodiment, the combined signal may be output as it is without D / A conversion, and demodulated and decoded by an external demodulator and error corrector. In this case, a demodulator having interference resistance can be obtained.

  In the first embodiment, the tunable notch filter 11 has been described as having a single configuration. However, the tunable notch filter 11 need not be a single configuration, and is configured by M (M is an integer of 1 or more) tunable notch filters. Similarly, interference waves may be removed by M notch portions.

  Interference wave suppression receiving apparatus 100 according to Embodiment 1 detects a received signal, detects level of an interference wave based on the reception level, and tunable notch that suppresses an interference wave in a specific frequency band. A filter 11, a gain variable attenuator 3 for adjusting the gain of the reception signal detected by the level detection circuit 1, and an A / D conversion for converting the reception signal gain-adjusted by the gain variable attenuator 3 into a digital signal The automatic gain control circuit 5 for automatically adjusting the gain of the variable gain attenuator 3 so that the input signal level to the A / D converter 4 is constant, and the level detection circuit 1. The selector 2 that selectively switches between the path that passes through the tunable notch filter 11 and the path that does not pass through the presence or absence of the detected interference wave, and the digital signal converted by the A / D converter 4 A demultiplexing circuit 6 for demultiplexing into a plurality of channels having different frequency bands, and a reception level for each channel demultiplexed by the demultiplexing circuit 6 is measured, and whether there is an interference wave for each channel by comparison with a predetermined threshold And a gain control circuit 7 that corrects the amplitude and phase of the channels around the detected interference wave, and the level detection circuit 1 and the gain control circuit 7 have interference waves. And a control circuit 12 for setting a channel in which a wave exists as a specific frequency band in which an interference wave is suppressed by the tunable notch filter 11. Further, the gain control circuit 7 corrects the frequency characteristic of the signal deteriorated by the tunable notch filter 11. The tunable notch filter 11 varies the frequency characteristics depending on the position of the channel where the interference wave exists.

  Thus, by providing a level detection circuit for detecting the presence / absence of interference waves in the analog portion and a gain control circuit for detecting the presence / absence of interference waves and the frequency of interference waves for each channel in the digital portion, the detection information of the two detection circuits is used. By selecting the tunable notch filter 11, it is possible to suppress interference waves while ensuring communication quality.

  1 level detection circuit, 2 selector, 3 gain variable attenuator, 4 A / D converter, 5 AGC circuit, 6 demultiplexing circuit, 7 gain control circuit, 8 switch, 9 multiplexing circuit, 10 D / A converter, 11 Tunable Notch Filter, 12 Control Circuit, 51 Power Conversion Unit, 52 Averaging Unit, 53 Comparison Unit, 54 Control Value Generation Unit, 55 Voltage Conversion Unit, 100 Interference Wave Suppression Receiver, 711, 712, 713, 714 Multiplication , 715 subtractor, 716 adder, 111, 112, 113 variable capacitor element, 114, 115, 116 resistance.

Claims (3)

A level detection circuit that detects a received signal and detects the presence or absence of an interference wave based on the received level;
A tunable notch filter that suppresses interference waves in a specific frequency band;
A variable gain attenuator for adjusting the gain of the received signal detected by the level detection circuit;
An A / D converter for converting the received signal whose gain is adjusted by the variable gain attenuator into a digital signal;
An automatic gain control circuit for automatically adjusting the gain of the variable gain attenuator so that the input signal level to the A / D converter is constant;
A selector that selectively switches between a path that passes through the tunable notch filter and a path that does not pass by the presence or absence of an interference wave detected by the level detection circuit;
A demultiplexing circuit for demultiplexing the digital signal converted by the A / D converter into a plurality of channels having different frequency bands;
Measure the reception level for each channel demultiplexed by the demultiplexing circuit, detect the presence or absence of interference wave for each channel by comparison with a predetermined threshold, and for the channels around the channel having the detected interference wave A gain control circuit for correcting the amplitude and phase;
A control circuit that sets a channel in which an interference wave exists when the interference wave is present in the level detection circuit and the gain control circuit as a specific frequency band for suppressing the interference wave by the tunable notch filter;
An interference wave suppression receiving apparatus.   2. The interference wave suppression receiving apparatus according to claim 1, wherein the gain control circuit corrects a frequency characteristic of a signal deteriorated by the tunable notch filter.   3. The interference wave suppression receiving apparatus according to claim 1, wherein the tunable notch filter varies a frequency characteristic depending on a position of a channel in which an interference wave exists.

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