JP2014173944A - Monitor circuit for radar system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a monitor circuit for radar system capable of reducing adverse effect on a reception path with a small size.SOLUTION: The monitor circuit for radar system includes: a switch control circuit which has a first oscillator connected to a coupler circuit next to a high frequency amplifier circuit in a reception path of input signals in the radar system and oscillates at an oscillation frequency f2 different from a carrier frequency f1 of the input signal, a second oscillator that oscillates at an oscillation frequency f3, a multiplication circuit that multiplies an oscillation output of the second oscillator to output a signal of frequency f4, and a first switch circuit that performs ON/OFF control on the output of the multiplication circuit, and when ON, outputs a signal of frequency f4; a second switch circuit that performs ON/OFF control on the oscillation output of the first oscillator with the switch control circuit, and when ON, outputs a signal of oscillation frequency f2; and a filter circuit that selects an exclusive disjunction of an output signal from the first switch circuit and an output signal from the second switch circuit to output a signal of carrier frequency f1 to the coupler circuit.

Description

  Embodiments described herein relate generally to a monitor circuit used for monitoring a reception system of a radar apparatus.

  In a radar apparatus or the like, a monitor circuit that monitors whether a receiving system is operating normally is known.

  The radar apparatus constantly monitors whether the apparatus is operating normally. This normal operation check is generally performed by generating a reference monitor signal and returning it to the reception system to check whether the level is normal.

  By the way, at present, IC control and substrate state monitoring are performed also on a high frequency (RF) substrate, and a mixture of RF circuits and digital circuits has become mainstream.

  FIG. 1 shows a conventional configuration example of a radar apparatus monitor circuit in which a digital circuit and an RF circuit are mixed. For example, the reception signal processing unit 11 to which the reception high-frequency signal of the carrier wave f1 is input filters the high-frequency amplifier circuit 12, the coupler circuit 13 having the amplified high-frequency signal as one input, and the output of the coupler circuit 13. The filter circuit 14 includes a mixer circuit 15 that mixes the output of the filter circuit 14, a filter circuit 16 that filters the mixed output, and an amplifier circuit 17 that amplifies the output of the filter circuit 16.

  The output of the operation monitoring unit 21 is input as the other input of the coupler circuit 13 of the reception signal processing unit 11. The operation monitoring unit 21 includes an oscillator 22 that continuously oscillates at an oscillation frequency f1, a switch circuit 23 that passes the output for a predetermined period, a switch control circuit 24 that controls the switch circuit 23, and a switch control circuit. And an oscillator 25 for driving 24. The operation monitoring unit 21 is placed close to the reception signal processing unit 11 for miniaturization and the like.

  However, the oscillator 22 oscillates at the frequency f1 at all times, that is, when the reception signal processing unit 11 is operating. Therefore, not only when the switch circuit 23 is turned on, but also when the switch circuit 23 is turned off, the output of the oscillator 22 enters the sneak coupler circuit 13 and adversely affects the reception performance of the radar. The effect is particularly great when the received signal is weak. Therefore, in order to avoid this adverse effect, the operation monitoring unit 21 is desired to be separated from the reception signal processing unit 11, but as the distance is increased, the overall apparatus becomes larger.

Japanese Patent Laid-Open No. 5-164841

  An object of the present invention is to provide a monitor circuit for a radar apparatus that does not adversely affect a reception path and can be miniaturized.

  One embodiment is a radar apparatus monitor circuit provided by being connected to a coupler circuit provided after a high-frequency amplifier circuit in a reception path of a reception signal of a radar apparatus, and having an oscillation frequency different from the carrier frequency f1 of the reception signal a first oscillator that oscillates at f2, a second oscillator that oscillates at an oscillation frequency f3 different from the carrier frequency f1 of the received signal, and a multiplier that multiplies the oscillation output of the second oscillator and outputs a signal of frequency f4. A circuit and a switch control circuit having a first switch circuit that outputs the signal of the frequency f4 when the output is on and off, and the oscillation of the first oscillator controlled by the switch control circuit. A second switch circuit for controlling on / off of the output and outputting a signal of the oscillation frequency f2 when the output is on; and an output signal of the first switch circuit An exclusive OR circuit that takes an exclusive OR of the output signals of the second switch circuit, and a filter circuit that receives the output signal of the exclusive OR circuit and outputs the signal of the carrier frequency f1 to the coupler circuit And a monitor circuit for a radar apparatus.

It is a figure which shows the structural example of the monitor circuit for conventional radar apparatuses. It is a figure which shows the structural example of the monitor circuit for radar apparatuses of one Embodiment.

  Hereinafter, an embodiment will be described with reference to the drawings. A configuration example of one embodiment of the present invention is shown in FIG.

  For example, the received signal processing unit 31 of the radar apparatus to which a received high-frequency signal having a carrier frequency f1 is input includes a high-frequency amplifier circuit 32, a coupler circuit 33 having the amplified high-frequency signal as one input, and the coupler circuit 33. A filter circuit 34 that filters the output of the filter circuit, a mixer circuit 35 that mixes the output of the filter circuit 34 with a local oscillation signal, and a filter that converts the frequency by filtering the output mixed by the mixer circuit 35 and extracting the difference signal A circuit 36 and an amplifier circuit 37 for amplifying the low frequency signal output from the filter circuit 36 are provided.

  The output of the operation monitoring unit 41 is input as the other input of the coupler circuit 33 of the reception signal processing unit 31. The operation monitoring unit 41 includes an oscillator 42 that continuously oscillates at an oscillation frequency f2, a switch circuit 43 that passes the output of the oscillator 42 for a predetermined period, a switch control circuit 44 that controls the switch circuit 43, a switch An oscillator 45 having an oscillation frequency f3 for driving the control circuit 44, a multiplication circuit 46 built in the switch control circuit 44, a switch circuit 46S provided at the output terminal of the multiplication circuit 46, and a frequency f4 of the output of the switch circuit 46S And an exclusive OR (XOR) circuit 47 for taking an exclusive OR of the signal of the switch circuit 43 and a filter circuit 48 having the output of the XOR circuit 47 as an input and the other input of the coupler circuit 33 as an input. . The filter circuit 34, the filter circuit 36, and the filter circuit 48 all have a band-pass filter function.

  The output frequency of the oscillator 45 is f3, and this output is multiplied by n (integer) times, for example, 6 times by the multiplication circuit 46 in the switch control circuit 44. Therefore, f4 = n × f3.

  The sum or difference is taken by the XOR circuit 47, and this is filtered by the filter circuit 48 and input to the coupler circuit at the frequency f1, so that f1 = f2 + f4 = f2 + nf3 or f1 = f2-f4 = f2-nf3. .

  The switch control circuit 44 is configured by, for example, an FPGA (Field-Programmable Gate Array).

  Next, the operation of this embodiment will be described. Normally, the switch circuit 43 is off when the radar apparatus is operating. Therefore, the received signal of the carrier frequency f1 received by the radar antenna passes through the high frequency amplifier circuit 32, the coupler circuit 33, the filter circuit 34, and the amplifier circuit 37 as a low frequency signal in the mixer circuit 35 and the filter circuit 36. After entering, it is amplified and processed for display.

  The switch control circuit 44 turns on the switch circuit 43 in, for example, the last part after processing the reception signal of one cycle scanned by the radar antenna. Then, the oscillation output signal having the frequency f 2 is input from the oscillator 42 to the exclusive OR circuit 47 via the switch circuit 43. The switch circuit 43 is controlled by a switch control circuit 44. The switch control circuit 44 is further controlled from an external circuit.

  On the other hand, the oscillation output of the frequency f3 from the oscillator 45 is multiplied by the multiplication circuit 46 in the switch control circuit 44, and is input to the exclusive OR circuit 47 through the switch circuit 46S. The output of the exclusive OR circuit 47 is filtered by the filter circuit 48 and input to the coupler circuit 33. The output signal is processed by the filter circuit 34, the mixer circuit, the filter circuit 36 and the amplifier circuit to monitor whether the radar receiving system is operating normally.

  In this embodiment, the oscillation frequency f2 of the oscillator 42 and the oscillation frequency f3 of the oscillator 45 are different from the carrier frequency f1 of the received signal. There is little adverse effect. In such an embodiment, the number of oscillators can be the same as in the case shown in FIG. 1, and the size is not increased.

  According to the present embodiment, it is possible to obtain a radar apparatus monitor circuit that is less likely to adversely affect the reception path and can be miniaturized.

  In particular, when the switch control circuit is configured by an FPGA, it is possible to reduce the size without affecting the performance.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

11, 31... Received signal processing unit 12, 32... High frequency amplifier circuit 13, 33... Coupler circuit 14, 16, 34, 36. Mixer circuit 17, 37 ... Amplifier circuit 21, 41 ... Operation monitoring unit 22, 25, 42, 45 ... Oscillator 23, 43 ... Switch circuit 24,44 ... Switch Control circuit

Claims (3)

A radar device monitor circuit provided connected to a coupler circuit provided after a high frequency amplifier circuit in a reception path of a reception signal of a radar device,
A first oscillator that oscillates at an oscillation frequency f2 different from the carrier frequency f1 of the received signal;
A second oscillator that oscillates at an oscillation frequency f3 different from the carrier frequency f1 of the received signal;
A switch having a multiplier circuit that multiplies the oscillation output of the second oscillator and outputs a signal of frequency f4, and a first switch circuit that outputs the signal of frequency f4 when the output of this multiplier circuit is on-off controlled and turned on. A control circuit;
A second switch circuit controlled by the switch control circuit to control the on / off of the oscillation output of the first oscillator, and to output a signal of the oscillation frequency f2 when on;
An exclusive OR circuit that takes an exclusive OR of the output signal of the first switch circuit and the output signal of the second switch circuit;
A filter circuit that receives the output signal of the exclusive OR circuit and outputs the signal of the carrier frequency f1 to the coupler circuit;
A monitor circuit for a radar apparatus having   The sum or difference of the frequency of the output signal multiplied by the multiplication circuit between the oscillation frequency f2 of the output of the first oscillator and the oscillation frequency f3 of the output of the second oscillator matches the carrier frequency f1. The radar circuit monitor circuit according to claim 1.   3. The radar apparatus monitor circuit according to claim 1, wherein the switch control circuit is configured by an FPGA.

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