JP2014168164A - Ifft clock adjustment device, digital television broadcast device, and method of adjusting ifft clock - Google Patents

Abstract

PROBLEM TO BE SOLVED: To successfully maintain an MER of a broadcast RF signal without being affected by temperature variation and the like of an oscillation output from a voltage-controlled oscillator that becomes a base of an IFFT clock.SOLUTION: An IFFT clock adjustment device 100 applies DAC data that is set, to a voltage-controlled oscillator 40 via a DAC 20, and thereby, supplies an oscillation output having a frequency depending on the analog signal to an OFDM modulator 71 as a clock signal. By using digital value generation means (a counter 50) generating a digital value that changes depending on an oscillation frequency (or an oscillation cycle) on the basis of the oscillation output outputted from the voltage-controlled oscillator 40, and an MER measurement unit 80, the DAC data is updated while measuring an MER of the broadcast RF signal. The digital value at the time when an almost-maximum value of the measurement value is obtained is recorded in a non-volatile memory 30 as a target digital value. Thereafter, the digital value based on the oscillation output of the voltage-controlled oscillator 40 and the target digital value are compared with each other successively, and the DAC data is updated until an error between both digital values is in a predetermined range.

Description

  The present invention relates to an IFFT clock adjusting device, for example, an IFFT clock adjusting device for an OFDM modulator used in a digital television broadcasting device such as an independent broadcasting device that distributes independent broadcasting content to a plurality of distribution destinations, and an IFFT clock adjusting method. .

  The accuracy of the IFFT clock frequency used in the OFDM modulator determines the modulation error (MER) characteristics that are the basic performance of the OFDM modulator. That is, the higher the accuracy of the IFFT clock frequency, the better the MER characteristic. MER is a modulation error ratio of OFDM modulation by an OFDM modulator, and is a numerical value representing the difference between the amplitude and phase transmitted from a broadcasting station in digital modulation and the actual amplitude and phase. . It can be said that the higher the MER value (dB value), the higher the signal quality.

  Therefore, conventionally, when an OFDM modulator is used in a broadcast station, an IFFT clock is generated by using a phase locked loop (PLL) from a highly accurate 10 MHz clock source (an oscillator having a frequency error of about ± 0.25 ppm). , MER characteristics are improved.

  By the way, in a simple independent broadcasting device or the like, it is not preferable to mount such a high-accuracy 10 MHz clock source because of high cost. Therefore, a voltage is directly applied to the VCXO oscillator by using a digital analog converter (DAC) to a VCXO (Voltage Controlled Xtal Oscillator) oscillator which is a kind of a voltage controlled oscillator (VCO) that generates an IFFT clock. By finely adjusting the IFFT clock, the MER characteristics are improved. The VCXO oscillator is obtained by replacing the LC-VCO coil (L) with a crystal oscillator (XTAL), and has high frequency stability.

  According to this method, it becomes easy to improve the accuracy of the IFFT clock with a relatively simple configuration. However, the temperature characteristic of the VCXO oscillator becomes a problem. The MER characteristic of the broadcast RF signal greatly depends on the frequency of the IFFT clock generated from the VCXO. The temperature characteristics of existing VCXO oscillators are not good, and even if the adjusted DAC voltage is constant, the characteristics of the VCXO oscillators fluctuate due to temperature fluctuations. As a result, the MER characteristics deteriorated.

  The present invention has been made in such a background, and its purpose is to maintain the MER of the broadcast RF signal satisfactorily without being affected by the temperature fluctuation of the oscillation output of the voltage controlled oscillator which is the basis of the IFFT clock. The present invention provides an IFFT clock adjusting device, a digital television broadcasting device, and an IFFT clock adjusting method.

  An IFFT clock adjusting apparatus according to the present invention is an IFFT clock for an OFDM modulator used in a digital television broadcasting apparatus having an OFDM modulator that receives a broadcast TS and performs OFDM modulation and an upconverter that converts the output into a broadcast RF signal. This is an IFFT clock adjusting device for adjusting. The IFFT clock adjustment device generates a digital-analog converter that converts set DAC data into an analog signal, and an oscillation output having a frequency corresponding to the analog signal output from the digital-analog converter. A voltage-controlled oscillator to be supplied as a clock signal, digital value generating means for generating a digital value that changes depending on an oscillation frequency or an oscillation cycle based on an oscillation output output from the voltage-controlled oscillator, and the broadcast RF While performing the MER measurement by the MER measuring device that measures the MER based on the signal, the DAC data is updated, and the digital value when the almost maximum value of the measured value is obtained is used as a target digital value in a nonvolatile manner. Data recording means for recording and control means are provided. The control means controls the setting / update of the DAC data, the MER measurement by the MER measuring instrument, and the operation of the data recording means, and the digital value generation is performed after the digital value is recorded by the data recording means. The digital value obtained from the means and the target digital value are sequentially compared, and the DAC data is updated according to the error until the error between the two digital values falls within a predetermined range.

  In this configuration, by adjusting the oscillation frequency of the voltage controlled oscillator by updating the DAC data and measuring the MER, the oscillation frequency or the oscillation cycle at which the MER has a substantially maximum value is specified. The oscillation frequency or oscillation cycle at this time is obtained as a digital value generated by the digital value generating means. By using an external reference clock having a relatively good temperature characteristic for this digital value generating means, it is possible to generate a digital value with relatively high accuracy even with respect to temperature fluctuations. Therefore, the recorded digital value is used as a subsequent target digital value. When the frequency of the oscillation output of the voltage controlled oscillator fluctuates due to factors such as temperature change and secular change, the digital value of the digital value generating means deviates from the target digital value. In this case, the error between the two digital values is considered to be proportional to the fluctuation amount of the oscillation frequency of the voltage controlled oscillator. Therefore, the desired frequency of the oscillation output of the voltage controlled oscillator is maintained by updating the DAC data in accordance with this error until the error between both digital values falls within a predetermined range.

  In this way, it is possible to automatically compensate for frequency fluctuations due to temperature fluctuations of the voltage controlled oscillator output that is the basis of the IFFT clock. As a result, the fluctuation of the IFFT clock frequency can be minimized and the MER can be maintained well.

  Further, the data recording means records the DAC data in a non-volatile manner as reference DAC data when the MER measuring instrument obtains a substantially maximum measured value, and the control means has an error between the two digital values. The reference DAC data may be increased or decreased according to the error until it falls within a predetermined range. With this configuration, if the reference DAC data is increased or decreased according to the error, the frequency of the oscillation output of the voltage controlled oscillator is adjusted in a direction in which the error approaches 0 relatively quickly and reliably.

  As the digital value generating means, a counter that outputs a count value obtained by counting the oscillation output output from the voltage controlled oscillator for a unit time as the digital value can be employed. Alternatively, it is possible to employ a counter that outputs a count value obtained by counting a reference clock as the digital value within a period in which a predetermined number of pulses of the oscillation output output from the voltage controlled oscillator are counted.

  In addition, in order to detect the maximum value of the MER, the control means first measures the MER at a coarse frequency interval in a wide frequency range, and then in a narrow frequency range including the maximum value found in the coarse frequency interval. MER may be measured at finer frequency intervals. With this configuration, the maximum value can be obtained relatively quickly.

  A digital television broadcast apparatus according to the present invention includes a broadcast apparatus having an OFDM modulator that performs OFDM modulation upon receiving a broadcast TS, and an upconverter that converts the output into a broadcast RF signal, and OFDM modulation used in the OFDM modulator. And an IFFT clock adjusting device for adjusting a functional IFFT clock. The IFFT clock adjustment device generates a digital-analog converter that converts set DAC data into an analog signal, and an oscillation output having a frequency corresponding to the analog signal output from the digital-analog converter, and the OFDM modulator A voltage-controlled oscillator to be supplied as a clock signal, digital value generating means for generating a digital value that changes depending on an oscillation frequency or an oscillation cycle based on an oscillation output output from the voltage-controlled oscillator, and the broadcast RF Based on the signal, the DAC data is updated while performing the MER measurement by the MER measuring device that measures the MER, and the digital value when the almost maximum value of the measured value is obtained is recorded in a nonvolatile manner as the target digital value. Data recording means for controlling, and control means. The control means controls the setting / update of the DAC data, the MER measurement by the MER measuring instrument, and the operation of the data recording means, and the digital value generation is performed after the digital value is recorded by the data recording means. The digital value obtained from the means and the target digital value are sequentially compared, and the DAC data is updated until the error between the two digital values falls within a predetermined range.

  The IFFT clock adjustment method according to the present invention is an IFFT clock for an OFDM modulator used in a digital television broadcasting apparatus having an OFDM modulator that receives a broadcast TS and performs OFDM modulation and an upconverter that converts the output into a broadcast RF signal. This is an IFFT clock adjustment method for adjusting. In this IFFT clock adjustment method, the set DAC data is input to a digital-analog converter and converted into an analog signal, and the analog signal is applied to a voltage-controlled oscillator so that a frequency corresponding to the analog signal is obtained. Supplying an oscillation output as a clock signal to the OFDM modulator, measuring a MER based on a broadcast RF signal output from the upconverter using a MER measuring instrument, and from the voltage controlled oscillator Using the digital value generation means for generating a digital value that changes depending on the oscillation frequency or oscillation cycle based on the output oscillation output, the DAC data is updated while measuring MER, Non-volatile recording of the digital value when the maximum value is obtained as the target digital value The step of sequentially comparing the digital value obtained from the digital value generation means and the target digital value after the digital value is recorded in a non-volatile manner, and the error between the two digital values is within a predetermined range And updating the DAC data.

  According to the present invention, the MER of the broadcast RF signal can be favorably maintained without being affected by the temperature fluctuation of the oscillation output of the voltage controlled oscillator that is the basis of the IFFT clock.

1 is a block diagram illustrating a configuration example of a digital television broadcasting device (also simply referred to as a digital broadcasting device) in an embodiment of the present invention. FIG. 2 is a block diagram for explaining MER measurement processing for measuring MER and recording DAC data and count values in a nonvolatile memory as an initial operation of the digital broadcast apparatus shown in FIG. 1. It is a flowchart showing the processing flow of MER measurement control in embodiment of this invention. FIG. 2 is a block diagram for explaining automatic frequency adjustment control as an operation during operation of the digital broadcast apparatus shown in FIG. 1. It is a flowchart showing the process flow of the frequency automatic adjustment control demonstrated in FIG. It is a figure for demonstrating the specific process sequence for the MER measurement control demonstrated in FIG. It is a block diagram which shows the structural example of the digital television broadcasting apparatus which concerns on the modification of embodiment shown in FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 illustrates a configuration example of a digital television (TV) broadcasting device (also simply referred to as a digital broadcasting device) in this embodiment.

  This digital broadcast apparatus is generally composed of a TV broadcast apparatus 70, a MER measuring device 80, and an IFFT clock adjustment apparatus 100.

  Broadcast apparatus 70 includes an OFDM modulator 71 and an up-converter 73.

  For example, the OFDM modulator 71 receives a transport signal (broadcast TS) including an SD / HD-MPEG2 signal and a data broadcast signal, performs OFDM modulation, and generates an OFDM modulated output. The up-converter 73 converts this OFDM modulation output into an RF signal (broadcast RF signal) of a desired channel such as VHF / UHF / CATV. The RF signal is transmitted to a television receiver (usually a plurality of units) via a mixer or the like as necessary, or is transmitted as a radio wave via an antenna 90.

  The IFFT clock adjustment device 100 includes a control unit 10, a digital analog converter (DAC) 20, a nonvolatile memory 30, a voltage controlled oscillator 40, a counter 50, and a timer 60.

  The control unit 10 includes a central control unit (CPU), a memory, and the like (not shown), and executes control of each unit of the IFFT clock adjustment device and software processing for realizing functions necessary for the digital broadcast device. In this embodiment, the MER measurement control unit 11 and the frequency adjustment control unit 14 are included as such functions.

  The digital-analog converter (DAC) 20 is a circuit that converts DAC data, which is digital data, supplied from the control unit 10 (inside the MER measurement control unit 11) into a corresponding analog signal.

  The nonvolatile memory 30 is a storage device (data recording means) such as an EEPROM that retains stored data even when the power is turned off. In this embodiment, the nonvolatile data is stored (recorded) in a nonvolatile manner. ) And a storage area 33 for storing (recording) digital values in a nonvolatile manner.

  The voltage controlled oscillator (VCXO oscillator) 40 is a circuit that generates an oscillation output having a frequency proportional to the magnitude (voltage value in this case) of the analog signal supplied from the DAC 20. The oscillation output of the VCXO oscillator 40 is supplied to the OFDM modulator 71 as a clock signal that is the basis of the IFFT clock. In the present embodiment, the above-described VCXO oscillator is used. Although the present invention is not particularly limited, the target frequency of the oscillation output (clock signal) of the VCXO oscillator 40 in this example is a frequency (65 MHz) that is eight times the IFFT clock. A clock signal obtained from the VCXO oscillator 40 is used as a system clock of the OFDM modulator 71.

  The timer 60 is a timed circuit that is activated by the control unit 10 and generates an output signal (timeout signal) every time the number of reference clock pulses corresponding to a predetermined unit time is counted (that is, when the unit time expires). The unit time in the present embodiment is about 1 second, and a clock obtained from an external, for example, 27 MHz temperature-compensated crystal oscillator (TCXO) is used as the reference clock. However, the reference clock used in the present invention is not limited to 27 MHz. In the present invention, the frequency accuracy of the reference clock is not necessarily high. That is, the variation in oscillation frequency (error with respect to the nominal value) of each temperature-compensated crystal oscillator that generates the reference clock does not matter. Even if the error of the actual frequency value with respect to the nominal value is large, it is sufficient if the temperature change and the secular change of the actual frequency value are small.

  The counter 50 and the timer 60 function as digital value generation means in the present invention. That is, the counter 50 counts the number of output pulses of the VCXO oscillation output within a unit time according to the output of the timer 60 (timeout signal), and generates the count value as a digital value. The count value within the unit time corresponds to the oscillation frequency of the VCXO oscillation output. The number of bits of the counter 50 is a number of bits (for example, 32 bits) that can sufficiently count a clock signal having a target frequency (65 MHz in this example) within a unit time.

  The MER measuring device 80 is a device that measures the MER of the RF signal output from the up-converter 73. As described above, the MER, which is a modulation error ratio of OFDM modulation by the OFDM modulator, is a numerical value representing the difference between the amplitude and phase transmitted from the broadcasting station in digital modulation and the actual amplitude and phase. It can be said that the higher the MER value (dB value), the higher the signal quality.

  The MER measurement control unit 11 in the control unit 10 has functions to control the setting / update of DAC data, the MER measurement by the MER measuring device 80, the count operation (digital value generation operation) by the counter 50, and the operation of the data recording means. Have. More specifically, as an initial operation of the digital broadcasting apparatus, MER measurement processing using the MER measuring device 80 is executed, and the oscillation output of the VCXO oscillator 40 by the counter 50 is output at a specific time determined according to the processing result. The counted value is recorded in the storage area 33 in the nonvolatile memory 30 as a target count value (target digital value). Further details of the MER measurement process in the control unit 10 will be described later. Further, the DAC data at the same point is recorded in the storage area 31.

  After the count value (digital value) is recorded in the nonvolatile memory 30, the frequency adjustment control unit 14 in the control unit 10 calculates the count value within the unit time for counting the oscillation output of the VCXO oscillator 40 and the target count value. It has a function of sequentially comparing and updating the DAC data until the error of both count values falls within a predetermined range.

  In addition, although each part in the control part 10 was shown as what is implement | achieved by the software process by CPU, some or all of them may be implement | achieved by hardware.

  Hereinafter, a specific operation of the present embodiment having such a configuration will be described.

  FIG. 2 is a block diagram for explaining MER measurement processing for measuring MER and recording DAC data and count values in a nonvolatile memory as an initial operation of the digital broadcasting apparatus shown in FIG. FIG. 3 shows a processing flow when this processing is executed by the control unit 10 (inside the MER measurement control unit 11). Such MER measurement processing can be performed at the start of operation of the digital broadcasting apparatus and when necessary.

  In this MER measurement process, the MER measurement control unit 11 in the control unit 10 first outputs the initially set DAC data to the DAC 20 to convert the DAC data into a corresponding analog signal (S11). The analog signal output from the DAC 20 is applied to the VCXO oscillator 40 (voltage controlled oscillator), and an oscillation output having a frequency corresponding to the analog signal is output and provided to the OFDM modulator 71 as a clock signal that is the basis of the IFFT clock. It is done.

  The OFDM modulator 71 performs OFDM modulation on the broadcast TS received from the outside according to the IFFT clock. The output is converted into a broadcast RF signal by the up-converter 73 and output.

  The MER measuring device 80 receives the broadcast RF signal and measures the MER. The MER measurement control unit 11 confirms the MER value of the measurement result from the MER measuring device 80 (S12) and determines the maximum value (peak value) (S13). Further, the DAC data is updated until the maximum value is detected (S14), and the determination process of the maximum value is continued.

  When the maximum value of the MER is detected, that is, when the maximum value of the measured value is obtained (S13, Yes), the determination process is exited, and the current count value of the counter 50 is set as the target count value in the nonvolatile memory. 30 recording areas 33 are recorded (S15). At the same time, the current DAC data is recorded as reference DAC data in the storage area 31 of the nonvolatile memory 30 (S16). The order of steps S15 and S16 may be reversed.

  FIG. 4 is a block diagram for explaining automatic frequency adjustment control as an operation at the time of operation of the digital broadcast apparatus shown in FIG. FIG. 5 shows a processing flow when this processing is executed by the control unit 10 (internal frequency adjustment control unit 14).

  The frequency adjustment control unit 14 first reads the target count value from the nonvolatile memory 30 and inputs it to one input terminal of the comparison unit 12 (S21). Next, the reference DAC data is read from the nonvolatile memory 30 and input to the VCXO oscillator 40 via the DAC 20 (S22). In practice, the reference DAC data is configured such that its value can be increased or decreased by the adder / subtractor 13 as shown in FIG. The adder / subtractor 13 is initially in a state of adding (or through) 0.

  Next, the timer 60 is started (S23). The timer 60 generates a time-out signal indicating the expiration timing of the set time every unit time (here, 1 second). The frequency adjustment control unit 14 compares the count value of the VCXO oscillation output within the unit time obtained in synchronization with the timeout signal with the target count value (S24). This count may be performed continuously a plurality of times, and an average value of a plurality of measurement results may be obtained. The frequency adjustment control unit 14 monitors whether or not the error of both count values is within a predetermined range set in advance (S25). If it is within the predetermined range, the process returns to step S24 to continue monitoring the error within the unit time. In this case, the DAC data given to the DAC 20 is maintained as it is.

  When the error deviates from the predetermined range set in advance (No in S25), the reference DAC data is increased or decreased by a predetermined amount by the adder / subtractor 13 according to the error (S26). Whether to increase or decrease is determined based on the sign of the error. For example, when the count value is out of a predetermined range below the target count value, the frequency of the VCXO oscillation output is increased by increasing the DAC data by a predetermined amount. On the contrary, when the count value deviates to a higher side than the target count value, the frequency of the VCXO oscillation output is decreased by decreasing the DAC data by a predetermined amount. In this way, the DAC data is updated according to the error until the error of both count values falls within the predetermined range.

  Then, it returns to step S24 and repeats said process. As a result, even if the frequency of the oscillation output of the VCXO oscillator 40 fluctuates due to an error factor, the DAC data is finely adjusted with the target count value when the almost maximum MER value is obtained during the MER measurement process as a target. Become. Therefore, the frequency of the desired VCXO oscillation output, that is, the frequency of the IFFT clock can be maintained with high accuracy according to the target frequency by this frequency automatic adjustment control. As a result, the MER value can be maintained almost at the maximum regardless of the existence of error factors such as temperature characteristics and aging of the VCXO oscillator.

  For example, a 27 MHz clock having a relatively good temperature characteristic as a reference clock is mounted on an existing OFDM modulator, and the use of this clock does not increase the cost. The VCXO oscillator is also implemented because it is a basic function of the existing OFDM modulator. A non-volatile memory or the like is usually mounted on a digital broadcasting apparatus. A DAC for applying a voltage to the VCXO oscillator is also mounted on the simple modulator. As described above, any component used in the present embodiment does not need to be specially added, and does not increase the cost of the digital broadcasting apparatus. Further, the good temperature characteristic of the VCXO oscillator is not particularly required in the present invention. If the accuracy of the MER adjustment is set to a high accuracy, fluctuations due to aging and temperature characteristics of the VCXO oscillator can be managed by a digital value called a count value of a counter as a digital value generating means, so that the OFDM modulation characteristics are remarkably improved. be able to.

  Here, a method for obtaining the maximum value of MER relatively quickly will be described. In the measurement of MER, it is sufficient to update the value of the DAC data within the variable range of the DAC data at a predetermined frequency interval with a necessary frequency resolution, and measure the value of MER at each value. However, such sequential scan processing requires processing time.

  FIG. 6 is a diagram for explaining a specific processing procedure for MER measurement control capable of shortening the processing time.

  In order to efficiently detect the maximum value of MER, first, as shown in FIG. 6A, MER is measured in a wide frequency range and a rough frequency interval. Next, as shown in FIG. 6B, MER is measured at a finer frequency interval in a narrow frequency range (local frequency range) including the maximum value found in the coarse frequency interval. Here, a two-stage frequency interval is used, but one or three or more stages may be used.

  FIG. 7 shows a configuration example of a digital television broadcast apparatus according to a modification of the embodiment shown in FIG. Only differences from the configuration of FIG. 1 will be described.

  In this configuration, a counter 50 a is used instead of the counter 50, and a counter 65 is used instead of the timer 60. The counter 50 in the configuration of FIG. 1 counts the number of output pulses of the VCXO oscillation output within a unit time, whereas the counter 50a in the configuration of FIG. 7 has a predetermined number (n) of pulses of VCXO oscillation output. Count. When the counter 50a counts n pulses, it generates an n pulse count output. The counter 65 sequentially measures the time from when the counter 50a starts counting the VCXO oscillation output to when generating the n-pulse count output based on the reference clock. The reference clock may be a 27 MHz clock as described above, but is not limited thereto. The numerical value n can be set according to the value of the target oscillation frequency of the VCXO oscillator, for example. This measured time is output as a digital value that is a count value of the counter 65, and corresponds to an n pulse period of the VCXO oscillation output, that is, a time that is n times one period. The digital value obtained by the counter 65 changes depending on the oscillation period of the VCXO oscillation output. In this configuration, the counter 50a and the counter 65 function as digital value generating means.

  In the configuration of FIG. 7, when the reference DAC data is increased or decreased by a predetermined amount by the adder / subtractor 13 according to the error, the relationship between the sign of the error and the increase / decrease of the DAC data is reversed from the configuration of FIG. That is, when the count value is out of the predetermined range to the side lower than the target count value (that is, when the oscillation period is shortened), the frequency of the VCXO oscillation output is reduced by decreasing the DAC data by a predetermined amount. Reduce. Conversely, when the count value deviates to a higher side than the target count value (that is, when the oscillation period becomes longer), the frequency of the VCXO oscillation output is increased by increasing the DAC data by a predetermined amount.

  The preferred embodiments of the present invention have been described above, but various modifications and changes other than those mentioned above can be made. For example, the timeout time of the timer 60 is 1 second, but it is not necessarily limited to 1 second. The configuration in which the DAC data is recorded in a non-volatile manner as the reference DAC data, and then the reference DAC data is used is not necessarily required in the present invention. Although VCXO is used as a voltage controlled oscillator, it is not necessarily limited to VCXO.

  A computer program for realizing the functions (or method steps) described in the above embodiments by a computer and a recording medium storing the program in a computer-readable manner can also be included in the present invention.

DESCRIPTION OF SYMBOLS 10 ... Control part 11 ... MER measurement control part 12 ... Comparison part 13 ... Addition / subtraction part 14 ... Frequency adjustment control part 20 ... Digital analog converter (DAC)
30: Non-volatile memory (data recording means)
31 ... DAC data storage area 33 ... Count value storage area 40 ... Voltage controlled oscillator (VCXO)
50, 50a ... counter (digital value generating means)
60. Timer (digital value generating means)
65 ... Counter (Digital value generating means)
70 ... TV broadcasting device 71 ... OFDM modulator 73 ... up converter 80 ... MER measuring device 90 ... antenna 100 ... IFFT clock adjusting device

Claims (9)

An IFFT clock adjusting device that adjusts an IFFT clock for an OFDM modulator used in a digital television broadcasting device having an OFDM modulator that performs OFDM modulation in response to a broadcast TS and an up-converter that converts the output into a broadcast RF signal. And
A digital-to-analog converter for converting the set DAC data into an analog signal;
A voltage-controlled oscillator that generates an oscillation output of a frequency corresponding to an analog signal output from the digital-analog converter and supplies the oscillation signal as a clock signal to the OFDM modulator;
A digital value generating means for generating a digital value that changes depending on an oscillation frequency or an oscillation cycle based on an oscillation output output from the voltage controlled oscillator;
The DAC data is updated while performing the MER measurement by the MER measuring device that measures the MER based on the broadcast RF signal, and the digital value when the almost maximum value of the measured value is obtained is set as the target digital value. Data recording means for recording in a nonvolatile manner;
Control means,
The control means includes
While controlling the setting and updating of the DAC data, the MER measurement by the MER measuring instrument, and the operation of the data recording means,
After the digital value is recorded by the data recording means, the digital value obtained from the digital value generating means and the target digital value are sequentially compared,
An IFFT clock adjustment device that updates the DAC data until an error between both digital values falls within a predetermined range. The data recording means records the DAC data in a non-volatile manner as reference DAC data when an almost maximum value of the measurement value is obtained by the MER measuring instrument,
The IFFT clock adjustment apparatus according to claim 1, wherein the control unit increases or decreases the reference DAC data according to the error until an error between both digital values falls within a predetermined range.   3. The IFFT clock adjustment device according to claim 1, wherein the digital value generation unit includes a counter that outputs a count value obtained by counting an oscillation output output from the voltage controlled oscillator for a unit time as the digital value.   2. The digital value generating means includes a counter that outputs a count value obtained by counting a reference clock as the digital value within a period in which a predetermined number of pulses of oscillation output output from the voltage controlled oscillator are counted. 2. The IFFT clock adjustment device according to 2.   In order to detect the maximum value of the MER, the control means first measures the MER in a coarse frequency interval over a wide frequency range, and then finer in a narrow frequency range including the maximum value found in the coarse frequency interval. The IFFT clock adjustment apparatus according to claim 1, wherein MER is measured at a frequency interval. A broadcasting device having an OFDM modulator that receives the broadcast TS and performs OFDM modulation, and an upconverter that converts the output into a broadcast RF signal;
An IFFT clock adjusting device for adjusting an IFFT clock for the OFDM modulator used in the OFDM modulator,
The IFFT clock adjustment device includes:
A digital-to-analog converter for converting the set DAC data into an analog signal;
A voltage-controlled oscillator that generates an oscillation output of a frequency corresponding to an analog signal output from the digital-analog converter and supplies the oscillation signal as a clock signal to the OFDM modulator;
A digital value generating means for generating a digital value that changes depending on an oscillation frequency or an oscillation cycle based on an oscillation output output from the voltage controlled oscillator;
Based on the broadcast RF signal, the DAC data is updated while performing the MER measurement by the MER measuring device that measures the MER, and the digital value when the almost maximum value of the measured value is obtained is nonvolatile as the target digital value. Data recording means for recording automatically,
Control means,
The control means includes
While controlling the setting and updating of the DAC data, the MER measurement by the MER measuring instrument, and the operation of the data recording means,
After the digital value is recorded by the data recording means, the digital value obtained from the digital value generating means and the target digital value are sequentially compared,
A digital television broadcasting apparatus that updates the DAC data until an error between both digital values falls within a predetermined range. The data recording means records the DAC data in a non-volatile manner as reference DAC data when an almost maximum value of the measurement value is obtained by the MER measuring instrument,
The digital television broadcasting apparatus according to claim 6, wherein the control unit increases or decreases the reference DAC data according to the error until an error between both digital values falls within a predetermined range. An IFFT clock adjustment method for adjusting an IFFT clock for an OFDM modulator used in a digital television broadcasting apparatus having an OFDM modulator that receives a broadcast TS and performs OFDM modulation and an up-converter that converts the output into a broadcast RF signal. And
Inputting the set DAC data into a digital-analog converter and converting it into an analog signal;
Supplying the analog signal as a clock signal to the OFDM modulator, by applying the analog signal to a voltage controlled oscillator,
Measuring the MER based on the broadcast RF signal output from the upconverter using a MER measuring instrument;
The DAC data is updated while measuring the MER by using a digital value generating means for generating a digital value that changes depending on the oscillation frequency or the oscillation cycle based on the oscillation output output from the voltage controlled oscillator. Recording the digital value in a non-volatile manner as a target digital value when a substantially maximum measured value is obtained;
After the digital value is recorded in a nonvolatile manner, sequentially comparing the digital value obtained from the digital value generating means and the target digital value;
An IFFT clock adjustment method comprising: updating the DAC data until an error between both digital values falls within a predetermined range. Further comprising the step of recording the DAC data as a reference DAC data in a non-volatile manner when the MER measuring instrument obtains a substantially maximum value of the measured value,
The IFFT clock adjustment method according to claim 8, wherein in the step of updating the DAC data, the reference DAC data is increased or decreased according to the error until an error between both digital values falls within a predetermined range.

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