JP2014155261A - Semiconductor drive device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor drive device that can change a gate voltage of a switching element to a desired voltage value with high accuracy when an overcurrent flows.SOLUTION: The semiconductor drive device includes a capacitor C1 connected in parallel to a gate of a switching element Q1 via a switch SW1, and a voltage control circuit 40 for controlling a voltage of the capacitor C1 within a predetermined voltage range including a threshold voltage of the switching element Q1 while no overcurrent is detected through the switching element Q1. When an overcurrent is detected through the switching element Q1, the switch SW1 is turned on to interconnect the gate and the capacitor C1.

Description

  The present invention relates to a semiconductor drive device that conducts a gate of a switching element and a capacitor connected in parallel to the gate when an overcurrent flows through the switching element.

  For example, in Patent Document 1, when the switching element is short-circuited, the gate of the switching element is quickly reduced to a voltage value slightly higher than the threshold voltage of the switching element. A technique for conducting the capacitor is disclosed.

International Publication WO2001 / 063764

  However, in the above-described prior art, even if the gate of the switching element is made conductive to the capacitor, the gate voltage of the switching element may not reach a desired voltage value if the capacitance of the capacitor varies. For example, the gate voltage may be lower than the threshold voltage of the switching element at a high speed, or high-speed voltage reduction may be terminated at a voltage away from the threshold voltage.

  An object of the present invention is to provide a semiconductor drive device that can change a gate voltage of a switching element to a desired voltage value with high accuracy when an overcurrent flows through the switching element.

In order to achieve the above object, the present invention provides:
A capacitor connected through a switch in parallel to the gate of the switching element;
A voltage control circuit that controls the voltage of the capacitor within a predetermined voltage range including a threshold voltage of the switching element when no overcurrent is detected in the switching element;
The present invention provides a semiconductor drive device in which when the overcurrent is detected in the switching element, the gate and the capacitor are turned on by turning on the switch.

  According to the present invention, when an overcurrent flows, the voltage of the gate of the switching element can be changed to a desired voltage value with high accuracy.

1 is a circuit diagram of a semiconductor drive device according to an embodiment of the present invention. Timing chart during normal operation Timing chart when overcurrent is detected Illustration of charge distribution Simulation circuit diagram of conventional circuit Simulation circuit diagram of semiconductor drive device according to one embodiment of the present invention Simulation waveform of the conventional circuit when overcurrent is detected Simulation waveform of semiconductor drive device according to one embodiment of the present invention when overcurrent is detected Simulation waveform of the conventional circuit when overcurrent is detected Simulation waveform of semiconductor drive device according to one embodiment of the present invention when overcurrent is detected Simulation waveform of the conventional circuit when overcurrent is detected Simulation waveform of semiconductor drive device according to one embodiment of the present invention when overcurrent is detected Simulation waveform of the conventional circuit when overcurrent is detected Simulation waveform of semiconductor drive device according to one embodiment of the present invention when overcurrent is detected Switch example 1 is a circuit diagram of a semiconductor drive device according to an embodiment of the present invention.

  FIG. 1 is a circuit diagram showing a configuration of a semiconductor drive device 1 according to an embodiment. The semiconductor drive device 1 may be configured by an integrated circuit or may be configured by discrete components.

  The semiconductor drive device 1 is a semiconductor circuit that includes a switching element Q1, a drive circuit 30, and an overcurrent detection device 60, and protects the switching element Q1 from driving and overcurrent. The switching element Q1 may be a semiconductor element on the same substrate as the overcurrent detection device 60 and / or the drive circuit 30, or may be a semiconductor element on a substrate different from the overcurrent detection device 60 and / or the drive circuit 30. .

  The switching element Q1 is an insulated gate voltage controlled semiconductor element, and performs an on / off operation. Specific examples thereof include power transistor elements such as IGBTs and MOSFETs. FIG. 1 shows an IGBT as an example of the switching element Q1. Hereinafter, for convenience of explanation, it is assumed that the switching element Q1 is an IGBT. In the case of a MOSFET, it is better to read by replacing “collector” with “drain” and “emitter” with “source”.

  The gate terminal G of the switching element Q1 is, for example, a control electrode connected to the drive circuit 30 via a gate resistor Rg connected in series to the gate terminal G. FIG. 1 illustrates a gate-on resistance Ron and a gate-off resistance Roff as the gate resistance Rg. The gate on resistance Ron and the gate off resistance Roff may be shared by a single gate resistance. The collector terminal C of the switching element Q1 is connected to, for example, a first power supply potential section (for example, a high potential power supply section such as a positive electrode of a power supply) via another semiconductor switching element (not shown), a load, or directly. A first main electrode. The emitter terminal E of the switching element Q1 is, for example, a low potential power supply unit such as a negative electrode of a power supply connected to another semiconductor switching element or load (not shown) or a second power supply potential unit (for example, ground (GND)) ) Is connected to the second main electrode.

  A diode D1 is formed between the collector terminal C and the emitter terminal E of the switching element Q1. The diode D1 may be a diode additionally connected in parallel to the switching element Q1, or may be a body diode that is a parasitic element formed between the collector terminal C and the emitter terminal E. It is also possible to use the diode part of the reverse conducting IGBT as the diode D1.

  The switching element Q1 has a parasitic capacitance between the electrodes. The switching element Q1 includes an input capacitance Cies that is parasitic between the gate terminal G and the emitter terminal E, a feedback capacitance Cres that is parasitic between the gate terminal G and the collector terminal C, a collector terminal C, and an emitter terminal E. There is a parasitic output capacitance Coes. The diode D1 also has a parasitic diode capacitance Cdi between the anode and the cathode.

  The switching element Q1 is turned on or off according to the voltage value of the gate voltage Vg1 at the gate terminal G. The switching element Q1 has a threshold voltage Vth at which the switching element Q1 is switched on and off as a gate voltage characteristic, and is turned on when the voltage value of the gate voltage Vg1 is equal to or higher than the threshold voltage Vth, and the voltage value of the gate voltage Vg1 is the threshold voltage Vth. Turn off when less than. The gate voltage Vg1 is a potential difference between the electrodes in which the input capacitance Cies is generated. Specifically, the gate voltage Vg1 is a potential difference between the gate terminal G and the emitter terminal E.

  The drive circuit 30 is a drive unit that controls the gate voltage Vg1 of the gate terminal G of the switching element Q1 to a voltage value for turning on or off the switching element Q1 via the gate resistance Rg according to a drive signal supplied from the outside. is there. The drive circuit 30 turns on the switching element Q1 by changing the gate voltage Vg1 to a voltage value equal to or higher than the threshold voltage Vth, and turns off the switching element Q1 by changing the gate voltage Vg1 to a voltage value lower than the threshold voltage Vth. .

  In the case of FIG. 1, the drive circuit 30 includes a high-side switching element Q2 connected to the high-potential power supply unit set to the power supply voltage Vcc and a low-side power supply unit connected to the low-potential power supply unit set to the ground voltage GND. And a switching element Q3. Switching elements Q2 and Q3 may be elements similar to switching element Q1, and may be, for example, MOSFETs or bipolar transistors. FIG. 1 illustrates the case where the switching element Q2 is a P-channel MOSFET and the switching element Q3 is an N-channel MOSFET.

  The drive circuit 30 applies the power supply voltage Vcc to the gate terminal G via the gate-on resistance Ron constituted by the gate resistance Rg by turning on the high-side switching element Q2 and turning off the low-side switching element Q3. Thereby, since the gate voltage Vg1 becomes a voltage value equal to or higher than the threshold voltage Vth, the switching element Q1 is turned on.

  On the other hand, the drive circuit 30 applies the ground voltage GND to the gate terminal G through the gate-off resistance Roff configured by the gate resistance Rg by turning off the high-side switching element Q2 and turning on the low-side switching element Q3. To do. Thereby, since the gate voltage Vg1 becomes a voltage value lower than the threshold voltage Vth, the switching element Q1 is turned off.

  Further, when the overcurrent detection device 60 detects that an overcurrent of a predetermined current value or more has flowed to the switching element Q1, the drive circuit 30 generates the gate voltage Vg1 through the gate resistor Rg and the switching element Q1. The voltage is controlled to forcibly turn off. For example, in the case of FIG. 1, the drive circuit 30 turns off the switching element Q2 and turns off the switching element Q3 when the overcurrent detection device 60 detects that an overcurrent of a predetermined current value or more has flowed to the switching element Q1. To do. The drive circuit 30 may turn off the switching element Q2 and turn on the switching element Q3 when it is detected by the overcurrent detection device 60 that an overcurrent of a predetermined current value or more has flowed into the switching element Q1. .

  A specific example of the drive circuit 30 is a microcomputer including a CPU. The drive circuit 30 may be a circuit that controls the gate voltage Vg1 in accordance with a signal supplied from a microcomputer.

  The overcurrent detection device 60 is a circuit including a circuit that detects the presence or absence of an overcurrent flowing through the switching element Q1. The overcurrent detection device 60 outputs an overcurrent detection signal (abnormal signal) indicating that an overcurrent has been detected, for example, when it is detected that an overcurrent of a predetermined current value or more has flowed through the switching element Q1. To do. On the other hand, the overcurrent detection device 60 detects, for example, an overcurrent non-detection signal (normal signal) indicating that no overcurrent has been detected when it is not detected that an overcurrent of a predetermined current value or more has flowed through the switching element Q1. ) Is output.

  In the case of FIG. 1, the overcurrent detection device 60 includes a short circuit protection circuit 50 and a capacitor voltage control circuit 40. The short circuit protection circuit 50 includes a short circuit detection circuit 20 and a gate voltage reduction circuit 70.

  The short circuit detection circuit 20 is an overcurrent detection circuit that detects an overcurrent flowing between the collector terminal C and the emitter terminal E of the switching element Q1. The method for detecting the overcurrent flowing through the switching element Q1 may be arbitrary.

  The short circuit detection circuit 20 detects an overcurrent of the switching element Q1 based on a sense voltage generated in an overcurrent detection unit such as a shunt resistor connected in series to the emitter terminal E or the collector terminal C of the switching element Q1, for example. .

  The switching element Q1 may be an insulated gate voltage control semiconductor element with a current sense function. In this case, the short circuit detection circuit 20 detects the overcurrent of the switching element Q1 based on a sense voltage generated in an overcurrent detection unit such as a sense resistor connected in series to the sense emitter terminal ES of the switching element Q1, for example. May be.

  The short-circuit detection circuit 20 detects an overcurrent non-detection signal (for example, a low-level detection signal SS1) indicating that no overcurrent is detected when an overcurrent flow exceeding a predetermined current value is not detected in the switching element Q1. Is output. On the other hand, the short circuit detection circuit 20 detects an overcurrent detection signal (for example, a high level detection signal SS1) indicating that an overcurrent has been detected when an overcurrent flow of a predetermined current value or more is detected in the switching element Q1. ) Is output.

  The gate voltage reduction circuit 70 is a circuit that lowers the gate voltage Vg1 by means different from the capacitor C1 described later when an overcurrent flow of a predetermined current value or more is detected in the switching element Q1. In the case of FIG. 1, the gate voltage reduction circuit 70 includes a resistor RoffL and a switching element Q4 connected in parallel to the gate terminal G via the resistor RoffL. The switching element Q4 is inserted between the resistor RoffL and the low potential power supply unit set to the ground voltage GND.

  The gate voltage reduction circuit 70 is used when an overcurrent flow of a predetermined current value or more is not detected in the switching element Q1 (for example, when an overcurrent non-detection signal is output or when no overcurrent detection signal is output) ), Turning off the switching element Q4. On the other hand, the gate voltage reduction circuit 70 outputs an overcurrent detection signal when an overcurrent flow exceeding a predetermined current value is detected in the switching element Q1 (for example, when no overcurrent non-detection signal is output). Switching element Q4 is turned on. When the switching element Q4 is turned on, the voltage value of the gate voltage Vg1 decreases.

  The switching element Q4 may be the same element as the switching element Q1, and may be, for example, a MOSFET or a bipolar transistor. FIG. 1 illustrates the case where the switching element Q4 is an N-channel MOSFET.

  The capacitor voltage control circuit 40 controls the voltage Vc1 of the capacitor C1 within a predetermined voltage range including the threshold voltage Vth of the switching element Q1 when no overcurrent exceeding a predetermined current value is detected in the switching element Q1. The capacitor C1 is connected in parallel to the gate terminal G of the switching element Q1, and is connected to the gate terminal G via the switch SW1. The capacitor C1 is inserted between the switch SW1 and the low potential power supply unit set to the ground voltage GND.

  FIG. 15 is a circuit example of the switch SW1 made of a semiconductor. The switch SW1 illustrated in FIG. 15 has a configuration in which an N-channel MOSFET 15 and an N-channel MOSFET 16 having gates connected in common are connected in series. With this configuration, for example, when the switch SW1 is turned off to make the gate terminal G and the capacitor C non-conductive, leakage current can be prevented from flowing from the capacitor C to the gate terminal G or from the gate terminal G to the capacitor C. .

  In the case of FIG. 1, the capacitor voltage control circuit 40 includes a capacitor connection control circuit 41 and a capacitor charge control circuit 42.

  The capacitor connection control circuit 41 is a circuit that selectively switches between connection and non-connection between the capacitor C1 and the gate terminal G by driving the switch SW1 on and off. For example, the capacitor connection control circuit 41 selectively switches between connection and non-connection between the capacitor C1 and the gate terminal G in accordance with the gate voltage Vg1.

  The capacitor connection control circuit 41 includes resistors R1, R2, and R3, comparators CMP1 and CMP2, an AND circuit AND1, and inverting circuits INV1 and INV2.

  The comparator CMP1 outputs a result of comparing the magnitude relationship between the upper limit value Va of the capacitor connection determination reference voltage and the gate voltage Vg1. The comparator CMP1 outputs a low level signal when the gate voltage Vg1 is larger than the upper limit value Va, and outputs a high level signal when the gate voltage Vg1 is smaller than the upper limit value Va. The upper limit value Va is a constant value that is resistance-divided by the resistor R1 and the resistors R2 and R3.

  The comparator CMP2 outputs a result of comparing the magnitude relationship between the lower limit value Vb of the capacitor connection determination reference voltage and the gate voltage Vg1. The comparator CMP2 outputs a high level signal when the gate voltage Vg1 is larger than the lower limit value Vb, and outputs a low level signal when the gate voltage Vg2 is smaller than the lower limit value Vb. The lower limit value Vb is a constant value that is resistance-divided by the resistors R1, R2 and R3.

  The output signals of the comparators CMP1 and CMP2 are input to the logical product circuit AND1, and the output of the logical product circuit AND1 is supplied to the switch SW1 via the logical sum circuit OR1. The switch SW1 is turned on when a high level signal is input and turned off when a low level signal is input. That is, when no overcurrent is detected in the switching element Q1, the switch SW1 is turned off when the gate voltage Vg1 becomes equal to or higher than the upper limit value Va or lower than the lower limit value Vb.

  The output signal of the comparator CMP1 is supplied to the switch SW2 of the capacitor charge control circuit 42 via the inverter circuit INV1, and the output signal of the comparator CMP2 is supplied to the switch SW3 of the capacitor charge control circuit 42 via the inverter circuit INV2. To be supplied.

  The capacitor charge control circuit 42 is a circuit that controls the voltage Vc1 of the capacitor C1 by driving the switches SW2 and SW3 on and off. The capacitor charge control circuit 42 controls the voltage Vc1 of the capacitor C1 based on the signal generated by the capacitor connection control circuit 41 according to the gate voltage Vg1.

  The capacitor charging control circuit 42 includes resistors R11, R21, R31 and switches SW2, SW3. The switches SW2 and SW3 are turned on when a high level signal is input, and turned off when a low level signal is input. The switches SW2 and SW3 may be the same elements as the switch SW1.

  When the switch SW1 is off, the switch SW2 is on and the switch SW3 is off, the capacitor C1 is charged with the upper limit value Va1 of the voltage for charging the capacitor C1. The upper limit value Va1 is a constant value that is resistance-divided by the resistor R11 and the resistors R21 and R31. On the other hand, when the switch SW1 is off, the switch SW2 is off, and the switch SW3 is on, the capacitor C1 is charged with the lower limit value Vb1 of the voltage for charging the capacitor C1. The lower limit value Vb1 is a constant value that is resistance-divided by the resistors R11 and R21 and the resistor R31.

  FIG. 2 is a timing chart during normal operation in which no overcurrent is detected in the configuration of FIG. The capacitor voltage control circuit 40 controls the voltage Vc1 of the capacitor C1 according to the gate voltage Vg1.

  The comparator CMP1 and the comparator CMP2 of the capacitor connection control circuit 41 observe the gate voltage Vg1, and when only “Vb <Vg1 <Va” (periods t2-t5 and t7-t10), both of them output a high-level comparison result signal. Output. As a result, the switch SW1 is turned on and both the switches SW2 and SW3 are turned off. When the switch SW1 is turned on, the gate terminal G and the capacitor C1 are connected to each other and become conductive. When the switches SW2 and SW3 are turned off, the capacitor charging control circuit 42 does not charge the capacitor C1. Therefore, when “Vb <Vg1 <Va” (periods t2-t5 and t7-t10), the gate voltage Vg1 and the voltage value Vc1 of the capacitor C1 are substantially the same.

  On the other hand, when “Va <Vg1” (period t5-t7), the comparator CMP1 outputs a low-level comparison result signal, and the comparator CMP2 outputs a high-level comparison result signal. Thus, if no overcurrent is detected (the signal SS1 is at a low level), the switch SW1 is turned off, the switch SW2 is turned on, and the switch SW3 is turned off. By turning off the switch SW1, the connection between the gate terminal G and the capacitor C1 is cut off. When the switch SW2 is turned on and the switch SW3 is turned off, only the capacitor C1 and the voltage node 43 are connected. Therefore, when “Va <Vg1” (period t5-t7), the gate voltage Vg1 rises to the power supply voltage Vcc by turning on the switching element Q2 of the drive circuit 30, while the voltage Vc1 of the capacitor C1 is equal to the threshold voltage Vth. The upper limit value Va1 is lower than the power supply voltage Vcc.

  On the other hand, when “Vg1 <Vb” (period before timing t2 and period after timing t10), the comparator CMP1 outputs a high-level comparison result signal, and the comparator CMP2 outputs a low-level comparison result signal. To do. Thus, if no overcurrent is detected (the signal SS1 is at a low level), the switch SW1 is turned off, the switch SW2 is turned off, and the switch SW3 is turned on. By turning off the switch SW1, the connection between the gate terminal G and the capacitor C1 is cut off. When the switch SW2 is turned off and the switch SW3 is turned on, only the capacitor C1 and the voltage node 44 are connected. Therefore, when “Vg1 <Vb” (period before timing t2 and period after timing t10), the gate voltage Vg1 is reduced to the ground voltage GND by turning on the switching element Q3 of the drive circuit 30. The voltage Vc1 of the capacitor C1 is fixed to the lower limit value Vb1 that is greater than the ground voltage GND and less than the threshold voltage Vth.

  In the case of FIG. 2, Va = Va1 and Vb = Vb1 are set. With this setting, the voltage Vc1 of the capacitor C1 is fixed to the voltage at the moment when the switch SW1 is turned off. It is possible to prevent the gate voltage Vg1 and the voltage Vc1 of the capacitor C1 from abruptly changing at the timing when the switch SW1 is turned on / off. Further, unless an overcurrent is detected, the voltage Vc1 of the capacitor C1 is controlled within a voltage range from the lower limit value Vb1 to the upper limit value Va1. As a result, since the leakage current of the capacitor C1 is minimized, the voltage Vc1 of the capacitor C1 does not become unstable when the switching element Q1 starts to drive after being turned on or off for a long time. It is possible to prevent malfunction due to uncertainties.

  In this way, the capacitor voltage control circuit 40 controls the voltage Vc1 of the capacitor C1 within a predetermined voltage range including the threshold voltage Vth of the switching element Q1 when no overcurrent exceeding a predetermined current value is detected in the switching element Q1. To do.

  The capacitor voltage control circuit 40 controls the voltage Vc1 of the capacitor C1 to a voltage value that is not less than the threshold voltage Vth and not more than the upper limit value Va1 in the predetermined voltage range in the period t3-t9 in which the gate voltage Vg1 is not less than the threshold voltage Vth. . In particular, the capacitor voltage control circuit 40 controls the voltage of the capacitor C1 to the upper limit value Va1 during the period t5-t7 when the gate voltage Vg1 is equal to or higher than the threshold voltage Vth and the switch SW1 is off. The upper limit value Va1 is a voltage value that is greater than or equal to the threshold voltage Vth and less than the power supply voltage Vcc.

  On the other hand, the capacitor voltage control circuit 40 sets the voltage of the capacitor C1 to be equal to or higher than the lower limit value Vb of the predetermined voltage range in a period before the timing t3 or after the timing t9, which is a case where the gate voltage Vg1 is less than the threshold voltage Vth. Control to a voltage value lower than the threshold voltage Vth. In particular, the capacitor voltage control circuit 40 sets the voltage of the capacitor C1 to the lower limit value Vb1 in a period before the timing t2 or after the timing t10 when the gate voltage Vg1 is less than the threshold voltage Vth and the switch SW1 is OFF. To control. The lower limit value Vb1 is a voltage value greater than 0V and less than the threshold voltage Vth.

  Note that the switching element Q1 is on during a period t3-t9 in which the gate voltage Vg1 is equal to or higher than the threshold voltage Vth. FIG. 2 shows the case where the threshold voltage Vth matches the mirror voltage in the mirror period (t3-t4 and t8-t9) of the switching element Q1, but the threshold voltage Vth is the lower limit value Vb1. It may be set to a voltage value that is larger than the mirror voltage.

  FIG. 3 is a timing chart at the time of a short-circuit protection operation in which an overcurrent is detected when the switching element Q1 is turned on in the configuration of FIG. When an overcurrent occurs at timing ts, the detection signal SS1 becomes high level. Therefore, the drive circuit 30 turns off the switching elements Q2 and Q3 so that the ON state of the switching element Q1 does not continue, while the short circuit protection circuit 50 turns on the switch SW1 and the switching element Q4. If the resistors R11, R21, and R31 are sufficiently larger than the resistor RoffL, the on / off state of the switches SW2 and SW3 has little influence on the voltage Vc1 of the capacitor C1.

  When the short-circuit protection circuit 50 turns on the switch SW1 and makes the gate terminal G and the capacitor C1 conductive, the charges stored in the capacitor C1, the feedback capacitor Cres, and the input capacitor Cies are balanced, and the gate voltage Vg1 decreases. If the capacitance of the capacitor C1 is sufficiently larger than the sum of the feedback capacitance Cres and the input capacitance Cies, the gate voltage Vg1 is slightly lower than the upper limit value Va1 set by the capacitor voltage control circuit 42. High voltage value Va1 + α. The upper limit value Va1 should be set to the minimum voltage value at which the switching element Q1 is turned on and the voltage between the collector terminal C and the emitter terminal E of the switching element Q1 is 0 V in normal operation, for example, It is equal to the voltage value to be reduced at the time of detection.

  On the other hand, the resistor RoffL is a resistance component having a higher resistance value than the gate resistor Rg connected in series to the gate terminal G. Therefore, when the switching element Q4 is turned on, the gate voltage Vg1 can be lowered at a rate lower than the rate of decrease to the threshold voltage Vth1 + α after the gate voltage Vg1 has decreased from the power supply voltage Vcc to the threshold voltage Vth1 + α. As a result, it is possible to prevent a large surge current from occurring in the switching element Q1.

  If the switching element Q1 is suddenly turned off during short-circuit protection, a large surge voltage is generated. However, as described above, it is a safe and reliable protection method that the gate voltage Vg1 is rapidly lowered to a voltage value that does not turn off immediately before the switching element Q1 is turned off, and then slowly lowered.

  Although it has been described that the capacitance of the capacitor C1 is sufficiently larger than the capacitance of the feedback capacitance Cres and the input capacitance Cies, an example of calculating the capacitance of the capacitor C1 will be described below with reference to FIG. For example, Cies = 1200 pF, Cres = 54 pF, power supply voltage VH = 800 V, Vcc = 15 V, Va1 = 5 V.

In the following calculation example, the capacitance of the capacitor C1 at which the change amount α of the voltage of the capacitor C1 when the switch SW1 is turned on becomes equal to 0.5V is obtained. Since the total charge of the capacitor C1 and the parasitic capacitances Cres and Cies does not change before and after the switch SW1 is turned on and off,
C1 x Va1 + Cies x Vcc + Cres x Vcc
= C1 x (Va1 + α) + Cies x (Va1 + α) + Cres x (Va1 + α-VH)
C1 × α = Cies × (Vcc−Va1−α) + Cres × (Vcc−Va1−α + VH)
C1 = (Cies × (Vcc−Va1−α) + Cres × (Vcc−Va1−α + VH)) / α
≒ 0.11μF
It becomes.

  Next, the results of simulation using the constant values of each element shown in the above calculation example are shown in comparison with the case of the circuit disclosed in Patent Document 1 above.

  FIG. 5 is a simulation circuit diagram of the circuit disclosed in Patent Document 1, and FIG. 6 is a simulation circuit diagram of the semiconductor drive device 1 shown in FIG. 5 and 6 are circuit diagrams for measuring the waveforms of the output voltage OUT and the gate voltage GATE when the gate of the switching element M2 is made conductive to the capacitor Cs via the switch S1 when overcurrent is detected.

  The switching element M2 corresponds to the IGBT 12 of Patent Document 1 and corresponds to the switching element Q1 of FIG. The capacitor Cs corresponds to the capacitor 8F in Patent Document 1, and corresponds to the capacitor C1 in FIG. The switch S1 corresponds to the MOSFET 8D of Patent Document 1, and corresponds to the switch SW1 of FIG. The current source I1 represents a load such as a motor.

  In the case of FIG. 5, in the state before the overcurrent due to the short circuit is detected, the voltage of the capacitor Cs is 0 V due to the discharge by the resistor Rs4. When an overcurrent is detected, the switch S1 is turned on to maintain the gate voltage GATE at 5V as shown in FIG.

  On the other hand, in the case of FIG. 6, the voltage of the capacitor Cs is maintained at a constant value of 5 V before the overcurrent due to the short circuit is detected. When an overcurrent is detected, the switch S1 is turned on and the switching element Q2 is turned off. As shown in FIG. 8, the gate voltage GATE becomes approximately 5.5V as calculated above. In the actual circuit, the switching element can be safely protected by slowly lowering the gate voltage thereafter.

  Next, assuming that the parasitic capacitance of the switching element M2 has doubled due to variations, simulation results when two identical MOSs are connected in parallel are shown in FIGS. 9 shows the case of the conventional circuit shown in FIG. 5, and FIG. 10 shows the case of the embodiment of the present invention shown in FIG.

  As shown in FIG. 9, in the conventional circuit, the gate voltage GATE is lowered by the balance of the capacitance of the capacitor Cs and the switching element M2, and therefore the gate voltage GATE does not sufficiently decrease when the capacitance of the switching element M2 increases. Thereafter, the voltage gradually approaches the divided voltage by the resistors Rs3 and Rs4.

  As described above, in the conventional technique, when the capacitance of the switching element becomes large due to variation, element change, or the like, the gate voltage cannot be lowered to a desired voltage value with high accuracy. Conversely, if the capacitance of the switching element is small, the gate voltage is too low and the switching element is turned off. As a result, a steep current change occurs in the switching element, and an excessive surge voltage may be generated due to the influence of the inductance of the current path.

  On the other hand, as shown in FIG. 10, in the embodiment of the present invention, the gate voltage GATE rises slightly from the case of FIG. 8 to about 6V, but the desired value from the power supply voltage Vcc (= 15V). The voltage value can be lowered with high accuracy, and there is no problem in terms of function. In the actual circuit, the switching element can be safely protected by slowly lowering the gate voltage thereafter.

  Thus, in the embodiment of the present invention, the voltage value after the gate voltage is lowered is stable with respect to the variation in the parasitic capacitance of the switching element. Even if the switching element is changed to another type of switching element, the voltage of the capacitor is controlled within a predetermined voltage range, so that it is not necessary to newly adapt the capacitance constant of the capacitor, and the development man-hour is reduced.

  Next, in a circuit in which switching elements are connected in series vertically (for example, an inverter that drives a motor, etc.), when one element is already short-circuited, the other element starts to turn on and short-circuit protection is performed. The simulation result assuming the case where works is shown.

  11 is a simulation circuit diagram of the circuit disclosed in Patent Document 1, and FIG. 12 is a simulation circuit diagram of the semiconductor drive device 1 shown in FIG. 11 and 12 are circuit diagrams for measuring the waveform of the drain current and the gate voltage GATE of the switching element M2 when the gate of the switching element M2 is made conductive to the capacitor Cs via the switch S1 when overcurrent is detected. It is. Since one element is short-circuited, a power source is directly connected to the switching element M2. 13 shows the case of the conventional circuit shown in FIG. 11, and FIG. 14 shows the case of the embodiment of the present invention shown in FIG.

  As shown in FIG. 13, in the conventional circuit, when an overcurrent due to a short circuit is detected, the switch S1 is turned on and the gate voltage GATE decreases. In this case, since the drain voltage of the switching element M2 does not change, no charge flows from the feedback capacitance of the switching element M2. However, since the charge drawn by the capacitor Cs is set by balancing the feedback capacitance of the switching element M2 and the charge from the input capacitance, if there is no charge from the feedback capacitance, the gate voltage GATE decreases excessively. . The drain current once drops to 0 A, and it can be seen that an excessive current change occurs.

  On the other hand, as shown in FIG. 14, in the embodiment of the present invention, when an overcurrent due to a short circuit is detected, the gate voltage GATE is accurately lowered to about 5V. Unlike the prior art, the switching element M2 is never turned off, and the drain current continues to flow. In the actual circuit, the switching element can be safely protected by slowly lowering the gate voltage thereafter.

  Thus, in the embodiment of the present invention, when no overcurrent is detected, the voltage Vc1 of the capacitor C1 is controlled to a voltage value within a predetermined voltage range. Therefore, when the overcurrent is detected, the gate voltage Vg1 can be changed to a desired voltage value with high accuracy by turning on the switch SW1 to make the gate terminal G and the capacitor C1 conductive.

  Further, the voltage Vc1 of the capacitor C1 is controlled to a voltage value within a predetermined voltage range. For this reason, even when the switching element Q1 is turned on or off for a long time and then starts to drive, the gate voltage Vg1 does not become an unexpected voltage value, so that the malfunction of the switching element Q1 can be prevented.

  Also, by making the voltage value when the switch SW1 is switched on and off and the upper and lower limit values of the voltage that charges the capacitor C1 the same, it is necessary to change the gate voltage drop rate at the time of overcurrent detection step by step. The circuit can be miniaturized.

  Further, by setting the capacitor C1 sufficiently larger than the gate capacitance, the gate voltage can be lowered to substantially the same set voltage value when an overcurrent is detected even if the gate capacitance changes. Therefore, the robustness against the variation in the capacitance of the capacitor C1 and the switching element Q1 is high. Moreover, the adaptation when the element changes is unnecessary, and the development efficiency is improved. Even in a state where the elements facing in series are short-circuited, a normal switching element can be reliably protected from overcurrent.

  As described above, the semiconductor drive device has been described by way of the embodiment. However, the present invention is not limited to the embodiment. Various modifications and improvements, such as combinations and substitutions with part or all of other example embodiments, are possible within the scope of the present invention.

  For example, as in the semiconductor drive device 2 of FIG. 16, the upper limit value Va and the lower limit value Vb of the reference voltage of the comparators CMP1 and CMP2 may be used also as the bias power source of the capacitor C1. However, in order to suppress the fluctuations of the upper limit value Va and the lower limit value Vb when the switches SW2 and SW3 are turned on, the resistors R4 and R5 having a resistance value larger than those of the resistors R1, R2, and R3 are changed to resistors R1, R2, and R3. It is preferably inserted in series between the switches SW2 and SW3.

  The switching element Q1 may be a P-channel type MOSFET. Further, the speed at which the gate voltage is lowered can be adjusted by connecting a resistor in series with the capacitor C1.

DESCRIPTION OF SYMBOLS 1, 2 Semiconductor drive device 20 Short circuit detection circuit 30 Drive circuit 40 Capacitor voltage control circuit 41 Capacitor connection control circuit 42 Capacitor charge control circuit 50 Short circuit protection circuit 60 Overcurrent detection device 70 Gate voltage reduction circuit
C1 capacitor

Claims (12)

A capacitor connected through a switch in parallel to the gate of the switching element;
A voltage control circuit that controls the voltage of the capacitor within a predetermined voltage range including a threshold voltage of the switching element when no overcurrent is detected in the switching element;
A semiconductor drive device, wherein an overcurrent is detected in the switching element, the gate and the capacitor are made conductive by turning on the switch.   The semiconductor drive device according to claim 1, wherein the voltage control circuit controls the voltage of the capacitor according to a gate voltage of the gate.   3. The semiconductor drive according to claim 2, wherein when the gate voltage is equal to or higher than the threshold voltage, the voltage control circuit controls the voltage of the capacitor to a voltage value equal to or higher than the threshold voltage and equal to or lower than an upper limit value of the predetermined voltage range. apparatus.   4. The semiconductor drive device according to claim 3, wherein the voltage control circuit controls the voltage of the capacitor to the upper limit value when the gate voltage is equal to or higher than the threshold voltage and the switch is off.   5. The voltage control circuit according to claim 2, wherein, when the gate voltage is less than the threshold voltage, the voltage of the capacitor is controlled to a voltage value that is greater than or equal to a lower limit value of the predetermined voltage range and less than the threshold voltage. The semiconductor drive device according to one item.   The semiconductor drive device according to claim 5, wherein the voltage control circuit controls the voltage of the capacitor to the lower limit value when the gate voltage is less than the threshold voltage and the switch is off.   7. The switch according to claim 1, wherein when an overcurrent is not detected in the switching element, the switch is turned off when a gate voltage of the gate becomes equal to or higher than a predetermined upper limit value or lower than a predetermined lower limit value. The semiconductor drive device according to Item.   The semiconductor drive device according to claim 7, wherein the predetermined upper limit value is equal to an upper limit value of the predetermined voltage range.   The semiconductor drive device according to claim 7 or 8, wherein the predetermined lower limit value is equal to a lower limit value of the predetermined voltage range.   5. The semiconductor drive device according to claim 1, wherein the predetermined voltage range is a range equal to or higher than the threshold voltage. 6.   11. The semiconductor drive device according to claim 1, wherein when an overcurrent is detected in the switching element, the gate voltage of the gate is lowered by means different from the capacitor. 11.   12. The semiconductor drive device according to claim 11, wherein the another means is a resistance component having a resistance value higher than a gate resistance connected in series to the gate.

Images