JP2014143348A - Method for analyzing fault in semiconductor device, and fault analysis device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the efficiency of analyzing a fault in a semiconductor device when proceeding with analysis using two different beams.SOLUTION: A scanning electron microscope image obtained by irradiation of, and scanning with, an electron beam BEM by an electron optics system OPT upon a sample SPL to be analyzed which is placed on a sample stage SST in a vacuum chamber CHM and a layout image are compared, and coordinate system locking is performed in which a stage coordinate system on the electron optics system side and a layout coordinate system are corresponded. Then, EBAC analysis is conducted from the principal surface side of the sample SPL by the electron optics system OPT, etc. Next, OBIRCH analysis is conducted from the revere side of the sample SPL by a photon optics system FOT. Thereafter, a CVD gas is introduced by a gas injector GIG while controlling its flow rate, and an analysis mark constituting a marker is formed at a specified short-circuiting place.

Description

  The present invention relates to a semiconductor device failure analysis method and a failure analysis device, and is a technology applicable to semiconductor device failure analysis.

  Japanese Patent Laid-Open No. 2007-096011 (Patent Document 1) describes a technique for detecting sample information when a charged particle beam and a laser beam are irradiated onto a sample via a conductive probe brought into contact with the sample. ing.

  In this technology, a mechanical prober is mounted inside the SEM (Scanning Electron Microscope) to enable needle contact to the vibration isolation table semiconductor device, and a window is provided on the lower surface of the vacuum chamber of the SEM. An apparatus having a configuration in which the back surface of the semiconductor device is irradiated with laser is used. Then, the defect is analyzed by imaging the current signal detected by the mechanical probe while irradiating the sample with the electron beam and the laser beam, or irradiating the sample at different timings.

JP 2007-096011 A

  In the above-described Patent Document 1, it is disclosed that a disconnection of a wiring or a defective portion having a high resistance can be identified by detecting a current. However, in order to proceed with the analysis using two different beams, there is no description about them even though adjustments between the beams and the beam irradiation method must be devised. It has not been.

  Other problems and novel features will become apparent from the description of the present specification and the accompanying drawings.

  A semiconductor device failure analysis method according to an embodiment includes the following steps.

  (A) A sample placed on a stage in a vacuum chamber is irradiated with an electron beam by an electron optical system, and a scanning electron microscope image obtained by scanning is compared with a layout image. A coordinate system lock is performed to associate the stage coordinate system with the layout coordinate system.

  (B) EBAC (Electron Beam Absorbed Current) analysis is performed from the first surface side of the sample.

  (C) OBIRCH (Optical Beam Induced Resistance Change) analysis is performed from the second surface side of the sample which is the surface facing the first surface.

  (D) An analysis mark serving as a mark is formed at the identified short-circuit location.

  According to the one embodiment, the failure analysis efficiency of the semiconductor device can be improved.

It is explanatory drawing which shows an example of a structure in the defect analysis apparatus by this Embodiment. It is explanatory drawing which shows an example of the access procedure to the analysis position by the defect analysis apparatus of FIG. It is explanatory drawing which shows an example of the analysis procedure by EBAC analysis by the failure analysis apparatus of FIG. It is explanatory drawing which shows an example of the analysis procedure by OBIRCH analysis by the failure analysis apparatus of FIG. It is explanatory drawing which shows an example of the procedure of reaction position designation | designated by the failure analysis apparatus of FIG. It is explanatory drawing which shows an example of the SDL analysis by the defect analysis apparatus of FIG. It is explanatory drawing which shows an example of the failure analysis of the power device using the failure analysis apparatus of FIG. It is explanatory drawing which shows the analysis process in the case of the short circuit defect in the semiconductor device using the failure analysis apparatus of FIG. It is explanatory drawing which shows an example of the coordinate system lock | rock using OBIC reaction and EBIC reaction by the failure analysis apparatus of FIG. It is explanatory drawing which shows an example of a structure of the defect analysis apparatus by this Embodiment 6. It is explanatory drawing which shows an example of a structure of the defect analysis apparatus by this Embodiment 7. It is a perspective view which shows the structural example of the mechanical prober provided in the failure analysis apparatus of FIG. It is AB sectional drawing in FIG. It is sectional drawing which shows an example of the sample holder provided with the defect analysis apparatus of FIG. It is sectional drawing which shows the other example of the sample holder of FIG. It is explanatory drawing which shows an example of a structure of the photon optical system in the defect analysis apparatus of FIG. It is explanatory drawing which shows an example of a structure of the photon optical system in the defect analysis apparatus of FIG. It is explanatory drawing which showed the structural example of the optical system in the defect analysis apparatus of FIG. It is explanatory drawing which shows the other example of FIG. It is explanatory drawing which showed the structural example of the optical system which provided the solid immersion lens in the defect analysis apparatus of FIG. It is explanatory drawing which shows an example of the structure which provided the vacuum window which integrated the solid immersion lens in the defect analysis apparatus of FIG. It is explanatory drawing which shows an example of the structure which provided the reflective objective optical system in the defect analysis apparatus of FIG. It is explanatory drawing which shows the example of a structure following FIG.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.

  Similarly, in the following embodiments, when referring to the shape, positional relationship, etc. of components, etc., the shape of the component is substantially the case unless it is clearly specified and the case where it is clearly not apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

  In all the drawings for explaining the embodiments, the same members are denoted by the same reference symbols in principle, and the repeated explanation thereof is omitted. In order to make the drawings easy to understand, even a plan view may be hatched.

(Embodiment 1)
<Overview>
Defects in semiconductor devices occur at various stages such as development, mass production, each inspection stage, customer acceptance inspection stage, assembled set inspection stage, and a stage that has been operating for a certain period in the market.

  It is one of the responsibilities of semiconductor manufacturers to analyze the defects that have occurred at an early stage to determine the cause and to take countermeasures to improve product reliability. However, in recent years, analysis from the surface of the semiconductor device has shifted to analysis from the back side due to miniaturization, multi-layering, high functionality, and changes in the mounting form of the semiconductor device. The difficulty is increasing. For this reason, a quick and reliable analysis is performed by properly combining various defect analysis techniques.

  In the present embodiment, a composite analysis apparatus for quickly shifting from one analysis to the next analysis and an analysis method using the same are disclosed. The position of a short circuit defect that occurs at a certain frequency as a wiring defect is specified in a short time.

  Usually, the failure analysis starts from failure diagnosis in which a defective wiring or a defective terminal is estimated by software based on the fail information of the tester. After that, a portion related to the defect is extracted by using light emission analysis, OBIRCH analysis, SDL (Soft Defect Localization) analysis, or the like.

  In the light emission analysis, light emission generated from a defective sample is detected by holding a test pattern that causes current abnormality by a tester or sweeping a test pattern that generates a defect. In the OBIRCH analysis, an infrared laser is focused, scanned, and irradiated, and current changes generated in the current path are displayed in synchronization with the laser scanning to reveal the current path associated with the defect. In the SDL analysis, the pass / fail of the tester is determined in a state where the infrared laser is irradiated, and the test is performed for each point on the defective sample, thereby checking the position related to the defect that is changed by the laser irradiation. Thus, the correspondence with the wiring and the terminal pointed out by the failure diagnosis is examined at the location related to the defect extracted, and the wiring including the cause of the defect is specified.

  Here, in the light emission analysis, OBIRCH analysis, and SDL analysis, for example, a wide range of power supply / ground wiring is spread on the surface layer of a semiconductor device after the 130 nm device rule, the wiring is multi-layered, and the mounting form is a flip chip. For some reason, it has become common to acquire light emission from the back surface of a sample or to employ a method of irradiating a laser.

  For the defect-related wiring identified above, in the next analysis, the electron beam is focused on the sample, scanned, and applied to the identified wiring, and the current is detected. The EBAC analysis is used to observe the short-circuit state of the wiring by displaying in synchronization with the scanning.

  In a random logic area where it is difficult to identify a physical defect location in a semiconductor device, each wiring has a unique shape. It is possible to specify the wiring that is being performed.

  In this case, if the adjacent portion of the wiring having the highest probability of short-circuiting between the original wiring and the short-circuited partner wiring is at one place or in a short time, the state of the short-circuit is observed by observing it with a scanning electron microscope (SEM). However, when there are a plurality of adjacent locations or when the parallel running distance between both wires is long, the EBAC analysis displays all of the shapes of both wires, and thus the short-circuited portion cannot be specified.

  Therefore, an opening is provided by an ion beam (FIB: Focused Ion Beam) focused from both wirings, a pad is drawn out by embedding a metal film in the opening, a current is passed by applying a needle to them, and an OBIRCH analysis is performed. Therefore, the method of identifying the short part is adopted. As described above, in the short location identification, the EBAC analysis and the OBIRCH analysis may be continuously performed.

  However, according to the inventor's study, in the EBAC analysis, the wiring that has already been analyzed is needle contacted, and it is possible to further contact with the short partner identified there, but the analysis devices are different. Therefore, it is necessary to take out a sample once, subject it to FIB processing, and input it into an OBIRCH analyzer for analysis. Although the time required for these operations varies depending on the operating status of the apparatus, it may be as short as half a day or as long as a few days.

  Therefore, in the present embodiment, an integrated analysis device capable of promptly proceeding with the analysis procedure is provided. In the case of this analysis device, it is possible to improve the efficiency of the entire analysis by shortening the analysis time by directly contacting the short partner specified in the EBAC analysis and continuously performing the OBIRCH analysis. .

  Hereinafter, the embodiment will be described in detail based on the above-described outline.

<Configuration example of defect analysis device>
FIG. 1 is an explanatory diagram showing an example of the configuration of the failure analysis apparatus according to the present embodiment.

  The defect analysis apparatus FKS is provided with a vacuum chamber CHM as shown in the figure. An electron source DEN that emits an electron beam BEM is provided in the upper part of the vacuum chamber CHM.

  Below the electron source DEN, an electron optical system OPT constituting the SEM is stored in the vacuum chamber CHM. The vacuum chamber CHM is placed on a surface plate PLT provided on the vibration isolation table RVB. The vacuum chamber CHM is configured such that floor vibration is blocked by the vibration isolation table RVB.

  A vacuum pump VPM is connected to the vacuum chamber CHM via a vacuum valve VAL1, a vacuum pipe VPE, and a vacuum valve VAL2. The vacuum chamber CHM is evacuated by a vacuum pump VPM. A loading chamber LCB is provided on the lower right side of the vacuum chamber CHM via a vacuum valve VAL3.

  The loading chamber LCB is a chamber for taking in / out the sample SPL without opening the vacuum chamber CHM to the atmosphere. Accordingly, the vacuum degree of the vacuum chamber CHM can be kept high in order to mount a field emission (FE) type electron source capable of realizing high beam focusing and high brightness on the electron source DEN of the electron optical system OPT. it can.

  The electron optical system OPT is provided with an aperture APA1, a condenser lens CLEN, an aperture APA2, a polarizer PLS, and an objective lens LEN1 from above to below.

  In the vacuum chamber CHM, a sample stage SST is provided below the electron optical system OPT. A sample holder SHD on which a semiconductor device that is a sample SPL is placed is arranged at the center of the sample stage SST. The sample stage SST is configured to be able to move the sample holder SHD. The sample holder SHD is made of a transparent material that can transmit light, such as glass.

  A secondary electron detector EDT is provided on the upper left side of the sample holder SHD, and a gas injector GIG is provided on the upper right side of the sample holder SHD. The gas injector GIG supplies a CVD (Chemical Vapor Deposition) gas or the like in the vacuum chamber CHM with a flow rate controlled. This is for the purpose of forming a mark on the sample SPL described later.

  Four mechanical probers MPR are provided in the vicinity of the outer periphery of the sample holder SHD. The mechanical prober MPR is provided in the periphery of the sample SPL. A head amplifier HAP is connected to each mechanical prober MPR. A main amplifier MAP is provided on the right outside of the vacuum chamber CHM.

  In FIG. 1, two mechanical probers MPR and two head amplifiers HAP connected to the two mechanical probers MPR are shown, and the remaining two mechanical probers MPR and two head amplifiers HAP are illustrated. Not.

  A circular vacuum window VWD is provided on the bottom surface of the vacuum chamber CHM. The vacuum window VWD is made of a transparent material that can transmit light, such as quartz glass, like the sample holder SHD.

  A photon optical system FOT is provided below the vacuum window VWD. The photon optical system FOT is mounted on the optical system stage STG. On the right side of the photon optical system FOT, an illumination system LHT, a reflection laser detector RLD, and a laser oscillator LAR1 are provided from above to below. On the left side of the photon optical system FOT, an infrared camera ICAM and a laser oscillator LAR2 are provided from above to below. By installing the infrared camera ICAM, analysis of analog products and power device products described later can be supported.

  The illumination system LHT is illumination that irradiates the sample SPL when an image is acquired by the infrared camera ICAM. The light irradiated from the illumination system LHT is irradiated to the sample SPL via the half mirror HM1. The irradiated light is reflected from the sample SPL and irradiated to the infrared camera ICAM through the half mirror HM2, and an image is acquired by the infrared camera ICAM.

  The photon optical system FOT is provided with an objective lens LEN2, half mirrors HM1 and HM2, a laser scanning system SCN, a half mirror HM3, and a mirror MRR from above to below.

  A controller PC and a power supply / controller PCON are connected to the defect analysis device FKS. The control device PC is composed of a personal computer, for example. A monitor MON is connected to the control device PC. The power supply / controller PCON supplies power to the failure analysis device FKS and controls all of the failure analysis device FKS. The control device PC controls the operation of the failure analysis device FKS based on a control signal from the power supply / controller PCON.

  The electron beam BEM extracted from the electron source DEN provided above the electron optical system OPT is limited by the aperture APA1 and focused by the condenser lens CLEN. Thereafter, the light passes through the aperture APA2, and is focused, scanned, and irradiated on the sample SPL placed on the sample holder SHD by the objective lens LEN1.

  At this time, the secondary electrons emitted from the sample SPL are captured by the secondary electron detector EDT, the signal is amplified, synchronized with the scanning of the electron beam BEM, and the monitor MON connected to the control device PC. indicate. Thereby, the surface image of the sample SPL can be obtained.

  In addition, the mechanical prober MPR detects a current by stylusing the wiring of the sample SPL mounted on the sample stage SST. The current detected by the mechanical prober MPR is amplified by a head amplifier HAP provided for each mechanical prober MPR.

  In this way, by performing signal amplification individually by the head amplifier HAP immediately after each mechanical prober MPR detects a current, mixing of noise in the middle path is suppressed, and high-precision signal amplification Can be realized.

  The signal in which the mixing of noise is suppressed is further amplified by the main amplifier MAP and displayed on the monitor MON as an EBAC image that is a current image synchronized with the scanning of the electron beam BEM.

  The laser oscillators LAR1 and LAR2 oscillate and emit a laser beam LBEM. These laser oscillators LAR1 and LAR2 have different wavelengths of light emitted from the emitted laser beams. The laser oscillator LAR1 is, for example, a wavelength of energy that exceeds the band gap of silicon, and the laser oscillator LAR2 is, for example, the wavelength of energy that does not exceed the band gap of silicon.

  This is because in the analysis application described later, whether only heat is applied to the wiring system of the semiconductor device or whether electron-hole pairs are generated in the transistor part in addition to heat, different information is acquired and another analysis process is performed. The purpose is to advance.

  The laser beam LBEM oscillated and emitted from the laser oscillator LAR2 is introduced into the photon optical system FOT mounted on the optical system stage STG. In the photon optical system FOT, the direction of the laser beam LBEM is changed by the mirror MRR. The laser beam LBEM whose direction has been changed is scanned by the laser scanning system SCN and focused on the sample SPL by the objective lens LEN2.

  Since the vacuum window VWD and the sample stage SST are transparent materials such as quartz glass as described above, the laser beam LBEM passes through the vacuum window VWD and the sample stage SST, and is focused and scanned on the back surface of the sample SPL. , Will be irradiated.

  The reflected laser of the laser beam LBEM returns on the same optical path, is separated and reflected by the half mirror HM3, and enters the reflected laser detector RLD. The reflected laser detector RLD detects the reflected laser. A laser scanning microscope (LSM) image is formed based on the intensity of the reflected laser detected by the reflected laser detector RLD. This LSM image is also displayed on the monitor MON.

  With this configuration, the electron beam BEM is applied from the upper main surface (first surface) side of the sample SPL and the laser beam LBEM is applied from the lower surface (second surface) side of the sample SPL to a desired position and region. Focusing, scanning, and irradiation can be performed respectively, and an SEM image, an LSM image, and the like can be easily obtained. Furthermore, by providing the mechanical prober MPR, it is possible to obtain an EBAC image detected by the mechanical prober MPR.

<Example of analysis by defect analysis device>
2-5 is explanatory drawing which shows an example of the analysis procedure by the defect analysis apparatus of FIG.

  FIG. 2 shows an example of an access procedure to the analysis position, and FIG. 3 shows an example of an analysis procedure by EBAC analysis. FIG. 4 shows an example of an analysis procedure by OBIRCH analysis, and FIG. 5 shows a procedure for specifying a reaction position.

<Access to analysis position>
First, the software installed in the control device PC is activated, or the software installed in an EWS (Engineering Work Station) (not shown) is activated.

  The EWS is connected to the control device PC via, for example, a network.

  Here, the software installed in the control device PC or the software installed in the EWS is software called a so-called layout viewer (hereinafter referred to as a layout viewer). The layout viewer is software that displays the layout of the semiconductor device as a graphic on the monitor MON based on layout data or the like.

  When the layout viewer is activated, its control screen is displayed on the monitor MON, and a CAD (Computer Aided Design) navigation function for calling the layout of the semiconductor device to be analyzed and interlocking with the sample stage SST is applied.

  Access to the analysis position is performed by designating a characteristic pattern in the semiconductor chip by a CAD navigation function and associating the coordinate system of the layout data of the semiconductor device with the coordinate system of the sample stage SST on which the semiconductor device is mounted. Perform system lock.

  Hereinafter, access to the analysis position will be described with reference to FIG.

  The loading chamber LCB is opened to the atmosphere, the door is opened, the semiconductor device to be analyzed, which is the sample SPL, is set in a chip holder (not shown) provided in the loading chamber LCB, and a vacuum pump (not shown) is operated. Then, the loading chamber LCB is evacuated. Here, the chip holder in which the semiconductor device is set is hereinafter referred to as a sample SPL.

  Subsequently, when the pressure in the loading chamber LCB reaches a predetermined degree of vacuum, the vacuum valve VAL3 between the loading chamber LCB and the vacuum chamber CHM which is the main chamber is opened. Then, the sample SPL is introduced into the vacuum chamber CHM and placed on the sample holder SHD.

  The sample stage SST moves so that the sample SPL is positioned on the optical axis of the photon optical system FOT, and emits a laser beam LBEM from the laser oscillator LAR2.

  The emitted laser beam LBEM is focused, scanned, and irradiated from the back surface of the semiconductor device in the sample SPL using a photon optical system FOT including a mirror MRR, a half mirror HM3, a laser scanning system SCN, an objective lens LEN2, and the like. .

  The reflected intensity is returned by an optical path such as the objective lens LEN2 and the half mirror HM1 in the photon optical system FOT, and introduced into the reflected laser detector RLD. As a result, as shown in FIG. 2A, an LSM image IMG1 of the entire semiconductor chip is acquired. Here, in the example shown in FIG. 2, an alignment mark formed at the corner of the semiconductor chip is used as a characteristic pattern.

  The first characteristic mark is selected from the acquired LSM image IMG1 of the entire chip. The sample stage SST is moved to the position of the selected mark, and in order to enlarge the mark, the objective lens LEN2 is switched to increase the magnification. In the same manner as described above, the LSM image IMG2 is acquired using the photon optical system FOT as shown in FIG.

  At this time, the acquired LSM image IMG2 and the layout image are displayed side by side on the monitor MON. An appropriate position of the mark MK1 displayed in those images is designated by operating the mouse cursor on the LSM image IMG2 on the screen of the monitor MON, for example.

  The control device PC calculates stage coordinates in the sample stage SST from the designated mouse cursor position. This calculation result is stored, for example, in a storage device such as a hard disk built in the control device PC.

  Further, by similarly designating the position of the corresponding mark MK1 with the mouse cursor in the layout image, the control device PC calculates the designated layout coordinates and similarly stores the calculated layout coordinates in the storage device. To do.

  Subsequently, the second characteristic mark MK2 is selected from the LSM image IMG1, the sample stage SST is moved to the position of the mark MK2, the objective lens LEN2 is switched to increase the magnification, and the photon optical system FOT is used. As shown in FIG. 2C, an LSM image IMG3 is acquired.

  An appropriate position of the mark MK2 displayed on the monitor MON is designated by operating the mouse cursor on the LSM image IMG2. The control device PC calculates the stage coordinates in the sample stage SST from the position of the designated mouse cursor and stores it in the storage device.

  Similarly, in the layout image, the designated layout coordinates are calculated by designating the position of the corresponding mark MK2 with the mouse cursor, and the calculated layout coordinates are stored in the storage device.

  Similar to FIGS. 2B and 2C, the third characteristic mark MK3 is selected from the LSM image IMG1, and the photon optical system FOT is used to select the LSM as shown in FIG. An image IMG4 is acquired. Also for the mark MK3, stage coordinates and layout coordinates are calculated and stored in the storage device.

  The control device PC converts the stage coordinates into layout coordinates based on the conversion coefficient, and the coordinate lock is completed. The conversion coefficient is included in a control program incorporated in the control device PC. As a result, it is possible to specify the position on the layout corresponding to the observed area of the semiconductor chip.

  Here, considering the possibility that the semiconductor chip is tilted in the Z direction, the positions of the three marks MK1 to MK3 are specified, but coordinate lock may be performed using the two marks.

  Up to this point, the short portion in the sample SPL has not been specified, but the wiring involved in the defect has been specified, and the layout coordinates of the wiring are known. Therefore, the stage coordinates are calculated according to the conversion coefficient by designating the position, and the sample stage SST moves so that the position becomes the center of the optical axis of the photon optical system FOT, and the LSM image LSMI there is shown in FIG. Obtain as shown in (e). This is an acquired image from the back surface of the semiconductor chip, and what is displayed is an image of the gate layer of the semiconductor device.

<Example of EBAC analysis>
FIG. 3 is an explanatory diagram showing an example of EBAC analysis.

  In the EBAC analysis, which is the next process, a direct probing method is used in which a probe is directly applied to the wiring of the semiconductor device (sample SPL) by a mechanical prober MPR.

  As described above, the mechanical prober MPR is housed in the vacuum chamber CHM, and operates the needle position while observing the SEM image by the focused electron beam BEM from the electron optical system OPT. This enables direct probing to fine wiring.

  The surface side of the sample SPL includes the wiring layers to be analyzed, and the upper layer film is mechanically polished to a layer that can be needled to a predetermined wiring layer, or the wiring layers are exposed by plasma processing It is set as the state etched to. Here, the analysis of the sample SPL in a state where the predetermined wiring layer is mechanically polished will be described.

  As shown in FIG. 3A, the layout image LOI of the wiring layer for which needle contact is first performed is displayed on the monitor MON, and the analysis target wiring HP57 in the layout image LOI in FIG. A layout viewer is operated with a GUI (Graphic User Interface) or a keyboard of a PC, and is highlighted to be revealed. The layout display position at this time is displayed around the layout coordinates corresponding to the stage coordinates where the sample stage SST is moved in FIG.

  Subsequently, the electron beam BEM is focused, scanned, and irradiated by the electron optical system OPT to emit secondary electrons from the surface of the sample SPL. The emitted secondary electrons are captured by the secondary electron detector EDT, and the intensity change is displayed in synchronization with the scanning of the electron beam BEM. As a result, the SEM image SMI shown in FIG. With reference to the layout image LOI displayed on the monitor MON shown in FIG. 3A, the mechanical prober MPR is touched down while observing the tip of the analysis target wiring HP57 with the SEM image.

  The current absorbed in the analysis target wiring HP57 is detected from the mechanical prober MPR touched down by scanning the electron beam BEM. The detected current is amplified by a head amplifier HAP provided immediately after the mechanical prober MPR, further amplified by the main amplifier MAP, and an EBAC image EBI that is a current image synchronized with electron beam scanning (FIG. 3C). ) Observe the EBAC wiring reaction HPR58 to be analyzed.

  The GUI is operated on the monitor MON, and the EBAC image EBI is observed at a low magnification as shown in FIG. 3D, and the wiring shapes other than the analysis target EBAC wiring reaction HPR58 are observed. This is the short partner EBAC wiring reaction HPR59.

  In order to observe the positional relationship between the analysis target wiring and the short mating wiring, a further reduced EBAC image EBI is observed, as shown in FIG. As a result, it can be seen that the long distance wiring runs side by side and a short circuit exists somewhere.

  However, in the EBAC analysis, the injected electron beam current flows from any position of the short-circuited wiring, the wiring to be analyzed runs beside it, and the electron beam current flows there. In this state, the parallel wiring of the underlying layer is affected by cascade scattering in the material of the electron beam, and the image resolution is reduced. Therefore, the parallel wiring can usually be observed as only one EBAC reaction, and the short circuit The location cannot be specified.

  Also in the layout image LOI, the wiring parallel portion HP60 is confirmed as shown in FIG. This also confirms the overall image of both wires, and searches for an exposed part so that both wires can be struck.

<Example of OBIRCH analysis>
FIG. 4 is an explanatory diagram showing an example of OBIRCH analysis.

  The OBIRCH analysis of the next step proceeds with the following procedure.

  First, the layout image LOI of the analysis target wiring layout HPL61 and the short counterpart wiring layout HPL62 confirms the exposed part of both wirings in FIG. 3 (f), so as shown in FIG. The layout image at that location is displayed on the monitor MON. FIG. 4A shows a case where a portion where both wirings are branched corresponds to the branch portion.

  When the needle is touched by the mechanical prober MPR, the GUI of the layout viewer displayed on the monitor MON at the same magnification as the observation magnification in the SEM image is operated, and the layout image LOI is also enlarged as shown in FIG. 4B. Display both wires.

  The SEM image is acquired and the wiring to be applied with the needle is confirmed. As shown in FIG. 4C, while the SEM image SMI is viewed, the wiring is applied to the analysis target wiring HP57 and the short mating wiring HP63.

  A semiconductor device in which a laser generated from a laser oscillator LAR2, that is, a laser beam LBEM, is applied to a sample SPL by a photon optical system FOT while a voltage is applied between two predetermined mechanical probers MPR and a current flows. Focus, scan, and irradiate from the back.

  As a result, the change of the flowing current due to laser heating is amplified by the head amplifier HAP and the main amplifier MAP in the same manner as in the EBAC analysis, and is converted into a two-dimensional image synchronized with the laser scanning, so that the OBIRCH analysis is performed. Is done.

  At this time, as shown in FIG. 4 (d), the needle contact portion OBIRCH reaction OB64 is often observed at the location where the needle is touched by the mechanical prober MPR, but the OBIRCH reaction OB65 indicating the current path extending therefrom is also observed. I can observe. The OBIRCH reaction OB65 is turned back halfway, but the OBIRCH reaction shows a path through which a current flows, and this turned-back portion corresponds to a short-circuit portion between the wirings.

  The OBIRCH image of the folded portion is switched after the objective lens LEN2 is switched and the position of the sample stage SST is corrected, and as shown in FIG. 4E, the OBIRCH image OBI is enlarged and displayed on the monitor MON. To do.

  Furthermore, an LSM image is obtained by detecting reflected light of the scanned laser by the reflected laser detector RLD, and the LSM image is superimposed on the OBIRCH image and synthesized as shown in FIG. For storage in a storage device such as a hard disk of the control device PC.

<Example of reaction position specification>
FIG. 5 is an explanatory diagram showing an example of reaction position designation.

  Although the short part has been specified so far, in this state, it is not possible to obtain information on whether or not the position should be observed in the physical analysis process that is reserved after the defective position specifying process. Therefore, the reaction position is designated.

  First, an SEM image at the same position is acquired with respect to the OBIRCH image OBI acquired in FIG. 4D, and the superimposed image OBS is synthesized and stored as shown in FIG. Subsequently, an appropriate pattern (here, for example, a line-shaped pattern toward the center) is formed around the position corresponding to the folded portion. For this, EBCVD (Electron Beam Chemical Vapor Deposition) is applied. ing.

  The CVD gas used here includes, for example, W (CO) 6 for depositing tungsten and alkenes for depositing a CH component. It is possible to select from these gases.

  While introducing this CVD gas into the vacuum chamber CHM while controlling the flow rate in the vacuum chamber CHM by the gas injector GIG, the pattern is formed by converging, scanning and irradiating the pattern to form the electron beam BEM, and decomposing the CVD gas. The formed pattern can be utilized when a cross section of this portion is produced in the physical analysis step as the EBCVD mark ECM 66 as shown in FIG.

  Further, when layout data can be used by a layout viewer or the like in the physical analysis process, a layout image LOI of a portion where the analysis target wiring HP57 and the short partner wiring HP63 are short-circuited as shown in FIG. Display the layout coordinates of the short part. And by recording it, it becomes possible to access the analysis location in the physical analysis.

  According to the analysis process following the above procedure, the coordinate systems are locked to each other in one defect analysis device FSK, EBAC analysis is performed by direct probing to the wiring, the short partner wiring is recognized, and the short wiring is connected to each other. OBIRCH analysis can be performed by direct probing in the field to identify a short portion, and further, mark formation or layout coordinate recognition can be performed at the short portion.

  As described above, since it is possible to perform needle contact with the mechanical prober MPR while observing with the SEM, when the analysis using the laser beam LBEM is performed after the analysis using the electron beam BEM, the needle is directly connected to the wiring to be analyzed. You can make a guess. As a result, it is possible to eliminate the process of taking out the pads from the vacuum chamber and forming the pads on the wiring by FIB or the like, and the time required for this process can be saved. Therefore, the analysis time in the sample SPL can be shortened.

  As described above, the failure analysis apparatus according to the first embodiment includes a vacuum chamber (vacuum chamber CHM) to be evacuated, a stage (sample stage SST), an electron optical system (electron optical system OPT), and a detector. (Secondary electron detector EDT), gas injector (gas injector GIG), mechanical prober (MPR), surface plate (surface plate PLT), first vibration isolation table (vibration isolation table RVB), laser Oscillators (laser oscillators LAR1, LAR2), photon optical system (photon optical system FOT), optical system stage (optical system stage STG), reflection laser detector (reflection laser detector RLD), infrared camera (infrared camera) ICAM).

  The stage is provided in the vacuum chamber and places and moves a sample (sample SPL) to be analyzed. The electron optical system is provided in a vacuum chamber and focuses, scans, and irradiates an electron beam. The detector is provided in the vacuum chamber and detects secondary electrons generated by electron beam irradiation.

  The gas injector is provided in a vacuum chamber and supplies a gas that is decomposed and fixed by electron beam irradiation. A mechanical prober probes the surface of the sample. The platen is loaded with a vacuum chamber. The first vibration isolation table prevents vibration transmitted from the surface plate from being transmitted to the vacuum chamber. The laser oscillator oscillates and emits a laser beam (laser beam LBEM). The photon optical system is provided below the vacuum chamber, focuses the laser beam emitted from the laser oscillator, and irradiates the sample.

  The optical system stage moves the photon optical system. The reflected laser detector detects the reflected light reflected from the sample and forms a laser microscope image (LSM image). The infrared camera detects light generated from the sample. The vacuum chamber has a vacuum window made of a material that transmits light on the bottom surface, and irradiates the sample with a laser beam emitted from the photon optical system through the vacuum window.

  The semiconductor device failure analysis method according to the first embodiment includes the following steps.

  Scanning obtained by irradiating and scanning an electron beam (electron beam BEM) by an electron optical system (electron optical system OPT) onto a sample (sample SPL) to be analyzed placed on a stage in a vacuum chamber (vacuum chamber CHM) By contrasting the electron microscope image and the layout image, a coordinate system lock is performed to associate the stage coordinate system on the electron optical system side with the layout coordinate system.

  The step of performing EBAC analysis includes the following steps.

  A needle of a first mechanical prober (mechanical prober MPR) installed in the vacuum chamber is brought into contact with the sample analysis wiring. A first current image is obtained from a change in the electron beam current absorbed in the analysis target wiring detected by the contacted first mechanical prober in a state in which the electron beam is focused, scanned, and irradiated, and the first current image is obtained. And the layout data, the short-circuit wiring that is short-circuited with the analysis target wiring is specified.

  The step of performing the OBIRCH analysis includes the following steps.

  The needle of the second mechanical prober is brought into contact with the short-circuit wiring. By applying a voltage between the first mechanical prober and the second mechanical prober, a current image is acquired from a change in the flowing current, and the short-circuit position of the short-circuit wiring is specified.

  Further, the step of forming the analysis mark includes the following steps.

  A film deposition gas (CVD gas) is introduced into the vacuum chamber, an electron beam is irradiated in the vicinity of the short-circuit position of the identified short-circuit wiring to form a deposited film, and an analysis mark is formed on the sample.

  In addition, a part described in the above embodiment will be described below.

  In the defect analysis apparatus, the photon optical system has a solid immersion lens at the tip of the objective lens that focuses the laser beam on the sample, and the solid immersion lens is brought into close contact with the vacuum window when the laser beam is focused on the sample. The vacuum window is made of silicon.

(Embodiment 2)
<Overview>
In the second embodiment, a case will be described in which SDL (Soft Defect Localization) analysis is applied using the defect analysis apparatus FKS of FIG.

  Here, the SDL analysis means that a test pattern is swept when a laser beam is irradiated on one point of a sample, a pass / failure that is a test result is determined, and each point of the sample is performed, and laser scanning is performed. This is an analysis method in which a pass / fail change image of a synchronized tester is formed to identify a marginal defect position.

  At this time, the tester's shmoo plot is obtained, and pass / fail changes with temperature change.In other words, the tester conditions such as voltage and frequency are set as the boundary condition that the sample may become defective due to temperature change. ing.

  Therefore, even if the laser beam is irradiated to a spot that is not the cause of the defect and the temperature is raised, the pass / fail of the tester output does not change. Pass / fail may change when tested by irradiation.

  The position of the laser spot where the pass / fail changes is a position where the defect is involved, and this is analyzed in more detail to identify the defect position. It is known that a defect that easily reacts in this SDL analysis is a high resistance portion of the wiring system, and the frequency of vias is high. However, the SDL reaction detected by the SDL analysis has a spread of several microns due to the laser beam irradiation from the back surface of the sample, with the addition of heat spread to the spot diameter of the laser beam. In recent miniaturized semiconductor devices, a large number of vias are included in the reaction region, and it is difficult to specify a defective via.

  For this reason, by performing logic analysis and layout analysis on the location where the SDL reaction is detected, and further performing another analysis called EB testing that observes the internal waveform using an electron beam, We are proceeding with identification. As a result, the analysis takes a lot of time.

  On the other hand, in the second embodiment shown below, the analysis time is obtained by applying the failure analysis apparatus FKS of FIG. 1 to the identification from the detection of the SDL reaction to the via that is likely to be involved in the failure. Can be shortened.

<Example of SDL analysis>
FIG. 6 is an explanatory diagram showing an example of SDL analysis by the failure analysis apparatus of FIG. The SDL analysis proceeds with the following steps.

<SDL reaction detection>
To acquire the SDL reaction, jigs such as sockets, boards, and cables for operating the semiconductor device are incorporated into the failure analysis device FKS (FIG. 1), and connected to a tester to operate the test program. Pass / fail judgment by laser irradiation may be made into a two-dimensional image.

  However, in reality, due to the problem of degassing by bringing jigs into the vacuum or the problem of the working distance of the objective lens, the failure analysis apparatus FKS in FIG. 1 has a semiconductor device operating environment for SDL analysis. Difficult to incorporate.

  For this reason, the SDL reaction is detected by a separate device linked to the tester. As an example, FIG. 6A shows an image IMG obtained by superimposing an LSM image on an image obtained by acquiring an SDL reaction SDL67 by an SDL analysis device which is another device.

  When the SDL reaction position is irradiated with a laser, the pass / fail of the tester output changes, and it is assumed that the resistance of one via included in the SDL reaction is changed by the laser irradiation. It is.

<Extraction example of via in reaction area>
Subsequently, in the layout viewer, the layout image LOI is displayed on the monitor MON, and the coordinate system of the image of the photon optical system FOT placed on the optical system stage STG corresponds to the coordinate system of the layout image (= coordinate system lock). And vias included in the SDL reaction region SDL 68 are extracted as shown in FIG.

  If the coordinate system is locked, the area specified in the coordinate system of the photon optical system FOT can be converted into the layout coordinate system and specified as an area in the layout data, and the vias included in it can be extracted. It can be executed by various layout viewers that process layout data. In this example, as shown in the enlarged view on the right side of FIG. 6B, the number of vias included in the SDL reaction region SDL68 is, for example, about 30.

<Example of extraction of wiring extending from via in reaction area>
Extraction of the wiring connected to the extracted via can also be executed using an equipotential tracking function provided in the layout viewer. Recently, there are analysis support systems equipped with a GUI that can extract vias and wirings connected to the vias with relatively simple operations, or layout viewers that have the function. Here, although the number of vias was about 30, as the wiring connected to them, as shown in FIG. 6C, six wirings from the wiring A69-1 to the wiring F69-6 are extracted. .

<Example of EBAC analysis of wiring shape with and without laser irradiation>
In this example, the tester pass / fail is changed by laser irradiation to the SDL reaction region SDL68, and it should be considered that there is some abnormality in one of the vias included in the region. If it occurs, it is appropriate to apply the EBAC analysis to the analysis using the failure analysis device FKS.

  However, in the EBAC analysis by the defect analysis device FKS, it is necessary to apply a needle to the wiring with the mechanical prober MPR. After detecting the SDL reaction, the sample SPL is taken out once and the insulating layer and the wiring layer on the surface layer are removed. Again, the sample SPL is introduced into the vacuum chamber CHM via the loading chamber LCB.

  Since the coordinates of the SDL reaction region SDL68 on the layout are known at the time of extracting the via, the sample stage SST is operated and set so that it is in the vicinity of the optical axis of the photon optical system FOT to prepare for laser irradiation. Leave it in a state.

  Here, out of the six wirings extracted in FIG. 6C, first, the wiring A69-1 is focused, and a needle probe is applied to the wiring A69-1 by the mechanical prober MPR placed in the vacuum chamber CHM.

  In this state, the electron beam BEM is focused, scanned, and irradiated to perform EBAC analysis, and an EBAC image of the wiring A69-1 is obtained as shown in FIG. Then, an EBAC image of the wiring A69-1 is obtained in a state where the laser beam LBEM is in the SDL reaction region SDL68 and the spot including the via of the wiring A69-1 is controlled by the photon optical system FOT.

  If the EBAC image is changed by the laser irradiation, the via of the wiring A69-1 includes some abnormality that reacts to temperature. In this case, since no change occurred in the wiring A69-1, the same analysis was performed for the other wirings (wirings B69-2 to F69-6).

  As a result, only in the wiring E69-5, a change in the EBAC image was observed with or without the laser beam LBEM irradiation. This indicates that there is an abnormality in the via included in the SDL reaction region SDL58 in the wiring E69-5. Since the EBAC analysis here is performed by needle contact to one place, the shape of the wiring itself can be confirmed by an EBAC image except for the wiring E69-5. In the wiring E69-5, the SDL reaction region SDL68 is confirmed. The wiring looks broken.

  When the change in the resistance of the via is small, using the differential amplifier incorporated as a function in the main amplifier MAP in EBAC analysis, needle contact is applied to the two ends of the wiring with the mechanical prober MPR, and the EBAC image is obtained. It is effective to acquire.

  At that time, a normal wiring shows an EBAC image in which the contrast changes continuously to some extent, although it changes depending on the wiring layer and via resistance in the middle from the end of the wiring. On the other hand, when there is an abnormality in the resistance of a via that changes in temperature in the middle as in the wiring E69-5, the contrast of the EBAC image changes in the laser irradiation state and the non-irradiation state, and thus, which wiring includes the abnormality Can be detected.

<Specific example of the most suspicious via in the reaction area>
In order to finally point out the most suspicious vias, it is necessary to analyze the layout in detail. In this example, when the layout viewer displayed on the monitor MON is used, it is shown in FIG. As shown, the via of the wiring E69-5 passing through the SDL reaction region SDL68 becomes the most likely via VA97.

  The coordinates on the layout of the most likely via VA97 are recorded, or a mark is formed by EBCVD or the like as described in the analysis method of the first embodiment. The via is then sampled by FIB processing to form a cross-section, and a high-resolution image is obtained using a TEM (Transmission Electron Microscope) or a STEM (Scanning Transmission Electron Microscope). Identify the cause of failure by cross-sectional observation

  Through the above steps, it is possible to specify the position of a defect having temperature dependence such as a high resistance via. Although it is necessary to remove the surface layer film from the defect analysis device FKS once, as before, when performing logic analysis and layout analysis of the location where the SDL reaction is detected, and performing EB testing analysis Compared to the above, it is possible to shorten the time required to identify the defective position.

  Of course, it is possible that the defect analysis apparatus FKS is provided with a film removal function such as a plasma processing apparatus and everything is executed in the defect analysis apparatus FKS. Will interfere with each other. As a result, the analysis performance itself is often impaired, and this analysis apparatus is equipped with an analysis function using an electron beam, a mechanical prober, and an analysis function using a laser.

  As described above, the semiconductor device failure analysis method according to the second embodiment includes the following steps.

  The test pattern is swept while irradiating the sample (sample SPL) with the laser beam (laser beam LBEM), and the marginal defect position is detected from the change of the pass / fail judgment result. Through holes (vias) existing at the marginal defect positions are extracted from the layout data, and suspected wirings that are wirings connected to the through holes are listed. The suspected wiring is subjected to EBAC analysis, and based on the analysis result, the most likely through hole (via VA97) that is the most likely candidate for the failure factor is specified.

  Further, in the semiconductor device failure analysis method according to the second embodiment, the step of identifying the most likely through hole (via VA97) includes the following steps.

  The sample (sample SPL) is scanned with an electron beam (electron beam BEM), a scanning electron microscope image is observed, and a probe of a mechanical prober (mechanical prober MPR) is brought into contact with the suspected wiring.

  In a state where the laser beam (laser beam LBEM) is irradiated to the detected marginal defect position, the electron beam is focused, scanned, irradiated, and the first change from the change in the electron beam current detected by the mechanical prober brought into contact with the suspected wiring. 1 current image is acquired.

  Laser beam irradiation is stopped, and a second current image is acquired from a change in electron beam current detected by a mechanical prober brought into contact with the suspicious wiring in a state where the electron beam is focused, scanned, and irradiated.

  If there is a difference between the acquired first and second current images and if there is a difference, the through hole connected to the wiring in the marginal defect position is identified as the most likely candidate for the defect factor To do.

(Embodiment 3)
<Overview>
In the third embodiment, for example, a case where the failure analysis apparatus FKS of FIG. 1 is applied to a power device or the like will be described.

  The power device is a device used for power conversion such as switching at a high breakdown voltage, such as a power transistor, a power diode, or an IGBT (Insulated Gate Bipolar Transistor).

  This type of power device has little change in the pattern that can recognize the position in the chip, such as a logic area formed by a fine block structure and wiring of different shapes in the device, and the same pattern is like a memory Widely distributed. For this reason, even if light emission or OBIRCH reaction related to defects can be detected, it is difficult to transfer the position to the next physical analysis. Therefore, it is necessary to repeatedly perform mark formation by an FIB apparatus or the like and detection of the OBIRCH reaction in order to specify the position, and it takes time to come and go between a plurality of apparatuses. On the other hand, the analysis process in the third embodiment enables time reduction by failure analysis using the failure analysis apparatus FKS.

  FIG. 7 is an explanatory diagram showing an example of power device failure analysis using the failure analysis apparatus of FIG.

<Observation of characteristic patterns>
Even in the sample SPL such as a power device, a characteristic pattern exists in the peripheral portion, and this is used as a mark MK56, and the laser beam LBEM is scanned from the back surface of the sample SPL as shown in FIG. Observe.

  Further, from the surface of the sample SPL, the electron beam BEM is scanned and observed as shown in FIG. When these are displayed on the monitor MON, it is possible to confirm the deviation of the mark MK56 in the monitor MON. The shift amount δ is calculated as a coordinate shift in the XY direction.

<Adjustment between optical axes>
A predetermined voltage is applied to the deflector PLS incorporated in the electron optical system OPT, and the beam deflection (offset voltage) corresponding to the XY coordinate shift calculated above is superimposed on the deflection of the normal electron beam BEM. As shown in FIG. 7B, the deviation between the laser beam optical axis LBEMA (= the optical axis of the photon optical system FOT) and the laser beam optical axis BEMA (the optical axis of the electron optical system OPT) is corrected.

<Detection of luminescence / OBIRCH reaction>
Then, as shown in FIG. 7C, the needles of the two mechanical probers MPR are touched down to the pads PAD1 and PAD2 formed in the sample SPL, and the sample SPL is brought into an operation state in which the defect is reproduced.

  In this case, power / signal supply from the pads PAD1 and PAD2 is used here, but the sample may be operated in a mounted state in a socket that is assembled in a package and the device surface is opened.

  In this state, detection of OBIRCH reaction is detected by detecting emission by capturing light with the infrared camera ICAM, or by focusing, scanning, and irradiating the laser beam LBEM from the laser oscillator LAR. The detected light emission / OBIRCH reaction position calculates the XY shift amount from the laser beam optical axis LBEMA on the monitor MON, and records the value in a storage device such as a hard disk of the control device PC.

<Formation of EBCVD mark>
The sample stage SST is moved in the opposite direction of the XY shift recorded in a storage device such as a hard disk, and the light emission / OBIRCH reaction position is set on the laser beam optical axis LBEMA.

  Since the deviation of the laser beam optical axis LBEMA is corrected by the deflector PLS in FIG. 7B, as shown in FIG. 7D, the light emission / light emission is performed while the CVD gas GS94 is emitted from the gas nozzle of the gas injector GIG. The electron beam BEM is focused, scanned and irradiated at the position where the OBIRCH reaction has occurred, and a film is deposited by EBCVD to deposit the EBCVD mark ECM66.

  The shape of the EBCVD mark ECM66 may be a line-shaped pattern around the light emission / OBIRCH reaction position POS95 as shown in FIG. 7D, or a cross mark so that the position can be recognized. To do.

  According to the above, since the EBCVD mark ECM 66 can be formed on the spot where the luminescence / OBIRCH reaction is detected, the analysis position in the next physical analysis process can be easily confirmed.

  This makes it possible to shorten the analysis time and to form the EBCVD mark ECM66 while observing the light emission / OBIRCH reaction site as compared with the method in which the mark is formed by introducing the apparatus into a plurality of different times. The accuracy of the physical analysis position can also be improved.

  In actual power device analysis, the electrode may be taken out from the front and back surfaces, or a wide range may be covered with the electrode when taken out from the front surface.

  Therefore, in order to perform light emission or OBIRCH analysis after operating the power device, it is necessary to devise a technique that minimizes the influence on the analysis. Specifically, the substrate on the back side of the device is mirror-finished, an alternative electrode for voltage application is provided, and the EBCVD mark ECM 66 is deposited on a layer that does not disappear by the surface treatment during physical analysis. The analysis method according to the third embodiment can be realized after dealing with them.

  Hereinafter, the semiconductor device failure analysis method according to the present embodiment includes the following steps.

  A characteristic pattern of the sample (sample SPL) is selected from the electron microscope image. The pattern on the second side of the sample is selected from images of a laser scanning microscope or an infrared microscope. An electron beam deflector (deflector PLS) included in the electron optical system (electron optical system OPT) is calculated by calculating the amount of deviation between the pattern selected from the electron microscope image and the pattern selected from the image of the laser scanning microscope or infrared microscope. An offset voltage is superimposed on the optical axis to correct the optical axis.

  The probe of the mechanical prober (mechanical prober MPR) is brought into contact with the electrode formed on the sample to supply power and signals, and the sample is operated or stopped to maintain the state of reproducing the defect, and the second sample of the sample is maintained. A current image is acquired from a change in current generated by focusing, scanning, and irradiation of a laser beam (laser beam LBEM) from the surface, and a defect-causing point is specified.

  The semiconductor device failure analysis method according to the present embodiment includes the following steps.

  A characteristic pattern of the sample (sample SPL) is selected from the electron microscope image. The pattern on the second side of the sample is selected from images of a laser scanning microscope or an infrared microscope.

  The amount of deviation between the pattern selected from the electron microscope image and the pattern selected from the image of the laser scanning microscope or infrared microscope is calculated, and the offset voltage is superimposed on the electron beam deflector (deflector PLS) of the electron optical system. Correct the optical axis.

  The probe of the mechanical prober is brought into contact with the electrodes (pads PAD1, PAD2) formed on the sample to supply power and signals, and the sample is operated or stopped to maintain the state of reproducing the defect, and the second sample The light generated from the surface is detected by an infrared camera (infrared camera ICAM), and the defect-causing part is specified.

(Embodiment 4)
<Overview>
In recent semiconductor devices, a material called Low-k having a low dielectric constant is applied as an insulating film in order to reduce the influence of capacitive coupling between wirings. This is generally a film containing carbon as a component in addition to silicon and oxygen. In recent years, the film has a porous shape with pores in the film, and the porosity tends to increase.

  In the case of such a film, when the electron beam is irradiated, the film may be damaged by the energy and may be shrunk or distorted. In order to avoid this, electron beam irradiation is often suppressed during analysis. In the fourth embodiment, an analysis technique for the above purpose will be described.

<Short defect analysis example>
FIG. 8 shows an analysis process in the case of a short circuit defect in a semiconductor device using the defect analysis apparatus of FIG.

<Detection of OBIC reaction>
When performing OBIRCH analysis, a laser oscillator LAR2 having a wavelength of about 1300 nm is used. This is because only the heat from the laser is applied to the sample, and an analysis process using a change in the electrical resistance of the wiring due to the thermal effect is applied.

  On the other hand, in the case of OBIC (Optical Beam Induced Current) analysis, a laser oscillator LAR1 having a wavelength of about 1064 nm is used. In this case, the laser having a wavelength of about 1064 nm has energy exceeding the band gap of silicon and generates an electron-hole pair at a pn junction in the semiconductor device, which becomes a current called OBIC.

  In the fourth embodiment, this OBIC detection is applied. The sample SPL is mechanically polished and exposed to the signal wiring layer to be analyzed. This becomes the sample SPL placed on the sample holder SHD in the vacuum chamber CHM, and the mechanical prober MPR1 as shown in FIG. 8A is connected to the known defective wiring HP80 that has already been found to be involved in the defect in the sample SPL. Touch down.

  Further, the second mechanical prober MPR2 is also touched down to the wiring HP71 composed of the power supply wiring of the exposed wiring layer or the ground (ground) wiring as shown in FIG. A laser having a wavelength of about 1064 nm is focused, scanned, and irradiated to generate an OBIC image that is a current image of a current flowing between these two mechanical probers MPR. As a result, as shown in FIG. 8A, the defective wiring output unit OBIC reaction OB81 is connected to the output unit to the known defective wiring HP 80 (that is, a connection part with a semiconductor element such as a transistor, hereinafter referred to as an output unit). It can be detected. Further, the short wiring output portion OBIC reaction OB82 is also detected in the output portion of the wiring short-circuited to the known defective wiring HP80.

  In this case, since the current from the electron-hole pair generated at the pn junction at the output to the wiring is detected, the non-bias state in which no voltage is applied between the two mechanical probers MPR is clearer. An OBIC reaction can be detected.

<Extraction of adjacent wiring>
The wiring that is likely to be short-circuited is the wiring adjacent to the known defective wiring HP80, and the adjacent wiring extraction function installed in some layout viewers or analysis support software is executed by the program of the control device PC. Then, as shown in FIG. 8B, all adjacent wirings HP83 are extracted. List this as a candidate for the short partner.

  Here, the analysis support software captures and displays an LSM image, a light emission image, a layout image, and the like, and displays a coordinate system lock and a region of light emission, OBIRCH reaction, and SDL reaction as positions on the layout. Correspondingly, it has a function of extracting a wiring passing through the region, and this function is used in FIG. As another function, it is equipped with a function to extract the adjacent wiring for the specific wiring in conjunction with the layout viewer.

<Extraction of OBIC reaction passage wiring>
On the other hand, there should be a short partner in the wiring that passes through the short wiring output unit OBIC reaction OB82, and this also extracts the wiring that passes through a specific location mounted in some layout viewers and analysis support software. Function can be used.

  In this case, as shown in FIG. 8C, the OBIC reaction image displayed on the monitor MON is coordinated with the layout image so as to correspond to it, and set in the layout viewer as the short wiring output unit OBIC reaction box OBB84. . Then, the area of the OBIC reaction is transferred as coordinate data, and all of the reaction box passage wiring HP86 passing through the reaction box is listed.

<Extraction of common wiring>
The wirings listed in FIG. 8B and FIG. 8C (adjacent wiring HP83, reaction box passing wiring HP86) are listed from different information, but should contain the same short wiring. is there. Therefore, both wiring lists are compared, and the common extracted wiring HP85, which is a common wiring, is extracted using the above-described analysis support software.

  This is the wiring adjacent to the known defective wiring HP80 and at the same time the wiring that passes through the short wiring output unit OBIC reaction box OBB84, and becomes a potential candidate for the shorting partner. In the case shown in FIG. 8D, two common extraction wirings HP85 are extracted.

<Confirmation of OBIC reaction position>
When there are a plurality of common extraction lines HP85 as in the case of FIG. 8D, it is necessary to further narrow down the lines. At that time, one judgment material is whether or not the output part (OBIC reaction part) of the common extraction wiring HP85 matches in the short wiring output part OBIC reaction box OBB84.

  In this case, as shown in FIG. 8 (e), one is the reaction box passage wiring HP86 and the other is the reaction box output matching wiring HP87. Therefore, the latter (reaction box output coincidence wiring HP87) is the most likely wiring.

  Of course, it is possible to make the extraction condition that the wiring to be extracted at the time of OBIC reaction passage wiring extraction in FIG. Since it may not be installed, it is adopted as a method of judging later.

<Identification of short position>
When the adjacent distance between the two wirings (common extraction wiring HP85) is short, the location may be physically analyzed. However, depending on the case, there may be a long distance. At that time, similarly to the analysis example described in the first embodiment, the needle of the mechanical prober MPR is touched down to both of the short-circuited wires, and a current is passed to identify the short-circuited position.

  In the case shown in FIG. 8 (f), the known defective wiring HP is in the wiring layer where the needle of the mechanical prober MPR is touched down at the stage of FIG. 8 (a) and the short counterpart wiring HP63 is exposed. Is moving the second mechanical prober MPR and touching it down.

  In this state, the laser oscillator LAR2 (wavelength of about 1300 nm) is switched, the laser beam LBEM is scanned, OBIRCH analysis is performed, and the wiring path is observed. If only the wiring path can be observed, the touch down position is changed, but the short-circuited part is usually thinner or thinner than the wiring itself, and the thermal effect of the laser beam LBEM on the part is less than the wiring. Is also big. Therefore, there are many cases where the short portion strongly undergoes OBIRCH reaction, and the most likely short-circuit portion SHT can be specified.

  By detecting the OBIC reaction and the OBIRCH reaction by the analysis process as described above, it is possible to identify the short wiring and the short location to the specific wiring.

  As described above, since the analysis using the electron beam BEM can be performed in the state where the laser beam LBEM is irradiated, it is possible to specify the position of the defect that changes due to the influence of the heat of the laser beam LBEM. It can be. Therefore, analysis time can be shortened by enabling continuous failure analysis.

  Here, the meaning that the defect analysis device FKS is a composite device having an optical optical system analysis function and an electron optical system analysis function is in touch-down control of the needle of the mechanical prober MPR. That is, it is premised that the mechanical prober MPR can be moved and brought into contact with the wiring while observing the pattern of the exposed wiring on the surface layer by SEM observation using the electron beam BEM.

  At this time, the electron beam BEM is irradiated. In the case of EBAC analysis, an EBAC image cannot be acquired unless a certain amount of beam current is applied. In contrast, in SEM observation, surface observation is possible even if the beam current is reduced. Yes, damage due to electron beam irradiation can be minimized.

  Hereinafter, the semiconductor device failure analysis method according to the fourth embodiment includes the following steps.

  A needle of a mechanical prober (mechanical prober MPR) is brought into contact with either a known wiring and a power supply wiring or a ground wiring related to a known defect in the analysis target sample (sample SPL). A current image is acquired from a change in current flowing between mechanical probers generated by focusing, irradiating, and scanning a laser beam (laser beam LBEM).

  Detect the presence or absence of the output reaction of the connection part (output part) with the semiconductor element of the known wiring in the acquired current image and the output reaction of the connection part (output part) with the semiconductor element of the unknown wiring that is another wiring, When an output response of an unknown wiring is detected, a transformation coefficient of the coordinate system is obtained by associating a plurality of characteristic patterns between the image of the stage coordinate system of the stage (stage SST) and the image of the layout coordinate system. Perform a coordinate system lock to associate the system.

  The adjacent wiring adjacent to the known defective wiring is extracted from the layout data. The common wiring including the same defect is extracted by comparing the output wiring corresponding to the output section that is the wiring including the output response of the unknown wiring from the layout data with the adjacent wiring extracted from the layout data.

  The defect analysis method for a semiconductor device according to the fourth embodiment includes the following steps.

  Further, a needle of a mechanical prober (mechanical prober MPR) is brought into contact with the unknown wiring. A current image is acquired from a change in current generated by focusing, irradiating, and scanning a laser beam (laser beam LBEM) in a state where a voltage is applied between the known wiring and the unknown wiring through a mechanical prober.

  It is detected whether or not a point-like reaction has occurred in the acquired current image, or whether or not a turn-back reaction has occurred between the known wiring and the common wiring.

(Embodiment 5)
<Overview>
In the fourth embodiment, the OBIC reaction is used to specify the short partner wiring. The defect analysis apparatus FKS can use an OBIC reaction and an EBIC (Electron Beam Induced Current) reaction for the coordinate system lock as one step in the analysis example of the first embodiment. The EBIC reaction detects EBIC flowing by electron-hole pairs generated at a pn junction when irradiated with an electron beam.

<Example of coordinate system lock using OBIC reaction and EBIC reaction>
FIG. 9 is an explanatory diagram showing an example of a coordinate system lock using the OBIC reaction and the EBIC reaction by the failure analysis apparatus of FIG.

  The sample to be analyzed is in a state in which the surface layer is removed until the wiring layer to be struck by the mechanical prober MPR is exposed. Next, a layout image is displayed on the monitor MON using a layout viewer to examine layout data, and a wiring for detecting an OBIC reaction and an EBIC reaction is selected. The criterion for selection is that the output part of the target wiring does not greatly deviate from the target field of view.

  When appropriate wirings HP69a and HP69b can be selected, SEM images SMI by the focused electron beam BEM from the electron optical system OPT are acquired from the upper side (surface) of the sample SPL, and as shown in FIG. Touch down the needles of the two mechanical probers MPR.

  Further, the needle of the third mechanical prober MPR is touched down to the wiring HP 71 which is either the power supply wiring or the ground wiring. In this state, the electron beam BEM is focused, scanned, and irradiated from the surface side of the sample SPL to detect the EBIC reaction.

  At this time, since the electrons absorbed by the wiring are also detected by the mechanical prober MPR, as shown on the left side of FIG. 9B, the EBAC image EBACI displaying both the EBIC reactions EBI73a and 73b and the EBAC reactions EBA74a and EBA74b. It becomes.

  On the other hand, the laser beam LBEM from the laser oscillator LAR1 (wavelength of about 1064 nm) is focused, scanned, and irradiated on the back side of the sample SPL, and the OBICs of the respective wirings HP69a and HP69b are shown on the right side of FIG. An OBIC image displaying the reactions OB78 and OB79 is acquired.

  The EBIC reaction and the OBIC reaction are signals at the output portions of the wirings HP69a and HP69b, respectively, and the coordinates of the positions are known from the layout data of the monitor MON together with the EBIC reaction and the OBIC reaction. 9B, the layout coordinates of the wiring output part HPOUT76 on the layout of the wiring HP69a and the wiring output part HPOUT77 on the layout of the wiring HP69b are obtained.

  Therefore, as shown in FIG. 9C, the coordinates of the electron optical system OPT of the two EBIC reactions EBI73a and EBI73b and the layout coordinates of the wiring output portions HPOUT76 and HPOUT77 on the two layouts are obtained.

  Then, a conversion coefficient from the coordinate system of the electron optical system OPT to the layout coordinate system is calculated based on the obtained coordinate values. The same is done between the coordinate system of the photon optical system FOT and the layout coordinate system.

  As a result, the coordinate system of the electron optical system OPT and the coordinate system of the photon optical system FOT are locked to the layout coordinate system, and after the lock, all can be described in the layout coordinate system.

  In addition, although the positional relationship of two places is calculated | required here using two wiring which detects an OBIC reaction and an EBIC reaction here, an accuracy can be improved further by making this into three places. If the sample SPL actually has a vertical inclination, the conversion coefficient cannot be obtained accurately if there are no three values. When there is a possibility that the sample is inclined, a coordinate system lock using three points is desirable.

  As described above, on the front side and the back side of the sample SPL, it is only necessary to specify the position of the layout coordinate system in order to irradiate the beam to the same position on each optical system, and various position specifications can be easily set. can do.

(Embodiment 6)
<Overview>
In the configuration of the failure analysis apparatus FKS in FIG. 1, a situation may occur in which the needle of the mechanical prober MPR is detached from the sample SPL due to vibration transmitted from the surface plate PLT or the like.

  As vibration transmitted from the surface plate PLT, for example, when the optical system stage STG is moved in a state where the needle of the mechanical prober MPR is touched down on the surface of the sample SPL to be analyzed, or the objective lens LEN2 is switched. Occurs when the turret (not shown) is rotated for the purpose.

  Therefore, in the sixth embodiment, a configuration example that can prevent the needle of the mechanical prober MPR from coming off the sample SPL even when vibration transmitted from the surface plate PLT occurs will be described.

  FIG. 10 is an explanatory diagram showing an example of the configuration of the failure analysis apparatus according to the sixth embodiment.

  The defect analysis apparatus FKS in FIG. 10 is different from the defect analysis apparatus FKS in FIG. 1 in that the optical system stage STG on which the photon optical system FOT is mounted is mounted on the vibration isolation table RVB1 newly provided. It is a point. The configuration of the other defect analysis apparatus FKS is the same as that shown in FIG.

  By providing the vibration isolation table RVB1, the electron optical system OPT and the photon optical system FOT are mechanically separated. Therefore, even if the optical system stage STG is moved or the turret (not shown) is rotated, the vibration can be prevented from being isolated by the vibration isolation table RVB1 and transmitted to the mechanical prober MPR. .

  As described above, failure analysis can be performed efficiently.

(Embodiment 7)
<Outline of device>
The failure analysis apparatus FKS in the first and sixth embodiments has been improved in function by adding various assemblies, but there is also a need for a simpler apparatus in consideration of the apparatus price and maintainability. In the seventh embodiment, a configuration corresponding to these needs will be described.

<Configuration example of defect analysis device>
FIG. 11 is an explanatory diagram showing an example of the configuration of the failure analysis apparatus according to the seventh embodiment.

  In the failure analysis apparatus FKS of FIG. 11, the simplest part is that the sample stage SST on which the sample SPL is mounted is removed. Other than that, the infrared camera ICAM, illumination system LHT, half mirrors HM1, HM2, laser oscillator LAR1, gas injector GIG, loading chamber LCB, four head amplifiers HAP, which were provided in the failure analysis apparatus FKS of FIG. The vibration isolation table RVB1 (FIG. 11) is removed. Even with this configuration, the minimum analysis can be realized. The other configuration is the same as that of the failure analysis apparatus FKS in FIG.

  As described above, since there is no sample stage SST on which the sample SPL is placed, the sample SPL is placed on the vacuum window VWD via the sample holder SHD.

  In a state where the sample SPL is placed on the vacuum window VWD, the sample SPL cannot be moved, so some moving means is required. Therefore, in the failure analysis apparatus FKS of FIG. 11, the role of moving the sample SPL is assigned to, for example, one mechanical prober MPR among the four mechanical probers MPR.

  12 is a perspective view showing a configuration example of a mechanical prober provided in the failure analysis apparatus of FIG.

  Here, the four mechanical probers MPR are referred to as mechanical probers MPR1 to MPR4. The mechanical probers MPR <b> 1 to MPR <b> 4 are respectively provided outside the four outer periphery of the sample SPL, and the mechanical prober MPR <b> 1 is disposed so as to face the mechanical prober MPR <b> 3. The mechanical prober MPR2 is disposed so as to face the mechanical prober MPR4.

  The mechanical probers MPR <b> 1 to MPR <b> 3 are probes that detect current by applying needle contact to the wiring of the sample SPL placed on the vacuum window VWD via the sample holder SHD. The mechanical prober MPR4 has a configuration in which a sample holder SHD is provided at the tip of the needle, rather than performing needle contact with the wiring of the sample SPL or the like.

  Then, the sample SPL is mounted on the sample holder SHD placed on the vacuum window VWD, and the sample holder SHD is moved by the mechanical prober MPR4, thereby realizing the movement of the sample SPL.

  Thus, with the sample SPL placed on the vacuum window VWD, the laser beam LBEM can be irradiated from the objective lens LEN2 through the vacuum window VWD from the back surface of the sample SPL.

  13 is a cross-sectional view taken along the line AB in FIG.

  FIG. 13 shows the positional relationship among the objective lens LEN2, the electron optical system OPT, the sample SPL, the mechanical probers MPR2 and MPR4, and the sample holder SHD in the laser optical system.

  The vacuum window VWD is mounted so as to be sandwiched between the bottom surface BTM of the vacuum chamber CHM and the window presser WHD. The window presser WHD is fastened to the bottom surface BTM of the vacuum chamber CHM with, for example, a bolt (not shown). The sample SPL is moved by pushing and pulling the sample holder SHD by the mechanical prober MPR4.

  After opening the sample SPL and the vacuum chamber CHM under atmospheric pressure, the bolts fastened to the vacuum chamber CHM can be loosened and removed, and the vacuum window VWD can be replaced by removing it from the bottom BTM. It is also possible to provide a mechanism for easier sample exchange at the bottom of the vacuum chamber CHM.

  FIG. 14 is a cross-sectional view showing an example of a sample holder provided with the failure analysis apparatus of FIG.

  The sample holder SHD is made of, for example, a metal such as aluminum, and the shape thereof is a frame shape. As shown in the figure, the frame-shaped opening OPN is wider than the sample SPL, and the sample SPL is inserted into the opening OPN. As described above, the sample holder SHD is fixed to the tip of the needle NDL of the mechanical prober MPR4.

  FIG. 15 is a cross-sectional view showing another example of the sample holder of FIG.

  In this case, the sample holder SHD has a frame shape as in FIG. 4, but the side surface of the frame-shaped opening is formed to be inclined with respect to the thickness direction of the sample holder SHD. That is, in the sample holder SHD, the opening on the vacuum window VWD side is wider than the opening on the electron optical system OPT (FIG. 1) side.

  A sample press pad HPAD is provided on the side surface of the frame-shaped opening. The sample pressing pad HPAD is made of a material softer than a metal such as rubber or resin, and prevents the sample SPL from being chipped when the sample SPL is moved. Thereby, it is possible to realize a failure analysis apparatus FKS that is low in cost and has good maintainability.

  As described above, the failure analysis apparatus according to the seventh embodiment includes a vacuum chamber (vacuum chamber CHM) to be evacuated, an electron optical system (electron optical system OPT), a detector (secondary electron detector EDT), a gas Injector (gas injector GIG), mechanical prober (MPR), surface plate (surface plate PLT), first vibration isolation table (vibration isolation table RVB), laser oscillator (laser oscillators LAR1, LAR2), photon optical system (photon optics) System FOT), an optical system stage (optical system stage STG), a reflection laser detector (reflection laser detector RLD), and an infrared camera.

  The electron optical system is provided in a vacuum chamber and focuses, scans, and irradiates an electron beam. The detector is provided in the vacuum chamber and detects secondary electrons generated by electron beam irradiation. The gas injector is provided in the vacuum chamber and supplies gas that is decomposed and fixed by electron beam irradiation.

  The mechanical prober probes the surface of the sample to be analyzed. The platen is loaded with a vacuum chamber. The first vibration isolation table oscillates and emits a laser beam (laser beam LBEM), which is a laser oscillator that prevents vibration transmitted from the surface plate from being transmitted to the vacuum chamber.

  The photon optical system is provided below the vacuum chamber, focuses the laser beam emitted from the laser oscillator, and irradiates the sample. The optical system stage moves the photon optical system. The reflected laser detector detects the reflected light reflected from the sample and forms a laser microscope image (LSM image). The infrared camera detects light generated from the sample.

  The vacuum chamber has a vacuum window made of a material that transmits light on the bottom surface, and irradiates a sample placed on the vacuum window with a laser beam emitted from the photon optical system.

  The defect analysis apparatus according to the seventh embodiment has a sample moving mechanical prober (mechanical prober MPR4) for moving the sample. This mechanical prober is provided with a sample holder for holding a sample at the tip, and the sample holder is moved to move the sample.

(Embodiment 8)
<Configuration example of photon optical system>
In the eighth embodiment, a configuration example of the photon optical system FOT will be described.

  FIG. 16 is an explanatory diagram showing an example of the configuration of the photon optical system in the defect analysis apparatus of FIG.

  The photon optical system FOT includes an objective lens LEN2, a laser optical system unit LOPT, and a laser scanning system unit LSCN, as illustrated. An objective lens LEN2 is provided above the photon optical system FOT. Below the objective lens LEN2, a laser optical system section LOPT is provided. A laser scanning system LSCN is provided below the laser optical system unit LOPT. The photon optical system FOT is placed on the optical system stage STG.

  The laser optical system section LOPT includes a reflection laser detector RLD and half mirrors HM1 and HM2 in the defect analysis apparatus FKS of FIG. The laser scanning system unit LSCN includes the laser oscillator LAR2, the mirror MRR, and the laser scanning system SCN in the failure analysis apparatus FKS of FIG.

  A vacuum chamber CHM is provided above the photon optical system FOT. The configuration inside the vacuum chamber CHM is omitted in FIG. 16, but is the same as that shown in FIG.

  In the configuration of the photon optical system FOT in FIG. 16, as described in the seventh embodiment, the laser beam LBEM is focused, scanned, and irradiated on the sample SPL placed on the vacuum window VWD by the objective lens LEN2 employing the zoom lens. To do.

  In this configuration, the magnification and the enlargement / reduction of the field of view can be adjusted by the zoom lens (objective lens LEN2). Therefore, the magnification and the field of view can be continuously changed, and the size of the laser spot with respect to the field of view can be kept constant. It becomes possible. Further, since a zoom lens is applied to the objective lens LEN2, a turret for converting a normal objective lens is not necessary, and the apparatus can be simplified.

  As described above, the analysis efficiency can be improved while reducing the apparatus cost.

(Embodiment 9)
<Configuration example of photon optical system>
In the ninth embodiment, a configuration example of a photon optical system FOT employing a wide field lens will be described.

  FIG. 17 is an explanatory diagram showing an example of the configuration of the photon optical system in the defect analysis apparatus of FIG.

  In the eighth embodiment, a case where a zoom lens is used as the objective lens LEN2 is described. However, in the ninth embodiment, as shown in FIG. 17, a high aperture ratio (NA: Numerical Aperture) is used as the objective lens LEN2. An example using a wide-field lens will be described.

  In this case, the configuration is the same as that of the photon optical system FOT in FIG. 16 except that the objective lens LEN2 is not a zoom lens but a wide-field lens having a high numerical aperture (NA).

  By making the objective lens LEN2 a wide-field lens having a high numerical aperture (NA), the deflection angle of the laser beam LBEM can be controlled by the laser scanning system LSCN. Accordingly, it is possible to zoom in on a desired region, and the optical system stage STG for moving the photon optical system FOT in the X direction and the Y direction can be eliminated. However, the optical system stage STG1 that moves in the Z direction for focusing needs to be equipped.

(Embodiment 10)
In the seventh embodiment, the sample SPL is placed on the vacuum window VWD. In the tenth embodiment, a configuration in which the sample SPL is placed while the vacuum window VWD is unnecessary will be described.

  FIG. 18 is an explanatory diagram showing a configuration example of an optical system in the failure analysis apparatus of FIG.

  18 differs from FIG. 16 in that a fiber optics plate FOP is provided instead of the vacuum window VWD on the bottom surface of the vacuum chamber CHM. The fiber optics plate FOP has, for example, a configuration in which optical fibers of about several μm are bundled and formed on a taper, and the area of one end face EF1 is smaller than the area of the other end face EF2.

  In the fiber optics plate FOP, the end surface EF2 side with a large area faces the objective lens LEN2, and the end surface EF2 side with a large area enters the vacuum chamber CHM from the bottom surface of the vacuum chamber CHM. The sample SPL is placed on the end surface EF2 of the fiber optics plate FOP.

  The fiber optics plate FOP has a function of guiding the laser beam LBEM incident through the objective lens LEN2 to the opposite side (sample SPL side). Since the fiber optics plate FOP has a taper, the size of the fiber optic plate FOP is reduced to one-half of the incident surface (end surface EF1) on the exit surface (end surface EF2), and the spot diameter is reduced. Thereby, the back surface of the sample SPL can be efficiently irradiated with the laser beam LBEM.

  Thus, in FIG. 18, the fiber optics plate FOP combines the function of the vacuum window VWD and the function of the sample holder SHD. Thereby, the vacuum window VWD and the sample holder SHD can be made unnecessary. Other configurations in the failure analysis apparatus FKS are the same as those in FIG.

  FIG. 19 is an explanatory diagram showing another example of FIG.

  In FIG. 19, a fiber optics plate FOP is provided instead of the vacuum window VWD in FIG. 17. Also in this case, the fiber optics plate FOP has a configuration in which, for example, optical fibers of about several μm are bundled and formed on a taper, and the area of one end face EF1 is smaller than the area of the other end face EF2. Yes.

  Again, the sample SPL is placed on the end face EF2 of the fiber optics plate FOP. The objective lens LEN2 is a wide-field lens having a high numerical aperture (NA) as shown in FIG. Thereby, the optical system stage STG, the vacuum window VWD, and the sample holder SHD can be dispensed with.

(Embodiment 11)
<Overview>
The resolution and the light collection rate in the light irradiation to the sample SPL are determined by the aperture ratio of the lens LEN2. In the case of silicon which is a substrate of a semiconductor device, the refractive index is 3.5, for example, and has a large value with respect to the refractive index of air of about 1.0. .

  For this reason, a special lens called a solid immersion lens (SIL) is being applied. The solid immersion lens improves the aperture ratio by bringing a hemispherical lens (in this case, silicon of the same material as the substrate of the semiconductor device is desirable) into close contact with the silicon substrate surface.

  When the aperture ratio of the objective lens is about 0.5 without using a solid immersion lens, the half apex angle in silicon can be calculated as 8.2 ° according to the ratio of the refractive index of silicon and the refractive index of air. Only light from within that solid angle can be acquired.

  When λ is the wavelength of light, the image resolution is determined by λ / 2 × NA (aperture ratio), and since only light having a wavelength of about 1 μm or more can be transmitted through silicon, when the aperture ratio is 0.5, the image resolution is It is the same as the wavelength.

  On the other hand, the device rules of semiconductor devices are becoming finer year by year. For example, in the case of a 45 nm device, the gate width is about 50 nm, and an image capable of recognizing a pattern is obtained with an image resolution of about 1 μm or more. I can't.

  On the other hand, when a solid immersion lens is used, light enters the hemispherical silicon from the air, so that the light bent by refraction there passes through the silicon substrate in the same direction and reaches the pattern, Ideally, when the half apex angle in silicon is 74 °, the aperture ratio is 3.5, and the wavelength of incident light is about 1.3 μm, the image resolution of about 0.15 μm can be obtained. The solid angle is widened, and a light collection rate of about 80 times that obtained when a solid immersion lens is not used is obtained.

  However, the above calculations are based on perfectly ideal conditions. Actually, the contact state between the silicon substrate and the hemispherical silicon lens, the relationship between the thickness of the silicon substrate and the radius of the hemispherical silicon lens, etc. There are many factors that degrade the performance, and an aperture ratio of 2.5 is considered the limit even when the best performance is obtained. However, even with an aperture ratio of 2.5, the image resolution and the light collection rate are remarkably improved, and its application is spreading as an effective means in analysis.

  Therefore, in the eleventh embodiment, a technique will be described in which a silicon lens is attached to the tip of the objective lens LEN2 to significantly improve the image resolution and the light collection rate.

<Optical system configuration example>
FIG. 20 is an explanatory view showing a configuration example of an optical system provided with a solid immersion lens in the defect analysis apparatus of FIG. FIG. 20 shows a case where a solid immersion lens is used in the failure analysis apparatus FKS of FIG.

  As shown in FIG. 20A, a vacuum window VWD is provided on the bottom surface of the vacuum chamber CHM as in FIG. 11, and the sample SPL is placed on the vacuum window VWD. . In the photon optical system FOT, a solid immersion lens holding mechanism LHLD that holds the solid immersion lens SLN is provided at the tip of the objective lens LEN2.

  As described above, the solid immersion lens SLN is a hemispherical lens made of silicon or the like, and is fixed by the solid immersion lens holding mechanism LHLD so that the spherical surface side of the solid immersion lens SLN is positioned on the objective lens LEN2 side. Yes.

  In FIG. 11, the vacuum window VWD is made of a transparent material such as quartz glass. However, in the case of the vacuum window VWD shown in FIG. 20, the vacuum window VWD is made of a material such as silicon like the solid immersion lens SLN. By using silicon as the material of the vacuum window VWD, refraction at the interface can be avoided as much as possible.

  When setting the solid immersion lens SLN, as shown on the left side of FIG. 20B, the objective lens is moved upward to move the solid immersion lens SLN held by the solid immersion lens holding mechanism LHLD to the vacuum window VWD side. Move to. Then, as shown on the right side of FIG. 20B, the horizontal surface of the solid immersion lens SLN is pressed against the vacuum window VWD so as to function as a solid immersion lens. As a result, the light collection rate can be improved, and high-resolution defect analysis can be performed.

  As described above, in the defect analysis apparatus in the eleventh embodiment, the objective lens (lens LEN2) in which the photon optical system (photon optical system FOT) focuses the laser beam (laser beam LBEM) on the sample (sample SPL). A solid immersion lens (solid immersion lens SLN) is provided at the front end portion. The solid immersion lens is brought into close contact with a vacuum window (vacuum window VWD) when the laser beam is focused on the sample. The vacuum window is made of silicon.

(Embodiment 12)
<Overview>
In the eleventh embodiment (FIG. 20), the solid immersion lens SLN is mounted in the vicinity of the tip of the objective lens LEN2. In the present twelfth embodiment, an example in which the solid immersion lens is integrated with a vacuum window will be described.

  FIG. 21 is an explanatory diagram showing an example of a configuration in which a vacuum window in which a solid immersion lens is integrated is provided in the failure analysis apparatus of FIG.

  As shown in FIG. 21, a solid immersion lens SLN is formed at the center of the vacuum window VWD. Also in this case, the material of the vacuum window VWD is made of silicon. The sample SPL is placed so as to be positioned at the center of the vacuum window VWD, that is, directly above the solid immersion lens SLN formed integrally with the vacuum window VWD. Other configurations are the same as those in FIG.

  In this configuration, since the position of the solid immersion lens SLN is fixed because it is formed integrally with the vacuum window VWD, the analysis target position of the sample SPL is moved by a mechanical prober MPR4 (not shown), Move directly above the solid immersion lens SLN.

  Further, the optical axis of the laser beam LBEM is moved directly below the solid immersion lens SLN by adjusting the optical system stage STG.

  Thereby, high-resolution observation of an analysis location and irradiation with a minute spot of a laser beam LBEM can be performed. Further, when the infrared camera ICAM is mounted, it is possible to detect light emission at a high light collection rate.

  As described above, in the failure analysis apparatus according to the twelfth embodiment, the vacuum window (vacuum window VWD) has a hemispherical solid immersion lens (solid immersion lens SLN) on the surface on the photon optical system (photon optical system FOT) side. Are integrally formed. The material of the vacuum window is silicon.

(Embodiment 13)
<Overview>
The laser beam LBEM is often irradiated from the back surface of the semiconductor device which is the sample SPL in defect analysis. However, in the case of a microcomputer or SOC in which a wiring pattern such as a power supply layer or a ground layer is not spread on the surface layer of the semiconductor device, it may be necessary to irradiate the laser beam LBEM from the surface. The same applies to devices that are not provided with a wiring pattern such as a power supply layer / ground (ground) layer on the surface layer, such as analog devices and power devices.

  Therefore, the thirteenth embodiment is equipped with a reflective objective optical system as an optical system corresponding to this.

<Optical system configuration example>
22 and 23 are explanatory diagrams illustrating an example of a configuration in which the reflection objective optical system is provided in the defect analysis apparatus of FIG.

  In this case, an annular beam adjustment mechanism BCON, which is a substitute for the objective lens LEN2 in FIG. 11, and a reflective objective optical system HTOPT are provided. The laser beam LBEM is scanned by the laser scanning system unit LSCN and focused by the laser optical system unit LOPT, and an annular beam adjusting mechanism BCON is provided as a part thereof.

  The annular beam adjustment mechanism BCON is an optical system that combines conical lenses such as an axicon lens pair, for example, and shapes the laser beam LBEM into an annular shape and changes the distance between the lens pairs to expand the annular shape. Can be adjusted.

  The reflective objective optical system HTOPT includes a reflective objective first mirror HTOPT1, a reflective objective second mirror HTOPT2, and a reflective objective third mirror HTOPT3. A hemispherical reflecting objective first mirror HTOPT1 is provided between the annular beam adjusting mechanism BCON and the vacuum chamber CHM. A reflective objective second mirror HTOPT2 is provided obliquely below the reflective objective first mirror HTOPT1. The reflective objective third mirror HTOPT3 is provided in the vacuum chamber CHM and is disposed so as to be located obliquely above the sample SPL.

  As shown in FIG. 22, the laser beam LBEM shaped into an annular shape by the annular beam adjusting mechanism BCON is irradiated to the reflective objective first mirror HTOPT1. The reflected laser beam is reflected from the reflecting objective second mirror HTOPT2 and irradiated from the back surface of the sample SPL. Thus, analysis from the back surface of the sample SPL by laser irradiation can be performed.

  On the other hand, as shown in FIG. 23, the laser beam LBEM is reflected by the reflecting objective first mirror HTOPT1 and the reflecting objective second mirror HTOPT2 by operating the annular beam adjusting mechanism BCON to reduce the diameter of the annular ring. You can change the position.

  As a result, the laser beam LBEM reflected from the reflective objective second mirror HTOPT2 passes through the outer periphery of the sample SPL via the vacuum window VWD and is incident on the reflective objective third mirror HTOPT4, and enters the reflective objective third mirror HTOPT4. By being reflected, it is possible to enable irradiation from the surface of the sample SPL. Thereby, the laser analysis from the surface of the sample SPL can be performed.

  In the eighth to thirteenth embodiments, the case where the present invention is applied to the configuration of the failure analysis apparatus FKS of FIG. 11 is described. However, the technique described in the eighth to thirteenth embodiments is shown in FIG. 1 or FIG. The present invention may be applied to each failure analysis apparatus FKS.

  As described above, in the defect analysis apparatus according to the thirteenth embodiment, the photon optical system (photon optical system FOT) has an annular beam adjustment mechanism (annular beam adjustment mechanism BCON) and a reflection objective optical system (reflection objective optical). System HTOPT).

  The ring beam adjusting mechanism adjusts the spread of the ring by shaping the laser beam into a ring shape. The reflection objective optical system adjusts the reflection angle of the laser beam shaped into an annular shape by the annular beam adjustment mechanism, and applies the first surface of the sample and the second surface opposite to the first surface. Irradiate the laser beam.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the third embodiment, marks for physical analysis are formed using EBCVD, but it is also effective to replace the EB optical system there with an FIB optical system. That is, the mark may be formed by carving the device surface by FIB processing instead of the mark by EBCVD.

  Alternatively, it is possible to perform cross-sectional processing on the reaction site by direct FIB processing and observe the cross-section obliquely. Alternatively, it is possible to improve the efficiency of analysis by adopting an analysis means such as micro-sampling by FIB processing, which is observed by TEM or STEM, or by extracting a thin sample for analysis.

FKS defect analysis device CHM vacuum chamber BEM electron beam DEN electron source OPT electron optical system RVB vibration isolation table RVB1 vibration isolation table PLT surface plate VAL1 vacuum valve VAL2 vacuum valve VAL3 vacuum valve VPE vacuum piping VPM vacuum pump LCB loading chamber SPL sample APA1 aperture APA2 Aperture CLEN Condenser lens PLS Polarizer LEN1 Objective lens LEN2 Objective lens SST Sample stage SHD Sample holder EDT Secondary electron detector GIG Gas injector MPR Mechanical prober MPR1 Mechanical prober MPR2 Mechanical prober MPR3 Mechanical prober MPR4 Mechanical prober MAP Main amplifier MAP Main amplifier MAP Main amplifier VWD Vacuum window FOT Photon optical system ST G optical system stage STG1 optical system stage LHT illumination system RLD reflection laser detector LAR1 laser oscillator LAR2 laser oscillator ICAM infrared camera HM1 half mirror HM2 half mirror HM3 half mirror MRR mirror SCN laser scanning system PC controller MON monitor PCON power supply / controller LBEM Laser beam HPAD Sample holding pad PLS Deflector PAD1, PAD2 Pad LOPT Laser optical system section LSCN Laser scanning system section FOP Fiber optics plate SLN Solid immersion lens LHLD Solid immersion lens holding mechanism BCON Ring beam adjustment mechanism HTOPT Reflective objective optical system HTOPT1 Reflection Objective first mirror HTOPT2 Reflective objective second mirror HTOPT3 Reflective objective third mirror

Claims (20)

A vacuum chamber to be evacuated;
A stage provided in the vacuum chamber for placing and moving a sample to be analyzed;
An electron optical system provided in the vacuum chamber for focusing, scanning, and irradiating an electron beam;
A detector provided in the vacuum chamber for detecting secondary electrons generated by electron beam irradiation;
A gas injector provided in the vacuum chamber for supplying a gas to be decomposed and fixed by electron beam irradiation;
A mechanical prober provided in the vacuum chamber for probing the surface of the sample;
A surface plate for loading the vacuum chamber;
A first vibration isolation table for preventing vibration transmitted from the surface plate from being transmitted to the vacuum chamber;
A laser oscillator for emitting and emitting a laser beam;
A photon optical system that is provided below the vacuum chamber and focuses the laser beam emitted from the laser oscillator and irradiates the sample;
An optical system stage for moving the photon optical system;
A reflected laser detector that detects reflected light reflected from the sample and forms a laser microscope image;
An infrared camera for detecting light generated from the sample;
The vacuum chamber is
A defect analysis apparatus having a vacuum window made of a material that transmits light on a bottom surface, and irradiating the sample with a laser beam emitted from the photon optical system through the vacuum window. The defect analysis apparatus according to claim 1,
A failure analysis apparatus including the optical system stage, and a second vibration isolation table that prevents vibration generated from the optical system stage and the photon optical system from being transmitted to the vacuum chamber. The defect analysis apparatus according to claim 1,
The photon optical system is
A defect analysis apparatus, wherein the objective lens that focuses the laser beam on the sample is a zoom lens. The defect analysis apparatus according to claim 1,
The photon optical system is
The defect analysis apparatus, wherein the objective lens that focuses the laser beam on the sample is a wide-field lens having a high aperture ratio. A vacuum chamber to be evacuated;
An electron optical system provided in the vacuum chamber for focusing, scanning, and irradiating an electron beam;
A detector provided in the vacuum chamber for detecting secondary electrons generated by electron beam irradiation;
A gas injector provided in the vacuum chamber for supplying a gas to be decomposed and fixed by electron beam irradiation;
A mechanical prober provided in the vacuum chamber for probing the surface of the sample to be analyzed;
A surface plate for loading the vacuum chamber;
A first vibration isolation table for preventing vibration transmitted from the surface plate from being transmitted to the vacuum chamber;
A laser oscillator for emitting and emitting a laser beam;
A photon optical system that is provided below the vacuum chamber and focuses the laser beam emitted from the laser oscillator and irradiates the sample;
An optical system stage for moving the photon optical system;
A reflected laser detector that detects reflected light reflected from the sample and forms a laser microscope image;
An infrared camera for detecting light generated from the sample;
The vacuum chamber is
A defect analysis apparatus having a vacuum window made of a material that transmits light on a bottom surface, and irradiating the sample placed on the vacuum window with a laser beam emitted from the photon optical system. The defect analysis apparatus according to claim 5,
Furthermore, a failure analysis apparatus provided with a sample holder provided in the vacuum chamber and holding the sample at a tip, and having a sample moving mechanical prober for moving the sample by moving the sample holder. The defect analysis apparatus according to claim 5,
The photon optical system has a solid immersion lens at the tip of an objective lens that focuses a laser beam on the sample,
The solid immersion lens is closely attached to the vacuum window when focusing the laser beam on the sample,
The vacuum window is a failure analysis device made of silicon. The defect analysis apparatus according to claim 5,
The vacuum window is formed by integrating a hemispherical solid immersion lens on the surface of the photon optical system side,
The defect analysis apparatus, wherein the vacuum window is made of silicon. The defect analysis apparatus according to claim 5,
The photon optical system is
An annular beam adjusting mechanism for adjusting the spread of the annular shape by shaping the laser beam into an annular shape;
The reflection angle of the laser beam shaped into an annular shape by the annular beam adjusting mechanism is adjusted, and the first surface of the sample and the second surface opposite to the first surface are irradiated with the laser beam. A failure analysis apparatus having a reflection objective optical system. The defect analysis apparatus according to claim 5,
The photon optical system is
The defect analysis apparatus, wherein the objective lens that focuses the laser beam on the sample is either a zoom lens or a wide-field lens having a high aperture ratio. Stage coordinates on the electron optical system side by comparing the scanning electron microscope image obtained from the electron beam irradiation and scanning with the electron optical system on the sample to be analyzed placed on the stage in the vacuum chamber and the layout image Performing a coordinate system lock that associates the system with the layout coordinate system;
Analyzing the defect of the sample by performing EBAC analysis from the first surface side of the sample;
Performing OBIRCH analysis from the second surface side of the sample, which is a surface facing the first surface, and analyzing defects of the sample;
A defect analysis method for a semiconductor device, comprising the step of forming an analysis mark serving as a mark at a short-circuit portion specified by the EBAC analysis and the OBIRCH analysis. The defect analysis method for a semiconductor device according to claim 11,
The step of performing the EBAC analysis includes:
Bringing the needle of the first mechanical prober installed in the vacuum chamber into contact with the wiring to be analyzed of the sample;
In a state where the electron beam is focused, scanned, and irradiated, a first current image is acquired from a change in the electron beam current absorbed in the analysis target wiring detected by the contacted first mechanical prober, and the first current image is acquired. Comparing the current image of 1 with layout data, and identifying a short-circuited wiring that is short-circuited with the analysis-targeted wiring,
The step of performing the OBIRCH analysis includes:
Contacting a needle of a second mechanical prober with the short-circuit wiring;
A laser beam is focused, scanned, and irradiated from the second surface of the sample by a photon optical system, and a current image is obtained from a change in current flowing between the first mechanical prober and the second mechanical prober. And a step of identifying a short-circuit position of the short-circuit wiring. The defect analysis method for a semiconductor device according to claim 11,
Forming the analysis mark comprises:
A defect analysis method for a semiconductor device, wherein a film deposition gas is introduced into the vacuum chamber, the electron beam is irradiated in the vicinity of the identified short-circuited portion to form a deposited film, and an analysis mark is formed on the sample. The defect analysis method for a semiconductor device according to claim 11,
Furthermore, sweeping a test pattern while irradiating the sample with a laser beam, and detecting a marginal defect position from a change in a pass / fail judgment result;
Extracting a through hole existing at the marginal defect position from layout data and listing a suspected wiring that is a wiring connected to the through hole; and
A failure analysis method for a semiconductor device, comprising: performing an EBAC analysis on the suspected wiring and identifying a most likely through hole that is a most likely candidate of a failure factor based on the analysis result. 15. The failure analysis method for a semiconductor device according to claim 14,
The steps to identify the most likely through hole are:
Scanning the sample with an electron beam to observe a scanning electron microscope image, and contacting a probe of a mechanical prober with the suspected wiring;
From the change of the electron beam current detected by the mechanical prober that focuses, scans and irradiates the electron beam in a state where the laser beam is irradiated to the detected marginal defect position, and contacts the suspected wiring. Obtaining a current image of 1;
Stopping the irradiation of the laser beam, and acquiring a second current image from a change in the electron beam current detected by the mechanical prober brought into contact with the suspected wiring in a state where the electron beam is focused, scanned, and irradiated; ,
If there is a difference between the acquired first and second current images, and if there is a difference, the through hole connected to the wiring in the marginal defect position is the most likely cause of the defect. A failure analysis method for a semiconductor device, the method comprising: specifying as a candidate. The defect analysis method for a semiconductor device according to claim 11,
Further, selecting a characteristic pattern of the sample from an electron microscopic image;
Selecting the pattern on the second side of the sample from a laser scanning microscope or infrared microscope image;
The amount of deviation between the pattern selected from the electron microscope image and the pattern selected from the image of a laser scanning microscope or infrared microscope is calculated, and an offset voltage is superimposed on the electron beam deflector of the electron optical system. Correcting the optical axis;
A mechanical prober needle is brought into contact with the electrode formed on the sample to supply power and a signal, and the sample is operated or stopped to maintain a state in which a defect is reproduced, from the second surface of the sample. A method for analyzing a failure of a semiconductor device, comprising: acquiring a current image from a change in current generated by focusing, scanning, and irradiation of a laser beam, and specifying a defect-causing portion. The defect analysis method for a semiconductor device according to claim 11,
Selecting a characteristic pattern of the sample from an electron microscopic image;
Selecting the pattern on the second side of the sample from a laser scanning microscope or infrared microscope image;
The amount of deviation between the pattern selected from the electron microscope image and the pattern selected from the image of a laser scanning microscope or infrared microscope is calculated, and an offset voltage is superimposed on the electron beam deflector of the electron optical system. Correcting the optical axis;
A mechanical prober needle is brought into contact with the electrode formed on the sample to supply power and a signal, and the sample is operated or stopped to maintain a state in which a defect is reproduced, from the second surface of the sample. Detecting a generated light with an infrared camera and identifying a defect-causing part. The defect analysis method for a semiconductor device according to claim 11,
Further, contacting each of the mechanical prober needles to either a known wiring and a power wiring or a ground wiring related to a known defect in the sample to be analyzed;
Obtaining a current image from a change in current flowing between the mechanical probers generated by focusing, irradiating and scanning the laser beam;
In the current image, the presence / absence of the output response of the known wiring and the output response of the unknown wiring which is another wiring is detected, and when the output response of the unknown wiring is detected, the image and layout coordinates of the stage coordinate system of the stage Performing a coordinate system lock for associating a coordinate pattern with a plurality of characteristic patterns between the image of the system to obtain a conversion coefficient of the coordinate system and corresponding each coordinate system;
Extracting adjacent wiring adjacent to the known wiring from layout data;
Extracting an output part corresponding wiring which is a wiring including an output reaction of the unknown wiring from layout data;
And a step of extracting a common wiring including the same defect by comparing the adjacent wiring and the output portion corresponding wiring. The semiconductor device failure analysis method according to claim 18,
Furthermore, the step of contacting the needle of the mechanical prober to the unknown wiring,
Obtaining a current image from a change in current generated by focusing, irradiating and scanning the laser beam in a state where a voltage is applied via the mechanical prober between the known wiring and the unknown wiring;
And detecting whether or not a point-like reaction has occurred in the current image or a turn-back reaction of a wiring path of the known wiring and the common wiring has occurred. The defect analysis method for a semiconductor device according to claim 11,
Further, a scanning probe microscope image obtained by focusing, scanning, and irradiating the electron beam with the electron optical system is observed on the sample wiring and the power supply wiring or ground wiring placed on the stage, and the needle of the mechanical prober is used. A probing process for contact;
Amplifying the electron beam current absorbed in the wiring detected from the needle of the mechanical prober in contact with the electron beam focused, scanned and irradiated, and acquiring a change in the absorbed electron beam current as a current image When,
Recognizing in the stage coordinate system of the stage the reaction coordinates corresponding to the output position of the wiring in the current image;
A laser beam is focused, scanned, and irradiated from the second surface of the sample in a state where a voltage is applied or not applied between the mechanical prober probed on the wiring and the mechanical prober probed on a power supply or ground wiring. Detecting a change in current flowing between the mechanical probers generated by the above and obtaining a current image; and
Recognizing a reaction coordinate corresponding to an output position of the wiring of the current image in a stage coordinate system of a photon optical system that irradiates the laser beam;
The coordinates of the output position of the wiring in the layout coordinate system, the output position of the wiring recognized in the stage coordinate system of the stage, and the output position of the wiring recognized in the stage coordinate system of the photon optical system. Correspondingly, calculating a conversion coefficient to the layout coordinate system.