JP2014116541A - Multilayer printed wiring board - Google Patents
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- JP2014116541A JP2014116541A JP2012271300A JP2012271300A JP2014116541A JP 2014116541 A JP2014116541 A JP 2014116541A JP 2012271300 A JP2012271300 A JP 2012271300A JP 2012271300 A JP2012271300 A JP 2012271300A JP 2014116541 A JP2014116541 A JP 2014116541A
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本発明は多層プリント配線板に関し、詳しくは、信号伝送配線及びこれに接続されたパッド部のそれぞれの特性インピーダンスが整合されているとともに、ノイズの発生が抑制された多層プリント配線板に関する。 The present invention relates to a multilayer printed wiring board, and more particularly to a multilayer printed wiring board in which characteristic impedances of a signal transmission wiring and a pad portion connected to the signal transmission wiring are matched and generation of noise is suppressed.
多層プリント配線板において、伝送損失の少ない信号伝送を行うためには信号伝送配線の特性インピーダンスが一定であることが要求される。一方、この信号伝送配線に接続されたパッド部は、一般には信号伝送配線よりも幅が広く、リファレンスプレーンとの間に形成される容量成分が大きいため、信号伝送配線の特性インピーダンスに比べて、その特性インピーダンスは小さくなる。
そのため、これらの接続箇所において伝送信号が反射し、伝送損失が生ずる。
In a multilayer printed wiring board, in order to perform signal transmission with little transmission loss, it is required that the characteristic impedance of the signal transmission wiring is constant. On the other hand, the pad portion connected to the signal transmission wiring is generally wider than the signal transmission wiring, and the capacitance component formed between the signal transmission wiring and the reference plane is large, so compared to the characteristic impedance of the signal transmission wiring, Its characteristic impedance is reduced.
Therefore, the transmission signal is reflected at these connection points, and transmission loss occurs.
そこで、パッド部の直下のプレーン層の、パッド部の箇所にくり抜き部を設け、さらに、パッド部直下の絶縁層間の距離を適宜調整することにより、パッド部の容量成分の増加が抑制され、パッド部の特性インピーダンスと、これに接続された信号伝送配線の特性インピーダンスとを整合させることができる（特許文献１）。 Therefore, by providing a hollow portion at the pad portion of the plane layer immediately below the pad portion, and further adjusting the distance between the insulating layers immediately below the pad portion, an increase in the capacitance component of the pad portion is suppressed, and the pad The characteristic impedance of the part and the characteristic impedance of the signal transmission wiring connected thereto can be matched (Patent Document 1).
前記技術は、パッド部直下のグランド／電源プレーンにパターン部と平行に、即ち伝送信号の進行方向と平行にくり抜き部を設け、伝送信号の進行方向においてパッド部のインピーダンスを一定にするものである。 In the above technology, the ground / power supply plane immediately below the pad portion is provided with a hollow portion parallel to the pattern portion, that is, parallel to the traveling direction of the transmission signal, and the impedance of the pad portion is made constant in the traveling direction of the transmission signal. .
しかしながら、前記技術によれば、くり抜く形状、位置、数に制限はなく、所望のインピーダンスを得るためには相当数の試行錯誤が必要となる。
そこで、本発明が解決しようとする課題は、信号伝送配線及びこれに接続されたパッド部のそれぞれの特性インピーダンスを整合させるために、前記パッドの直下にくり抜き部を設けるにあたり、前記くり抜き部の幅を特定することにより試行錯誤することなくパッド部の特性インピーダンスを整合し、かつ、ノイズの発生が抑制された多層プリント配線板を提供することである。
However, according to the technique, there are no restrictions on the shape, position, and number to be cut out, and a considerable amount of trial and error is required to obtain a desired impedance.
Therefore, the problem to be solved by the present invention is to provide a hollow portion directly under the pad in order to match the characteristic impedances of the signal transmission wiring and the pad portion connected to the signal transmission wiring. It is intended to provide a multilayer printed wiring board in which the characteristic impedance of the pad portion is matched and the generation of noise is suppressed without specifying trial and error.
本発明者らは、鋭意検討した結果、前記パッドの直下にくり抜き部を設けるにあたり、前記くり抜き部の幅は、前記パッド部幅と相関性があることを見出した。 As a result of intensive studies, the present inventors have found that the width of the cut-out portion has a correlation with the width of the pad portion when the cut-out portion is provided immediately below the pad.
請求項１に記載の発明は、信号伝送配線と、前記信号伝送配線に接続され、前記信号伝送配線より幅が広いパッド部と、プレーン層と、を有し、前記パッド部の特性インピーダンスが前記信号伝送配線の特性インピーダンスに対して設定された設定範囲に含まれるよう、前記プレーン層の前記パッド部の直下の箇所に複数のくり抜き部が設けられている多層プリント配線板において、前記くり抜き部幅（ｗ1）が、数１で示される前記パッド部幅（ｗ）の一次関数に基づいて設けられていることを特徴とし、これにより信号品質が容易に改善される。 The invention according to claim 1 includes a signal transmission wiring, a pad portion connected to the signal transmission wiring and wider than the signal transmission wiring, and a plane layer, and the characteristic impedance of the pad portion is the In a multilayer printed wiring board in which a plurality of cutout portions are provided at locations immediately below the pad portions of the plane layer so as to be included in the setting range set for the characteristic impedance of the signal transmission wiring, the cutout portion width (W1) is provided on the basis of a linear function of the pad width (w) expressed by the equation (1), whereby the signal quality is easily improved.
請求項２の発明は、前記複数のくり抜き部の間にリターン電流経路部が設けられていることを特徴とする請求項１記載の多層プリント配線板であって、不要輻射ノイズの増加が軽減される。 The invention according to claim 2 is the multilayer printed wiring board according to claim 1, wherein a return current path portion is provided between the plurality of cut-out portions, and an increase in unnecessary radiation noise is reduced. The
本発明によれば、パッド部の特性インピーダンスを信号伝送配線の特性インピーダンスに±２０％以内（最適設計では±１０％以内であるが、配線の特性インピーダンスの保証値が±１０％のため、適正な範囲となる）で整合させることができるとともに、くり抜き部の形状が細分化形状となっていることにより、リターン電流の最短経路が確保されるので、不要な放射ノイズの発生を抑制した上で、良好な信号伝送をすることができる。 According to the present invention, the characteristic impedance of the pad portion is within ± 20% of the characteristic impedance of the signal transmission wiring (in the optimum design, it is within ± 10%, but the guaranteed value of the characteristic impedance of the wiring is ± 10%. And the cut-out part has a subdivided shape, so that the shortest path of return current is ensured. Good signal transmission can be achieved.
本発明の実施形態について図面を参照して説明する。
図１は本発明の多層プリント配線板１０のパッド部１４周辺の構造を示す図であり、図１（ａ）はこの多層プリント配線板のパッド部１４及びその直下のプレーン層１６の上面視図、図１（ｂ）及び図１（ｃ）は、それぞれ図１（ａ）のＡ−Ａ‘線およびＢ−Ｂ’線で多層プリント配線板１０を切断した断面図である。なお、図１（ａ）では、パッド部１４及びプレーン層１６との間に存在する絶縁層１７は記載していない。
Embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a view showing a structure around a pad portion 14 of a multilayer printed wiring board 10 according to the present invention. FIG. 1A is a top view of the pad portion 14 of this multilayer printed wiring board and a plane layer 16 immediately below the pad portion 14. FIGS. 1B and 1C are cross-sectional views of the multilayer printed wiring board 10 taken along lines AA ′ and BB ′ in FIG. 1A, respectively. In FIG. 1A, the insulating layer 17 existing between the pad portion 14 and the plane layer 16 is not shown.
詳しくは、この多層プリント配線板１０は、信号伝送配線１２と、信号伝送配線１２に接続され、前記信号伝送配線より幅が広いパッド部１４と、プレーン層１６と、を有する。
そして、パッド部１４の特性インピーダンスが信号伝送配線１２の特性インピーダンスに対して設定された設定範囲（±２０％以内）に含まれるよう、プレーン層１６のパッド部１４の直下の箇所にくり抜き部１８を設け、さらに、図６に示すように、くり抜き部１８は一つのパッド部１４に対して複数設けられ、かつ、複数のくり抜き部１８の間にリターン電流経路部２２を設けるものである。
Specifically, the multilayer printed wiring board 10 includes a signal transmission wiring 12, a pad portion 14 connected to the signal transmission wiring 12 and wider than the signal transmission wiring, and a plane layer 16.
Then, the hollow portion 18 is formed at a position immediately below the pad portion 14 of the plane layer 16 so that the characteristic impedance of the pad portion 14 is included in a setting range (within ± 20%) set with respect to the characteristic impedance of the signal transmission wiring 12. Further, as shown in FIG. 6, a plurality of the cutout portions 18 are provided for one pad portion 14, and a return current path portion 22 is provided between the plurality of cutout portions 18.
本実施形態に係わる多層プリント基板の具体例として、図２に４層構成の例を示す。図２（ａ）は信号伝送配線とパッド部を有する信号層２０と第１のプレーン層２１と間隔が１２０μｍ、第１のプレーン層２１と第２のプレーン層２２との間隔が１．２ｍｍの層構成であり、図２（ｂ）は信号伝送配線とパッド部を有する信号層２０と第１のプレーン層２１と間隔が８０μｍ、第１のプレーン層２１と第２のプレーン層２２との間隔が１．２ｍｍの層構成であり、図２（ｃ）は信号伝送配線とパッド部を有する信号層２０と第１のプレーン層２１と間隔が２２０μｍ、第１のプレーン層２１と第２のプレーン層２２との間隔が１．０ｍｍの層構成である。
Ｃｕ：４２μｍ、Ｃｕ：３５μｍとはそれぞれの前記プレーン層の銅メッキ厚さである。
前記、第１のプレーン層２１に数１により算出したくり抜きを設ける。
As a specific example of the multilayer printed board according to this embodiment, an example of a four-layer configuration is shown in FIG. In FIG. 2A, the distance between the signal layer 20 having the signal transmission wiring and the pad portion and the first plane layer 21 is 120 μm, and the distance between the first plane layer 21 and the second plane layer 22 is 1.2 mm. FIG. 2B shows a layer configuration, in which the distance between the signal layer 20 having the signal transmission wiring and the pad portion and the first plane layer 21 is 80 μm, and the distance between the first plane layer 21 and the second plane layer 22. FIG. 2C shows the signal layer 20 having the signal transmission wiring and the pad portion and the first plane layer 21 having a distance of 220 μm, and the first plane layer 21 and the second plane. The layer structure has a distance of 1.0 mm from the layer 22.
Cu: 42 μm and Cu: 35 μm are the copper plating thicknesses of the plane layers.
The first plane layer 21 is provided with a cutout calculated by the equation (1).
ここで、第１のプレーン層２１と第２のプレーン層２２の間に信号層やプレーン層を追加することが可能であり、その場合においても、第１のプレーン層と第２のプレーン層の間隔が１ｍｍ程度で、前記、追加された信号層やプレーン層にも第１のプレーン層と同様のくり抜き部を設けることが望ましい。 Here, it is possible to add a signal layer or a plane layer between the first plane layer 21 and the second plane layer 22, and even in this case, the first plane layer and the second plane layer It is desirable that the interval is about 1 mm, and the added signal layer and the plane layer are also provided with a cutout portion similar to the first plane layer.
図３は本発明における特性インピーダンス測定用のテストクーポンの略図である。このような、テストクーポンを図２(a)の層構成にて作成した。 FIG. 3 is a schematic diagram of a test coupon for measuring characteristic impedance according to the present invention. Such a test coupon was created with the layer structure of FIG.
実施例１として信号配線幅を０．２１ｍｍ、パッド幅(ｗ)を２ｍｍとし、数１において、ａ＝１．１６４１、ｂを０．１０５４とすると、くり抜き幅(ｗ１)は約２．２ｍｍとなる。
比較例１、２、３
比較例１、２として、信号配線幅を０．２１ｍｍ、パッド幅(ｗ)を２ｍｍとし、数１において、ａ＝１．０６４１、ｂを０．１０５４、同様にａ＝０．９６４１、ｂ＝０．１０５４とすると、くり抜き幅(ｗ１)はそれぞれ、約２．０ｍｍ、約１．８ｍｍとなる。また、くり抜き部を設けないものを比較例３とした。
In Example 1, when the signal wiring width is 0.21 mm, the pad width (w) is 2 mm, and in Equation 1, a = 1.1641 and b is 0.1054, the cutout width (w1) is about 2.2 mm. Become.
Comparative Examples 1, 2, 3
As Comparative Examples 1 and 2, the signal wiring width is 0.21 mm, the pad width (w) is 2 mm, and in Equation 1, a = 1.0641, b is 0.1054, and similarly a = 0.9641, b = Assuming that it is 0.1054, the cutout width (w1) is about 2.0 mm and about 1.8 mm, respectively. Further, Comparative Example 3 was provided with no cut-out portion.
実施例２として、信号配線幅を０．２１ｍｍ、パッド幅(ｗ)を０．５ｍｍとし、数１において、ａ＝１．１６４１、ｂを０．１０５４とすると、くり抜き幅(ｗ１)は約０．５ｍｍとなる。
比較例４、５、６
比較例４、５として、信号配線幅を０．２１ｍｍ、パッド幅(ｗ)を０．５ｍｍとし、数１において、ａ＝１．５６４１、ｂを０．１０５４、同様にａ＝０．７６４１、ｂ＝０．１０５４とすると、くり抜き幅(ｗ１)はそれぞれ、約０．７ｍｍ、約０．３ｍｍとなる。また、くり抜き部を設けないものを比較例６とした。
As Example 2, when the signal wiring width is 0.21 mm, the pad width (w) is 0.5 mm, and a = 1.1641 and b is 0.1054 in Equation 1, the cut-out width (w1) is about 0. .5mm.
Comparative Examples 4, 5, 6
As Comparative Examples 4 and 5, the signal wiring width is 0.21 mm, the pad width (w) is 0.5 mm, and in Equation 1, a = 1.5641, b is 0.1054, and similarly a = 0.7641, When b = 0.1054, the cut-out width (w1) is about 0.7 mm and about 0.3 mm, respectively. Moreover, the thing which does not provide a hollow part was made into the comparative example 6.
これらのテストクーポンを用いた特性インピーダンス測定結果を図４に示す。パッド部の特性インピーダンスはくり抜き部がない場合が３２Ω、４３Ω程度であるのに対し、くり抜き部を設けた場合は配線とほぼ同じ５０Ωとなるが、くり抜き部を設けた場合であっても数１から外れた場合は、信号波形の乱れが生じ、ノイズ発生のリスクが高まる。 The characteristic impedance measurement results using these test coupons are shown in FIG. The characteristic impedance of the pad portion is about 32Ω and 43Ω when the hollow portion is not provided, whereas when the hollow portion is provided, the characteristic impedance is 50Ω, which is almost the same as that of the wiring. Otherwise, the signal waveform is disturbed, increasing the risk of noise generation.
特性インピーダンスの測定は、サンプリングオシロスコープを用いてＴＤＲ法（Time Domain Reflectometry）により行った。
具体的には、サンプリングオシロスコープのＴＤＲモジュールに特性インピーダンス５０Ωの同軸ケーブルを接続し、ケーブル先端には基板接続用のＳＭＡコネクタを取り付け、テストクーポン内のプローブ箇所に前記ＳＭＡコネクタを接触させるものである。
The characteristic impedance was measured by a TDR method (Time Domain Reflectometry) using a sampling oscilloscope.
Specifically, a coaxial cable with a characteristic impedance of 50Ω is connected to a TDR module of a sampling oscilloscope, a SMA connector for board connection is attached to the end of the cable, and the SMA connector is brought into contact with a probe location in a test coupon. .
実施例１および比較例３のテストクーポンを用いた信号波形品質評価結果を図５に示す。図５はアイパターンと呼ばれ、信号波形の遷移を多数サンプリングし、重ね合わせてグラフィカルに表示したものであり、開口度が大きいほど、良好な波形品質を示す。
すなわち、くり抜き部を設けてパッド部の特性インピーダンスを配線の特性インピーダンスに整合させた場合の方が良好な信号伝送ができている。
The signal waveform quality evaluation results using the test coupons of Example 1 and Comparative Example 3 are shown in FIG. FIG. 5 is called an eye pattern, in which a large number of signal waveform transitions are sampled and overlaid and displayed graphically. The larger the aperture, the better the waveform quality.
That is, better signal transmission can be achieved when the cutout portion is provided and the characteristic impedance of the pad portion is matched with the characteristic impedance of the wiring.
しかし、くり抜き部を設けることで信号品質は改善されるが、くり抜き部によりリターン電流経路が遠回りになり、放射ノイズを増加させる恐れがあるため、くり抜き部にリターン電流経路を設ける必要がある。 However, although the signal quality is improved by providing the cutout portion, the return current path becomes a detour due to the cutout portion and there is a possibility of increasing radiation noise. Therefore, it is necessary to provide a return current path in the cutout portion.
図６はＳＡＴＡ（シリアルＡＴＡ：コンピュータにハードディスク、光学ドライブを接続する為のインタフェース規格）用コネクタ実装部位に本発明を適用した場合の多層プリント基板構造である。
図６（ａ）はパッド部及びその直下のプレーン層の上面視図、図６（ｂ）は内層プレーン層の上面視図、図６（ｃ）及び図６（ｄ）は、それぞれ図６（ａ）のＡ−Ａ’線およびＢ−Ｂ’線で多層プリント配線板を切断した断面図で、くり抜き部１８にはリターン電流経路部２２が設けてある。
FIG. 6 shows a multilayer printed circuit board structure when the present invention is applied to a connector mounting portion for SATA (serial ATA: interface standard for connecting a hard disk and an optical drive to a computer).
6A is a top view of the pad portion and the plane layer immediately below it, FIG. 6B is a top view of the inner plane layer, and FIG. 6C and FIG. 6D are FIG. FIG. 6A is a cross-sectional view of a multilayer printed wiring board taken along line AA ′ and line BB ′ in FIG. 5A, and a cutout portion 18 has a return current path portion 22.
前記ＳＡＴＡ通信時におけるコネクタ周辺の近傍磁界測定システムの略図及び測定結果を図７、図８に示す。 7 and 8 show schematic diagrams and measurement results of the near magnetic field measurement system around the connector during the SATA communication.
測定結果より、くり抜き部を設けた場合に磁界強度が増加、すなわち、不要輻射ノイズが増加しているが、リターン電流経路部を設けることによって、前記、不要輻射ノイズの増加が軽減される。 From the measurement results, when the hollowed portion is provided, the magnetic field strength increases, that is, the unnecessary radiation noise increases. However, the increase of the unnecessary radiation noise is reduced by providing the return current path portion.
１０ 多層プリント配線板
１２ 信号伝送配線
１４ パッド部
１６ プレーン層
１６１ 第１のプレーン層
１６２ 第２のプレーン層
１７ 絶縁層
１８ くり抜き部
２０ 信号層
２２ リターン電流経路部
２３ 磁界プローブ
２４ ＳＡＴＡコネクタ
DESCRIPTION OF SYMBOLS 10 Multilayer printed wiring board 12 Signal transmission wiring 14 Pad part 16 Plane layer 161 1st plane layer 162 2nd plane layer 17 Insulating layer 18 Cut-out part 20 Signal layer 22 Return current path part 23 Magnetic field probe 24 SATA connector
Claims (2)
The multilayer printed wiring board according to claim 1, wherein a return current path portion is provided between the plurality of cutout portions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012271300A JP2014116541A (en) | 2012-12-12 | 2012-12-12 | Multilayer printed wiring board |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012271300A JP2014116541A (en) | 2012-12-12 | 2012-12-12 | Multilayer printed wiring board |
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| JP2014116541A true JP2014116541A (en) | 2014-06-26 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017183638A (en) * | 2016-03-31 | 2017-10-05 | Ｒｉｔａエレクトロニクス株式会社 | Multilayer printed wiring board |
| US11019719B2 (en) | 2019-08-06 | 2021-05-25 | Canon Kabushiki Kaisha | Printed circuit board, printed wiring board, and electronic device |
-
2012
- 2012-12-12 JP JP2012271300A patent/JP2014116541A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017183638A (en) * | 2016-03-31 | 2017-10-05 | Ｒｉｔａエレクトロニクス株式会社 | Multilayer printed wiring board |
| US11019719B2 (en) | 2019-08-06 | 2021-05-25 | Canon Kabushiki Kaisha | Printed circuit board, printed wiring board, and electronic device |
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