JP2014107475A - Semiconductor light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-performance semiconductor light-emitting element which uniformly emits light as a whole, has high luminous efficiency and excellent reliability, and is low in manufacturing cost.SOLUTION: The semiconductor light-emitting element includes: a semiconductor structure layer made of an AlGaInP-based semiconductor, which comprises a first semiconductor layer, an active layer, and a second semiconductor layer; a first electrode 23 formed on part of the first semiconductor layer; and a second electrode formed on part of the second semiconductor layer. The second electrode includes power supply wiring 21 and a wiring electrode 19 which forms an ohmic junction with the second semiconductor layer. A counter electrode 25 is formed on the first semiconductor layer in a region which faces, across the semiconductor structure layer, a region where the power supply wiring is formed. Either a pair of the power supply wiring and the second semiconductor layer or a pair of the counter electrode and the first semiconductor layer form an ohmic junction, and the other pair form a Schottky junction. The second semiconductor layer includes a current diffusion layer. When the electrical resistivity of the current diffusion layer is ρ and the layer thickness thereof is d, a relation of ρ/d≤600 [Ω] is satisfied.

Description

The present invention relates to a semiconductor light emitting device, and more particularly to a light emitting diode (LED) device.

  A light-emitting device equipped with an LED element has been conventionally used in lighting, backlights, industrial equipment and the like. The LED element as described in Patent Document 1 epitaxially grows a semiconductor layer such as AlGaInP or GaN on a growth substrate such as a GaAs substrate or a sapphire substrate using a MOCVD (Metal-Organic Chemical Vapor Deposition) method or the like, After the semiconductor layer grown on the growth substrate is bonded to a conductive support substrate, the growth substrate is removed to manufacture the semiconductor layer.

JP 2011-165853 A JP 2009-21416 A

  In the light emitting device as described above, in order to uniformly diffuse the current throughout the active layer and eliminate unevenness of light emission, a translucent insulator layer is inserted into the reflective surface side electrode immediately below the n electrode, and the p electrode and the n electrode There is a method in which current concentration just below an n electrode is suppressed and current is diffused by arranging the electrodes alternately (Patent Document 1). In such a light emitting device, by increasing the thickness of the n-type semiconductor layer on the light extraction surface side as viewed from the active layer (for example, several thousand nm), horizontal current diffusion in the n-type semiconductor layer There is one that promotes (current diffusion in a plane parallel to the active layer) and causes the entire active layer to emit light uniformly (Patent Document 2).

  However, when the thickness of the n-type semiconductor layer is increased, light absorption by the impurity carriers in the semiconductor layer is increased, so that the light extraction efficiency of the light emitting element is lowered. Furthermore, increasing the thickness of the semiconductor layer increases the time for growing the semiconductor film, resulting in an increase in manufacturing cost.

  In addition, if the thickness of the n-type semiconductor layer is reduced to suppress light absorption, horizontal diffusion of current in the n-type semiconductor layer becomes insufficient, and the light emitting area of the active layer is reduced. . Furthermore, current concentration occurs in the thin n-type semiconductor layer, thereby reducing the electrostatic breakdown voltage (ESD breakdown voltage), particularly the electrostatic breakdown voltage when a reverse bias current flows.

  The present invention has been made in view of the above-described points. A semiconductor light-emitting element such as a high-performance LED element that emits light uniformly, has high light emission efficiency, is highly reliable, and is low in manufacturing cost. The purpose is to provide.

  The light-emitting element of the present invention includes a semiconductor structure layer made of an AlGaInP-based semiconductor in which a p-type first semiconductor layer, an active layer, and an n-type second semiconductor layer are stacked in this order, and the first semiconductor A first electrode formed on a part of the layer and a second electrode formed on a part of the second semiconductor layer, wherein the first electrode includes the second electrode The second electrode extends from the power supply wiring and the power supply wiring, and is formed in a region other than the region facing the semiconductor structure layer with the semiconductor structure layer interposed therebetween. A counter electrode is formed on the first semiconductor layer in a region that includes a wiring electrode forming an ohmic junction with the two semiconductor layers and is opposed to a region where the power supply wiring is formed and sandwiching the semiconductor structure layer The power supply wiring is connected to the second semiconductor layer. A key junction is formed, the counter electrode forms an ohmic junction with the first semiconductor layer, or the power supply wiring forms an ohmic junction with the second semiconductor layer, and the counter electrode is formed in the first semiconductor layer. A shortest distance between the end of the wiring electrode and the end of the first electrode in a direction parallel to the top surface of the semiconductor structure layer. The second semiconductor layer includes a current diffusion layer, and the electric resistivity of the current diffusion layer is ρ, and the layer thickness is d, which is smaller than the shortest distance between the end of the wiring electrode and the end of the counter electrode. In this case, the Al composition, the carrier concentration, and the layer thickness of the current diffusion layer are determined so as to satisfy the relationship of ρ / d ≦ 600 [Ω].

It is a top view of the light emitting element concerning the example of the present invention. FIG. 2 is a cross-sectional view taken along line 2-2 in FIG. It is a figure which shows the flow of the electric current at the time of the forward bias in a light emitting element. It is a figure which shows the relationship between the layer thickness of a current spreading | diffusion layer, and a composition. It is a figure which shows the flow of the electric current at the time of reverse direction bias in a light emitting element. It is a figure which shows the relationship between the electrostatic breakdown voltage of a light emitting element, and the thickness of a current-diffusion layer. It is a figure which shows the light emission distribution of Example 1 and a comparative example, relative brightness | luminance, and electrostatic breakdown voltage. It is sectional drawing which shows the manufacturing process of the light emitting element of FIG. It is sectional drawing which shows the manufacturing process of the light emitting element of FIG.

  Hereinafter, a semiconductor element 10 according to an embodiment of the present invention will be described with reference to FIG. 1 and FIG. 2, taking an LED element as an example.

The semiconductor structure layer 11 includes a p-type semiconductor layer 13 composed of a p-type contact layer and a p-type cladding layer, an active layer 15 having a multiple quantum well structure (MQW), an n-type cladding layer 17A, a current diffusion layer 17B, and surface processing. The n-type semiconductor layer 17 composed of the layer 17C is stacked. For example, the p-type contact layer is a 500 nm-thick In _0.05 Ga _0.95 P layer with a Mg carrier concentration of 3 × 10 ¹⁸ cm ⁻³ , and the p-type cladding layer has a Mg carrier concentration. Is a layer of Al _0.5 In _0.5 P having a thickness of 500 nm and 5 × 10 ¹⁷ cm ⁻³ .

The multiple quantum well structure constituting the active layer 15 includes, for example, a well layer (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P layer (thickness 20 nm) and a barrier layer (Al _0.5 It is a Ga _0.5 ) _0.5 In _0.5 P layer (thickness 10 nm) and has 15 well layers. Note that the composition ratios of the p-type semiconductor layer 13 and the active layer are not limited to those described above, and can be changed as appropriate according to the emission wavelength and the like.

As described above, the n-type semiconductor layer 17 is configured by laminating the n-type cladding layer 17A, the current diffusion layer 17B, and the surface processing layer 17C in this order. That is, the n-type semiconductor layer 17 has a three-layer structure, and has a current diffusion layer 17B as a central layer. The n-type cladding layer 17A is an Al _0.5 In _0.5 P layer having a thickness of 500 nm with a Si carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , and the current diffusion layer 17B has a Si carrier concentration of It is a layer of (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P having a thickness of 2 × 10 ¹⁸ cm ^{−3 and} having a thickness of 500 nm, and the surface processed layer 17C has a Si carrier concentration of 1 × 10 6. It is a layer of Al _0.5 In _0.5 P with a thickness of 500 nm that is ¹⁸ cm ⁻³ . The electrical resistivity in each layer of the n-type semiconductor decreases as the Al composition decreases or the Si carrier concentration increases, and the electrical resistivity of the n-type cladding layer 17A and the surface processed layer 17C is 0.14 Ω · cm, The electric resistivity of the current diffusion layer 17B is 0.02 Ω · cm.

The compositions of the n-clad layer 17A and the surface processed layer 17C are not limited to those described above, and can be grown on a GaAs substrate, and have sufficient translucency for light emitted from the active layer 15. a range with may be compositions such as, for example, _{(Al Z Ga 1-Z)} x in 1-x P (0.65 ≦ Z ≦ 1.0,0.45 ≦ x ≦ 0.55) . Further, the composition of the current spreading layer 17B is not limited to the above, and as will be described later, the current spreads sufficiently in the horizontal direction in the current spreading layer 17B so that the active layer 15 can emit light uniformly, and the current spreading layer 17B. The composition may be in a range in which the influence of absorption of light emitted from the active layer 15 due to the above can be ignored.

  On the upper surface of the n-type semiconductor layer 17 of the semiconductor structure layer 11, that is, on the light extraction surface, an n wiring electrode 19 and an n power supply wiring 21 for supplying power to the n wiring electrode 19 are formed. The n wiring electrode 19 is made of AuGeNi, and is formed as a linear electrode that is arranged in parallel to each other on the n type semiconductor layer 17 and forms an ohmic junction with the n type semiconductor layer 17 (in this embodiment, Are arranged on three parallel straight lines). The n wiring electrode 19 may be formed of another metal that can form an ohmic junction with the n-type semiconductor layer 17, such as AuGe, AuSn, or AuSnNi.

The n power supply wiring 21 extends in a cross direction from a circular region on the upper surface of the n-type semiconductor layer 17 where a bonding pad 22 described later is formed at the center of the upper surface of the n-type semiconductor layer 17. It is formed so as to cover a part and is electrically connected to the n wiring electrode 19. The n power supply wiring 21 is formed by depositing 100 nm of Ti on the n type semiconductor layer 17 and the n wiring electrode 19, and forms a Schottky junction with the n type semiconductor layer 17. The material of the n power supply wiring 21 may be any metal that forms a Schottky junction with the n-type semiconductor layer 17, and TaN, Au, Ag, Cu, Fe, Ni, Pd, Pt, Mo, Ta, Ti, It is also possible to use W, their nitrides, or their silicides. In addition, the Schottky barrier of the Schottky junction formed between the n power supply wiring 21 and the n-type semiconductor layer 17 has a forward voltage drop including a wiring resistance until an operating current starts flowing in the semiconductor structure layer 11 ( V _F ) (for example, 0.2 V) and preferably 0.5 V or more.

  A bonding pad 22 is formed at the center of the upper surface of the n power supply wiring 21. The bonding pad 22 is formed by depositing 1000 nm of Au on the n power supply wiring 21 and has a cylindrical shape with a diameter of 70 μm. When the n power supply wiring 21 is formed of a material other than Ti, the bonding pad 22 forms a metal having high adhesion such as Ti in a region where the bonding pad 22 is formed on the upper surface of the n power supply wiring 21. It may be formed by depositing Au thereon. The bonding pad 22 can have any shape such as a prism shape or a frustum shape.

  A p-electrode 23 is formed in a partial region on the surface opposite to the light extraction surface of the semiconductor structure layer 11 (that is, the surface of the p-type semiconductor layer 13). The p electrode 23 is formed in a region other than a region facing the region where the n wiring electrode 19 and the n power supply wiring 21 are formed with the semiconductor structure layer 11 interposed therebetween. In the present embodiment, the p-electrode 23 is an electrode that extends in parallel with the extending direction of the n-wiring electrode 19. When viewed from the upper surface direction of the semiconductor structure layer, the p-electrode 23 is on four straight lines that sandwich the n-wiring electrode 19. Is formed. The p-electrode 23 is made of a metal that forms an ohmic junction with the p-type semiconductor layer, for example, AuZn, and has a thickness of 100 nm.

  A counter electrode 25 is formed on the surface of the p-type semiconductor layer 13 in a region facing the region where the bonding pad 22 is formed across the semiconductor structure layer 11 (just below the bonding pad 22). The counter electrode 25 is a columnar body having a thickness of 100 nm and a diameter of 70 μm made of a metal that forms an ohmic junction with the p-type semiconductor layer 13, for example, AuZn, and forms an ohmic junction with the p-type semiconductor layer 13. Note that the counter electrode 25 can have an arbitrary shape such as a prismatic shape or a frustum shape.

A translucent insulating layer 27 is formed in a region of the surface of the p-type semiconductor layer 13 exposed through the p-electrode 23 and the counter electrode 25. The translucent insulating layer 27 is a layer having a layer thickness of 100 nm made of a translucent material having insulating properties, for example, SiO ₂ . As the material of the light-transmitting insulating layer 27, other light-transmitting insulating materials such as Si ₃ N ₄ and Al ₂ O ₃ can be used in addition to SiO ₂ .

  A reflective metal layer 29 is formed on the surface of the p-electrode 23, the counter electrode 25, and the translucent insulating layer 27 opposite to the surface in contact with the semiconductor structure layer 11. The reflective metal layer 29 is made of a highly light reflective metal, for example, AuZn, and has a layer thickness of 200 nm. The reflective metal layer 29 may be made of another highly light reflective metal such as Au, Ag, Al, or Rh.

  The semiconductor-side bonding layer 31 is formed on the surface of the reflective metal layer 29 opposite to the surface in contact with the p-electrode 23, the counter electrode 25, and the translucent insulating layer 27. The semiconductor-side bonding layer 31 is formed by stacking TaN (layer thickness 100 nm), TiW (layer thickness 100 nm), TaN (100 nm), Ni (layer thickness 300 nm), Au (layer thickness 30 nm) in this order from the reflective metal layer 29 side. It is a layer.

  The support substrate side bonding layer 33 is formed on a support substrate 35 which is a conductive substrate such as Si having an ohmic metal layer (not shown) made of Pt on the upper surface and the lower surface, and Ti (layer thickness 150 nm), Ni (layer thickness). 150 nm) and AuSn (layer thickness 600 nm) are formed in this order, and are eutectic bonded to the semiconductor side bonding layer 31. The support substrate 35 has, for example, a square upper surface shape with a side of 350 μm. The support substrate 35 may be made of other materials such as Ge, Al, Cu, and CuW as long as the material has conductivity and high thermal conductivity.

  Here, the flow of current in the semiconductor structure layer 11 of the light emitting element 10 during normal operation will be described with reference to FIG. FIG. 3 is a partially enlarged view of region A in FIG. As indicated by a thick arrow in FIG. 3, a current flows between the p electrode 23 and the n wiring electrode 19 in the semiconductor structure layer 11 during normal operation. As shown in FIG. 3, in the n-type semiconductor layer 17, in the n-type semiconductor layer 17, in the n-type cladding layer 17A and the surface processed layer 17C having a relatively high electrical resistivity, the current is horizontal, ie, active In the in-plane direction parallel to the upper surface of the layer 15, it does not diffuse so much, and the current mainly diffuses in the horizontal direction in the current diffusion layer 17 </ b> B having a relatively low electrical resistivity.

The inventor of the present application calculates the current when the electrical resistivity ρ (Ω · cm) of the current diffusion layer 17B and the layer thickness d are equal to or larger than the film thickness d satisfying the relationship of ρ / d ≦ 600 [Ω]. Regardless of the carrier concentration of the diffusion layer, the current spreads sufficiently in the horizontal direction in the current diffusion layer 17B, and the active layer 15 emits light uniformly, and the influence of absorption of light emitted from the active layer by the current diffusion layer 17B can be ignored. I found out. Further, since local current concentration is eliminated, local carrier overflow is reduced and light output is improved. FIG. 4 shows the case where the Si carrier concentration of the current diffusion layer 17B is 1 × 10 ¹⁸ cm ⁻³ (solid line), 2 × 10 ¹⁸ cm ⁻³ (broken line), and 3 × 10 ¹⁸ cm ⁻³ (dashed line). Shows the relationship between the layer thickness d of the current diffusion layer satisfying ρ / d = 600 [Ω] and the Al composition Z. In this figure, the region satisfying ρ / d ≦ 600 [Ω] is a region above each curve, that is, a region where the layer thickness d is large.

For example, as in this embodiment, when the layer thickness of the current diffusion layer 17B is 500 nm and the Si carrier concentration is 2 × 10 ¹⁸ cm ⁻³ (broken line), if the Al composition Z ≦ 0.5, the current The current spreads sufficiently in the horizontal direction in the diffusion layer, and the active layer 15 emits light uniformly, and the influence of absorption of light emitted from the active layer 15 by the current diffusion layer 17B can be ignored.

For example, when the thickness of the current diffusion layer 17B is 500 nm and the Si carrier concentration is 1 × 10 ¹⁸ cm ⁻³ (one-dot chain line), the Al composition Z ≦ 0.45 and the layer thickness of the current diffusion layer 17B are In the case of 500 nm and the Si carrier concentration of 3 × 10 ¹⁸ cm ⁻³ , if the Al composition is Z ≦ 0.52, the current spreads sufficiently in the horizontal direction in the current diffusion layer, and the active layer 15 emits light uniformly. The influence of absorption of light emitted from the active layer 15 by the diffusion layer 17B can be ignored. Further, in this embodiment, by making it possible to make the current diffusion layer 17B as thin as 500 nm or less, for example, the entire n-type semiconductor layer 17 can be made thin, the growth time of the semiconductor structure layer can be shortened, and light emission It is possible to reduce the manufacturing cost of the element.

  The layer thickness and Al composition Z of the current diffusion layer 17B can be arbitrarily changed as long as ρ / d ≦ 600. However, if the layer thickness is excessively increased, the light absorption amount of the current diffusion layer 17B increases excessively. Therefore, the thickness is preferably 500 nm or less because there is a possibility of lowering the light extraction efficiency. Further, if the Al composition Z of the current diffusion layer 17B is made too low, the light absorption amount of the current diffusion layer 17B increases and the light extraction efficiency may be lowered. Therefore, the Al composition Z of the current diffusion layer 17B is 0. 0.3 or more (0.3 ≦ Z) is preferable, and 0.35 or more (0.35 ≦ Z) is more preferable.

  Next, FIG. 5 shows a current flow when a reverse bias current flows in the light emitting element 10. 5 is a partially enlarged view of region A in FIG. 2 as in FIG. As shown by a thick arrow in FIG. 5, when a reverse bias current flows, the current is not only between the n wiring electrode 19 and the p electrode 23 but also between the n power supply wiring 21 and the counter electrode under the bonding pad 22. Also flows between 25. Accordingly, the current that should flow in the path between the n wiring electrode 19 and the p electrode 23 is also distributed to the path between the n power supply wiring 21 and the counter electrode 25 under the bonding pad 22. The amount of current flowing through the path between the p electrode 23 can be reduced. Therefore, it is possible to improve the electrostatic breakdown voltage of the light emitting element, particularly the electrostatic breakdown voltage when a voltage is applied to the reverse bias.

  When the current diffusion layer 17B has a structure with a relatively low electrical resistivity and a thin layer (for example, a layer having a thickness of 500 nm or less) inserted as in the light emitting element 10 of this embodiment, the current diffusion layer 17B has a current concentration. This is likely to cause a decrease in electrostatic breakdown voltage. FIG. 6 shows the relationship between the value of the electrostatic breakdown voltage (V) of the light emitting element and the thickness (nm) of the current diffusion layer for each Al composition of the current diffusion layer when there is no counter electrode and when it is present. For example, as shown in FIG. 6, in the case where the counter electrode is not formed, the current diffusion layer having an aluminum composition Z = 0.4 or Z = 0.5 and a layer thickness of about 500 nm, as shown in the above-described embodiment. The electrostatic breakdown voltage of the light emitting element is as low as about 3000V. However, when the counter electrode is formed, the electrostatic breakdown voltage is as high as 12000V. Therefore, by forming the counter electrode, it is possible to obtain a highly reliable light-emitting element that can obtain a high current diffusion effect while suppressing light absorption using a thin current diffusion layer.

  For comparison with the above examples, samples of comparative examples were prepared and their characteristics were evaluated. The light-emitting element of Comparative Example 1 is a light-emitting element having a thick n-type semiconductor layer (layer thickness: 3 μm), does not form a counter electrode, has a current diffusion layer thickness of 2 μm, and has an Al composition Z of Z The light emitting device 10 has the same configuration as that of the light emitting device 10 of Example 1 except that 1.0 is set. In the light emitting device of Comparative Example 2, the counter electrode is not formed, and current diffusion is performed by forming the entire n-type semiconductor layer as a current diffusion layer having a layer thickness of 1.5 μm and an Al composition Z of Z = 0.4. Except for this, it has the same configuration as the light emitting element 10 of Example 1. The light emitting element of Comparative Example 3 has the same configuration as the light emitting element 10 of Example 1 except that the counter electrode is not formed.

  FIG. 7 shows a light emission distribution (NFP: near-field pattern) when viewed from the upper surface of the light emitting elements of Comparative Examples 1-3 and Examples, and the relative luminance of the light emitting elements (the luminance of the light emitting element of Comparative Example 1 is set to 1). ) And electrostatic breakdown voltage. In the diagram of the light emission distribution, the intensity of light is indicated by shades of color, and the darker the portion, the brighter the light. The light emission distribution depends on the current distribution in a plane parallel to the light extraction surface on the upper surface of the light emitting element. Uniform light emission means that the current is diffused well and flows uniformly throughout the light emitting element. It shows that there is. As is clear from FIG. 7, in the case of the light emitting element of Comparative Example 1, only the vicinity of the n wiring electrode on the light extraction surface side emits light strongly, the current concentrates directly under the n wiring electrode, and the current flows in the entire light emitting element. It turns out that it is not flowing uniformly.

  In the case of the light emitting device of Comparative Example 2, since a layer having a low Al composition and a low electrical resistivity is used, the current diffusion is improved as compared with Comparative Example 1, and the entire light emitting device is uniformly illuminated. However, the relative luminance is 0.95, and the brightness is reduced as compared with the light emitting element of Comparative Example 1. This is because light is absorbed by the current diffusion layer because the Al composition Z of the current diffusion layer is as low as Z = 0.4 and the layer thickness is thick.

  In the case of the light emitting device of Comparative Example 3, since the current diffusion layer is used because the Al composition is low, the electric resistivity is low, and light absorption is negligible, current diffusion is performed well, and the entire light emitting device is obtained. Evenly shining. Also, the luminance is higher than that of the light emitting element of Comparative Example 1. However, the electrostatic breakdown voltage is lower than that of the light-emitting element of Comparative Example 1 due to current concentration due to low resistance and thinning of the current diffusion layer.

  In the case of the light emitting device of the above example, it can be seen that the current distribution is uniform in the plane because the light emission distribution is uniform as in the light emitting device of Comparative Example 3, and the current is also diffused. Since the current diffusion layer is thinned to such an extent that light absorption by the layer can be ignored, it is higher than that of Comparative Example 1. Moreover, the electrostatic breakdown voltage is improved by forming the counter electrode. Therefore, also from this comparison, it can be seen that the light-emitting elements of the above examples are light-emitting elements that uniformly emit light as a whole, have high luminous efficiency, and excellent reliability.

  8A to FIG. 8D and FIG. 9A, which are diagrams showing a manufacturing process in the cross section of the light emitting device 10 taken along the line 2-2 of FIG. 1, regarding the method for manufacturing the light emitting device 10 described above. )-(B). First, an n-type GaAs substrate having a thickness of 300 μm inclined by 15 ° from the (100) plane in the [011] direction is prepared as a growth substrate 37 used for crystal growth of the semiconductor structure layer 11, and the semiconductor structure layer 11 is formed by MOCVD. The film is formed by the method.

First, the surface processed layer 17C, the current diffusion layer 17B, and the n-type cladding layer 17A were formed on the growth substrate 37 (FIG. 8A). The surface processed layer 17C is an Al _0.5 In _0.5 P layer having a thickness of 500 nm with a Si carrier concentration of 1 × 10 ¹⁸ cm ⁻³ , and the current diffusion layer 17B has a Si carrier concentration of 2 × A 500 nm thick (Al _0.4 Ga _0.6 ) _0.5 In _0.5 P layer of 10 ¹⁸ cm ⁻³ is used, and the n-type cladding layer 17A has a Si carrier concentration of 1 × 10 ¹⁸ cm. ^-3 , and a layer of Al _0.5 In _0.5 P with a thickness of 500 nm.

Next, the active layer 15 and the p-type semiconductor layer 13 composed of the p-type cladding layer and the p-type contact layer are formed in this order to complete the semiconductor structure layer 11 (FIG. 8B). The p-type cladding layer is an Al _0.5 In _0.5 P layer having a thickness of 500 nm with an Mg carrier concentration of 5 × 10 ¹⁷ cm ⁻³ , and the p-type contact layer has an Mg carrier concentration of 3 × A layer of In _0.05 Ga _0.95 P having a thickness of 10 ¹⁸ cm ⁻³ and a thickness of 500 nm was formed. The multiple quantum well structure constituting the active layer 15 includes, for example, a well layer (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P layer (thickness 20 nm) and a barrier layer (Al _0.5 A Ga _0.5 ) _0.5 In _0.5 P layer (thickness: 10 nm) was formed so as to have 15 well layers.

The p-type contact layer can contain In as long as light from the active layer 15 is not absorbed, and the Al composition ratio z of the well layer is in the range of 0 ≦ z ≦ 0.4 according to the emission wavelength. Can be adjusted. Further, phosphine (PH ₃ ) was used as a group V raw material, and organometallic metals such as trimethylgallium (TMGa), trimethylaluminum (TMAl), and trimethylindium (TMI) were used as a group III raw material. Further, silane (SiH ₄ ) was used as a raw material for Si that is an n-type impurity, and biscyclopentadienyl magnesium (Cp ₂ Mg) was used as a raw material for Mg that was a p-type impurity. The growth temperature was 750 to 850 ° C., hydrogen was used as the carrier gas, and the growth pressure was 10 kPa.

Next, a SiO ₂ film constituting the light-transmitting insulating layer 27 is formed with a thickness of 100 nm on the p-type semiconductor layer 13 by plasma CVD. Subsequently, after forming a resist mask on the SiO ₂ film, facilities by etching using buffered hydrofluoric acid (BHF), a patterned corresponding to the pattern of p electrodes 23 and the counter electrode 25 to the SiO ₂ film did. An opening is formed in the portion from which the SiO ₂ film is removed, and the p-type semiconductor layer 13 is exposed in this opening (FIG. 8C). Note that a thermal CVD method or a sputtering method can also be used as a method for forming the SiO ₂ film. It is also possible to use a dry etching method as a method for etching the SiO ₂ film. As the material of the light-transmitting insulating layer 27, other light-transmitting insulating materials such as Si ₃ N ₄ and Al ₂ O ₃ can be used in addition to SiO ₂ .

  Next, the p electrode 23 and the counter electrode 25 are formed on the p-type semiconductor layer 13 exposed through the opening of the translucent insulating layer 27 by EB vapor deposition. Specifically, a resist is formed on the light-transmitting insulating layer 27, and AuZn is deposited thereon to be 100 nm by EB vapor deposition, and AuZn deposited on the light-transmitting insulating layer 27 is removed by lift-off. To form. Thereafter, 200 nm of AuZn was deposited on the p-electrode 23, the counter electrode 25, and the translucent insulating layer 27 by EB vapor deposition to form a reflective metal layer 29 (FIG. 8D). Note that the reflective metal layer 29 may be made of another material having high light reflectivity, such as Au, Ag, Al, and Rh. Further, when the p-electrode 23, the counter electrode 25, and the reflective metal layer 29 are formed of the same material, the light-transmitting insulating layer 27 is formed after the light-transmitting insulating layer 27 is formed so as to form them in one step. A 300 nm metal material may be deposited on the surface 27 by EB vapor deposition or the like.

  Next, the semiconductor side bonding layer 31 is formed on the reflective metal layer 29. Specifically, for example, TaN (layer thickness: 100 nm), TiW (layer thickness: 100 nm), TaN (100 nm), Ni (layer thickness: 200 nm), and Au (layer thickness: 30 nm) are sequentially formed by an electron beam vacuum deposition method. Are stacked (FIG. 9A). Note that the resistance heating vapor deposition method or the sputtering method can also be used to form the semiconductor side bonding layer 31.

  Next, a support substrate 35 having a support substrate side bonding layer 33 formed on the upper surface is prepared. For example, the support substrate 35 is a Si substrate in which an ohmic metal layer (not shown) made of Pt and having a layer thickness of 200 nm is formed on the upper and lower surfaces by EB vapor deposition. In the support substrate side bonding layer 33, Ti (layer thickness 150 nm), Ni (layer thickness 150 nm), and AuSn (layer thickness 600 nm) are formed in this order on the support substrate 35 by sputtering or the like.

  Next, the surface of the semiconductor side bonding layer 31 and the surface of the support substrate side bonding layer 33 are brought into contact with each other and pressed against each other at a pressure of 1 MPa, and thermocompression bonding is performed for 10 minutes in a nitrogen atmosphere at a temperature of 330 ° C. By doing so, the support substrate 35 is attached. Thereafter, for example, the growth substrate 37 is removed by wet etching using a mixed solution of ammonia water and hydrogen peroxide water (FIG. 9A). The growth substrate 37 may be removed by dry etching, mechanical polishing, chemical mechanical polishing (CMP), or a combination of these methods. In order to improve the light extraction efficiency, the exposed n-type semiconductor layer surface is preferably subjected to uneven processing by wet etching or the like.

  After completion of the above processing, an n wiring electrode 19, an n power supply wiring 21, and a bonding pad 22 are formed on the n type semiconductor layer 17 (FIG. 9B). The n wiring electrode 19 is formed by depositing AuGeNi on the n-type semiconductor layer 17 by EB vapor deposition and then patterning by lift-off. Subsequently, Ti (layer thickness: 100 nm) was sequentially deposited by EB vapor deposition or the like so as to cover the upper surface of the n-type semiconductor layer 17 and the n wiring electrode 19 and patterned by a lift-off method to form the n power supply wiring 21. . Thereafter, Au was deposited to 1000 nm, and patterning was performed by a lift-off method to form a bonding pad 22. Note that the n wiring electrode 19 may be formed of a material capable of forming an ohmic junction with the n-type semiconductor, and may be formed using, for example, AuGe, AuSn, AuSnNi, or the like.

  Finally, in order to promote the formation of an ohmic junction between the n-type semiconductor layer 17 and the n wiring electrode 19, heat treatment is performed in a nitrogen atmosphere at 400 ° C., and the light emitting element 10 is completed.

  In the above embodiment, when a reverse bias current flows, the semiconductor of the light emitting element 40 does not deteriorate the electrostatic breakdown voltage characteristics due to excessive current flowing from the n wiring electrode 19 to the counter electrode 25. The shortest distance a between the end of the n wiring electrode 19 and the end of the p electrode 23 in the direction parallel to the upper surface of the structural layer is less than the shortest distance b between the end of the n wiring electrode 19 and the end of the counter electrode 41. Small is preferable.

  In the above embodiment, the case where the n power supply wiring 21 and the n-type semiconductor layer 17 form a Schottky junction and the counter electrode 25 and the p-type semiconductor layer 13 form an ohmic junction has been described as an example. The n power supply wiring 21 and the n-type semiconductor layer 17 may form an ohmic junction, and the counter electrode 25 and the p-type semiconductor layer 13 may form a Schottky junction. Even in this case, as in the above-described embodiment, when a reverse bias current flows, the current is distributed between the n power supply wiring 21 under the bonding pad 22 and the counter electrode 25, and the reverse bias current is reduced. It is possible to improve the electrostatic breakdown voltage when flowing.

Various numerical values, dimensions, materials, electrode arrangements, and the like in the above-described embodiments are merely examples, and can be appropriately selected according to the application and the semiconductor light emitting element to be manufactured.
DESCRIPTION OF SYMBOLS 10 Light emitting element 11 Semiconductor structure layer 13 P-type semiconductor layer 15 Active layer 17 n-type semiconductor layer 17A n-type clad layer 17B Current diffusion layer 17C Surface processed layer 19 n wiring electrode 21 n power supply wiring 22 bonding pad 23 p electrode 25 counter electrode 27 Translucent insulating layer 29 Reflective metal layer 31 Semiconductor side bonding layer 33 Support substrate side bonding layer 35 Support substrate 37 Growth substrate

Claims (3)

a semiconductor structure layer made of an AlGaInP-based semiconductor in which a p-type first semiconductor layer, an active layer, and an n-type second semiconductor layer are stacked in this order;
A first electrode formed on a part of the first semiconductor layer;
A second electrode formed on a part of the second semiconductor layer,
The first electrode is formed in a region other than a region facing the region where the second electrode is formed with the semiconductor structure layer interposed therebetween,
The second electrode includes a power supply wiring, and a wiring electrode extending from the power supply wiring and forming an ohmic junction with the second semiconductor layer,
A counter electrode is formed on the first semiconductor layer in a region facing the region where the power supply wiring is formed and the semiconductor structure layer in between.
The power supply wiring forms a Schottky junction with the second semiconductor layer, and the counter electrode forms an ohmic junction with the first semiconductor layer, or the power supply wiring forms an ohmic contact with the second semiconductor layer. A junction is formed, and the counter electrode forms a Schottky junction with the first semiconductor layer,
The shortest distance between the end of the wiring electrode and the end of the first electrode in a direction parallel to the upper surface of the semiconductor structure layer is less than the shortest distance between the end of the wiring electrode and the end of the counter electrode. small,
The second semiconductor layer includes a current diffusion layer. When the electric resistivity of the current diffusion layer is ρ and the layer thickness is d, the Al composition, carrier concentration, and layer thickness of the current diffusion layer are ρ / A semiconductor light-emitting element characterized by satisfying a relationship of d ≦ 600 [Ω].   The semiconductor light emitting element according to claim 1, wherein a thickness d of the current diffusion layer is 500 nm or less. The device according to claim 1 or 2, characterized in that the composition of the current diffusion layer is _{(Al Z Ga 1-Z)} x In 1-x P (0.30 ≦ Z).