JP2014079141A - Power-factor correction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power-factor correction circuit capable of reducing influence due to an excessive rush current.SOLUTION: A power-factor correction circuit includes; a rectification bridge circuit 10 including a parallel connection of a series circuit of a MOSFET 1 and a diode D1 and a series circuit of a MOSFET 2 and a diode D2; reactors L1 and L2 connected between an input of the rectification bridge circuit 10 and an AC input terminals 4a and 4b; a smoothing capacitor C connected between outputs of the rectification bridge circuit 10; a bypass rectification bridge circuit 20 having an input connected to the AC input terminals 4a and 4b and having an output connected to the smoothing capacitor C; a triac 6 controlling conduction/non-conduction of the bypass rectification bridge circuit 20 by on/off; and a voltage detection circuit 8 on/off-controlling the triac 6 on the basis of an input voltage Vi input to the AC input terminals 4a and 4b, and causing the bypass rectification bridge circuit 20 to conduct at the time of power return.

Description

  The present invention relates to a power factor correction circuit for improving a power factor when converting an alternating current input into a direct current.

  A power factor correction circuit in which a MOSFET and a diode have a function as a rectifying bridge circuit has been proposed (see, for example, Patent Document 1). Referring to FIG. 4, this power factor correction circuit is formed by a rectifier bridge circuit 10 formed by connecting a series circuit of a switching element MOSFET1 and a diode D1 and a series circuit of a switching element MOSFET2 and a diode D2 in parallel. Has been. One input of the rectifier bridge circuit 10, that is, a point between the drain of the MOSFET 1 and the anode of the diode D 1 is connected to the AC input terminal 4 a via the reactor L 1 and the inrush current prevention circuit 3. Further, the other input of the rectifier bridge circuit 10, that is, the point between the drain of the MOSFET 2 and the anode of the diode D2 is connected to the other AC input terminal 4b via the reactor L2. The rectification output positive terminal of the rectification bridge circuit 10, that is, the connection point between the cathode of the diode D1 and the cathode of the diode D2, is connected to the DC output terminal Vo +, and the rectification output negative terminal of the rectification bridge circuit 10, that is, the source of MOSFET1 and the source of MOSFET2. Are connected to the DC output terminal Vo−, respectively, and a smoothing capacitor C is interposed between the DC output terminal Vo + and the DC output terminal Vo−.

  The inrush current prevention circuit 3 is a circuit for reducing an inrush current that flows at the time of start-up or power recovery after a power failure, and is configured by a parallel circuit of a resistor R1 and a relay RL1. When power is restored after a power failure, the relay RL1 is switched off to charge the smoothing capacitor C with the current suppressed by the resistor R1. After the smoothing capacitor C is charged to some extent, the relay RL1 is switched on. Shift to normal operation.

5A and 5B are timing charts showing signals at various parts of the power factor correction circuit shown in FIG. 4 when an AC input instantaneous power failure occurs. FIG. 5A shows the input voltage Vi, and FIG. 5B shows the voltage of the smoothing capacitor C. , (C) shows the ON / OFF state of the relay RL1, and (d) shows the input current Ii.
When an instantaneous power failure of the AC power supply AC occurs at the time t1 in the normal operating state, the power factor correction circuit cannot supply boosted energy to the smoothing capacitor C because there is no input energy. Since the electric charge of the smoothing capacitor C continues to be supplied to the subsequent circuit, the voltage of the smoothing capacitor C continues to decrease. In general power supply circuits, there are provisions for maintaining an instantaneous input power failure, and an output can be maintained for a certain period of time even when an AC input has an instantaneous power failure. However, since the output cannot be held if the voltage of the smoothing capacitor C is too low, the operation is stopped by resetting the relay RL1 and the like at time t2 before the output falls below the specified accuracy. In the normal operation state, the holding time T0 from the momentary power failure until the relay RL1 is reset and switched off is determined by the output holding rule. When the AC power supply is restored again at time t3, since the relay RL1 is switched off, the smoothing capacitor C is charged with the current suppressed by the resistor R1, and the smoothing capacitor C is charged to some extent at time t4. Thus, the relay RL1 is switched on and the state is shifted to the normal operation state.

JP 2002-51563 A

  However, the conventional technique has a problem in that if the AC power supply is restored immediately before the relay RL1 is switched off, the current suppressing resistor R1 does not function, so that an excessive inrush current flows.

FIG. 6 is a timing chart showing signals at various parts of the power factor correction circuit shown in FIG. 4 when the AC power supply is restored immediately before the relay RL1 is switched off. FIG. 6A shows the input voltage Vi and FIG. Is the voltage of the smoothing capacitor C, (c) is the on / off state of the relay RL1, and (d) is the input current Ii.
After the instantaneous power failure of the AC power supply AC at time t1 in the normal operating state, when power is restored at time t5 just before the holding time T0 elapses, the voltage of the smoothing capacitor C decreases and the relay RL1 is switched on. As a result, an excessive inrush current flows. Inrush current is AC input terminal 4a-relay RL1-reactor L1-diode D1-smoothing capacitor C-MOSFET 2-reactor L2-AC input terminal 4b, or AC input terminal 4b-reactor L2-diode D2-smoothing capacitor C-MOSFET 1-. It flows in the 1st path | route of reactor L1-relay RL1-AC input terminal 4a. Therefore, the maximum current guaranteed by the absolute maximum ratings of the MOSFETs 1 and 2 is exceeded, and the MOSFETs 1 and 2 are likely to be destroyed. An excessive inrush current is likely to occur particularly when the AC input phase is 90 degrees and 270 degrees and when the input is restored.

  An object of the present invention is to solve the above-mentioned problems of the prior art in view of the above-mentioned problems, and to provide a power factor correction circuit capable of reducing the influence of an excessive inrush current generated in a state where the inrush current prevention circuit does not function. There is to do.

The power factor correction circuit of the present invention includes a rectifier bridge circuit in which a series circuit of a switch element and a rectifier element is connected in parallel, a reactor connected between an input of the rectifier bridge circuit and an AC input terminal, A power factor correction circuit comprising a smoothing capacitor connected between the outputs of the rectifier bridge circuit, the input being connected to the AC input terminal, and the output being connected to the smoothing capacitor; A conduction control element that controls conduction / non-conduction of the bypass rectifier bridge circuit by on / off, and on / off control of the conduction control element based on an input voltage input to the AC input terminal. And a voltage detection circuit for conducting the bypass rectifier bridge circuit.
Furthermore, in the power factor correction circuit of the present invention, the conduction control element may have an absolute maximum rated current value higher than that of the switch element constituting the rectifying bridge circuit.
Furthermore, in the power factor correction circuit of the present invention, the conduction control element may be a triac.
Furthermore, in the power factor correction circuit of the present invention, the conduction control element may be used as a rectifying element of the bypass rectifying bridge circuit.

  According to the present invention, even if an excessive inrush current occurs in a state where the inrush current prevention circuit does not function, most of the excessive inrush current can flow to the bypass rectifier bridge circuit. There is an effect that can be reduced.

It is a circuit block diagram which shows the circuit structure of 1st Embodiment of the power factor improvement circuit which concerns on this invention. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG. It is a circuit block diagram which shows the circuit structure of 2nd Embodiment of the power factor improvement circuit which concerns on this invention. It is a circuit block diagram which shows the circuit structure of the conventional power factor improvement circuit. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG. It is a wave form diagram which shows the signal waveform and operation | movement waveform of each part of FIG.

Next, embodiments of the present invention will be specifically described with reference to the drawings.
(First embodiment)
Referring to FIG. 1, the power factor correction circuit of the first embodiment includes diodes D10, D11, D12, and D13, and a triac (bidirectional thyristor) in addition to the configuration of the conventional power factor correction circuit shown in FIG. 6, a resistor R 2, a transistor 7, a power supply voltage Vss, and a voltage detection circuit 8.

  A bypass rectification bridge circuit 20 is formed by connecting a series circuit of diodes D10 and D11 and a series circuit of diodes D12 and D13 in parallel. This bypass rectifier bridge circuit 20 functions as a bypass circuit for flowing an excessive inrush current. One input of the bypass rectifier bridge circuit 20, that is, the connection point between the anode of the diode D10 and the cathode of the diode D11 is connected to the connection point between the reactor L1 and the inrush current prevention circuit 3, and the other input, that is, the diode D12. Is connected to the AC input terminal 4b to which the reactor L2 is connected.

  Further, the rectification output positive terminal of the bypass rectification bridge circuit 20, that is, the connection point between the cathode of the diode D10 and the cathode of the diode D12 is connected to the DC output terminal Vo +, and the rectification output negative terminal of the bypass rectification bridge circuit 20, ie, the diode D11. The connection point between the anode of the diode D13 and the anode of the diode D13 is connected to the DC output terminal Vo− via the triac 6.

  The triac 6 is a conduction control element that controls conduction / non-conduction of the bypass rectifier bridge circuit 20 by turning on / off, and the gate terminal of the triac 6 has a resistor R2 and a transistor between the DC output terminal Vo−. 7 and the power supply voltage Vss are connected in series. Thereby, the triac 6 is turned on / off by the third quadrant trigger using the negative voltage as the gate voltage by turning on / off the transistor 7.

  The voltage detection circuit 8 detects the input voltage Vi, detects the voltage of the smoothing capacitor C, and turns on / off the transistor 7 according to the detection result. When the voltage detection circuit 8 detects the input voltage Vi and detects an instantaneous power failure, the voltage detection circuit 8 turns on the transistor 7 and turns on the triac 6 with a negative voltage in the third quadrant trigger. Conduct.

  FIG. 2 is a timing chart showing signals at various parts of the power factor correction circuit shown in FIG. 1 when the AC power supply is restored immediately before the relay RL1 is switched off. FIG. 2A shows the input voltage Vi and FIG. Is the current of the second path, (c) is the current of the first path, and (d) is the voltage of the smoothing capacitor C. In FIG. 2, a signal waveform when an excessive inrush current is generated is shown with the time axis enlarged.

  When an instantaneous power failure of the AC power supply AC occurs, the transistor 7 is turned on by the voltage detection circuit 8, and the triac 6 is turned on by the third quadrant trigger with a negative voltage. Thus, AC input terminal 4a-relay RL1-reactor L1-diode D1-smoothing capacitor C-MOSFET 2-reactor L2-AC input terminal 4b or AC input terminal 4b-reactor L2-diode D2-smoothing capacitor C-MOSFET 1-reactor In addition to the first path of the L1-relay RL1-AC input terminal 4a, an AC input terminal 4a-relay RL1-diode D10-smoothing capacitor C-triac 6-diode D13-AC input terminal 4b, Or the 2nd path | route of AC input terminal 4b-diode D12-smoothing capacitor C-triac 6-diode D11-relay RL1-AC input terminal 4a is formed.

  Therefore, as shown in FIG. 6, when the AC power supply is restored again at time t5 immediately before the holding time T0 has elapsed, an excessive inrush current flows, but this excessive inrush current flows through the first path. And the second path. Since the first path includes the reactor L1 and the reactor L2, even when a steep voltage is applied, the current changes with a delay with respect to the voltage. Therefore, as shown in FIG. 2, most of the excessive inrush current flows through the second path and charges the smoothing capacitor C. The dashed-dotted line shown in FIG.2 (c) has shown the rush current which flows into a 1st path | route when there is no 2nd path | route. As described above, when there is no second path, an excessive inrush current flows in the first path, that is, the MOSFETs 1 and 2, but by making the second path conductive, most of the excessive inrush current is generated. It can be seen that flows through the second path.

  In general, semiconductors used as switching elements in the booster circuit are FETs or IGBTs, whereas the triac 6 that forms the second path has an absolute maximum rated current value that is very high compared to FETs and IGBTs. Have. The diodes D1 and D2 used in the booster circuit need to use a fast recovery diode (FRD) or the like, whereas the diodes D10, D11, D12, and D13 constituting the bypass rectifier bridge circuit 20 are FRD. A general rectifying diode having a very high absolute maximum rated current value can be used. Therefore, the second path is suitable for bypassing an excessive inrush current.

  When the excessive inrush current finishes flowing, the voltage detection circuit 8 turns off the transistor 7 and turns off the triac 6. The detection of the timing for turning off the transistor 7 is performed based on the voltage of the smoothing capacitor C. That is, the voltage detection circuit 8 detects the voltage of the smoothing capacitor C, and when the voltage of the smoothing capacitor C exceeds a predetermined value, the transistor 7 is turned off and the triac 6 is turned off. Note that the transistor 7 may be turned off after a predetermined time after detecting the recovery of the input voltage Vi.

  In the first embodiment, the configuration is such that the bypass rectifier bridge circuit 20 is turned on when an instantaneous power failure is detected. However, the bypass rectifier bridge circuit 20 only needs to be turned on when power is restored. In addition, when power is restored after the holding time T0 has elapsed after an instantaneous power failure of the AC power supply AC, the inrush current prevention circuit 3 functions, and thus the bypass rectifier bridge circuit 20 does not necessarily have to be conducted.

(Second Embodiment)
Next, a second embodiment of the present invention will be specifically described with reference to FIG.
Referring to FIG. 3, the power factor correction circuit according to the second embodiment includes a series circuit of a diode D10 and a triac 6a as a bypass rectifier bridge circuit 20a that functions as a bypass circuit for flowing an excessive inrush current, and a diode D12. And a series circuit of the triac 6 are connected in parallel. That is, the triacs 6 and 6a are used as the rectifying elements constituting the bypass rectifying bridge circuit 20a. A resistor R3, a transistor 7a, and a power supply voltage Vss are connected in series between the gate terminal of the triac 6a and the DC output terminal Vo-. The triac 6a is turned on and off by the transistor 7a. Is turned on / off by a third quadrant trigger having a gate voltage as.

  The voltage detection circuit 8a determines which phase is re-input when the input voltage Vi is restored by predicting which phase may be re-input by monitoring the input frequency, Either one of the transistors 7 and 7a is turned on in accordance with the phase that has been turned on again. That is, when the AC input terminal 4a side is positive and the input voltage Vi is restored, the voltage detection circuit 8a turns on the transistor 7 and turns on the triac 6 with a negative voltage in the third quadrant trigger. Thereby, the 2nd path | route of AC input terminal 4a-relay RL1-diode D10-smoothing capacitor | condenser C-triac 6-AC input terminal 4b is formed. When the AC input terminal 4b side is positive and the input voltage Vi is restored, the voltage detection circuit 8a turns on the transistor 7a and turns on the triac 6a with a negative voltage in the third quadrant trigger. Thereby, the 2nd path | route of AC input terminal 4b-diode D12-smoothing capacitor C-triac 6a-relay RL1-AC input terminal 4a is formed.

  According to the second embodiment, the control to turn on either of the triacs 6 and 6a is required, which is somewhat complicated, but the triacs 6 and 6a are used as the rectifying elements constituting the bypass rectifier bridge circuit 20a. By doing so, the impedance of the second path is lowered, and a large current can flow through the second path.

  As described above, in the present embodiment, the rectifier bridge circuit 10 formed by connecting in parallel the series circuit of the MOSFET 1 and the diode D1, and the series circuit of the MOSFET 2 and the diode D2, which are switching elements, Reactors L1 and L2 connected between the input and the AC input terminals 4a and 4b, and a smoothing capacitor C connected between the outputs of the rectifier bridge circuit 10, and the input is output to the AC input terminals 4a and 4b. Are respectively connected to the smoothing capacitor C, the triac 6 (conduction control element) for controlling conduction / non-conduction of the bypass rectification bridge circuit 20 by ON / OFF, and AC input terminals 4a, 4b Rectifier bridge circuit for controlling the triac 6 based on the input voltage Vi input to the power supply and bypassing when power is restored And it includes a voltage detection circuit 8 for conducting the 0. With this configuration, even if an excessive inrush current occurs when the inrush current prevention circuit does not function, most of the excessive inrush current flows to the bypass rectifier bridge circuit, and the MOSFETs 1 and 2 and the diodes D1 and D2 are excessively large. Since it can protect from an inrush current, the influence by an excessive inrush current can be reduced.

  Furthermore, according to the present embodiment, the triac 6 (conduction control element) has an absolute maximum rated current value higher than that of the MOSFETs 1 and 2 constituting the rectifier bridge circuit 10, and therefore, the bypass rectifier bridge circuit 20 A large current can be passed through.

  Furthermore, according to the present embodiment, by using the triac 6 (conduction control element) as the rectifying element of the bypass rectifying bridge circuit 20, a large current can be passed through the bypass rectifying bridge circuit 20a.

  As mentioned above, although this invention was demonstrated by specific embodiment, the said embodiment is an example and it cannot be overemphasized that it can change and implement in the range which does not deviate from the meaning of this invention.

1, 2 MOSFET
3 Inrush current prevention circuit 4a, 4b AC input terminal 6, 6a Triac (conduction control element)
7, 7a Transistor 8, 8a Voltage detection circuit 10 Rectifier bridge circuit 20, 20a Bypass rectifier bridge circuit AC AC power supply C Smoothing capacitor D1, D2, D3, D4 Diode L1, L2 Reactor R1, R2, R3 Resistor RL1 Relay Vo +, Vo- DC output terminal

Claims (4)

A rectifier bridge circuit in which a series circuit of a switch element and a rectifier element is connected in parallel, a reactor connected between an input of the rectifier bridge circuit and an AC input terminal, and an output of the rectifier bridge circuit A power factor correction circuit comprising a smoothing capacitor,
A bypass rectifier bridge circuit having an input connected to the AC input terminal and an output connected to the smoothing capacitor;
A conduction control element for controlling conduction / non-conduction of the bypass rectifier bridge circuit by turning on / off;
And a voltage detection circuit that controls on / off of the conduction control element based on an input voltage input to the AC input terminal and conducts the bypass rectifier bridge circuit when power is restored. Improvement circuit.   2. The power factor correction circuit according to claim 1, wherein the conduction control element has an absolute maximum rated current value higher than that of the switch element constituting the rectifying bridge circuit.   The power factor correction circuit according to claim 1, wherein the conduction control element is a triac.   4. The power factor correction circuit according to claim 1, wherein the conduction control element is used as a rectifying element of the bypass rectifying bridge circuit. 5.

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