JP2014078763A - Nitride semiconductor light-emitting element and method of manufacturing nitride semiconductor light-emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor light-emitting element that is provided on a semipolar plane and has a suppressed increase in a bias voltage required for light emission, and to provide a method of manufacturing the nitride semiconductor light-emitting element.SOLUTION: A multiquantum well structure of a light-emitting layer 17, which is provided above a supporting substrate composed of a hexagonal nitride semiconductor having a primary surface 13a of a semipolar plane, is composed of a well layer 17a, a well layer 17c, and a barrier layer 17b. The barrier layer 17b is provided between the well layer 17a and the well layer 17c. The well layer 17a and the well layer 17c are composed of InGaN and have an indium composition ranging from 0.15 or more to 0.50 or less. A tilt angle α of the primary surface 13a with respect to the c-plane of the hexagonal nitride semiconductor is within any one of ranges from 50 or more to 80 degrees or less and from 130 or more to 170 degrees or less. A film thickness L of the barrier layer 17b ranges from 1.0 or more to 4.5 nm or less.

Description

  The present invention relates to a nitride semiconductor light emitting device.

  Patent Document 1 discloses a technique for improving the light emission efficiency by improving the hole injection / diffusion state in the quantum well structure (MQW structure, SQW structure) of the light emitting device. In the case where the light emitting layer has an MQW structure, the holes of the plurality of barrier layers in the MQW structure are more easily moved so that holes move more easily in the MQW structure from the p-type semiconductor layer side to the n-type semiconductor layer side. The MQW structure is configured such that at least two layers have band gaps different from each other, and preferably there are multiple layers that gradually decrease from the p-type side toward the n-type side. When the light emitting layer has an SQW structure, the barrier layer on the p-type side is compositionally inclined so that the band gap decreases from the p-type side toward the n-type side.

  Patent Document 2 discloses a method of manufacturing a semiconductor light emitting device that can select the direction of piezo polarization in an active layer in an appropriate direction. First, measurement of photoluminescence of a substrate product formed by growing a quantum well structure for a light emitting layer and p-type and n-type gallium nitride based semiconductor layers at one or more selected tilt angles is performed. The bias dependence of the photoluminescence of the substrate product is obtained by applying a bias to the substrate. Next, from the bias dependence, the direction of piezo polarization in the light emitting layer is estimated at each of the selected tilt angles of the main surface of the substrate. Next, the plane orientation of the growth substrate for the production of the semiconductor light emitting device is selected by judging the use of either the tilt angle corresponding to the main surface of the substrate or the tilt angle corresponding to the back surface of the main surface of the substrate based on the estimation. To do. A semiconductor stack for a semiconductor light emitting device is formed on the main surface of the growth substrate.

Patent Document 3 discloses a nitride-based semiconductor light-emitting device in which the efficiency of carrier injection into the well layer is improved. The nitride semiconductor light emitting device of Patent Document 3 includes a substrate made of a hexagonal gallium nitride semiconductor, an n-type gallium nitride semiconductor region provided on the main surface of the substrate, and an n-type gallium nitride semiconductor region on the n-type gallium nitride semiconductor region. A light emitting layer having a single quantum well structure provided; and a p-type gallium nitride based semiconductor region provided on the light emitting layer. The light emitting layer is provided between the n-type gallium nitride semiconductor region and the p-type gallium nitride semiconductor region, and includes a well layer, a barrier layer, and a barrier layer.
The well layer is InGaN. The main surface of the substrate extends along a reference plane inclined at an inclination angle in a range of 63 degrees to 80 degrees or 100 degrees to 117 degrees from a plane orthogonal to the c-axis direction of the hexagonal gallium nitride semiconductor. ing.

  Non-Patent Document 1 discloses an LED having a multiple quantum well structure that emits a blue-green laser. The LED of Non-Patent Document 1 is formed on the m-plane. Non-Patent Document 2 discloses an LD having a multiple quantum well structure that emits a green laser. The LD of Non-Patent Document 2 is formed on the (20-21) plane.

JP 2002-270894 A JP 2011-77395 A JP 2011-40709 A

“Characterization of blue-green m-plane InGaN light emitting diodes”, You-DaLin, Arpan Chakraborty, Stuart Brinkley, Hsun Chih Kuo, Thiago Melo, Kenji Fujito, James S. Speck, Steven P. DenBaars, and Shuji Nakamura, Applied Physics Letters 94, 261108 (2009). “High Quality InGaN / AlGaN Multiple Quantum Wells for Semipolar InGaN Green Laser Diodes”, You-Da Lin, Shuichiro Yamamoto, Chia-Yen Huang, Chia-Lin Hsiung, Feng Wu, Kenji Fujito, Hiroaki Ohta, JamesS. Speck, Steven P DenBaars, and Shuji Nakamura, Applied Physics Express 3, (2010) 082001.

  Patent Documents 1 to 3 and Non-Patent Documents 1 and 2 show various quantum well structures. However, the quantum well structure provided on the semipolar plane has different strain and polarity from the quantum well structure provided on the c-plane. Such a difference in properties of the quantum well structure imparts a strain different from that on the c-plane to the band structure of the quantum well structure provided on the semipolar plane, thereby reducing the electron injection efficiency in the quantum well structure. There is a case. A decrease in electron injection efficiency causes an increase in bias voltage necessary for light emission. Accordingly, an object of the present invention has been made in view of the above matters, a nitride semiconductor light-emitting element provided on a semipolar plane in which an increase in bias voltage necessary for light emission is suppressed, and the nitride semiconductor And a method for manufacturing a light-emitting element.

  For a conventional InGaN quantum well structure provided on the c-plane of a hexagonal nitride semiconductor, a barrier layer having a thickness of, for example, 5 nm to 20 nm is used. In particular, in the case of a light-emitting element that emits light having a relatively long wavelength, the indium composition of the well layer is also relatively high, so that the barrier layer is preferably relatively thick. The crystal quality of the well layer is lowered when the indium composition is relatively high, but the crystal quality is recovered by adjusting the properties of the crystal surface along with the growth of the barrier layer. Due to such circumstances, when the inventor manufactures a light-emitting element having a quantum well structure on a semipolar plane, the inventor initially has a thickness of about 15 nm as in the case of a light-emitting element having a quantum well structure on a c-plane. A light emitting layer having a multiple quantum well structure having a barrier layer with a thickness was formed. However, in the case of a light emitting device having a quantum well structure on a semipolar plane, it has been found that a relatively high bias voltage is required for light emission.

  Therefore, in order to elucidate the reason why such a relatively high bias voltage is necessary for light emission, the inventor measures PL (Photo Luminescence) in a state where a bias voltage is applied, and the like. The optical properties of the crystal plane of the InGaN quantum well structure were investigated. As a result, the inventor found that the direction of piezo polarization of the well layer of the InGaN quantum well structure provided on the semipolar plane is the same as that of the well layer of the InGaN quantum well structure provided on the c plane. We found that it was opposite to the direction of polarization. The inventor says that the direction of piezo polarization of the InGaN well layer provided on the semipolar plane is opposite to the direction of piezo polarization of the InGaN well layer provided on the c plane. It has been found that the phenomenon reduces the efficiency of electron injection in the InGaN quantum well structure, and thus increases the bias voltage required for light emission. The problem with the electron injection efficiency in such an InGaN quantum well structure is that the conventional InGaN quantum well structure provided on the c-plane has the problem of the InGaN well layer provided on the c-plane. The direction of piezo polarization is not intended to reduce the injection of electrons in the InGaN quantum well structure, and since holes originally have a small band offset, there is an effect on the injection efficiency associated with such piezo polarization. For reasons such as being relatively small, it was not generally recognized.

  On the other hand, in the case of an InGaN multiple quantum well structure provided on a semipolar surface with a certain tilt angle, the inventor has a relatively high indium composition because the indium uptake and InGaN growth mode are advantageous for high quality. We have also found the characteristics of InGaN crystals that the well layer can be grown without greatly degrading the crystal quality. Due to the characteristics of this InGaN crystal, the inventor has an InGaN quantum well structure having a barrier layer with a thin film thickness so that the crystallinity recovery effect is insufficient on the c-plane and the light emission efficiency deteriorates. It has been found that a quantum well structure having a relatively high crystal quality can be grown on the semipolar plane without causing deterioration in luminous efficiency. The inventors diligently verified the relationship between the thickness of the barrier layer of the InGaN multiple quantum well structure provided on the semipolar plane and the crystal quality of the quantum well structure. As a result of this verification, the inventor found that even when a barrier layer having a relatively thin thickness of the same order as that of the well layer is provided on the semipolar plane, the PL emission intensity reflecting the crystallinity is reflected. It was confirmed that good crystal quality could be maintained without lowering. Furthermore, the inventor actually fabricated a light-emitting element having an InGaN quantum well structure having a relatively thin barrier layer of the same order as the thickness of the well layer and provided on the semipolar plane, to emit light. It was confirmed that the carrier injection efficiency was improved by producing the effects such as reduction of the required bias voltage, reduction of the half width of the emission wavelength, and improvement of the emission efficiency.

  The following aspects of the present invention have been made based on the above findings obtained by the inventors for an InGaN multiple quantum well structure provided on a semipolar surface.

  A first aspect according to the present invention is an invention related to a nitride semiconductor light emitting device, which is made of a hexagonal nitride semiconductor, and is a main surface inclined in a predetermined direction from the c-plane of the hexagonal nitride semiconductor. A n-type gallium nitride-based semiconductor layer provided on the main surface of the support substrate, a light-emitting layer formed on the n-type gallium nitride-based semiconductor layer and made of a gallium nitride-based semiconductor, A p-type gallium nitride based semiconductor layer provided on the light emitting layer, wherein the light emitting layer has a multiple quantum well structure, and the multiple quantum well structure includes at least two well layers and at least one well layer. The barrier layer is provided between the two well layers, the two well layers are made of InGaN, and the two well layers are in the range of 0.15 to 0.50. The first in The inclination angle of the main surface with respect to the c-plane is in a range of 50 degrees or more and 80 degrees or less and a range of 130 degrees or more and 170 degrees or less, The film thickness is in the range of 1.0 nm to 4.5 nm.

  The main surface of the support substrate of the nitride semiconductor light emitting device according to the first aspect of the present invention has a semipolarity in a range of 50 ° to 80 ° and a range of 130 ° to 170 °. The nitride semiconductor light emitting device according to the first aspect of the present invention has a light emitting layer having a multiple quantum well structure provided on the main surface. The direction of piezo polarization generated in the well layer of the multiple quantum well structure provided on such a semipolar plane is opposite to the direction of piezo polarization generated in the well layer provided on the c plane, Therefore, a strain different from that on the c-plane is generated in the band structure of the multiple quantum well structure provided on the semipolar plane. Due to the distortion of the band structure, the electron injection efficiency in the light emitting layer is lowered. However, since the thickness of the barrier layer of the nitride semiconductor light emitting device according to the first aspect of the present invention is relatively thin and is in the range of 1.0 nm to 4.5 nm, electrons are energy barriers of the barrier layer. The electron injection efficiency in the light emitting layer can be improved even when the band structure is distorted.

  Furthermore, the two well layers of the nitride semiconductor light emitting device according to the first aspect of the present invention have a relatively high first indium composition in the range of 0.15 to 0.50. For such a well layer having a relatively high indium composition, it is considered that a relatively thick barrier layer is desirable so as not to lower the crystallinity of the barrier layer. Since the light emitting layer (multiple quantum well structure) of the nitride semiconductor light emitting device according to the first aspect is provided on a semipolar surface in an angular range where indium uptake and growth modes are suitable for InGaN growth. Even if the barrier layer has a relatively thin film thickness in the range of 1.0 nm to 4.5 nm, the crystallinity can be adjusted, and the crystal quality of the light emitting layer can be maintained. In addition, when the film thickness of a barrier layer is less than 1.0 nm, crystallinity recovery | restoration becomes inadequate and the crystallinity of a light emitting layer may fall.

  In the first aspect of the present invention, the thickness of the barrier layer is not more than a value obtained by adding 0.50 nm to the thickness of the well layer, and 0.50 nm is subtracted from the thickness of the well layer. It is preferable that it is more than the value. The film thickness of the barrier layer is approximately the same as the film thickness of the well layer. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, electrons easily move over the energy barrier of the barrier layer and move to the adjacent well layer. Reduction of electron injection efficiency is suppressed.

  In the first aspect of the present invention, it is preferable that the barrier layer is made of InGaN, and the barrier layer has a second indium composition in a range of 0.01 to 0.10. Since the second indium composition of the barrier layer is in the range of 0.01 to 0.10, the band gap of the barrier layer is reduced. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the electrons easily get over the energy barrier of the barrier layer, thereby suppressing the reduction of the electron injection efficiency in the light emitting layer. Is done. When the 2nd indium composition of a barrier layer exceeds 0.10, the crystallinity of a barrier layer and a light emitting layer may fall.

In the first aspect of the present invention, the n-type gallium nitride based semiconductor layer has an InGaN layer, the light emitting layer is provided on the InGaN layer, and the InGaN in the n-type gallium nitride based semiconductor layer is provided. Misfit dislocations exist on the surface of the support substrate side of the layer, and the misfit dislocations are perpendicular to the surface of the InGaN layer and include a reference plane including the c-axis of the hexagonal nitride semiconductor and the InGaN layer. The surface extends in a direction perpendicular to the reference axis shared by the surface and the c-axis, and the density of the misfit dislocations is in the range of 5 × 10 ³ cm ^{−1 to} 1 × 10 ⁵ cm ^−1. It is preferable that there is. An InGaN layer is provided between the support substrate and the light emitting layer, and relatively high density misfit dislocations are generated on the surface of the InGaN layer on the support substrate side. Therefore, since the strain on the support substrate is relieved by this InGaN layer, the strain included in the well layer is also reduced. Therefore, even if the band structure of the light emitting layer is distorted by piezo polarization in the direction opposite to that on the c-plane, the piezo polarization is reduced, and the reduction of the electron injection efficiency in the light emitting layer is suppressed. When the density of misfit dislocations exceeds 1 × 10 ⁵ cm ⁻¹ , the bad influence of defects may also affect the light emitting layer and cause a decrease in light emission efficiency.

  In the first aspect of the present invention, the InGaN layer preferably has a third indium composition in the range of 0.03 to 0.05. Since the indium composition of the InGaN layer that is provided between the support substrate and the light emitting layer and relaxes the strain on the support substrate is in the range of 0.03 to 0.05, the strain on the support substrate is sufficiently relaxed. The Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the reduction of the electron injection efficiency in the light emitting layer is effectively suppressed. When the third indium composition of the InGaN layer exceeds 0.05, the density of misfit dislocations becomes too high, and the light emission efficiency may be reduced.

  In the first aspect of the present invention, the second indium composition increases from the p-type gallium nitride semiconductor layer side toward the n-type gallium nitride semiconductor layer side. preferable. Since the indium composition of the barrier layer increases from the p-type gallium nitride semiconductor layer side toward the n-type gallium nitride semiconductor layer side, the indium composition on the n-type gallium nitride semiconductor layer side is p-type. The band gap of the barrier layer is reduced on the n-type gallium nitride semiconductor layer side as compared with the case of the same indium composition on the gallium nitride semiconductor layer side. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, by changing the band gap of the barrier layer so as to relieve the distortion, electrons can be converted into energy of the barrier layer. Since it becomes easy to get over the barrier, reduction of the electron injection efficiency in the light emitting layer is suppressed.

  In the first aspect of the present invention, it is preferable that an inclination angle of the main surface with respect to the c-plane is in a range of not less than 63 degrees and not more than 80 degrees. When the inclination angle of the main surface is in the range of not less than 63 degrees and not more than 80 degrees, indium incorporation and growth modes are particularly suitable for the growth of InGaN, so that the crystallinity can be recovered even in a thin barrier layer. And reduction in luminous efficiency can be suppressed. As a result, it is possible to provide excellent electron injection efficiency without causing a decrease in light emission efficiency.

  In the first aspect of the present invention, it is preferable that the first indium composition is in a range of 0.24 to 0.40. Since the indium composition of the well layer is in the range of 0.24 to 0.40, the light emitting layer emits light having an emission wavelength of 500 nm to 570 nm. In this way, when the indium composition of the well layer is relatively large, the band offset between the well layer and the barrier layer is relatively large, so the influence of the distortion of the band structure due to piezo polarization becomes significant. In this case, the reduction of the electron injection efficiency in the light emitting layer can be sufficiently suppressed.

  In the first aspect of the present invention, it is preferable that the second indium composition is in a range of 0.01 to 0.06. Since the indium composition of the barrier layer is in the range of 0.01 to 0.06, the decrease in crystallinity is sufficiently suppressed.

  In the first aspect of the present invention, the thickness of the barrier layer is preferably in the range of 1.0 nm to 3.5 nm. Since the thickness of the barrier layer is in the range of 1.0 nm to 3.5 nm, it is relatively thin. Therefore, even if the band structure is distorted, the electrons easily move over the energy barrier of the barrier layer and move to the adjacent well layer, so that the reduction of the electron injection efficiency in the light emitting layer can be sufficiently suppressed.

  A second aspect of the present invention is an invention relating to a method for manufacturing a nitride semiconductor light emitting device, which is made of a hexagonal nitride semiconductor and is inclined in a predetermined direction from the c-plane of the hexagonal nitride semiconductor. A step of preparing a substrate having a main surface; a step of growing an n-type gallium nitride-based semiconductor layer on the main surface of the substrate; and light emission comprising a gallium nitride-based semiconductor on the n-type gallium nitride-based semiconductor layer And a step of growing a p-type gallium nitride based semiconductor layer on the light emitting layer, the light emitting layer comprising at least a first well layer and a second well layer, In the step of growing the light emitting layer, the first well layer, the barrier layer, and the second well layer are sequentially grown on the n-type gallium nitride semiconductor layer, A first well layer and said The second well layer is made of InGaN, and the first well layer and the second well layer have a first indium composition in a range of 0.15 or more and 0.50 or less, with respect to the c-plane. The inclination angle of the main surface is in the range of 50 ° to 80 ° and 130 ° to 170 °, and the thickness of the barrier layer is 1.0 nm to 4. It is characterized by being in the range of 5 nm or less.

  The main surface of the support base of the nitride semiconductor light emitting device according to the second aspect of the present invention has a semipolarity in the range of 50 ° to 80 ° and the range of 130 ° to 170 °. The nitride semiconductor light emitting device according to the second aspect of the present invention has a light emitting layer having a multiple quantum well structure provided on the main surface. The direction of piezo polarization generated in the well layer of the multiple quantum well structure provided on such a semipolar plane is opposite to the direction of piezo polarization generated in the well layer provided on the c plane, Therefore, in the band structure of the multiple quantum well structure provided on the semipolar plane, different strains are generated on the c plane. Due to the distortion of the band structure, the electron injection efficiency in the light emitting layer is lowered. However, since the thickness of the barrier layer of the nitride semiconductor light emitting device according to the second aspect of the present invention is relatively thin and is in the range of 1.0 nm to 4.5 nm, electrons are energy barriers of the barrier layer. The electron injection efficiency in the light emitting layer can be improved even when the band structure is distorted.

  Furthermore, the two well layers of the nitride semiconductor light emitting device according to the second aspect of the present invention have a relatively high first indium composition in the range of 0.15 to 0.50. For such a well layer having a relatively high indium composition, it is considered that a relatively thick barrier layer is desirable so as not to lower the crystallinity of the barrier layer. Since the light emitting layer (multiple quantum well structure) of the nitride semiconductor light emitting device according to the second aspect is provided on a semipolar surface in an angle range in which indium incorporation and growth modes are suitable for InGaN growth. Even if the barrier layer has a relatively thin film thickness in the range of 1.0 nm to 4.5 nm, the crystallinity can be adjusted, and the crystal quality of the light emitting layer can be maintained. In addition, when the film thickness of a barrier layer is less than 1.0 nm, crystallinity recovery | restoration becomes inadequate and the crystallinity of a light emitting layer may fall.

  In the second aspect of the present invention, the thickness of the barrier layer is not more than a value obtained by adding 0.50 nm to the thickness of the well layer, and 0.50 nm is subtracted from the thickness of the well layer. It is preferable that it is more than the value. The film thickness of the barrier layer is approximately the same as the film thickness of the well layer. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, electrons easily move over the energy barrier of the barrier layer and move to the adjacent well layer. Reduction of electron injection efficiency is suppressed.

  In the second aspect of the present invention, it is preferable that the barrier layer is made of InGaN, and the barrier layer has a second indium composition in the range of 0.01 to 0.10. Since the second indium composition of the barrier layer is in the range of 0.01 to 0.10, the band gap of the barrier layer is reduced. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the electrons easily get over the energy barrier of the barrier layer, thereby suppressing the reduction of the electron injection efficiency in the light emitting layer. Is done. When the 2nd indium composition of a barrier layer exceeds 0.10, the crystallinity of a barrier layer and a light emitting layer may fall.

In the second aspect of the present invention, the n-type gallium nitride based semiconductor layer has an InGaN layer, the light emitting layer is provided on the InGaN layer, and the InGaN in the n-type gallium nitride based semiconductor layer is provided. Misfit dislocations exist on the substrate-side surface of the layer, and the misfit dislocations are perpendicular to the surface of the InGaN layer and include the reference plane including the c-axis of the hexagonal nitride semiconductor and the InGaN layer The surface extends in a direction orthogonal to the reference axis shared by the surface and the c-axis, and the density of the misfit dislocations is in the range of 5 × 10 ³ cm ^{−1 to} 1 × 10 ⁵ cm ^−1. Is preferable. An InGaN layer is provided between the substrate and the light emitting layer, and relatively high density misfit dislocations are generated on the surface of the InGaN layer on the substrate side. Therefore, since the strain on the substrate is relieved by this InGaN layer, the strain included in the well layer is also reduced. Therefore, even if the band structure of the light emitting layer is distorted by piezo polarization in the direction opposite to that on the c-plane, the piezo polarization is reduced, and the reduction of the electron injection efficiency in the light emitting layer is suppressed. When the density of misfit dislocations exceeds 1 × 10 ⁵ cm ⁻¹ , the bad influence of defects may also affect the light emitting layer and cause a decrease in light emission efficiency.

  In the second aspect of the present invention, it is preferable that the InGaN layer has a third indium composition in a range of 0.03 to 0.05. Since the indium composition of the InGaN layer that is provided between the substrate and the light emitting layer and relaxes the strain on the substrate is in the range of 0.03 or more and 0.05 or less, the strain on the substrate is sufficiently relaxed. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the reduction of the electron injection efficiency in the light emitting layer is effectively suppressed. When the third indium composition of the InGaN layer exceeds 0.05, the density of misfit dislocations becomes too high, and the light emission efficiency may be reduced.

  In the second aspect of the present invention, the second indium composition increases from the p-type gallium nitride semiconductor layer side toward the n-type gallium nitride semiconductor layer side. preferable. Since the indium composition of the barrier layer increases from the p-type gallium nitride semiconductor layer side toward the n-type gallium nitride semiconductor layer side, the indium composition on the n-type gallium nitride semiconductor layer side is p-type. The band gap of the barrier layer is reduced on the n-type gallium nitride semiconductor layer side as compared with the case of the same indium composition on the gallium nitride semiconductor layer side. Therefore, even if the band structure of the light emitting layer is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, by changing the band gap of the barrier layer so as to relieve the distortion, electrons can be converted into energy of the barrier layer. Since it becomes easy to get over the barrier, reduction of the electron injection efficiency in the light emitting layer is suppressed.

  In the second aspect of the present invention, it is preferable that an inclination angle of the main surface with respect to the c-plane is in a range of not less than 63 degrees and not more than 80 degrees. When the inclination angle of the main surface is in the range of not less than 63 degrees and not more than 80 degrees, indium incorporation and growth modes are particularly suitable for the growth of InGaN, so that the crystallinity can be recovered even in a thin barrier layer. And reduction in luminous efficiency can be suppressed. As a result, it is possible to provide excellent electron injection efficiency without causing a decrease in light emission efficiency.

  In the second aspect of the present invention, it is preferable that the first indium composition is in a range of 0.24 to 0.40. Since the indium composition of the well layer is in the range of 0.24 to 0.40, the light emitting layer emits light having an emission wavelength of 500 nm to 570 nm. In this way, when the indium composition of the well layer is relatively large, the band offset between the well layer and the barrier layer is relatively large, so the influence of the distortion of the band structure due to piezo polarization becomes significant. In this case, the reduction of the electron injection efficiency in the light emitting layer can be sufficiently suppressed.

  In the second aspect of the present invention, it is preferable that the second indium composition is in a range of 0.01 to 0.06. Since the indium composition of the barrier layer is in the range of 0.01 to 0.06, the decrease in crystallinity is sufficiently suppressed.

  In the second aspect of the present invention, the thickness of the barrier layer is preferably in the range of 1.0 nm to 3.5 nm. Since the thickness of the barrier layer is in the range of 1.0 nm to 3.5 nm, it is relatively thin. Therefore, even if the band structure is distorted, the electrons easily move over the energy barrier of the barrier layer and move to the adjacent well layer, so that the reduction of the electron injection efficiency in the light emitting layer can be sufficiently suppressed.

  ADVANTAGE OF THE INVENTION According to this invention, the nitride semiconductor light-emitting device which was provided on the semipolar surface and the raise of the bias voltage required for light emission was suppressed, and the manufacturing method of this nitride semiconductor light-emitting device can be provided.

FIG. 1 is a diagram illustrating a configuration of a light emitting device according to an embodiment. FIG. 2 is a diagram for explaining the effect of the light emitting device according to the embodiment. FIG. 3 is a view for explaining a method for manufacturing the light-emitting element according to the embodiment. FIG. 4 is a diagram schematically showing products in the main steps of the method for manufacturing a light emitting device according to this embodiment. FIG. 5 is a diagram illustrating a configuration of an example of the light-emitting element according to the embodiment. FIG. 6 is a diagram showing the measurement results of the PL emission wavelength for the examples and comparative examples. FIG. 7 is a diagram showing the measurement results of the current density dependence of the emission wavelength for the examples and comparative examples. FIG. 8 is a graph showing the measurement results of the current density dependence of the light emission output for the examples and comparative examples. FIG. 9 is a diagram showing the measurement result of the current density dependence of the half-value width of the emission wavelength for the example and the comparative example. FIG. 10 is a diagram showing measurement results of IV characteristics for the examples and comparative examples. FIG. 11 is a diagram showing measurement results of IV characteristics for the examples and comparative examples. FIG. 12 is a diagram showing measurement results of IV characteristics for the examples and comparative examples. FIG. 13 is a diagram showing measurement results of IV characteristics for the examples and comparative examples.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the description of the drawings, if possible, the same elements are denoted by the same reference numerals, and redundant description is omitted. FIG. 1 is a drawing schematically showing a structure of a light emitting element 11 which is a nitride semiconductor light emitting element according to an embodiment and a structure of an epitaxial substrate for the light emitting element 11. The light-emitting element 11 shown in FIG. 1 is exemplified as a light-emitting diode (LED) for evaluating spontaneous emission light of an epitaxial structure (epitaxial structure applied to an LD) for a laser diode (LD). There can also be.

  A light emitting element 11 is shown in part (a) of FIG. 1, and an epitaxial substrate EP1 for the light emitting element 11 is shown in part (b) of FIG. The epitaxial substrate EP1 has an epitaxial layer structure similar to the epitaxial layer structure (the support base 13, the n-type gallium nitride semiconductor layer 15, the light emitting layer 17, and the p-type gallium nitride semiconductor layer 19) included in the light emitting element 11. In the following description, a semiconductor layer constituting the light emitting element 11 will be described. The epitaxial substrate EP1 includes a semiconductor layer (semiconductor film) corresponding to the semiconductor layers constituting these light emitting elements 11, and the description for the light emitting elements 11 is applied to the corresponding semiconductor layers.

  FIG. 1 shows a coordinate system S and a crystal coordinate system CR. The crystal coordinate system CR is a coordinate system for indicating the crystal axes (c-axis, a-axis, m-axis) of the hexagonal nitride semiconductor of the support base 13. The X-axis is in the same direction as the a-axis of the hexagonal nitride semiconductor of the support base 13, and the YZ plane is the m-axis of the hexagonal nitride semiconductor of the support base 13 and the hexagonal nitridation of the support base 13. It is parallel to the plane defined by the c-axis of the physical semiconductor.

  As shown in FIG. 1A, the light-emitting element 11 includes a support base 13, an n-type gallium nitride semiconductor layer 15, a light-emitting layer 17, a p-type gallium nitride semiconductor layer 19, a p-side electrode 21, and an insulation. A film 23 and an n-side electrode 25 are provided. The n-type gallium nitride based semiconductor layer 15 includes an n-type GaN layer 15a, an n-type cladding layer 15b, and an n-type guide layer 15c. The light emitting layer 17 has a multiple quantum well structure including a well layer 17a, a barrier layer 17b, and a well layer 17c. The light emitting layer 17 may have a multiple quantum well structure including three or more well layers. The p-type gallium nitride based semiconductor layer 19 includes a p-type guide layer 19a, a p-type cladding layer 19b, and a p-type contact layer 19c. The n-type gallium nitride based semiconductor layer 15, the light emitting layer 17 and the p-type gallium nitride based semiconductor layer 19 are formed on the support base 13 by epitaxial growth. On the main surface 13a of the support base 13, an n-type GaN layer 15a, an n-type cladding layer 15b, an n-type guide layer 15c, a well layer 17a, a barrier layer 17b, a well layer 17c, a p-type guide layer 19a, and a p-type cladding layer 19b and a p-type contact layer 19c are sequentially provided.

  The c-plane of the support base 13 extends along the plane SC. The main surface 13a of the support base 13 faces the Z-axis direction and extends in the direction in which the XY plane extends. The main surface 13a is inclined in a predetermined direction from the c-plane. The tilt angle α of the main surface 13a is defined with reference to the c-plane ((0001) plane, plane SC shown in FIG. 1) of the hexagonal nitride semiconductor of the support base 13. For example, the main surface 13a can be inclined at an inclination angle α toward the m-axis of the support base 13 with respect to the surface SC corresponding to the c-plane. The inclination angle α is defined by an angle formed by a normal vector VN of the main surface 13a of the support base 13 and a c-axis vector VC indicating the c-axis. The inclination angle α is in a range from 50 degrees to 80 degrees and a range from 130 degrees to 170 degrees. In particular, the inclination angle α can be in the range of not less than 63 degrees and not more than 80 degrees. The main surface 13a can be inclined, for example, from the c-plane toward the m-axis. In particular, when the inclination angle α from the c-plane toward the m-axis is 75 degrees, the main surface 13a is the support base. This corresponds to the (20-21) plane of 13 hexagonal nitride semiconductors. The c-axis vector VC corresponds to the normal vector of the (0001) plane.

  On the main surface 13 a, the light emitting layer 17 is provided between the n-type gallium nitride semiconductor layer 15 and the p-type gallium nitride semiconductor layer 19. On the main surface 13a, the n-type gallium nitride based semiconductor layer 15, the light emitting layer 17, and the p-type gallium nitride based semiconductor layer 19 are sequentially arranged in the direction of the normal vector VN (Z-axis direction). On the main surface 13a, the n-type GaN layer 15a, the n-type cladding layer 15b, and the n-type guide layer 15c included in the n-type gallium nitride based semiconductor layer 15 are oriented in the direction of the normal vector VN (Z-axis direction). They are arranged in order. On the main surface 13a, the well layer 17a, the barrier layer 17b, and the well layer 17c included in the light emitting layer 17 are sequentially arranged in the direction of the normal vector VN (Z-axis direction). On the main surface 13a, the p-type guide layer 19a, the p-type cladding layer 19b, and the p-type contact layer 19c included in the p-type gallium nitride based semiconductor layer 19 are oriented in the normal vector VN (Z-axis direction). Are arranged in order.

  The support base 13 is made of GaN. Since GaN is a gallium nitride semiconductor that is a binary compound, it can provide good crystal quality and a stable substrate main surface. In addition to GaN, the support base 13 can be made of, for example, a hexagonal nitride semiconductor such as GaN, InGaN, or AlGaN.

  The n-type gallium nitride semiconductor layer 15 is made of an n-type gallium nitride semiconductor. The n-type dopant of the n-type gallium nitride based semiconductor layer 15 is, for example, silicon (Si). The n-type gallium nitride based semiconductor layer 15 is provided on the support base 13. The n-type GaN layer 15a of the n-type gallium nitride based semiconductor layer 15 is in contact with the support base 13 through the main surface 13a. The n-type GaN layer 15a is made of n-type GaN. The n-type cladding layer 15b is in contact with the n-type GaN layer 15a. The n-type cladding layer 15b is made of an n-type nitride-based semiconductor such as n-type InAlGaN, for example. The n-type guide layer 15c is in contact with the n-type cladding layer 15b. The n-type guide layer 15c can be made of an n-type gallium nitride semiconductor such as n-type GaN or n-type InGaN, for example.

The n-type guide layer 15c can be composed of two layers. Of these two layers, the first layer is an n-type GaN guide layer 15d made of n-type GaN, and the second layer is an n-type InGaN guide layer 15e made of n-type InGaN. The n-type GaN guide layer 15d is in contact with the n-type cladding layer 15b, the n-type InGaN guide layer 15e is provided on the n-type GaN guide layer 15d, and the n-type InGaN guide layer 15e is the n-type GaN guide layer 15d. Is in contact with A surface 15f (an interface between the n-type GaN guide layer 15d and the n-type InGaN guide layer 15e) of the n-type InGaN guide layer 15e on the support base 13 side inside the n-type guide layer 15c includes misfit dislocations. This misfit dislocation is orthogonal to the c-axis and the reference axis shared by the reference surface (the surface extending along the a-plane) and the surface 15f that is orthogonal to the surface 15f of the n-type InGaN guide layer 15e and includes the c-axis. It extends in the direction (along the a axis). The density of this misfit dislocation is in the range of 5 × 10 ³ cm ^{−1 to} 1 × 10 ⁵ cm ⁻¹ . The indium composition (third indium composition) of the n-type InGaN guide layer 15e is in the range of 0.03 to 0.05.

  The light emitting layer 17 has a multiple quantum well structure. The light emitting layer 17 includes indium and can be made of a gallium nitride based semiconductor such as InGaN. The well layer 17a is in contact with the n-type InGaN guide layer 15e of the n-type guide layer 15c. The well layer 17a contains indium and can be made of a gallium nitride based semiconductor such as InGaN. The barrier layer 17b is in contact with the well layer 17a. The barrier layer 17b is provided between the well layer 17a and the well layer 17c. The barrier layer 17b contains indium and can be made of a gallium nitride based semiconductor such as InGaN. The well layer 17c is in contact with the barrier layer 17b. The well layer 17c contains indium and can be made of a gallium nitride based semiconductor such as InGaN. The band gap of the well layer 17a and the band gap of the well layer 17c are both smaller than the band gap of the barrier layer 17b. The light emitting layer 17 can include three or more well layers and two or more barrier layers.

  The indium composition (first indium composition) of the well layer 17a is in the range of 0.15 to 0.50. The indium composition of the well layer 17a is, for example, about 0.30, but can be either about 0.25 or about 0.35. The film thickness of the well layer 17a is, for example, about 2.5 nm.

  The indium composition (second indium composition) of the barrier layer 17b is in the range of 0.01 to 0.10, but can be in the range of 0.01 to 0.06. The thickness of the barrier layer 17b is equal to or less than the value obtained by adding 0.5 nm to the thickness of the well layer 17a or the well layer 17c, and 0.5 nm is subtracted from the thickness of the well layer 17a or the well layer 17c. Can be greater than or equal to the value. The film thickness of the barrier layer 17b is specifically in the range of 1.0 nm to 4.5 nm, but the upper limit value of the film thickness of the barrier layer 17b is 4.0 nm, 3.5 nm, 3.0 nm, Any of these values can also be used. For example, the film thickness of the barrier layer 17b can be in the range of 1.0 nm to 3.5 nm. The barrier layer 17b can also have an indium composition that increases from the p-type gallium nitride based semiconductor layer 19 side toward the n-type gallium nitride based semiconductor layer 15 side.

  The indium composition (first indium composition) of the well layer 17c is in the range of 0.15 to 0.50. The indium composition of the well layer 17c is, for example, about 0.30, but can be either about 0.25 or about 0.35. The film thickness of the well layer 17c is, for example, about 2.5 nm.

  The emission wavelength of the light emitting layer 17 is not less than 480 nm and not more than 600 nm because the indium composition of the well layer (well layer 17a, well layer 17c) of the light emitting layer 17 is in the range of 0.15 to 0.50. In addition, the light emission wavelength of the light emitting layer 17 can also be 500 nm or more and 570 nm or less. In the case of an emission wavelength of 500 nm or more and 570 nm or less, the indium composition of the well layer (well layer 17a, well layer 17c) of the light emitting layer 17 is in the range of 0.24 to 0.40.

The p-type gallium nitride semiconductor layer 19 is made of a p-type gallium nitride semiconductor.
The p-type dopant of the p-type gallium nitride based semiconductor layer 19 is, for example, magnesium (Mg). The p-type gallium nitride based semiconductor layer 19 is in contact with the well layer 17 c of the light emitting layer 17. The p-type guide layer 19 a is provided on the light emitting layer 17 and is in contact with the light emitting layer 17. The p-type guide layer 19a includes one or more p-type gallium nitride based semiconductor layers. The p-type guide layer 19a includes an undoped (ud) InGaN layer. This undoped InGaN layer is in contact with the well layer 17c. The p-type guide layer 19a includes a p-type InGaN layer provided on the undoped InGaN layer. This p-type InGaN layer is in contact with the undoped InGaN layer. The p-type guide layer 19a includes a p-type GaN layer provided on the p-type InGaN layer. The p-type GaN layer is in contact with the p-type InGaN layer.

  The p-type cladding layer 19b can be made of, for example, p-type InAlGaN. The p-type cladding layer 19b is provided on the p-type GaN layer included in the p-type guide layer 19a, and is in contact with the p-type GaN layer.

  The p-type contact layer 19c is provided on the p-type cladding layer 19b and is in contact with the p-type cladding layer 19b. The p-type contact layer 19c can be made of, for example, p-type GaN.

  When the light emitting element 11 is an LED, as shown in FIG. 1, a p-side electrode 21 and a p-side electrode 21 are provided on the p-type contact layer 19c. The p-side electrode 21 can be made of, for example, Pd. The n-side electrode 25 is provided on the back surface 13 b of the support base 13. The n-side electrode 25 covers the back surface 13b. The n-side electrode 25 is in contact with the support base 13 through the back surface 13b.

When the light emitting element 11 is an LD, the p-type gallium nitride based semiconductor layer 19 includes a ridge-shaped portion, and the p-side electrode 21 includes, for example, an electrode made of Ni / Au and a pad electrode made of Ti / Au. The n-side electrode 25 can include, for example, an electrode made of Ti / Al and a pad electrode made of Ti / Au. A dielectric multilayer film is provided on the end face of the resonator. This dielectric multilayer film can be made of, for example, SiO ₂ / TiO ₂ .

  In the light emitting element 11 having the above-described configuration, the main surface 13a of the support base 13 is a semipolar surface in any of a range of 50 degrees to 80 degrees and a range of 130 degrees to 170 degrees. The light emitting element 11 has a light emitting layer 17 having a multiple quantum well structure provided on the main surface 13a. The direction of piezo polarization generated in the light emitting layer 17 having the multiple quantum well structure provided on such a semipolar plane is opposite to the direction of piezo polarization generated in the well layer 17a and the well layer 17c provided on the c plane. Therefore, in the band structure of the multiple quantum well structure provided on the semipolar plane, a strain different from that on the c plane is generated. Due to the distortion of the band structure, the electron injection efficiency in the light emitting layer 17 is lowered. Referring to the band diagram shown in FIG. 2, the barrier V2 (p-side) of the well layer 17a on the p-type gallium nitride based semiconductor layer 19 side (p side) due to distortion of the band structure due to piezo-polarization is used as a reference. Is higher than the barrier V1 (value based on the quantum level Q1) on the n-type gallium nitride semiconductor layer 15 side (n-side) of the well layer 17a, so that the n-type gallium nitride semiconductor layer It can be seen that the electrons E from 15 move over the energy barrier of the barrier layer 17b and do not easily move from the well layer 17a to the well layer 17c, and the injection efficiency in the light-emitting layer 17 decreases. However, since the thickness of the barrier layer 17b of the light-emitting element 11 is relatively thin and is in the range of 1.0 nm to 4.5 nm, injection of electrons into the light-emitting layer 17 even if the band structure is distorted. Efficiency can be improved. Referring to the band diagram shown in FIG. 2, the thickness L of the barrier layer 17b is in the range of 1.0 nm to 4.5 nm and is relatively thin. The electrons E easily move from the well layer 17a over the energy barrier of the barrier layer 17b to the well layer 17c, and a reduction in injection efficiency in the light emitting layer 17 can be suppressed.

  Furthermore, the two well layers (the well layer 17a and the well layer 17c) of the light emitting element 11 have a relatively high indium composition in the range of 0.15 to 0.50. As described above, the well layer 17a and the well layer 17c having a relatively high indium composition have a relatively thick film thickness in order to recover the crystallinity that is deteriorated by the growth of the well layer during the growth of the barrier layer 17b. Although the barrier layer 17b is considered desirable, the light-emitting layer 17 of the light-emitting element 11 is provided on a semipolar plane in an angular range in which indium incorporation and growth modes are suitable for InGaN growth. Even in the barrier layer 17b having a relatively thin film thickness in the range of 0.0 nm to 4.5 nm, the crystallinity can be adjusted, and the crystal quality of the light emitting layer 17 can be maintained.

  If the thickness of the barrier layer 17b is less than 1.0 nm, the crystallinity of the barrier layer 17b may not be recovered during crystal growth, and the crystallinity of the light emitting layer 17 may be reduced. In addition, referring to FIG. 2, even when holes H are distorted in the band structure due to piezo polarization, the band offset is relatively small, so the influence on the injection efficiency is relatively small. .

  The value L of the thickness of the barrier layer 17b is equal to or less than the value obtained by adding 0.50 nm to the thickness of the well layer 17a or the well layer 17c, and is 0 from the thickness of the well layer 17a or the well layer 17c. It can be greater than or equal to the value minus 50 nm. In this case, the thickness of the barrier layer 17b is approximately the same as the thickness of the well layer 17a or the well layer 17c. Therefore, even if the band structure of the light emitting layer 17 is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, electrons move over the energy barrier of the barrier layer 17b and move from the well layer 17a to the adjacent well layer 17b. Since it becomes easy, the reduction of the electron injection efficiency in the light emitting layer 17 is suppressed.

  The barrier layer 17b can be made of InGaN, and the barrier layer 17b can have an indium composition in the range of 0.01 to 0.1. In this case, since the indium composition of the barrier layer 17b is in the range of 0.01 to 0.10, the band gap of the barrier layer 17b is reduced. Therefore, even if the band structure of the light emitting layer 17 is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the band gap of the barrier layer 17b is changed so as to relieve the distortion, whereby electrons are transferred to the barrier layer. Since it becomes easy to get over the energy barrier of 17b, reduction of the electron injection efficiency in the light emitting layer 17 is suppressed. When the indium composition of the barrier layer 17b exceeds 0.10, the crystallinity of the barrier layer 17b and the light emitting layer 17 may be lowered.

The n-type guide layer 15c of the n-type gallium nitride based semiconductor layer 15 has an n-type InGaN guide layer 15e, and the light emitting layer 17 can be provided on the n-type InGaN guide layer 15e. Misfit dislocations exist on the surface 15f of the n-type InGaN guide layer 15e on the support base 13 side inside the n-type gallium nitride based semiconductor layer 15, and this misfit dislocation is orthogonal to the surface 15f of the n-type InGaN guide layer 15e. The reference plane including the c-axis of the hexagonal nitride semiconductor of the support base 13 and the surface 15f extend in a direction orthogonal to the c-axis and the misfit dislocation density is 5 It can exist in the range of ^x10 < ³ > cm < ^-1 > or more and 1 * 10 < ⁵ > cm < ^-1 > or less. In this case, an n-type InGaN guide layer 15e is provided between the support base 13 and the light emitting layer 17, and the surface 15f on the support base 13 side of the n-type InGaN guide layer 15e has a relatively high density. Misfit dislocations have occurred. Therefore, since the strain on the support base 13 is relaxed by the n-type InGaN guide layer 15e, the strain included in the light emitting layer 17 is also reduced. Therefore, even if the band structure of the light emitting layer 17 is distorted by piezo polarization in the direction opposite to that on the c-plane, the piezo polarization is reduced, so that the reduction of the electron injection efficiency in the light emitting layer 17 is suppressed. When the density of misfit dislocations exceeds 1 × 10 ⁵ cm ⁻¹ , the bad influence of defects may also affect the light emitting layer 17 and cause a decrease in light emission efficiency.

  The n-type InGaN guide layer 15e can have an indium composition in the range of 0.03 to 0.05. Since the indium composition of the n-type InGaN guide layer 15e provided between the support base 13 and the light emitting layer 17 and relaxing the strain on the support base 13 is in the range of 0.03 to 0.05, the support base 13 The upper distortion is sufficiently relaxed. Therefore, even if the band structure of the light emitting layer 17 is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the reduction of the electron injection efficiency in the light emitting layer 17 is effectively suppressed. Note that when the indium composition of the n-type InGaN guide layer 15e exceeds 0.05, the density of misfit dislocations becomes too high, and the light emission efficiency may be reduced.

  In addition, the indium composition of the barrier layer 17b can increase from the p-type gallium nitride semiconductor layer 19 side toward the n-type gallium nitride semiconductor layer 15 side. Since the indium composition of the light emitting layer 17 increases from the p-type gallium nitride semiconductor layer 19 side toward the n-type gallium nitride semiconductor layer 15 side, indium on the n-type gallium nitride semiconductor layer 15 side is increased. Compared to the case where the composition is the same as the indium composition on the p-type gallium nitride semiconductor layer 19 side, the band gap of the barrier layer 17b is reduced on the n-type gallium nitride semiconductor layer 15 side. Therefore, even if the band structure of the light emitting layer 17 is distorted by piezoelectric polarization in the direction opposite to that on the c-plane, the band gap of the barrier layer 17 is changed so as to relieve the distortion, whereby electrons are transferred to the barrier layer. Since it becomes easy to get over the energy barrier of 17b, reduction of the electron injection efficiency in the light emitting layer 17 is suppressed.

  In addition, the inclination angle α of the main surface 13a with respect to the c-plane can be in the range of 63 degrees to 80 degrees. When the inclination angle α of the main surface 13a is in the range of not less than 63 degrees and not more than 80 degrees, since the indium uptake and growth mode are particularly suitable for the growth of InGaN, the crystallinity is recovered even in a thin barrier layer. And a decrease in luminous efficiency can be suppressed. As a result, it is possible to provide excellent electron injection efficiency without causing a decrease in light emission efficiency.

  The indium composition of the well layer 17a and the well layer 17c can be in the range of 0.24 to 0.40. Since the indium compositions of the well layer 17a and the well layer 17c are in the range of 0.24 to 0.40, the light emitting layer 17 emits light having an emission wavelength of 500 nm to 570 nm. As described above, when the indium composition of the light emitting layer 17 is relatively large, the band offset between the well layer 17a and the well layer 17c and the barrier layer 17b is relatively large, so that the influence of the distortion of the band structure due to piezoelectric polarization is significant. However, even in such a case, the reduction of the electron injection efficiency in the light emitting layer 17 can be sufficiently suppressed.

  The indium composition of the barrier layer 17b can be in the range of 0.01 to 0.06. Since the indium composition of the barrier layer 17b is in the range of 0.01 to 0.06, a decrease in crystallinity is sufficiently suppressed.

  The film thickness of the barrier layer 17b can be in the range of 1.0 nm to 3.5 nm. Since the film thickness of the barrier layer 17b is in the range of 1.0 nm to 3.5 nm, it is relatively thin. Therefore, even if the band structure is distorted, the electrons easily move over the energy barrier of the barrier layer 17b and move from the well layer 17a to the adjacent well layer 17b, so that the electron injection efficiency in the light emitting layer 17 is reduced. It can be suppressed sufficiently.

  As shown in FIG. 1B, the epitaxial substrate EP1 of the light emitting element 11 includes a semiconductor layer (semiconductor film) corresponding to each of the semiconductor layers of the light emitting element 11, and the corresponding semiconductor layer includes the above-described semiconductor layers. The description for the light emitting element 11 is applicable. The surface roughness of the epitaxial substrate EP1 has, for example, an arithmetic average roughness of 1 nm or less in a 10 μm square range.

  Next, with reference to FIGS. 3 and 4, a method for manufacturing the light-emitting element 11 according to the embodiment will be described. FIG. 3 is a drawing showing main steps of the method for manufacturing the light emitting device 11 according to the embodiment. FIG. 4 is a drawing schematically showing products in main steps of the method for manufacturing the light emitting element 11 according to the embodiment. The epitaxial substrate EP shown in FIG. 4 is a substrate product in which a p-side electrode, an n-side electrode, and the like are formed with respect to the epitaxial substrate EP1 shown in part (b) of FIG. An epitaxial substrate EP is further produced from the epitaxial substrate EP1, and the light emitting element 11 is separated from the epitaxial substrate EP.

According to the process flow shown in FIG. 3, the epitaxial substrate EP having the structure of the light-emitting element 11 and the light-emitting element 11 were manufactured by metal organic vapor phase epitaxy. As raw materials for epitaxial growth, trimethylgallium (TMG), trimethylindium (TMI), trimethylaluminum (TMA), ammonia (NH ₃ ), silane (SiH ₄ ), and biscyclopentadienyl magnesium (Cp ₂ Mg) Is used.

  In step S1, a substrate 13_1 (corresponding to the support base 13) having a main surface 13a_1 (corresponding to the main surface 13a) made of a gallium nitride semiconductor is prepared. The substrate 13_1 is shown in part (a) of FIG. The substrate 13_1 has a back surface 13b_1 (corresponding to the back surface 13b). The back surface 13b_1 is on the opposite side of the main surface 13a_1. Main surface 13a_1 is mirror-polished (step S1).

Next, epitaxial growth is performed on the substrate 13_1 under the following conditions. First, in step S3, the substrate 13_1 is installed in the reaction furnace 10. In the reaction furnace 10, a quartz jig such as a quartz flow channel is disposed. If necessary, heat treatment is performed for about 10 minutes while supplying a heat treatment gas containing NH ₃ and H ₂ to the reaction furnace 10 at a temperature of about 1050 degrees Celsius and a pressure in the furnace of about 27 kPa. By this heat treatment, surface modification occurs on the main surface 13a_1 and the like (step S3).

After this heat treatment, in step S5, a gallium nitride semiconductor layer is grown on the substrate 13_1 to form an epitaxial substrate EP and an epitaxial substrate EP1. The atmospheric gas includes a carrier gas and a subflow gas. The atmospheric gas can include, for example, at least one of N ₂ and H ₂ . Step S5 includes the following step S51, step S52, and step S53.

In step S51, the source gas and the ambient gas are supplied to the reaction furnace 10, and the n-type gallium nitride semiconductor layer 15_1 (corresponding to the n-type gallium nitride semiconductor layer 15) is epitaxially grown and formed. The n-type gallium nitride based semiconductor layer 15_1 is shown in FIG. The source gas used in step S51 includes a source material for a group III constituent element and a group V constituent element, and an n-type dopant. First, an n-type GaN layer 15a_1 (corresponding to the n-type GaN layer 15a) is grown on the main surface 13a_1, and then an n-type GaN-based semiconductor layer 15b_1 (corresponding to the n-type cladding layer 15b) is grown on the n-type GaN layer 15a_1. Then, an n-type GaN-based semiconductor layer 15c_1 (corresponding to the n-type guide layer 15c) is grown on the n-type GaN-based semiconductor layer 15b_1. The inclination angle of the surface 15_1a of the n-type gallium nitride semiconductor layer 15_1 (the surface of the n-type GaN semiconductor layer 15c_1) corresponds to the inclination angle (corresponding to the inclination angle α) of the main surface 13a_1 (the process S51 above). ). The n-type GaN-based semiconductor layer 15c_1 can be composed of two layers (corresponding to the n-type GaN guide layer 15d and the n-type InGaN guide layer 15e, respectively). Of the two layers constituting the n-type GaN-based semiconductor layer 15c_1, the surface on the substrate 13_1 side of the layer corresponding to the n-type InGaN guide layer 15e (the interface between the two layers constituting the n-type GaN-based semiconductor layer 15c_1) is Including misfit dislocations. This misfit dislocation forms the n-type GaN-based semiconductor layer 15c_1 with a reference plane (a surface extending along the a-plane) that is perpendicular to the interface between the two layers constituting the n-type GaN-based semiconductor layer 15c_1 and includes the c-axis. It extends in the direction perpendicular to the reference axis shared by the interface between the two layers and the c-axis (along the a-axis). The density of this misfit dislocation is in the range of 5 × 10 ³ cm ^{−1 to} 1 × 10 ⁵ cm ⁻¹ . Of the two layers constituting the n-type GaN-based semiconductor layer 15c_1, the indium composition of the layer corresponding to the n-type InGaN guide layer 15e is in the range of 0.03 to 0.05.

  In step S52, the source gas and the atmospheric gas are supplied to the reactor 10, and the GaN-based quantum well layer 17_1 (corresponding to the light emitting layer 17) is epitaxially grown and formed. The GaN-based quantum well layer 17_1 is shown in the part (b) of FIG. The source gas used in step S52 includes source materials for the group III constituent element and the group V constituent element. Step S52 includes the following step S52a, step S52b, and step 52c. In step S52a, a GaN well layer 17a_1 (corresponding to the well layer 17a) is grown and formed on the n-type GaN semiconductor layer 15c_1. In step S52b, a GaN-based barrier layer 17b_1 (corresponding to the barrier layer 17b) is grown and formed on the GaN-based well layer 17a_1. In step S52c, the GaN-based well layer 17c_1 (corresponding to the well layer 17c) is grown and formed on the GaN-based barrier layer 17b_1 (step S52 above).

  Next, in step S53, the source gas and the atmospheric gas are supplied to the reactor 10, and the p-type gallium nitride semiconductor layer 19_1 (corresponding to the p-type gallium nitride semiconductor layer 19) is epitaxially grown and formed. . The p-type gallium nitride based semiconductor layer 19_1 is shown in the part (c) of FIG. The source gas used in step S53 includes a source for a group III constituent element and a group V constituent element, and a p-type dopant. First, a p-type GaN-based semiconductor layer 19a_1 (corresponding to the p-type guide layer 19a) is grown on the GaN-based well layer 17c_1, and then a p-type GaN-based semiconductor layer 19b_1 (corresponding to the p-type cladding layer 19b) is p. A p-type GaN-based semiconductor layer 19c_1 (corresponding to the p-type contact layer 19c) is grown on the p-type GaN-based semiconductor layer 19b_1 (step S53). By performing all of the above steps S51, S52, and S53, the epitaxial substrate EP1 is formed, and the step S5 is completed.

  In step S7 and step S9, an n-side electrode and a p-side electrode are formed. First, step S7 and step S8 in the case of manufacturing the LED light emitting element 11 will be described. In step S7, an n-side electrode and a p-side electrode are formed on the epitaxial substrate EP1, thereby forming the epitaxial substrate EP. First, an insulating film (corresponding to the insulating film 23) is formed on the surface 19_1a of the p-type gallium nitride based semiconductor layer 19_1. Next, an opening (corresponding to the opening 23a) is provided in the insulating film by photolithography and dry etching to expose the surface 19_1a of the p-type GaN-based semiconductor layer 19c_1. Next, a p-side electrode (corresponding to the p-side electrode 21) is formed on the insulating film by vacuum deposition. Next, after the back surface 13b_1 of the substrate 13_1 is polished, an n-side electrode (corresponding to the n-side electrode 25) is formed on the back surface 13b_1 by vacuum deposition. The n-side electrode covers the back surface 13b_1 after polishing. Thus, the epitaxial substrate EP is formed (step S7). In step S9, the light emitting element 11 is separated from the epitaxial substrate EP (step S9).

Next, step S7 and step S9 in the case of manufacturing the LD light emitting element 11 will be described. In step S7, first, a ridge-shaped portion is formed in the p-type gallium nitride based semiconductor layer 19_1 by dry etching. Next, an SiO ₂ insulating film (corresponding to the insulating film 23) is formed on the side surface of the ridge-shaped portion, and the upper surface of the ridge-shaped portion is exposed. Next, a Ni / Au electrode is formed on the upper surface of the exposed ridge-shaped portion by vacuum deposition, and a Ti / Au pad electrode is further formed on the insulating film and the Ni / Au electrode by vacuum deposition. The Ti / Au pad electrode covers the insulating film and the Ni / Au electrode. The Ni / Au electrode and the Ti / Au pad electrode constitute a p-side electrode (corresponding to the p-side electrode 21). Next, after the back surface 13b_1 of the substrate 13_1 is polished, for example, until the thickness of the epitaxial substrate EP1 is about 80 μm, a Ti / Al electrode is formed on the back surface 13b_1 by vacuum deposition, and this Ti / Al electrode A Ti / Au pad electrode is formed thereon by vacuum deposition. The Ti / Al electrode and the Ti / Au pad electrode constitute an n-side electrode (corresponding to the n-side electrode 25). The n-side electrode covers the back surface 13b_1 after polishing (step S7 in the case of LD). In step S9, the laser bar is separated from the epitaxial substrate EP, and a reflective film made of a dielectric multilayer film (for example, SiO ₂ / TiO ₂ ) is formed on the cavity end face of the laser bar, and then separated into the light emitting element 11. (Step S9 in the case of LD).

(Example)
Next, examples of the light emitting element 11 according to the embodiment will be described. FIG. 5 is a diagram illustrating a configuration of an example of the light emitting element 11. The configuration shown in FIG. 5 corresponds to the configuration of epitaxial substrate EP1. First, a GaN substrate (corresponding to the substrate 13_1 and the support base 13) having a semipolar principal surface (corresponding to the principal surface 13a_1 and the principal surface 13a) was prepared. The main surface of the GaN substrate extended along a (20-21) plane inclined by 75 degrees from the c-plane toward the m-axis of the GaN substrate. Then, the GaN substrate is held for about 10 minutes at about 1050 degrees Celsius in an atmosphere of NH ₃ and H ₂ to perform pretreatment (thermal cleaning).

Next, after thermal cleaning, an n-GaN layer (corresponding to the n-type GaN layer 15a_1 and the n-type GaN layer 15a) was epitaxially grown at about 1050 degrees Celsius. Next, the temperature is lowered to about 840 degrees Celsius, and an n-In _0.03 Al _0.14 Ga _0.83 N layer having a thickness of about 2 μm (corresponding to the n-type GaN-based semiconductor layer 15b_1 and the n-type cladding layer 15b). ) Grown epitaxially. Next, an n-GaN layer (corresponding to the n-type GaN guide layer 15d) having a thickness of about 200 nm was epitaxially grown at a temperature of about 840 degrees Celsius. Then, it is grown under the temperature of about 840 degrees _{Celsius, n-In J Ga 1-} J N layer having a thickness of about 150nm (corresponding to the n-type InGaN guide layer 15e) epitaxially.

Next, the temperature was lowered to about 790 degrees Celsius, and an In _0.30 Ga _0.70 N layer (corresponding to the GaN-based well layer 17a_1 and the well layer 17a) having a thickness of about 2.5 nm was epitaxially grown. Next, the temperature was raised to about 840 degrees Celsius, and an In _K Ga _1-K N layer (corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b) having a thickness of L (nm) was grown epitaxially. Next, the temperature was lowered to about 790 degrees Celsius, and an In _0.30 Ga _0.70 N layer (corresponding to the GaN-based well layer 17c_1 and the well layer 17c) having a thickness of about 2.5 nm was grown epitaxially.

Next, the temperature is raised to about 840 degrees Celsius, and an undoped In _0.02 Ga _0.98 N layer having a thickness of about 50 nm is epitaxially grown. Thereafter, p-In _{0 having a} thickness of about 100 nm is grown. _{A 0.02} Ga _0.98 N layer was grown epitaxially, and then a p-GaN layer with a thickness of about 200 nm was grown epitaxially. The undoped In _0.02 Ga _0.98 N layer having a thickness of about 50 nm, the p-In _0.02 Ga _0.98 N layer having a thickness of about 100 nm, and the p-GaN having a thickness of about 200 nm. The region composed of the layers corresponds to the p-type GaN-based semiconductor layer 19a_1 and the p-type guide layer 19a. Next, under a temperature of about 840 degrees Celsius, a p-In _0.02 Al _0.07 Ga _0.91 N layer (p-type GaN-based semiconductor layer 19b_1 and p-type cladding layer 19b having a thickness of about 400 nm is formed. Grown epitaxially. Next, the temperature was raised to about 1000 degrees Celsius, and a p-GaN layer (corresponding to the p-type GaN-based semiconductor layer 19c_1 and the p-type contact layer 19c) having a thickness of about 50 nm was epitaxially grown.

Hereinafter, the indium composition J of the n-In _J Ga _1-J N layer corresponding to the n-type InGaN guide layer 15e is 0.02, and the In _K Ga _1-K corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b. Light emission produced when the indium composition K of the N layer is 0.02 and the film thickness value L of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is 2.5 nm. The element 11 is referred to as Example 1.

The indium composition J of the n-In _J Ga _1-J N layer corresponding to the n-type InGaN guide layer 15e is 0.02, and the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b The indium composition K is 0.04, and the light emitting element 11 manufactured when the value L of the film thickness of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is 2.5 nm. Is taken as Example 2. The difference between the second embodiment and the first embodiment is only the value of the indium composition K of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b.

The indium composition J of the n-In _J Ga _1-J N layer corresponding to the n-type InGaN guide layer 15e is 0.02, and the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b The indium composition K is a value that continuously changes (increases) from 0.02 to 0.04 from the p side to the n side, and In _K Ga corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b. _The light emitting element 11 manufactured when the value L of the film thickness of the _1-KN layer is 2.5 nm is referred to as Example 3. The difference between Example 3 and Example 1 is only the value of the indium composition K of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b.

The indium composition J of the n-In _J Ga _1-J N layer corresponding to the n-type InGaN guide layer 15e is 0.04, and the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b The indium composition K is 0.02, and the light-emitting element 11 manufactured when the value L of the thickness of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is 2.5 nm. This is referred to as Example 4. The difference between Example 4 and Example 1 is only the value of the indium composition J of the n-In _J Ga _1-J N layer corresponding to the n-type InGaN guide layer 15e.

Further, the light-emitting element manufactured when the value L of the thickness of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is set to 0.5 nm is compared with Example 1. Example 1. A light-emitting element manufactured when the thickness value L of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is set to 5 nm as compared with Example 1 is referred to as Comparative Example 2. . A light emitting element manufactured when the value L of the thickness of the In _K Ga _1-K N layer corresponding to the GaN-based barrier layer 17b_1 and the barrier layer 17b is set to 10 nm as compared with Example 1 is referred to as Comparative Example 3. .

  With reference to FIG. 6, consideration is given to the first embodiment. FIG. 6 is a diagram showing the measurement results of the PL emission wavelength for the examples and comparative examples. In the figure, reference symbol G1a is a result for Example 1, reference symbol G1b is a result for Comparative Example 1, reference symbol G1c is a result for Comparative Example 2, and reference symbol G1d is a Comparative Example. This is the result for 3. Referring to FIG. 6, Example 1 and Comparative Examples 1 to 3 all have the same indium composition in the well layer, but the PL emission wavelength of Example 1 is significantly larger than that of Comparative Examples 1 to 3. Became shorter. As the cause, the following can be considered. When the main surface of the support substrate corresponds to a semipolar surface such as the (20-21) surface, since the piezoelectric polarization of the well layer is negative, the band structure of the light emitting layer is distorted as shown in FIG. The wave function of electrons E is biased toward the n side of the well layer, and the wave function of holes is biased toward the p side of the well layer. However, if the thickness of the barrier layer provided between two adjacent well layers is relatively thin as in the case of Example 1, the distance between the two adjacent well layers on both sides of the barrier layer is relatively small. In addition, the wave functions of the first and second layers are overlapped, and electrons and holes are combined in the same well layer to emit light, and the electrons in the well layer on one side of the barrier layer and the other side through the barrier layer. It is considered that a significantly shorter PL emission wavelength was detected because a phenomenon that light emission occurs due to bonding with holes in the well layer also occurred. On the other hand, as indicated by reference numeral G1b in the figure, when the barrier layer is thinner than 2.5 nm as in Example 1 and 0.5 nm as in Comparative Example 1, the film of the well layer Since it is almost equivalent to a thick single quantum well structure, the PL emission wavelength is relatively long. Although not shown, PL emission intensity was also measured for the examples and comparative examples. Regarding the measurement results for PL emission intensity, in Example 1 and Comparative Examples 2 and 3, that is, when the thickness of the barrier layer is 2.5 nm or more and 10 nm or less, there is a significant difference in PL emission intensity. Although not shown, the PL emission intensity in the case of Comparative Example 1, that is, the barrier layer thickness of 0.5 nm is about 60% of the PL emission intensity in the case of Example 1 and Comparative Examples 2 and 3. It was low. As a result of measurement on the PL emission intensity for Comparative Example 1, a new well layer is grown on the barrier layer while the barrier layer is relatively thin and the crystallinity is not sufficiently recovered. For this reason, it is considered that the overall crystal quality of the light emitting layer is deteriorated.

  Next, Example 1 will be discussed with reference to FIGS. FIG. 7 is a diagram showing the measurement result of the current density dependence of the emission wavelength for Example 1 and Comparative Example 2, and FIG. 8 is the measurement result of the current density dependence of the light emission output for Example 1 and Comparative Example 2. FIG. 9 is a diagram showing the measurement results of the current density dependence of the half-value width of the emission wavelength for Example 1 and Comparative Example 2. FIGS. 10 and 11 show Example 1 and Comparative Example. FIG. 6 is a diagram showing measurement results of IV characteristics for 2; FIG. 12 is a diagram showing the measurement results of IV characteristics for Example 2, Example 3 and Comparative Example 4 below. FIG. 11 is a diagram in which the vertical axis (current density) in FIG. 10 is displayed in logarithm, and FIG. 13 is a diagram in which the vertical axis (current density) in FIG. 12 is displayed in logarithm. The measurement results shown in FIGS. 7 to 13 show that a Pd electrode having a size of 100 μm × 100 μm is used for the p-side electrode, and a Ti / Al / Ti / Au electrode provided on the entire back surface is used for the n-side electrode. The obtained LEDs were obtained by Example 1, Example 2, Example 3, Comparative Example 2 and Comparative Example 4. The results shown in FIGS. 7 to 9 were obtained by applying a pulse current to Example 1 and Comparative Example 2. The results shown in FIGS. 10 to 13 were obtained by applying a direct current to Example 1, Example 2, Example 3, Comparative Example 2 and Comparative Example 4. The light-emitting element of Comparative Example 4 was an LED in which the light-emitting layer having a multiple quantum well structure in the structure of Example 1 was a light-emitting layer having a single quantum well structure.

  In FIG. 7, reference sign G2a in the figure is the result for Example 1, and reference sign G2b in the figure is the result for Comparative Example 2. When the current density was small, the emission wavelength of Example 1 was shorter than that of Comparative Example 2, and coincided with the measurement results shown in FIG. 6 for the PL emission wavelength. However, at the stage where the current density was increased and relatively high current injection was performed, the wavelength difference between the emission wavelength of Example 1 and the emission wavelength of Comparative Example 2 was reduced and became substantially equal. This is presumably because piezo-polarization was weakened with current injection, and also in Example 1, the transition probability between adjacent well layers was reduced by screening. In addition, when the film thickness of the barrier layer is about 2.5 nm, if the light emitting element is formed on the c-plane, the light emission efficiency is lowered, but the InGaN is formed on the semipolar plane such as the (20-21) plane. In the case of Example 1 where the layers are grown, the growth of the InGaN layer tends to be uniform and of high quality, so that it is considered that the light emission efficiency can be maintained even if the barrier layer is extremely thin.

  In FIG. 8, the reference sign G3a in the figure is the result for Example 1, and the reference sign G3b in the figure is the result for Comparative Example 2. According to the measurement results shown in FIG. 8, the light output of Example 1 was higher than that of Comparative Example 2. As described above, the PL emission intensity of Example 1 and Comparative Example 2 were the same, so there should be no significant difference in the quality of the well layer. Therefore, Example 1 and Comparative Example as shown in FIG. It is considered that the cause of the difference in the light emission output generated between the first embodiment and the second embodiment is that the carrier injection efficiency of Example 1 is superior to that of Comparative Example 2.

  In FIG. 9, reference numeral G4a in the figure is the result for Example 1, and reference numeral G4b in the figure is the result for Comparative Example 2. According to the measurement results shown in FIG. 8, the half width (FWHM) of Example 1 is narrower than that of Comparative Example 2. In particular, the difference in half width between Example 1 and Comparative Example 2 is a comparison of the current density. In particular, the electron injection was remarkable at a relatively small stage. In the case of Comparative Example 2, it is considered that the half-value width is widened because the carrier injection efficiency is poor and the carrier density between the wells is not uniform. When the current density is increased, the non-uniformity of the carrier density is somewhat relaxed, so that the difference in the half width between Example 1 and Comparative Example 2 is reduced, but it has not reached the same level.

  In FIG. 10, reference sign G5a in the figure is the result for Example 1, and reference sign G5b in the figure is the result for Comparative Example 2. In FIG. 11, reference sign G6a in the figure is the result for Example 1, and reference sign G6b in the figure is the result for Comparative Example 2. Referring to FIG. 10, the rise in current density at which the diffusion current starts flowing in Example 1 is faster than that in Comparative Example 2, and this result also confirms that Example 1 is superior in carrier injection efficiency. . Referring to FIG. 11, the rising voltage of the current density at which the diffusion current begins to flow was 2.4 volts in the case of Example 1 and 2.6 volts in the case of Comparative Example 2.

According to the measurement results shown in FIGS. 7 to 11 above, the piezoelectric layer in the well layer is negative when the thickness of the barrier layer is relatively thin (for example, about 2.5 nm). It was also found that the electron injection efficiency in the light emitting layer can be improved. This phenomenon is also reflected in the fact that the emission wavelength of weak excitation becomes shorter (weak excitation corresponds to a current density of 0.05 kA / cm ² or less in the measurement result shown in FIG. 7). This phenomenon is also reflected in the fact that the rising voltage at which the diffusion current begins to flow is lowered. For example, the rising voltage can be set to 2.5 V or less. Note that, from the viewpoint of achieving both carrier injection efficiency and light emission efficiency, it is particularly preferable that the thickness of the well layer and the thickness of the barrier layer be approximately the same. That is, when the emission wavelength of weak excitation becomes short, a light emitting layer excellent in both carrier injection efficiency and light emission efficiency can be obtained.

  Next, with reference to FIG. 12 and FIG. 13, consideration is given to the second embodiment and the third embodiment. In FIG. 12, reference symbol G7a is the result for Example 2, reference symbol G7b is the result for Example 3, and reference symbol G7c is the result for Comparative Example 4. In FIG. 13, reference sign G8a in the figure is the result for Example 2, reference sign G8b in the figure is the result for Example 3, and reference sign G8c in the figure is the result for Comparative Example 4. The rising voltage at which the diffusion current begins to flow is 2.3 volts in Example 2, and 2.2 volts in Example 3, which is higher than Example 1 of 2.4 volts (see FIG. 10). The rising voltages of Example 2 and Example 3 were improved, and were substantially equivalent to 2.2 volts of Comparative Example 4 having a single quantum well structure. The results shown in FIG. 12 and the results shown in FIG. 13 show that the effect of lowering the band gap energy of the entire barrier layer in Example 2 and a band structure that alleviates band bending due to piezoelectric polarization in Example 3. This result suggests that the carrier injection efficiency is improved by the effect of reducing the height of the barrier against electrons formed by the composition gradient.

Moreover, about Example 1 and Example 4, cross-sectional TEM observation was performed and the misfit dislocation was measured. As a result of cross-sectional TEM observation, in Example 4, at the interface between the n-InGaN layer having a thickness of about 150 nm and the n-GaN layer having a thickness of about 200 nm included in the n-side guide layer, Misfit dislocations of about 2 × 10 ⁴ cm ⁻¹ were observed. On the other hand, no misfit dislocation was observed at the same location in Example 1. Thus, in Example 4, the indium composition of the n-side guide layer is made relatively high, so that an InGaN layer having a thickness of about 150 nm contained in the n-side guide layer is formed on the support base. On the other hand, it can be seen that the strain included in the light-emitting layer is relaxed because it is relaxed.

  Next, consideration is given to the fourth embodiment. Laser characteristics were evaluated by applying a pulse current to Example 1 in the case of LD and Example 4 in the case of LD. The Ith (current threshold value) of Example 1 was 85 mA, and the Ith of Example 4 was 60 mA. The value of Ith of Example 4 was lower than that of Example 1. In the case of Example 4, it is expected that the piezoelectric polarization of the well layer is slightly reduced by the relaxation of the n-InGaN layer having a thickness of about 150 nm included in the guide layer, and thus the carrier injection efficiency is improved. . It is considered that not only the light emission efficiency is improved but also the internal loss is reduced by uniformly injecting carriers into each well layer (if the carrier injection is uneven, Of these, the well layer with a low carrier density and not transparent works as a light absorption source.) Furthermore, in the case of Example 4, since the indium composition of the n-InGaN layer having a thickness of about 150 nm included in the guide layer is relatively high, the effect of optical confinement is relatively large. This is considered to be a cause of the fact that Ith was lower than that of Example 1.

In the case of Example 4, the measurement result showed that the PL emission wavelength was 527 nm, whereas the oscillation wavelength was 522 nm. In Example 1, the measurement result showed that the PL emission wavelength was 525 nm. In contrast, the oscillation wavelength was 517 nm. In the case of a light-emitting element provided on the main surface of a semipolar plane such as the (20-21) plane, the piezo polarization is not zero. And the difference from the oscillation wavelength is relatively small, at least in the case of Example 1 and Example 4, when the PL emission wavelength is measured, the barrier layer is relatively thin so that it is adjacent. This suggests that a mechanism for increasing the transition probability between the well layers (see the result shown in FIG. 6) is acting. When this mechanism acts, the carrier injection efficiency is improved. Thus, as actually confirmed by Example 1 and Example 4, when the light-emitting element has a structure with excellent carrier injection efficiency, the EL emission wavelength (EL at a current density of about 0.05 kA / cm ²⁾ : Electro Luminescence) or the blue shift amount from the peak value of the PL emission wavelength at the excitation density corresponding to the peak value of the EL oscillation wavelength to the oscillation wavelength was 15 nm or less.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

  DESCRIPTION OF SYMBOLS 10 ... Reaction furnace, 11 ... Light emitting element, 13 ... Support base | substrate, 13_1 ... Substrate, 13a, 13a_1 ... Main surface, 13b, 13b_1 ... Back surface, 15, 15_1 ... N-type gallium nitride semiconductor layer, 15_1a, 15f, 17_1a, 19_1a ... surface, 15a, 15a_1 ... n-type GaN layer, 15b ... n-type cladding layer, 15b_1 ... n-type GaN-based semiconductor layer, 15c ... n-type guide layer, 15c_1 ... n-type GaN-based semiconductor layer, 15d ... n-type GaN Guide layer, 15e ... n-type InGaN guide layer, 17 ... light emitting layer, 17_1 ... GaN-based quantum well layer, 17a, 17c ... well layer, 17a_1, 17c_1 ... GaN-based well layer, 17b ... barrier layer, 17b_1 ... GaN-based barrier Layer, 19, 19_1 ... p-type gallium nitride semiconductor layer, 19a ... p-type guide layer, 19a_1 ... p-type GaN semiconductor Layer, 19b ... p-type cladding layer, 19b_1 ... p-type GaN-based semiconductor layer, 19c ... p-type contact layer, 19c_1 ... p-type GaN-based semiconductor layer, 21 ... p-side electrode, 25 ... n-side electrode, AX ... normal axis CR, crystal coordinate system, EP, EP1, epitaxial substrate, S, coordinate system, SC, plane, VC, c-axis vector, VN, normal vector.

Claims (20)

A support base comprising a hexagonal nitride semiconductor and having a main surface inclined in a predetermined direction from the c-plane of the hexagonal nitride semiconductor;
An n-type gallium nitride based semiconductor layer provided on the main surface of the support base;
A light emitting layer provided on the n-type gallium nitride based semiconductor layer and made of a gallium nitride based semiconductor;
A p-type gallium nitride based semiconductor layer provided on the light emitting layer;
With
The light emitting layer has a multiple quantum well structure,
The multiple quantum well structure comprises at least two well layers and at least one barrier layer,
The barrier layer is provided between the two well layers;
The two well layers are made of InGaN,
The two well layers have a first indium composition in a range of 0.15 to 0.50,
The inclination angle of the principal surface with respect to the c-plane is in a range of 50 degrees or more and 80 degrees or less and a range of 130 degrees or more and 170 degrees or less,
The film thickness of the barrier layer is in the range of 1.0 nm to 4.5 nm.
A nitride semiconductor light emitting device characterized by that.   The film thickness of the barrier layer is not more than a value obtained by adding 0.50 nm to the film thickness of the well layer, and is not less than a value obtained by subtracting 0.50 nm from the film thickness of the well layer. The nitride semiconductor light-emitting device according to claim 1. The barrier layer is made of InGaN,
3. The nitride semiconductor light emitting device according to claim 1, wherein the barrier layer has a second indium composition in a range of 0.01 or more and 0.10 or less. The n-type gallium nitride based semiconductor layer has an InGaN layer,
The light emitting layer is provided on the InGaN layer,
Misfit dislocations exist on the surface of the InGaN layer on the side of the supporting substrate inside the n-type gallium nitride based semiconductor layer,
The misfit dislocation is orthogonal to the c-axis and a reference axis that is orthogonal to the surface of the InGaN layer and is shared by the reference plane including the c-axis of the hexagonal nitride semiconductor and the surface of the InGaN layer. Extending in the direction to
Density of the misfit dislocations, 5 × ¹⁰ 3 ^{cm -1} is in the range of 1 × ¹⁰ 5 ^{cm -1} or less than, nitride according to any one of claims 1 to 3, characterized in that Semiconductor light emitting device.   5. The nitride semiconductor light emitting device according to claim 4, wherein the InGaN layer has a third indium composition in a range of 0.03 or more and 0.05 or less.   The second indium composition increases from the p-type gallium nitride based semiconductor layer side toward the n-type gallium nitride based semiconductor layer side. Nitride semiconductor light emitting device.   7. The nitride semiconductor light emitting element according to claim 1, wherein an inclination angle of the main surface with respect to the c-plane is in a range of not less than 63 degrees and not more than 80 degrees.   The nitride semiconductor light-emitting element according to claim 1, wherein the first indium composition is in a range of 0.24 to 0.40.   4. The nitride semiconductor light emitting device according to claim 3, wherein the second indium composition is in a range of 0.01 to 0.06. 5.   10. The nitride semiconductor light-emitting element according to claim 1, wherein a thickness of the barrier layer is in a range of 1.0 nm or more and 3.5 nm or less. Preparing a substrate comprising a hexagonal nitride semiconductor and having a principal surface inclined in a predetermined direction from the c-plane of the hexagonal nitride semiconductor;
Growing an n-type gallium nitride based semiconductor layer on the main surface of the substrate;
Growing a light emitting layer made of a gallium nitride based semiconductor on the n-type gallium nitride based semiconductor layer;
Growing a p-type gallium nitride based semiconductor layer on the light emitting layer;
With
The light emitting layer has at least a first well layer and a second well layer, and at least one barrier layer,
In the step of growing the light emitting layer, the first well layer, the barrier layer, and the second well layer are sequentially grown on the n-type gallium nitride based semiconductor layer,
The first well layer and the second well layer are made of InGaN,
The first well layer and the second well layer have a first indium composition in a range of 0.15 to 0.50,
The inclination angle of the principal surface with respect to the c-plane is in a range of 50 degrees or more and 80 degrees or less and a range of 130 degrees or more and 170 degrees or less,
The film thickness of the barrier layer is in the range of 1.0 nm to 4.5 nm.
A method for manufacturing a nitride semiconductor light emitting device.   The film thickness of the barrier layer is not more than a value obtained by adding 0.50 nm to the film thickness of the well layer, and is not less than a value obtained by subtracting 0.50 nm from the film thickness of the well layer. The method for producing a nitride semiconductor light emitting device according to claim 11. The barrier layer is made of InGaN,
13. The method for manufacturing a nitride semiconductor light emitting element according to claim 11, wherein the barrier layer has a second indium composition in a range of 0.01 or more and 0.10 or less. The n-type gallium nitride based semiconductor layer has an InGaN layer,
The light emitting layer is provided on the InGaN layer,
Misfit dislocations exist on the surface of the InGaN layer on the substrate side inside the n-type gallium nitride based semiconductor layer,
The misfit dislocation is orthogonal to the c-axis and a reference axis that is orthogonal to the surface of the InGaN layer and is shared by the reference plane including the c-axis of the hexagonal nitride semiconductor and the surface of the InGaN layer. Extending in the direction to
Density of the misfit dislocations, 5 × ¹⁰ 3 ^{cm -1} in 1 × ¹⁰ 5 ^{cm -1} or less in the range of, nitride according to any one of claims 11 to claim 13, characterized in that For manufacturing a semiconductor light emitting device.   The method of manufacturing a nitride semiconductor light-emitting element according to claim 14, wherein the InGaN layer has a third indium composition in a range of 0.03 to 0.05.   14. The second indium composition increases from the p-type gallium nitride based semiconductor layer side toward the n-type gallium nitride based semiconductor layer side. A method for manufacturing a nitride semiconductor light emitting device.   17. The nitride semiconductor light emitting device according to claim 11, wherein an inclination angle of the main surface with respect to the c-plane is in a range of not less than 63 degrees and not more than 80 degrees. Method.   18. The method for manufacturing a nitride semiconductor light-emitting element according to claim 11, wherein the first indium composition is in a range of 0.24 or more and 0.40 or less.   The method for producing a nitride semiconductor light emitting element according to claim 13, wherein the second indium composition is in a range of 0.01 to 0.06.   20. The method for manufacturing a nitride semiconductor light-emitting element according to claim 11, wherein the thickness of the barrier layer is in a range of 1.0 nm to 3.5 nm.

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