JP2014075763A - Temperature-frequency conversion circuit and temperature-compensated oscillation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a temperature-frequency conversion circuit that is independent of element characteristics of transistors and others, and a temperature-compensated oscillation circuit incorporating it.SOLUTION: The temperature-frequency conversion circuit includes: a constant voltage generation circuit 10 for outputting a constant voltage based on a difference between the sum of source-drain voltages of first PMOS 1 and NMOS 2 and one supply voltage; a temperature-voltage conversion circuit 20 comprising second PMOS 3 and a resistive element 4 with a temperature characteristic; and a ring oscillator 30 comprising inverters connected in series in odd stages to output an inversion of an input signal, and capacitive elements 7 connected between the inverters. Each inverter comprises third PMOS 5 as a load element for generating a current proportional to a current flowing through second PMOS 3, and second NMOS 6 having a gate as an input. A delay time of the ring oscillator depends on the resistor of the temperature-voltage conversion circuit and the capacitive elements of the ring oscillator and is thus independent of characteristics of the elements constituting the circuit.

Description

  The present invention relates to a temperature-frequency conversion circuit that converts temperature into a frequency and a temperature-compensated oscillation circuit incorporating the temperature-frequency conversion circuit.

    Conventionally, when converting temperature to frequency using an IC circuit such as a CMOS, a rectangular wave oscillation circuit combining a resistance (R) whose resistance changes with temperature, a capacitor (C) with little temperature change and a logic element is combined. It is common to use it. These oscillators include ring CR oscillators, hysteresis CR oscillators, astable multivibrators and the like. However, both of these are greatly affected by the logic element characteristics.

  Patent Document 1 discloses a temperature detection circuit using a conventional ring oscillation circuit. In this temperature detection circuit, at least one resistor having a temperature coefficient, a low current circuit having a current flowing through the resistor as an input, and 2N + 1 inverters are connected in series, and a capacitor is provided at least at the output terminal of one inverter. Connected, the output of the (2N + 1) th inverter is fed back to the input of the first inverter, and the oscillation circuit of the ring oscillation circuit is controlled by a resistor having a temperature coefficient. Thus, temperature detection is performed. This temperature detection circuit has a large change in oscillation frequency accompanying a change in temperature, and is effective in detecting a change in temperature based on the change in oscillation frequency.

    Patent Document 2 discloses a method for initializing a digital temperature compensated oscillator that greatly reduces the number of input / output terminals for initial setting and enables downsizing in the case of an IC. This initialization method includes a temperature sensor oscillator whose oscillation frequency changes with temperature, a voltage-controlled oscillator that controls the oscillation frequency with voltage, and the other oscillator by a gate circuit controlled by the output of one of these two oscillators. A digital temperature compensated oscillator for generating a control voltage to be supplied to the voltage controlled oscillator based on the counting result, and dividing the temperature sensor oscillator and / or the voltage controlled oscillator output It has a single memory that stores the initial value of the circuit setting value such as the ratio setting value or the voltage regulator trimming code, and the contents of the memory are sequentially output when the power is turned on. Output to the peripheral. The other set value is set by the power-on-clear sequencer that outputs to the voltage regulator via the latch circuit, or the initial setting of the frequency division ratio or voltage regulator.

Japanese Patent Laid-Open No. 2-147828 Japanese Patent No. 2939559

The conventional ring oscillator is configured by connecting an odd number of inverters in series and connecting the output terminal of the final stage inverter to the input terminal of the first stage inverter. Each inverter oscillates when it cannot create a stable combination of its input voltages. The oscillation frequency at this time is determined by the total delay time per stage of each inverter. That is, the oscillation frequency of the ring oscillator is adjusted by adjusting this delay time. However, ring oscillators are greatly affected by the characteristics of the logic elements used. Therefore, there is a problem that it is difficult to manufacture an oscillator having stable characteristics.
The present invention has been improved in view of such circumstances, and provides a temperature frequency conversion circuit which is not affected by element characteristics such as a transistor, and a temperature compensated oscillation circuit incorporating the temperature frequency conversion circuit.

  One aspect of the temperature-frequency conversion circuit of the present invention is a constant based on a voltage obtained by adding the source-drain voltage of the first P-type transistor and the source-drain voltage of the first N-type transistor to the ground voltage. A constant voltage generating circuit for outputting a voltage; a second P-type transistor connected in series between the constant voltage and the ground voltage; and a resistance element having a temperature characteristic, and their connection points And a temperature-voltage conversion circuit in which the gates of the second first-conductivity-type transistors are connected in common, and an odd-stage series formed between the constant voltage and the ground voltage and inverting and outputting an input signal And a ring oscillator having a capacitor connected to at least one connection point between the inverter circuits, and each of the inverter circuits includes the constant current And a third P-type transistor that generates a current proportional to the current flowing through the second P-type transistor by connecting the second P-type transistor and the gate in common. And a second N-type transistor connected in series to the load element and having a gate as an input.

One aspect of the temperature-compensated oscillation circuit of the present invention is based on the voltage dropped by the source-drain voltage of the first N-type transistor and the source-drain voltage of the first P-type transistor with respect to the power supply voltage. A constant voltage generation circuit that outputs a constant voltage, a second N-type transistor connected in series between the constant voltage and the power supply voltage, and a resistance element having a temperature characteristic, and their connection A temperature-voltage conversion circuit in which a point and the gate of the second N-type transistor are connected in common;
An inverter circuit formed in series between the constant voltage and the power supply voltage and inverting and outputting an input signal and connected in series; and a ring oscillator having a capacitor connected to at least one connection point And each of the inverter circuits is connected between the constant voltage and an output terminal, and is connected to the second N-type transistor and a gate in common, thereby being proportional to the current flowing through the second N-type transistor. And a second P-type transistor connected in series to the load element and having a gate as an input. Frequency conversion circuit.
One aspect of the temperature-compensated oscillation circuit of the present invention includes the temperature frequency conversion circuit, an oscillation circuit whose oscillation frequency is controlled by controlling a load capacitance value, and either the oscillation circuit or the temperature frequency conversion circuit. And a counter circuit that counts the other output frequency by a gate circuit controlled by an output, and the load capacitance value of the oscillation circuit is changed based on the counting result.

  In the temperature frequency conversion circuit of the present invention, the delay time of the ring oscillation circuit is not affected by the threshold voltage of the transistor of the constant voltage generation circuit and depends on the resistance of the temperature voltage conversion circuit and the capacity of the ring oscillator. The output of the circuit is not affected by the threshold voltage. Further, by applying such a temperature frequency conversion circuit to a temperature compensated oscillation circuit, stable temperature compensation independent of element characteristics can be performed.

FIG. 3 is a circuit diagram illustrating a temperature frequency conversion circuit according to the first embodiment. FIG. 3 is a block diagram illustrating a temperature compensated oscillation circuit according to the first embodiment. FIG. 3 is a waveform diagram for explaining a signal flowing through the temperature compensated oscillation circuit shown in FIG. 2. FIG. 6 is a circuit diagram illustrating a temperature frequency conversion circuit according to a second embodiment.

    Hereinafter, embodiments of the invention will be described with reference to examples.

The first embodiment will be described with reference to FIGS.
First, the temperature frequency conversion circuit will be described with reference to FIG. The temperature frequency conversion circuit includes a constant voltage generation circuit 10, a temperature voltage conversion circuit 20, and a ring oscillator 30, as shown in FIG.
The constant voltage generation circuit 10 outputs a constant voltage based on a voltage obtained by adding the source-drain voltage of the first PMOS transistor 1 and the source-drain voltage of the first NMOS transistor to the ground voltage (Vss). To do. Here, the output voltage is referred to as a reference voltage, the reference voltage based on the first PMOS transistor 1 is referred to as a first reference voltage VTP, and the reference voltage based on the first NMOS transistor 2 is referred to as a second reference voltage VTN.

  The constant voltage generation circuit 10 has a source connected to a constant current source Id, a gate and a drain connected to the first PMOS transistor 1, a source connected to the other ground voltage (Vss), and a gate and a drain connected. A first NMOS transistor 2 having a drain connected to the drain of the first PMOS transistor 1, and a first input (+) connected to a source of the first PMOS transistor 1 and a second input (− ) And an operational amplifier 8 to which an output is fed back and connected. That is, the sum of the first reference voltage VTP based on the first PMOS transistor 1 and the second reference voltage VTN based on the first NMOS transistor 2 is input to the first input (+) of the operational amplifier 8, and the output terminal Is supplied with the reference voltage VTP + VTN. The operational amplifier 8 is used as a buffer, and the first and second reference voltages input to the operational amplifier 8 are impedance-converted and the same voltage is output.

The temperature-voltage conversion circuit 20 includes a series connection of a second PMOS transistor 3 connected in series between the constant voltage from the output of the operational amplifier 8 and the ground voltage (Vss) and a resistance element 4 having temperature characteristics. It is configured. A connection point between one end of the resistance element 4 opposite to the ground side and the drain of the second PMOS transistor 3 and the gate of the second PMOS transistor 3 are connected in common.
The ring oscillator 30 is formed between the constant voltage from the output of the operational amplifier 8 and the ground voltage (Vss), and inverts an input signal to be output and outputs the inverter circuit connected in a ring shape in an odd number series and these inverters And a capacitor element 7 connected to a connection point between the circuits. This embodiment will be described using an example in which inverter circuits are connected in series in three stages. The ring oscillator oscillates when each inverter circuit cannot make a stable combination of input and output voltages. The oscillation frequency at that time is determined by the sum of delay times per stage of each inverter circuit.

Each of the inverter circuits includes a third PMOS transistor 5 and a second NMOS transistor 6, and is connected between the constant voltage from the output of the operational amplifier 8 and an output terminal (not shown). The third PMOS transistor 5 generates a current proportional to the current flowing through the transistor 3 by commonly connecting the gate of the second PMOS transistor 3 and the gate. The third PMOS transistor 5 is used as a load element. The second NMOS transistor 6 is connected in series to this load element, and has a gate as an input. The drain of the third PMOS transistor 5 is connected to the drain of the second NMOS transistor 6. The drain of the second NMOS transistor 6 at the first stage is connected to the gate of the second NMOS transistor 6 at the next stage, and the drain of the second NMOS transistor 6 at the next stage is connected to the second NMOS transistor 6 at the last stage. The drain of the second NMOS transistor 6 at the final stage is connected to the gate, and is connected to the gate of the second NMOS transistor 6 at the initial stage.

In this embodiment, the capacitor element 7 is connected to all connection points between the inverter circuits. However, in the present invention, it is not necessary to connect to all the connection points, and it is connected to at least one connection point. It is also possible to do. The capacitive element may be formed individually, or may be constituted by a parasitic capacitance such as a gate capacitance of a transistor constituting the inverter.
A constant voltage composed of the first and second reference voltages VTP and VTN is output from the output terminal of the operational amplifier 8 of the constant voltage generation circuit 10. The temperature-voltage conversion circuit 20 includes a second PMOS transistor 3 and a resistor 4 connected in series between the constant voltage and the ground. The voltage applied to the resistor 4 is the same as the second reference voltage VTN (the first reference voltage VTP is applied to the second PMOS transistor 5). Accordingly, the current i flowing through the resistor 4 is i = VTN / R, where R is the resistance value. The resistance 4 has a resistance value R having a temperature coefficient, and serves as a temperature sensor. That is, the current that flows depends on the temperature of the temperature sensor.

  The third PMOS transistor 5 constituting the first stage inverter circuit of the ring oscillator 30 is connected to the constant voltage from the output of the operational amplifier 8 via the second PMOS transistor 3 constituting the temperature voltage conversion circuit 20. Both PMOS transistors 3 and 5 constitute a current mirror circuit. Therefore, a current proportional to the current flowing through the temperature-voltage conversion circuit 20 flows through the first-stage inverter circuit. Similarly, other inverter circuits also have a current proportional to the current flowing through the temperature conversion circuit 20.

  In the ring oscillator 30, the capacitive element 7 connected to the output terminal of the first-stage inverter circuit is turned on when the third PMOS transistor 5 of the first-stage inverter circuit is turned on and the output of the first-stage inverter circuit becomes high level. The capacitive element 7 is charged. When the second NMOS transistor 6 of the first-stage inverter circuit is turned on and the output of the first-stage inverter circuit becomes low level, the capacitor element 7 is discharged. The input voltage of the next-stage inverter circuit, which is the voltage at both ends of the capacitive element 7, changes with a delay of the time required for charging and discharging of the capacitive element 7 as compared with the voltage change at the input terminal of the first-stage inverter circuit. The same applies to the next capacitive element 7.

  The time required for charging / discharging the capacitive element 7 is determined by the charging / discharging current and the capacity of the capacitive element. In this embodiment, for example, if the capacity is constant, the charging / discharging time is determined by the charging / discharging current. . Since the current of the ring oscillator 30 is supplied from the temperature-voltage conversion circuit 20, these currents are determined by the resistance value R of the resistor 4 of the temperature-voltage conversion circuit 20. Since the resistance value R of the resistor 4 has a temperature coefficient, the oscillation frequency of the ring oscillator 30 varies with temperature.

  Incidentally, the current i flowing through the resistor 4 of the temperature-voltage conversion circuit 20 is represented by VTN / R. Then, when the second NMOS transistor 6 of the first stage inverter circuit of the ring oscillator 30 is turned off, the capacitance element 7 between the first stage and the next stage inverter circuit is caused by the current supplied from the third PMOS transistor 5. Charged. Assuming that this current is equal to the current i flowing through the resistor 4, the amount of charge Q stored in the capacitive element 7 is represented by i · T. T represents a delay time of one stage. Since the charge amount Q of the capacitor having the capacitance C is expressed by C · V, Q = C · V = i · T. Since the voltage V at this time is VTN (second reference voltage), T is expressed as T = C · VTN / i. On the other hand, since i = VTN / R, T = C · R.

  Therefore, since the delay time T determines the frequency period, the output of the temperature-frequency conversion circuit of this embodiment is not affected by the characteristics of the elements constituting this circuit (independent of VTN). The temperature characteristics of the first PMOS transistor 1 and the first NMOS transistor 2 constituting the constant voltage generation circuit 10 are the temperature characteristics of the third PMOS transistor 5 and the second NMOS transistor 6 constituting the inverter circuit, respectively. Therefore, the circuit is not affected by the temperature characteristics of the transistor element. As a result, it is possible to obtain a temperature frequency conversion circuit in which the temperature and frequency conversion using the temperature characteristics of the resistors constituting the temperature voltage conversion circuit is performed stably.

Next, a temperature compensated oscillation circuit using the temperature frequency conversion circuit of this embodiment will be described with reference to FIGS.
This temperature compensated oscillation circuit includes the temperature frequency conversion circuit 11, the oscillation circuit 40 whose oscillation frequency is controlled by controlling the load capacitance value by switching the switch, and either the oscillation circuit 40 or the temperature frequency conversion circuit 11. The counter circuit 13 counts the other output frequency by the gate circuit 12 controlled by the output of the output signal and the memory 14 of the non-volatile memory that stores the temperature compensation data. Based on the counting result of the counter circuit 14, the oscillation circuit 40 load capacity values are controlled.

  The frequency of the output signal of the temperature frequency conversion circuit 11 varies depending on the environmental temperature. FIG. 3A is an example of an output signal oscillated by the temperature frequency conversion circuit 11. On the other hand, a gate pulse generation circuit 15 is provided at the output portion of the oscillation circuit 40 so that a constant pulse is generated when the output of the oscillation circuit 40 is input. FIG. 3B is an example of a constant pulse. The output signal of the temperature frequency conversion circuit 11 and the constant pulse are input to the gate circuit 12, and the number of pulses of the output signal is counted in the range of the constant pulse by the frequency counter 13. FIG. 3C shows an output signal from the gate circuit 12 generated based on the signals shown in FIGS. 3A and 3B. The memory 14 stores temperature compensation data using the result counted by the frequency counter 13 as an address signal. Based on the stored temperature compensation data, the switch group of the load capacitance of the oscillation circuit 40 is controlled to perform temperature compensation of the output frequency of the temperature compensation type oscillation circuit 40. The delay time T is represented by C · R and is not affected by the characteristics of the elements constituting the circuit, so that temperature compensation can be performed stably even when used in a temperature compensated oscillation circuit.

Next, Embodiment 2 will be described with reference to FIG.
This embodiment is characterized in that the polarity of the transistor constituting the temperature frequency conversion circuit of the first embodiment is reversed as the transistor constituting the temperature frequency conversion circuit. The temperature frequency conversion circuit outputs a constant voltage based on a voltage dropped by the source-drain voltage of the first N-type transistor and the source-drain voltage of the first P-type transistor with respect to the power supply voltage (Vdd). A constant voltage generating circuit 50, a second N-type transistor connected in series between the constant voltage and the power supply voltage, and a resistance element having a temperature characteristic. A temperature-voltage conversion circuit 60 in which the gates of the second N-type transistors are connected in common, and an odd-stage series circuit that is formed between the constant voltage and the power supply voltage and inverts and outputs an input signal. Inverter circuit and ring oscillator 70.

In the temperature frequency conversion circuit, the transistors corresponding to the PMOS transistors 3 and 5 of the first embodiment are NMOS transistors 23 and 25, and the transistor corresponding to the NMOS transistor 6 is a PMOS transistor 26. Further, the operational amplifier 28 provided in the constant voltage generation circuit 50 corresponds to the operational amplifier 8 of the first embodiment. A PMOS transistor 21 and an NMOS transistor 22 are used as transistors for generating a reference voltage of the constant voltage generation circuit 50, and a resistor 24 is used as a resistor. A capacitor element 27 is used as a capacitor disposed in the ring oscillator 70. As in the first embodiment, the capacitive element 27 may be formed by individually forming a capacitive element, or may be constituted by a parasitic capacitance such as a gate capacitance of a transistor constituting the inverter.
Even in such a temperature frequency conversion circuit, as in the first embodiment, the temperature and frequency conversion using the temperature characteristics of the resistors constituting the temperature voltage conversion circuit is stable, and even if this is used in a temperature compensated oscillation circuit, Temperature compensation is performed stably.

DESCRIPTION OF SYMBOLS 1, 3, 5, 21, 26 ... PMOS transistor 2, 6, 22, 23, 25 ... NMOS transistor 4, 24 ... Resistance 7, 27 ... Capacitance element 8, 28 ... Operational amplifier DESCRIPTION OF SYMBOLS 10, 50 ... Constant voltage generation circuit 20, 60 ... Temperature voltage conversion circuit 30, 70 ... Ring oscillator

Claims (3)

A constant voltage generation circuit for outputting a constant voltage based on a voltage obtained by adding a source-drain voltage of the first P-type transistor and a source-drain voltage of the first N-type transistor to the ground voltage; A series connection of a second P-type transistor connected in series between the voltage and the ground voltage and a resistance element having temperature characteristics, and the connection point and the gate of the second P-type transistor are common A temperature voltage conversion circuit connected to the inverter; an inverter circuit formed in series between the constant voltage and the ground voltage and inverting and outputting an input signal; and at least one connection point Each of the inverter circuits is connected between the constant voltage and an output terminal, and has a common gate with the second P-type transistor. By continuing, a load element composed of a third P-type transistor that generates a current proportional to a current flowing through the second P-type transistor, and a load element connected in series to the load element and having a gate as an input A temperature frequency conversion circuit comprising two N-type transistors. A constant voltage generation circuit for outputting a constant voltage based on a voltage dropped by a source-drain voltage of the first N-type transistor and a source-drain voltage of the first P-type transistor with respect to a power supply voltage; A series connection of a second N-type transistor connected in series between the voltage and the power supply voltage and a resistance element having temperature characteristics, and the connection point and the gate of the second N-type transistor are common A temperature-voltage conversion circuit connected to the inverter circuit, an inverter circuit formed in series between the constant voltage and the power supply voltage, the inverter circuit connected in odd stages for inverting and outputting an input signal, and at least one connection point Each of the inverter circuits is connected between the constant voltage and an output terminal, and the second N-type transistor and a gate are connected to each other. By connecting in common, a load element composed of a third N-type transistor that generates a current proportional to a current flowing through the second N-type transistor, and a load element connected in series with the gate as an input A temperature frequency conversion circuit comprising a second P-type transistor. 3. The temperature frequency conversion circuit according to claim 1 or 2, an oscillation circuit whose oscillation frequency is controlled by controlling a load capacitance value, and an output of any one of the oscillation circuit or the temperature frequency conversion circuit. And a counter circuit that counts the other output frequency by the gate circuit, and the load capacitance value of the oscillation circuit is changed based on the counting result.

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