JP2014060266A - Solenoid valve drive device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a drive device for driving a solenoid valve which can detect a short circuit failure in an energization path from the drive device to a coil while suppressing increases in the size and cost of the device configuration.SOLUTION: At an energization start timing, a discharge from a step-up capacitor C1 to a coil 101a by on action of a discharge switch T12, and holding current supply control by on/off control of a constant current switch T11 are started simultaneously or started with one delayed by a delay time. Once an injector 101 opens, the discharge switch T12 is turned off and a holding current holds the open state for a fixed time. The holding current supply is controlled on the basis of a detection value of a current detection resistor R10 disposed downstream of the coil 101a along an energization path. After the energization start timing, at an anomaly determination timing prior to the opening of the injector 101, whether or not a current detected by the current detection resistor R10 exceeds a current threshold is determined, and if the current threshold is not exceeded, an anomaly in the energization path is asserted.

Description

  The present invention relates to a solenoid valve driving device that drives a solenoid valve.

  For example, as an injector (fuel injection valve) for injecting and supplying fuel to each cylinder of an internal combustion engine mounted on a vehicle, an electromagnetic valve that is opened by energizing a coil is used. An injector driving device that drives such an injector energizes the coil in accordance with an input injection signal. The injection signal defines the energization start timing and energization time (in other words, energization end timing) to the coil, and the fuel injection timing and the fuel injection amount to the internal combustion engine are controlled by this injection signal.

  In addition, in such an injector driving device, a specified large current (so-called peak current) is flowed from the capacitor to the coil at the start of energization, whereby the injector is quickly opened, and after the valve is opened, the discharge from the capacitor is stopped. At the same time, a configuration is known in which a constant current is supplied to the coil until the energization period elapses to hold the injector in a valve-open state. Discharge from the capacitor to the coil is performed by turning on a discharge control switching element provided between the two. Further, the supply of the constant current for maintaining the valve opening is performed by turning on / off driving (duty driving) a constant current control switching element provided between the DC power source and the coil of the vehicle (for example, (See Patent Document 1).

  In the injector driving device having the above configuration, a current detection resistor is provided on the downstream side of the coil in the energization path in order to detect the current flowing through the coil. Whether the current flowing in the coil has reached the peak current (i.e., determination of discharge stop timing) or current feedback control to keep the current to the coil constant after opening the valve is detected by the current detection resistor Is performed based on the generated current.

  By the way, in the injector driving device having the above-described configuration, there is a possibility that a failure (hereinafter also referred to as “ground fault”) occurs in which the wiring between the device and the coil contacts the vehicle body and is short-circuited to the ground line. . If, for example, a ground fault occurs on the upstream side of the current-carrying path in the wiring (hereinafter also referred to as “high-side ground fault”), an excessive current flows upstream when the current-carrying is started at the power-on start timing. There is a risk of causing various failures such as breakage of the switching element. Therefore, it is necessary to take some measures for detecting such a high-side ground fault.

  On the other hand, in Patent Document 1, a discharge current detection resistor is provided between one end on the negative electrode side of the capacitor and the ground line in the discharge path from the capacitor to the coil, and the discharge current detected by the discharge current detection resistor is detected. A method for detecting a high-side ground fault based on the above is described.

JP 2002-180878 A

  However, in the high-side ground fault detection method described in Patent Document 1, it is necessary to provide a discharge current detection resistor in order to detect the high-side ground fault. Moreover, of course, a large current flows each time the capacitor is discharged from the capacitor to the discharge current detection resistor, thereby causing a loss in the discharge current detection resistor and increasing the heat generation of the device. Therefore, a heat radiation design that takes into account the heat generated by the discharge current detection resistor is required. Furthermore, when a detection signal from the discharge current detection resistor is taken into a detection circuit such as an IC, it is usually necessary to provide a noise removing capacitor for input protection.

  In other words, the method described in Patent Document 1 requires a discharge current detection resistor separately to detect a high-side ground fault, and also requires various countermeasures such as heat radiation design and circuit protection. This leads to an increase in the size and cost of the circuit board constituting the device. Therefore, it is desired to be able to detect a high-side ground fault while suppressing an increase in device configuration and cost.

  In addition, the short-circuit failure that occurs in the wiring from the injector drive unit to the coil includes not only the above-mentioned high-side failure, but also a low-side ground fault in which the downstream side of the energization path is grounded, or a failure in which the energization path is short-circuited to the power supply side (hereinafter referred to as These various short-circuit faults must also be detected when a fault occurs and some measures must be taken.

  The present invention has been made in view of the above problems, and in a drive device that drives an electromagnetic valve, it is possible to detect a short-circuit failure in a current-carrying path from the drive device to the coil while suppressing an increase in the size and cost of the device configuration. The purpose is to do.

  The present invention made in order to solve the above problems includes a capacitor in which electrical energy supplied to the coil of the electromagnetic valve is stored, a charging means for charging the capacitor, a discharge control switching means, a holding current supply means, An electromagnetic valve drive device comprising: current detection means; drive control means; and abnormality determination means.

  The charging means charges the capacitor so that at least required opening energy, which is electric energy necessary for opening the solenoid valve, is accumulated in the capacitor. The discharge control switching means is provided in the discharge path upstream of the coil in the energization path for flowing current to the coil and through which the discharge current flows from the capacitor to the coil, and conducts and blocks the discharge path. The holding current supply means supplies a predetermined holding current for holding the open state of the electromagnetic valve to the coil. The current detection means is provided on the downstream side of the coil in the energization path and detects a current flowing through the coil.

  Further, the drive control means starts the conduction of the discharge path by the discharge control switching means and the supply of the holding current by the holding current supply means at a predetermined energization start timing at the same time, or starts only one of them, and the other When the required valve opening energy is supplied to the coil, the discharge path is interrupted by the discharge control switching means and the current is passed until the predetermined energization time elapses. The discharge control switching means is controlled so that the current detected by the detection means is maintained at the holding current.

  The abnormality determination means is a predetermined current whose current detected by the current detection means is lower than the holding current at a predetermined abnormality determination timing after the energization start timing and before the required valve opening energy is supplied to the coil. It is determined whether or not it is equal to or less than a threshold value.

  In the electromagnetic valve driving device of the present invention configured as described above, the detection of current detection means used in normal energization control is performed without providing a separate detection resistor for abnormality determination as in the prior art. It is possible to detect short circuit faults in the path. In addition, since the determination is made before the required valve opening energy is supplied to the coil, even if a short-circuit failure occurs, an excessive increase in current is suppressed or a short-circuit failure occurs. It is also possible to suppress the energization time, and to that extent, it is possible to suppress heat generation due to a short circuit failure.

Therefore, according to the solenoid valve drive device of the present invention, it is possible to detect a short-circuit failure in the energization path from the drive device to the coil while suppressing an increase in device size and cost.
In addition, the code | symbol in the parenthesis described in the claim shows the correspondence with the specific means as described in embodiment mentioned later as one aspect, Comprising: The technical scope of this invention is limited is not.

It is a block diagram showing schematic structure of the fuel-injection control system of embodiment. It is a circuit diagram showing the schematic structure of the injector drive circuit of 1st Embodiment. It is a circuit diagram showing schematic structure of a delay circuit. It is explanatory drawing showing an example of the operation sequence at the time of normal in the fuel-injection control system of 1st Embodiment. It is explanatory drawing showing an example of the operation | movement sequence in case the high side ground fault has arisen in the fuel-injection control system of 1st Embodiment. It is explanatory drawing showing an example of the operation | movement sequence in case the high side sky fault has arisen in the fuel-injection control system of 1st Embodiment. It is a circuit diagram showing schematic structure of the injector drive circuit of 2nd Embodiment. It is explanatory drawing showing an example of the operation sequence at the time of normal in the fuel-injection control system of 2nd Embodiment. It is explanatory drawing showing an example of the operation | movement sequence in case the high side ground fault has arisen in the fuel-injection control system of 2nd Embodiment.

Preferred embodiments of the present invention will be described below with reference to the drawings.
[First Embodiment]
(1) Configuration of Entire Fuel Injection Control System The fuel injection control system according to the present embodiment supplies fuel to each cylinder # 1 to # 6 of a multi-cylinder (6 cylinders in this example) diesel engine or gasoline engine mounted on a vehicle. Drives six electromagnetic solenoid injectors (solenoid valves) to be supplied, and more specifically, controls energization start timing and energization time (in other words, energization end timing) to the coils of each injector. Thus, the fuel injection amount and fuel injection timing to each cylinder # 1 to # 6 are controlled.

  However, FIG. 1 shows only one injector 101 corresponding to, for example, the first cylinder # 1 among the six injectors. In the following, the driving of the one injector 101 will be described, and illustration and description of the other injectors of the second cylinder # 2 to the sixth cylinder # 6 will be omitted.

  The injector 101 is a well-known one provided with an electromagnetic solenoid as an actuator for valve opening. That is, in the injector 101, when the coil 101a of the built-in solenoid is energized, the valve body is moved to the valve opening position by the solenoid, the injector 101 is opened, and fuel injection is performed. When energization of the coil 101a is stopped, the valve body returns to the valve closing position, the injector 101 is closed, and fuel injection is stopped.

  As shown in FIG. 1, the fuel injection control system of the present embodiment has an EDU (drive unit) 1 for energizing the injector 101 based on an input injection signal TQ1, and an injection signal TQ1 to this EDU1. The engine ECU 3 controls the operation of the injector 101 by outputting.

  The EDU 1 includes a common terminal COM to which one end of the coil 101a of the injector 101 (upstream side in the energization path of the coil 101a) is connected, a terminal INJ to which the other end (downstream side of the energization path) of the coil 101a is connected, A transistor (hereinafter referred to as a “cylinder selection switch”) T10 having one output terminal (drain) connected to the terminal INJ, and the other output terminal (source) of the cylinder selection switch T10 and a ground line. And a current detection resistor R10. The current detection resistor R10 detects a current (drive current) flowing through the coil 101a via the cylinder selection switch T10, and the voltage generated in the current detection resistor R10 is an injector drive circuit as a current detection signal VI indicating the detection current. 20 is input.

  In the fuel injection control system of this embodiment, the injectors for all six cylinders are actually divided into three groups of two cylinders, and the common terminal COM is provided for each group. And the coil of the two injectors of the same group has one end of the upstream side connected to the same common terminal COM. On the other hand, the other end on the downstream side of each coil is individually connected to a cylinder selection switch via a terminal INJ. That is, the cylinder selection switch is provided individually for each cylinder. However, the current detection resistor R10 is provided for each group. That is, the other output terminals (sources) of the two cylinder selection switches constituting one group are all connected to the ground line via the same current detection resistor R10. Each group is composed of injectors that are not driven simultaneously.

  The EDU 1 includes a constant current control transistor (hereinafter referred to as “constant current switch”) T11, a discharge transistor (hereinafter referred to as “discharge switch”) T12, two diodes D11 and D12, and a valve opening. The battery voltage VB is boosted by boosting a capacitor (hereinafter referred to as “boost capacitor”) C1 charged with electrical energy for use and a DC voltage (battery voltage) VB (for example, 12 V in this example) of the in-vehicle battery 5 as a DC power source. A booster circuit 12 for generating a higher voltage and charging the booster capacitor C1 to a specified charging voltage (for example, 50 V), and a control IC 11 for controlling the switches T10, T11, T12 and the booster circuit 12. .

  The discharge switch T12 is for supplying a large current for valve opening from the boost capacitor C1 to the coil 101a of the injector 101. The constant current switch T11 is for supplying a constant current (holding current) to the coil 101a of the injector 101 to hold the valve open state after the valve is opened.

  The cylinder selection switch T10 is an N-channel MOSFET in this embodiment, and the constant current switch T11 and the discharge switch T12 are both P-channel MOSFETs in this embodiment. Further, the boost capacitor C1, the constant current switch T11, and the discharge switch T12 shown in FIG. 1 are provided for the two cylinders of the first group. Therefore, although not shown in FIG. 1, a boost capacitor, a constant current switch, and a discharge switch are provided for each of the other two groups.

  The booster circuit 12 includes an inductor L00 and a charging transistor (hereinafter referred to as “charging switch”) T00. The inductor L00 has one end connected to the power supply line Lp to which the battery voltage VB is supplied and the other end connected to one output terminal (drain) of the charging switch T00. The other output terminal (source) of the charging switch T00 is grounded. The gate terminal of the charging switch T00 is connected to the charging control circuit 13, and the charging switch T00 is turned on / off according to the output of the charging control circuit 13.

  Furthermore, one end (positive terminal) of the boost capacitor C1 is connected to a connection point between the inductor L00 and the charging switch T00 via a backflow preventing diode D00. The other end (negative terminal) of the boost capacitor C1 is grounded.

  In the booster circuit 12, when the charging switch T00 is turned on / off, a flyback voltage (back electromotive voltage) higher than the battery voltage VB is generated at the connection point between the inductor L00 and the charging switch T00. The boost capacitor C1 is charged through the diode D00 by the flyback voltage. As a result, boost capacitor C1 is charged to a voltage higher than battery voltage VB. The step-up capacitor C1 is controlled by the charge control circuit 13 so that the charge voltage becomes a preset specified charge voltage.

  The discharge switch T12 is provided to discharge the electric energy charged in the boost capacitor C1 to the coil 101a through the common terminal COM. When the discharge switch T12 is turned on, the positive terminal (high voltage terminal) of the boost capacitor C1 is connected to the common terminal COM, whereby discharge from the boost capacitor C1 to the coil 101a is started.

  The discharge switch T12 is driven through the gate drive circuit by the discharge base signal B12 output from the injector drive circuit 20 in the control IC 11. That is, a gate drive circuit including a discharge control transistor T16 and three resistors R3 to R5 is provided between the gate of the discharge switch T12 and the control IC 11. In the present embodiment, the discharge control transistor T16 is an NPN bipolar transistor.

  The discharge base signal B12 from the injector drive circuit 20 is a binary signal of Low (L) level or High (H) level, and is input to the base of the discharge control transistor T16. The emitter of the discharge control transistor T16 is grounded, and the collector is connected to the gate of the discharge switch T12 via the resistors R5 and R4 and to the drain of the discharge switch T12 via the resistors R5 and R3. Has been.

  With this configuration, when the discharge base signal B12 is at the L level, the discharge control transistor T16 is turned off. Therefore, the discharge switch T12 is turned off, and the discharge from the boost capacitor C1 to the coil 101a is not performed. On the other hand, when the discharge base signal B12 becomes H level, the discharge control transistor T16 is turned on, whereby the discharge switch T12 is turned on. When the discharge base signal B12 is at the H level, the cylinder selection switch T10 is also turned on as will be described later. Therefore, when the discharge base signal B12 becomes H level, the boost capacitor C1 discharges to the coil 101a.

  Further, the constant current switch T11 is provided in order to pass a holding current to the coil 101a via the common terminal COM. When the constant current switch T11 is turned on while the cylinder selection switch T10 is turned on, a current flows through the coil 101a from the power supply line Lp through the backflow prevention diode D11. The diode D12 is a feedback diode for constant current control with respect to the coil 101a. When the constant current switch T11 is turned off while the cylinder selection switch T10 is turned on, the current flows back to the coil 101a. Is.

  The constant current switch T11 is driven through a gate drive circuit by a constant current base signal B11 output from the injector drive circuit 20 in the control IC 11. That is, a gate drive circuit including a constant current control transistor T15 and two resistors R1 and R2 is provided between the gate of the constant current switch T11 and the injector drive circuit 20. In this gate drive circuit, the constant current control transistor T15 is provided in the control IC 11. The constant current control transistor T15 is an NPN bipolar transistor in this embodiment.

  The constant current base signal B11 from the injector drive circuit 20 is a binary signal of L level or H level, and is input to the base of the constant current control transistor T15. The emitter of the constant current control transistor T15 is grounded, and the collector is connected to the gate of the constant current switch T11 via the resistor R2 and to the positive side of the in-vehicle battery 5 via the resistor R1.

  With such a configuration, when the constant current base signal B11 is at the L level, the constant current control transistor T15 is turned off, so that the constant current switch T11 is turned off. On the other hand, when the constant current base signal B11 is at the H level, the constant current control transistor T15 is turned on, so that the constant current switch T11 is turned on. The constant current switch T11 is turned on / off (duty driven) by a constant current base signal B11 so that a holding current flows through the coil 101a.

  The engine ECU 3 includes a microcomputer inside and performs various controls for operating an engine (not shown). One of the controls is generation / output of the injection signal TQ. That is, the engine ECU 3 determines the engine speed for each cylinder # 1 to # 6 based on engine operation information detected by various sensors (not shown) such as the engine speed, the accelerator opening, the engine water temperature, and the fuel pressure in the common rail. Drive signals TQ1 to TQ6 are generated and output to the control IC 11. Each drive signal TQ1 to TQ6 has a meaning of energizing the coil of the corresponding injector only when the level of the signal is H level (that is, to open the injector of the corresponding cylinder). However, FIG. 1 shows only the drive signal TQ1 corresponding to the first cylinder # 1.

  In addition, a failure notification signal Z is input to the engine ECU 3 from the injector drive circuit 20 of the control IC 11. As will be described later, the injector drive circuit 20 detects whether or not the wiring between the EDU 1 and the coil 101a in the energization path of the coil 101a is short-circuited to the ground line side or the power source (on-vehicle battery 5) side. A function of notifying the engine ECU 3 of the presence or absence of the short circuit as a failure notification signal Z is provided.

  As a short circuit of the wiring between the EDU1 and the coil 101a, a high-side ground fault in which the wiring from the upstream end of the coil 101a to the common terminal COM of the EDU1 in the energization path of the coil 101a is short-circuited to the ground line side, A high-side power short circuit in which the wiring is short-circuited to the power supply side, a low-side ground fault in which a wiring from the other end on the downstream side of the coil 101a to the terminal INJ of the EDU 1 is short-circuited to the ground line side in the energization path of the coil 101a Has a low-side power short circuit that shorts to the power supply side.

  The injector drive circuit 20 of the present embodiment can detect any of these various short-circuit faults, but the present embodiment is particularly characterized by a method for detecting a high-side ground fault, a high-side ground fault, and a low-side ground fault. Therefore, the detection of these three short-circuit faults will be described, and illustration and description of the detection of the low-side power fault will be omitted.

(2) Configuration of Injector Drive Circuit Next, the injector drive circuit 20 in the control IC 11 provided in the EDU 1 will be described in more detail. The injector drive circuit 20 opens the injector 101 by energizing the coil 101a while the injection signal TQ1 from the engine ECU 3 is at the H level. That is, referring to FIG. 4, when the injection signal TQ1 becomes H level (that is, when energization start timing (time t1)), the H level cylinder selection signal SL1 is output to the gate of the cylinder selection switch T10. Thus, the cylinder selection switch T10 is turned on, and the discharge switch T12 is turned on by setting the discharge base signal B12 to the H level, thereby starting the discharge from the boost capacitor C1 to the coil 101a. Therefore, the detection current IL (current detection signal VI) detected by the current detection resistor R10 increases.

  Then, the on / off drive of the constant current switch T11 is started at a timing (time t3) when a predetermined delay time Tda has elapsed from the energization start timing. That is, the constant current switch T11 is turned on by setting the constant current base signal B11 to the H level. The constant current switch T11 is controlled based on the detection current IL. Specifically, when the detected current IL is less than the holding current Ic, the constant current base signal B11 is set to H level to turn on the constant current switch T11. When the detected current IL becomes equal to or higher than the holding current Ic, the constant current base signal B11. Is set to L level to turn off the constant current switch T11. Strictly speaking, the determination reference value of the detection current IL when turning the constant current switch T11 from on to off is slightly smaller than the determination reference value (holding current Ic) of the detection current IL when turning on from the off state. Is set to

  When the drive current flowing through the coil 101a reaches a predetermined peak current threshold value Ip due to the discharge from the boost capacitor C1 after the start of energization (time t4), the discharge switch T12 is set to L level by setting the discharge base signal B12 to L level. The discharge from the boost capacitor C1 to the coil 101a is stopped. Whether or not the drive current has reached the peak current threshold value Ip is also determined based on the detection current IL (current detection signal VI) by the current detection resistor R10.

  That the detection current IL has reached the peak current threshold value Ip means that electrical energy (required valve opening energy) necessary for opening the valve has been supplied to the coil 101a, and thus the injector 101 has opened. It means that. That is, in the present embodiment, the injector 101 opens at the timing when the detected current IL reaches the peak current threshold Ip.

  After the discharge from the boost capacitor C1 is stopped by reaching the peak current threshold Ip, the level of the constant current base signal B11 is switched based on the detection current IL (and the constant current switch T11 is driven on / off). Thus, a holding current is caused to flow to the coil 101a. When the injection signal TQ becomes L level at the energization end timing when a predetermined energization time has elapsed from the energization start timing (time t5), the constant current base signal B11 is set to L level and the constant current switch T11 is turned off and the cylinder is selected. The signal SL1 is set to the L level to turn off the cylinder selection switch T10, thereby stopping the energization of the coil 101a.

  Up to this point, the basic operation content of the injector drive circuit 20 has been described. The injector drive circuit 20 of the present embodiment further has a function of detecting the above-described high-side ground fault, high-side ground fault, and low-side ground fault. And a protective function for forcibly turning off each of the switches T10, T11, T12 and detecting the occurrence of the short-circuit fault when the short-circuit fault is detected. Therefore, the injector drive circuit 20 is configured to realize the basic operation and the protection function described above.

  More specifically, as shown in FIG. 2, the injector drive circuit 20 includes a peak current detection circuit 31, a discharge switch drive circuit 32, a constant current detection circuit 41, a constant current switch drive circuit 42, and a short circuit abnormality detection. The circuit 50 includes a ground fault / power fault determination circuit 60, a first inversion circuit 71, an output AND circuit 72, and a failure notification signal output circuit 73. Although not shown, the control IC 11 includes a regulator that generates a control voltage Vc having a predetermined DC voltage value (for example, 5 V) from the battery voltage VB. Each part in the control IC 11 operates by the control voltage Vc generated by this regulator.

The first inversion circuit 71 inverts the logic level of the injection signal TQ1 input from the engine ECU 3, and outputs the inverted signal as an inverted injection signal TQ1￣.
The peak current detection circuit 31 is a circuit for detecting that the detection current IL has reached the peak current threshold value Ip. The peak current detection circuit 31 includes a voltage dividing circuit in which three resistors R31, R32, and R33 are connected in series to divide the control voltage Vc to generate a peak current determination voltage Vr1, and a first comparator ( Comparator) 33 and transistor T30.

  The control voltage Vc is divided by the resistors R31, R32, and R33, and the voltage of the resistor R33 connected to the ground line among them is the first comparator as the peak current determination voltage Vr1 corresponding to the peak current threshold Ip. 33 input to the inverting input terminal. The current detection signal VI from the current detection resistor R10 is input to the non-inverting input terminal of the first comparator 33.

  The transistor T30 has an emitter connected to the ground line, a collector connected to a connection point between the resistors R31 and R32, and a base connected to the output terminal of the first comparator 33.

  The first comparator 33 outputs a peak current detection signal P1 indicating the comparison result of each input signal. That is, after the start of energization, while the detection current IL has not yet reached the peak current threshold Ip, the current detection signal VI is lower than the peak current determination voltage Vr1, and therefore, as shown in FIG. The peak current detection signal P1 becomes L level.

  On the other hand, when the detection current IL reaches the peak current threshold value Ip after the start of energization (time t4 in FIG. 4), the current detection signal VI becomes equal to the peak current determination voltage Vr1, and as shown in FIG. The peak current detection signal P1 from the comparator 33 becomes H level.

  Further, when the peak current detection signal P1 becomes H level, the transistor T30 is turned on, so that the connection point between the resistor R31 and the resistor R32 has the same potential (0 V) as the ground line, and is input to the first comparator 33. The current determination voltage Vr1 is 0V. Therefore, thereafter, the peak current detection signal P1 is maintained at the H level until the current detection signal VI becomes 0 (that is, until the detection current IL becomes 0). When the energization to the coil 101a is stopped at the energization end timing (time t5) and the detection current IL becomes 0 and the current detection signal VI becomes 0, the peak current detection signal P1 becomes L level.

  The discharge switch drive circuit 32 includes a first NOR circuit 34 and a first AND circuit 35. The peak current detection signal P1 from the peak current detection circuit 31 is input to one of the two input terminals of the first NOR circuit 34, and the inverted injection signal TQ1￣ is input to the other. For this reason, the first NOR circuit 34 outputs a discharge reference signal P1n that is a negative logical sum of these two input signals P1 and TQ1￣. Therefore, as shown in FIG. 4, after the energization start timing (time t1), until the detection current IL reaches the peak current threshold Ip, the discharge reference signal P1n is at the H level, and the detection current IL reaches the peak current Ip. After that, the discharge reference signal P1n becomes L level until the energization end timing (time t5) when the injection signal TQ1 becomes L level.

  The discharge reference signal P1n is input to one input terminal of the first AND circuit 35. The other input terminal of the first AND circuit 35 receives an inverted ground fault / power fault determination signal Q￣ that is an output signal from the ground fault / power fault determination circuit 60. This inverted ground fault / power fault determination signal Q￣ is obtained by inverting the logic of the ground fault / power fault determination signal Q indicating the final determination result as to whether or not the various short-circuit faults described above have occurred. When it is determined that a short-circuit failure has occurred, Q￣ is at L level (Q is H level), but when it is operating normally, Q￣ is at H level (Q is L level). Therefore, during normal operation without a short-circuit failure or the like, the inverted ground fault / power fault determination signal Q￣ input to the first AND circuit 35 is at the H level, so that the discharge reference signal P1n is output from the first AND circuit 35. It is output as it is as the discharge base signal B12.

  The constant current detection circuit 41 outputs a constant current detection signal P2 indicating whether or not a current equal to or greater than a certain holding current Ic flows through the coil 101a. The constant current detection circuit 41 includes a voltage dividing circuit in which three resistors R41, R42, and R43 are connected in series for dividing the control voltage Vc to generate the holding current determination voltage Vr2, and a second comparator ( Comparator) 43 and transistor T40.

  The control voltage Vc is divided by the resistors R41, R42, and R43, and the voltage of the resistor R43 connected to the ground line among them is used as the holding current determination voltage Vr2 corresponding to the holding current Ic. Is input to the inverting input terminal. The current detection signal VI from the current detection resistor R10 is input to the non-inverting input terminal of the second comparator 43.

  The transistor T40 has an emitter connected to the ground line, a collector connected to a connection point between the resistors R41 and R42 via the resistor R44, and a base connected to the output terminal of the second comparator 43.

  The second comparator 43 compares the input signals and outputs the result as a constant current detection signal P2. That is, while the detection current IL does not reach the holding current Ic, the current detection signal VI is lower than the holding current voltage Vr2, so that the constant current detection signal P2 from the second comparator 43 is at L level. On the other hand, when the detection current IL reaches the holding current Ic, the current detection signal VI becomes equal to the holding current determination voltage Vr2, so that the constant current detection signal P2 from the second comparator 43 becomes H level.

  Since the transistor T40 is turned on when the constant current detection signal P2 becomes H level, the holding current determination voltage Vr2 is a small value (hereinafter referred to as “current decrease determination threshold value Vr2”) compared with the value when the transistor T40 is turned off. It is also called ""). This current drop determination threshold Vr2 ′ is the current detection signal VI when the detection current IL becomes a constant value (but a minute amount) lower than the holding current Ic (hereinafter also referred to as “holding current drop threshold”). Equivalent. Therefore, after the constant current detection signal P2 becomes H level, the H level state continues while the detection current IL is equal to or higher than the holding current reduction threshold. However, when the detection current IL becomes less than the holding current reduction threshold, current detection is performed. The signal VI becomes less than the current drop determination threshold Vr2 ′, and the constant current detection signal P2 from the second comparator 43 becomes L level. After that, when the detection current IL reaches the holding current Ic again, the constant current detection signal P2 becomes H level again.

  The constant current switch drive circuit 42 includes a second NOR circuit 44, a second AND circuit 45, and a delay circuit 46. The delay circuit 46 delays the inverted injection signal TQ1￣ by a predetermined delay time Tda and outputs it as a delayed inverted injection signal Tqd (see FIG. 4). However, as is apparent from FIG. 4, the delay circuit 46 delays the timing when the inverted injection signal TQ1￣ falls from the H level to the L level, and the inverted injection signal TQ1￣ changes from the L level to the H level. The timing to rise is not delayed.

  A specific configuration of the delay circuit 46 for realizing such a delay operation is as shown in FIG. As shown in FIG. 3, the delay circuit 46 includes a resistor R60 having one end connected to the control voltage Vc, a capacitor C2 having one end connected to the other end of the resistor R60 and the other end connected to the ground line, A transistor T60 having an emitter connected to the ground line and a collector connected to one end of the capacitor C2, and a third inverting circuit 48 having an input terminal connected to one end of the capacitor C2. Then, the inverted injection signal TQ1￣ is input to the base of the transistor T60, and the output signal of the third inverting circuit 48 is output from the delay circuit 46 as the delayed inverted injection signal Tqd.

  As is apparent from the circuit configuration of FIG. 3, when the inverted injection signal TQ1￣ is H level before the energization start timing, the transistor T60 is turned on, and the delayed inverted injection signal Tqd is also H level. ing. When the reverse injection signal TQ1Ｑ changes to the L level at the energization start timing, the transistor T60 is turned off. However, even when the transistor T60 is turned on, the voltage of the capacitor C2 gradually increases, so the delayed inversion injection signal Tqd does not immediately become L level. When the delay time Tda elapses from the energization start timing, the charging voltage of the capacitor C2 becomes equal to or higher than a certain level, whereby the delayed inversion injection signal Tqd becomes L level.

  On the other hand, when the reverse injection signal TQ￣ changes from the L level to the H level due to the energization end timing, the transistor T60 is turned on. When the transistor T60 is turned on, both ends of the capacitor C2 are short-circuited via the transistor T60, and the charge of the capacitor C2 is instantaneously released. Therefore, the delayed reverse injection signal Tqd also instantaneously becomes H level.

  The delayed inverted injection signal Tqd from the delay circuit 46 is input to one input terminal of the second NOR circuit 44. A constant current detection signal P2 from the constant current detection circuit 41 is input to the other input terminal of the second NOR circuit 44. Therefore, the second NOR circuit 44 outputs a constant current reference signal P2n that is a negative logical sum of these two input signals P2 and Tqd. Therefore, as shown in FIG. 4, the constant current reference signal P2n becomes L level after the energization start timing (time t1) until the delay time Tda elapses, and at the time t3 when the delay time Tda elapses, the constant current reference The signal P2n becomes H level. Thereafter, until the energization end timing (time t5), the constant current reference signal P2n changes with the constant current detection signal P2 (in reverse logic to the constant current detection signal P2).

  The constant current reference signal P2n is input to one input terminal of the second AND circuit 45. The other input terminal of the second AND circuit 45 receives an inverted ground fault / power fault determination signal Q￣ that is an output signal from the ground fault / power fault determination circuit 60. Therefore, during normal operation without a short circuit failure or the like, the inverted ground fault / power fault determination signal Q 信号 input to the second AND circuit 45 is at the H level, so that the constant current reference signal P2n is output from the second AND circuit 45. The constant current base signal B11 is output as it is.

  The short circuit abnormality detection circuit 50 outputs an abnormality detection signal P3 indicating whether or not a current equal to or greater than a certain abnormality determination current Ida flows through the coil 101a. The short circuit abnormality detection circuit 50 includes a voltage dividing circuit in which two resistors R51 and R52 are connected in series for dividing the control voltage Vc to generate the abnormality determination voltage Vr3, and a third comparator (comparator) 51. And.

  The control voltage Vc is divided by the resistors R51 and R52, and the voltage of the resistor R52 connected to the ground line is the abnormality determination voltage Vr3 corresponding to the abnormality determination current Ida. Input to the inverting input terminal. The current detection signal VI from the current detection resistor R10 is input to the inverting input terminal of the third comparator 51. Therefore, while the current detection signal VI is lower than the abnormality determination voltage Vr3, the abnormality detection signal P3 becomes H level, and when the current detection signal VI becomes equal to or higher than the abnormality determination voltage Vr3, the abnormality detection signal P3 becomes L level.

  The abnormality determination current Ida corresponds to the current threshold of the present invention, and is set to a predetermined value lower than the holding current Ic as shown in FIG. Further, the abnormality determination current Ida has at least a delay time Tda after the discharge from the boost capacitor C1 to the coil 101a is started at the energization start timing unless an abnormality such as the above-described short circuit failure has occurred. Until then, the detection current IL is set so as to surely exceed the abnormality determination current Ida.

  Therefore, at the time of normal operation without a short circuit failure or the like, as shown in FIG. 4, the detection current IL becomes the abnormality determination current Ida at time t2 before the time t3 when the delay time Tda elapses after the start of energization at time t1. Over. On the other hand, when the various short-circuit faults described above occur, for example, as shown in FIG. 5, the detection current IL remains 0 even when energization to the coil 101a is started, and does not exceed the abnormality determination current Ida. Therefore, in the present embodiment, although details will be described later, the abnormality detection signal P3 from the short-circuit abnormality detection circuit 50 is detected at the timing when the delay time Tda has elapsed from the start of energization (time t3, which corresponds to the abnormality determination timing of the present invention). Based on this, the presence or absence of a short circuit failure is detected. Specifically, when the abnormality detection signal P3 remains at the H level at the timing when the delay time Tda has elapsed (that is, when the detection current IL is lower than the abnormality determination current Ida), it is detected that a short circuit failure has occurred. Is done.

  The ground fault / power fault determination circuit 60 is a circuit for detecting a short-circuit fault, that is, a high side ground fault, a high side power fault, and a low side ground fault. The presence / absence of a short circuit failure is determined based on the level of the abnormality detection signal P3 at the timing when the delay time Tda has elapsed from the start timing.

  The ground fault / power fault determination circuit 60 includes a third AND circuit 61, an RS flip-flop circuit (hereinafter referred to as “FF circuit”) 62, and a second inversion circuit 63. The third AND circuit 61 receives the discharge base signal B12 from the discharge switch drive circuit 32, the constant current base signal B11 from the constant current switch drive circuit 42, and the abnormality detection signal P3 from the short circuit abnormality detection circuit 50. The logical product of these three input signals B11, B12, P3 is output. This output signal is input to the set input terminal of the FF circuit 62 as an FF set input signal.

  The FF set input signal becomes H level when all of the three input signals B11, B12, P3 become H level. However, as shown in FIG. 4, the three input signals B11, B12, and P3 do not become H level during normal operation without a short circuit failure or the like. Therefore, during normal operation, the FF set input signal is always at L level (see FIG. 4).

  Therefore, the output Q from the FF circuit 62, that is, the ground fault / power fault determination signal Q is always at the L level during normal operation, and the inverted ground fault / power fault output after being logically inverted by the second inverter circuit 63. The determination signal Q is always at the H level.

  On the other hand, when a short circuit failure occurs, the abnormality detection signal P3 from the short circuit abnormality detection circuit 50 remains at the H level as will be described later. For this reason, the output from the third AND circuit 61 becomes H level at the timing (time t3) when the delay time Tda has elapsed from the energization start timing, whereby the output Q of the FF circuit 62 also becomes H level. Entanglement determination signal Q 信号 becomes L level.

  Note that the inverted injection signal TQ1￣ is input to the reset input terminal of the FF circuit 62. Therefore, the output Q of the FF circuit 62 is reset to the L level every time the inverted injection signal TQ1Ｑ becomes the H level, that is, every time the energization end timing comes.

  The output AND circuit 72 calculates the logical product of the injection signal TQ1 and the inverted ground fault / power fault determination signal Q￣ from the ground fault / power fault determination circuit 60, and outputs the calculation result as the cylinder selection signal SL1. The cylinder selection signal SL1 is input to the gate of the cylinder selection switch T10 as described with reference to FIG.

  The failure notification signal output circuit 73 is a signal having the same logic level as the injection signal TQ1 input from the engine ECU 3 when the output (ground fault / sky fault determination signal) Q from the FF circuit 62 is L level, that is, during normal operation. Is output to the engine ECU 3 as a failure notification signal Z. When the ground fault / power fault determination signal Q from the FF circuit 62 becomes H level due to occurrence of a short circuit fault, the logic level of the fault notification signal Z is switched to a level different from the injection signal TQ1. Therefore, the engine ECU 3 can determine whether or not a short-circuit failure has occurred by comparing the injection signal TQ1 output by itself and the failure notification signal Z input from the EDU1.

(3) Operation Example 1: Normal Operation Next, a specific operation example in the fuel injection control system of the present embodiment described above will be described with reference to operation sequence diagrams (time charts) of FIGS. First, an operation example during normal operation will be described with reference to FIG.

  During normal operation, as shown in FIG. 4, when the injection signal TQ1 becomes H level at the energization start timing at time t1, the cylinder selection signal SL1 becomes H level, the cylinder selection switch T10 is turned on, and the discharge base When the signal B12 becomes H level and the discharge switch T12 is turned on, discharge from the boost capacitor C1 to the coil 101a is started, and a large current starts to flow to the coil 101a.

  Thereafter, when the delay time Tda elapses (time t3), the constant current base signal B11 becomes H level, and duty driving for maintaining the holding current by the constant current switch T11 is started. At time t3, both the constant current base signal B11 and the discharge base signal B12 are at the H level, but the abnormality detection signal P3 from the short circuit abnormality detection circuit 50 is at the L level. That is, the abnormality detection signal P3 is at the H level at the energization start timing (time t1), but becomes the L level when the detection current IL reaches the abnormality determination current Ida at the time t2 before the time t3. Even at t3, it is at the L level. For this reason, the output (FF set input signal) of the third AND circuit 61 in the ground fault / power fault determination circuit 60 is maintained at the L level even after the time t3, and thus the ground fault / power fault determination signal Q from the FF circuit 62 is also maintained. It remains at L level. That is, it becomes a non-detection state in which a short circuit failure is not detected.

(4) Operation Example 2: High Side Ground Fault When the high side ground fault occurs, for example, when the normal operation example illustrated in FIG. 4 occurs, the operation is performed as in the operation example of FIG. That is, when a high-side ground fault occurs, no current flows downstream from the short-circuited portion. Therefore, the injection signal TQ1 becomes H level at the energization start timing at time t1, the cylinder selection signal SL1 becomes H level, the cylinder selection switch T10 is turned on, and the discharge base signal B12 becomes H level, so that the discharge switch Even when T12 is turned on, the detection current IL detected by the current detection resistor R10 remains zero. Therefore, the abnormality detection signal P3 from the short-circuit abnormality detection circuit 50 also remains at the H level without becoming the L level.

  Therefore, when the constant current base signal B11 becomes H level at the time t3 when the delay time Tda has elapsed from the energization start timing, three inputs are input to the third AND circuit 61 of the ground fault / power fault determination circuit 60 at that moment. The signals B11, B12, P3 are all at H level, and the FF set input signal is at H level. As a result, the ground fault / power fault determination signal Q from the FF circuit 62 becomes H level, and a short circuit failure is detected.

  When the ground fault / power fault determination signal Q becomes H level, the inverted ground fault / power fault judgment signal Q￣ becomes L level, so that the discharge base signal B12 from the first AND circuit 35 and the constant value from the second AND circuit 45 become constant. Current base signal B11 and cylinder selection signal SL1 from output AND circuit 72 are forcibly set to L level. Therefore, all of the constant current switch T11, the discharge switch T12, and the cylinder selection switch T10 are forcibly turned off. Then, when the base signals B11 and B12 are set to the L level, the output (FF set input signal) of the third AND circuit 61 becomes the L level again. At time t3, when the ground fault / power fault determination signal Q becomes H level, the failure notification signal Z becomes L level opposite to the injection signal TQ.

  Thus, when a high-side ground fault occurs, the detection current IL remains 0, so that it is possible to detect that a short-circuit fault has occurred. However, when the injection signal TQ1 becomes L level at time t5 after the energization time has elapsed (that is, when the reverse injection signal TQ1￣ becomes H level), the FF circuit 62 is reset, and the ground fault / power fault determination signal Q becomes L level again. It becomes. That is, the determination result within one injection period (time t1 to t5) is valid only within the injection period, and when the injection period ends, the determination result is reset (invalidated). Then, in the next injection period, the operation is started again under the assumption that it is normal (that is, the output Q of the FF circuit 62 is set to L level).

  Although an example of operation when a low-side ground fault occurs is not illustrated, even when a low-side ground fault occurs, no current flows through the current detection resistor R10 as in the case of the high-side ground fault. The current IL remains zero. Therefore, the operation of the injector drive circuit 20 is exactly the same as the operation example in the case of the high side ground fault illustrated in FIG. That is, even when a low-side ground fault occurs, the protection function of detecting the occurrence of the abnormality and forcibly turning off the switches T10, T11, and T12 can be realized in the same manner as the high-side ground fault.

(5) Operation Example 3: During High-Side Power Fault When the high-side power fault occurs, for example, in the normal operation example illustrated in FIG. 4, the operation is performed as in the operation example in FIG. 6. The difference between the operation when the high-side ground fault occurs and the operation when the high-side ground fault occurs is basically whether current does not flow through the current detection resistor R10 or whether it flows a little. Only the difference.

  That is, in the case of a high-side ground fault, as described in FIG. 5, no current flows through the current detection resistor R10, and the detection current IL remains zero. On the other hand, in the case of the high-side power fault, the high-side side is short-circuited to the positive side of the in-vehicle battery 5 and the battery voltage VB is applied. Therefore, as shown in FIG. 6, when the cylinder selection signal SL1 is set to H level and the cylinder selection switch T10 is turned on at the energization start timing (time t1), the high-side power fault region, the coil 101a and the cylinder are A current starts to flow through the current detection resistor R10 via the selection switch T10. As a result, the detection current IL gradually increases after time t1.

  However, the detection current IL does not exceed the abnormality determination current Ida by time t3 when the delay time Tda elapses. In other words, the abnormality determination current Ida is set to a value such that the detected current IL does not exceed the abnormality determination Ida from when the energization starts until the delay time Tda elapses even if a high-side power fault occurs. ing.

  Therefore, even at time t3, the abnormality detection signal P3 from the short circuit abnormality detection circuit 50 remains at the H level. Therefore, the operation after time t3 is the same as the operation after time t3 in the operation example at the time of high-side ground illustrated in FIG.

  The low-side power fault is not shown in FIGS. 1 and 2, but the control IC 11 has a detection function. Specifically, the detection function is based on the detection current IL flowing through the current detection resistor R10. However, since the detection function of the low-side power fault is well known in the art, detailed description thereof is omitted here.

(6) Effects of the First Embodiment In the fuel injection control system of the present embodiment described above, a conventional resistor for detecting the discharge current is not provided between the boost capacitor C1 and the ground line as in the prior art. Using the detection result (current detection signal VI) by the current detection resistor R10 used in the energization control, it is possible to detect a short circuit failure in the energization path. In addition, since the determination is made before the required valve opening energy is supplied to the coil 101a (that is, before the detection current IL reaches the peak current threshold Ip when it is normal), a short-circuit failure occurs temporarily. Even in such a case, it is possible to suppress an excessive increase in current or to suppress the energization time at the time of a short-circuit failure, and accordingly, it is possible to suppress the heat generation due to the short-circuit failure.

Therefore, it is possible to detect a short-circuit failure in the energization path from the EDU 1 to the coil 101a while suppressing an increase in size and cost of the EDU 1.
In this embodiment, at the energization start timing (time t1), the constant current switch T11 and the discharge switch T12 are not turned on, but the discharge switch T12 is first turned on. The on / off control (feedback control for holding current supply) by the constant current switch T11 is started at the timing when the delay time Tda has elapsed from the energization start timing, and at the timing when the delay time Tda has elapsed. If a short circuit abnormality occurs, it is detected and determined to realize a predetermined protection function. Therefore, it is possible to efficiently detect and determine a short-circuit failure at an appropriate timing.

  In this embodiment, the on / off control start timing of the constant current switch T11 is delayed without delaying the on timing of the discharge switch T12. Therefore, even if the delay time Tda is made long, there is almost no influence on the operation of the injector 101, and therefore the degree of freedom in setting the delay time Tda is great. Accordingly, the degree of freedom in setting the abnormality determination current Ida (that is, the degree of freedom in setting the abnormality determination voltage Vr3 in the short-circuit abnormality detection circuit 50) is large.

  In this embodiment, when a short circuit failure is determined, all of the constant current switch T11, the discharge switch T12, and the cylinder selection switch T10 are forcibly turned off. Therefore, even if a short circuit failure occurs, the EDU 1 can be sufficiently protected.

[Second Embodiment]
Next, the fuel injection control system of the second embodiment will be described. The fuel injection control system of the present embodiment is only slightly different from the fuel injection control system of the first embodiment shown in FIGS. 1 and 2 in the configuration of the injector drive circuit in the EDU 1. Therefore, in the following description of the second embodiment, only the parts different from the first embodiment will be described, and detailed description of the same configurations and functions as those of the first embodiment will be omitted.

  The injector drive circuit 80 of this embodiment is as shown in FIG. The injector drive circuit 80 of the present embodiment is different from the injector drive circuit 20 (FIG. 2) of the first embodiment mainly in the discharge switch drive circuit 81, the constant current switch drive circuit 82, and the short-circuit abnormality detection circuit 83. It is.

  That is, in the discharge switch drive circuit 32 of the first embodiment, as shown in FIG. 2, the inverted injection signal TQ1Ｑ is directly input to the first NOR circuit 34. In contrast, in the discharge switch drive circuit 81 of the present embodiment, the inverted injection signal TQ1Ｑ is delayed by the delay circuit 90 by the delay time Tdb, and the delayed delayed inverted injection signal Tqd is input to the first NOR circuit 34. The

However, the delay time Tdb (see FIG. 8) in the delay circuit 90 of the present embodiment is set to a time shorter than the delay time Tda in the delay circuit 46 of the first embodiment.
In the constant current switch drive circuit 42 of the first embodiment, as shown in FIG. 2, the inverted injection signal TQ1Ｑ is delayed by the delay circuit 46 by the delay time Tda and input to the second NOR circuit 44. there were. On the other hand, in the constant current switch drive circuit 82 of the present embodiment, the inverted injection signal TQ1￣ is input to the second NOR circuit 44 as it is.

  Further, in the short circuit abnormality detection circuit 50 of the first embodiment, after the energization start timing, when the detection current IL reaches the abnormality determination current Ida, the abnormality detection signal P3 is input to the third comparator 51 so as to become L level. The abnormality determination voltage Vr3 to be set has been set. On the other hand, in the short circuit abnormality detection circuit 83 of the present embodiment, the abnormality determination voltage Vr3 is set to a value lower than that of the first embodiment. That is, in this embodiment, after the energization start timing, when the detection current IL reaches the abnormality determination current Idb (see FIG. 8) lower than the abnormality determination current Ida of the first embodiment, the abnormality detection signal P3 is L. It is set to be a level. Therefore, the two resistors R61 and R62 for dividing the control voltage Vc to the abnormality determination voltage Vr3 have different resistance values (voltage division ratio) from the two resistors R51 and R52 in the first embodiment.

  The fuel injection control system of the present embodiment configured as described above operates as illustrated in FIG. 8 during normal operation without a short circuit failure or the like. That is, only the portions different from the operation example of the first embodiment (FIG. 4) will be described. First, at the energization start timing (time t1), the constant current reference signal P2n from the second NOR circuit 44 becomes H level and the constant current base. The signal B11 becomes H level, and thereby the constant current switch T11 is turned on (specifically, the holding current constant control by the on / off control is started).

  At time t3 when the delay time Tdb elapses from the energization start timing, the discharge reference signal P1n from the first NOR circuit 34 becomes H level, and the discharge base signal B12 becomes H level, thereby causing the discharge switch T12. Is turned on.

  At time t3, both the constant current base signal B11 and the discharge base signal B12 are at the H level, but the abnormality detection signal P3 from the short circuit abnormality detection circuit 83 is at the L level. That is, the abnormality detection signal P3 is at the H level at the energization start timing (time t1), but becomes the L level when the detection current IL reaches the abnormality determination current Idb at the time t2 before the time t3. Even at t3, it is at the L level. For this reason, the ground fault / power fault determination signal Q from the FF circuit 62 also remains at the L level, and a short-circuit failure is not detected.

  On the other hand, for example, when a high-side ground fault occurs, the operation is performed as in the operation example of FIG. That is, when a high-side ground fault occurs, the detection current IL detected by the current detection resistor R10 remains 0 even if the cylinder selection switch T10 is turned on at the energization start timing at time t1 and the constant current switch T11 is turned on. It is. Therefore, the abnormality detection signal P3 from the short-circuit abnormality detection circuit 83 also remains at the H level without becoming the L level.

  Therefore, when the discharge base signal B12 becomes H level at the time t3 when the delay time Tdb has elapsed from the energization start timing, the three inputs that are input to the third AND circuit 61 of the ground / earth fault determination circuit 60 at that moment The signals B11, B12, P3 are all at H level, and the FF set input signal is at H level. As a result, the ground fault / power fault determination signal Q from the FF circuit 62 becomes H level, and a short circuit failure is detected.

  When the ground fault / power fault determination signal Q becomes H level, the inverted ground fault / power fault judgment signal Q￣ becomes L level, so that the constant current switch T11, the discharge switch T12, and the cylinder selection switch T10 are all forced. Turned off. Then, when the base signals B11 and B12 are set to the L level, the output (FF set input signal) of the third AND circuit 61 becomes the L level again.

  Although illustration is omitted, the operation example at the time of the low-side ground fault is basically the same as the operation example at the time of the high-side ground fault shown in FIG. Also, the operation example at the time of high-side ground fault is different from the operation example at the time of high-side ground fault illustrated in FIG. Is that the detection current IL does not remain 0 but gradually increases.

  That is, the detection current IL gradually increases after the energization start timing. However, the detection current IL does not reach the abnormality determination current Idb until the delay time Tdb elapses. Therefore, after time t3 when the delay time Tdb has elapsed, the operation is the same as that after time t3 in FIG.

  As described above, in this embodiment, contrary to the first embodiment, the operation of the constant current switch T11 is not delayed, and the operation of the discharge switch T12 is delayed. And even if it is a case where it is comprised in that way, a short circuit failure is detected and determined similarly to 1st Embodiment, and a protection function is realizable.

[Modification]
Although the embodiments of the present invention have been described above, the embodiments of the present invention are not limited to the above-described embodiments, and can take various forms as long as they belong to the technical scope of the present invention. Needless to say.

  For example, in the first embodiment, in the constant current switch drive circuit 42 (see FIG. 2), the reverse injection signal TQ1￣ input to the second NOR circuit 44 is delayed by the delay circuit 46, but this is merely an example. is there. As a result, as long as the timing at which the constant current base signal B11 is set to the H level can be delayed by the delay time Tda, where the delay circuit is provided and which signal is delayed, including the number of use of the delay circuit. I can decide. As a specific example, for example, a delay circuit is provided on the output side of the second NOR circuit 44, and the constant current reference signal P2n that is an output signal of the second NOR circuit 44 is delayed by a delay time Tda and input to the second AND circuit 45. You may do it. The same applies to the delay circuit 90 in the discharge switch drive circuit 81 in the second embodiment.

  In the above embodiment, the short-circuit fault is detected and determined at the timing (time t3) when the delay time has elapsed from the energization start timing. However, the short-circuit fault is detected and determined before time t3. It may be.

  Furthermore, it is not essential to delay one of the on-timing of the constant current switch T11 and the on-timing of the discharging switch T12 by a delay time, and both may be turned on at the energization start timing. In such a case as well, short-circuit failure may be detected and determined after a predetermined time (for example, a time equivalent to the delay time) has elapsed from the energization start timing.

  Further, the configuration of the injector driving circuit 20 shown in FIG. 2 and the configuration of the delay circuit 46 shown in FIG. 3 are merely examples, and other circuit configurations capable of realizing the same function may be adopted.

  Further, for example, as apparent from comparison between FIG. 5 and FIG. 6, the ground fault and the power fault are different in that the detection current IL is 0 or slightly flows. Therefore, for example, based on whether or not the detection current IL is 0 at the timing of time t3, it is possible to determine whether a short-circuit fault or a ground fault has occurred among the short-circuit faults. Therefore, it can be configured to determine whether it is a ground fault or a power fault and notify the engine ECU 3 of the determination result.

  In the above embodiment, an example in which the present invention is applied to a fuel injection control system of a diesel engine or a gasoline engine has been described. However, application of the present invention is not limited to these fuel injection control systems. The present invention is widely applicable to an electromagnetic valve driving device configured to open a valve by discharging from a capacitor and hold the valve open state by supplying a holding current after the valve is opened.

  DESCRIPTION OF SYMBOLS 1 ... EDU, 3 ... Engine ECU, 5 ... Vehicle-mounted battery, 11 ... Control IC, 12 ... Booster circuit, 20, 80 ... Injector drive circuit, 31 ... Peak current detection circuit, 32, 81 ... Switch drive circuit for discharge, 33 ... 1st comparator, 34 ... 1st NOR circuit, 35 ... 1st AND circuit, 41 ... Constant current detection circuit, 42, 82 ... Constant current switch drive circuit, 43 ... 2nd comparator, 44 ... 2nd NOR circuit, 45 ... Second AND circuit, 46, 90 ... Delay circuit, 48 ... Third inversion circuit, 50, 83 ... Short circuit abnormality detection circuit, 51 ... Third comparator, 60 ... Ground fault / power fault determination circuit, 61 ... Third AND circuit, 62 ... FF circuit 63 ... Second inverting circuit 71 ... First inverting circuit 72 ... Output AND circuit 73 ... Failure notification signal output circuit 101 ... Injector 101a ... Coil C1 ... Boost capacitor 2... Capacitors, R1 to R5, R31 to R33, R41 to R44, R51, R52, R60 to R62... Resistor, R10... Current detection resistor, T10 ... Cylinder selection switch, T11 ... Constant current switch, T12. T15 ... constant current control transistor, T16 ... discharge control transistor, T30, T40, T60 ... transistor

Claims (6)

A capacitor (C1) in which electrical energy supplied to the coil (101a) of the solenoid valve (101) is stored;
Charging means (12) for charging the capacitor so that at least required opening energy, which is electric energy required to open the solenoid valve, is accumulated;
Discharge control switching means provided on a discharge path upstream of the coil in the energization path for flowing a current to the coil and through which a discharge current flows from the capacitor to the coil, and for conducting / cutting off the discharge path ( T12)
Holding current supply means (T11) for supplying a predetermined holding current for holding the solenoid valve in an open state to the coil;
Current detection means (R10) provided on the downstream side of the coil in the energization path for detecting a current flowing in the coil;
At a predetermined energization start timing, conduction of the discharge path by the discharge control switching unit and supply of the holding current by the holding current supply unit are started simultaneously, or only one of them is started, and the other starts its energization. When the required valve opening energy is supplied to the coil, the discharge path is interrupted by the discharge control switching means and until a predetermined energization time elapses. Drive control means (20) for controlling the discharge control switching means so that the current detected by the current detection means is maintained at the holding current;
After the energization start timing, at a predetermined abnormality determination timing before the required valve opening energy is supplied to the coil, the current detected by the current detection means is lower than a predetermined current threshold lower than the holding current An abnormality determination means (20) for determining whether or not the energization path is abnormal when the current threshold is equal to or less than the current threshold;
An electromagnetic valve driving device comprising: The electromagnetic valve driving device according to claim 1,
The drive control means includes
Normal driving means (32, 82) for starting at any one of conduction of the discharge path by the discharge control switching means and supply of the holding current by the holding current supply means at the energization start timing;
Delay drive means (42, 81) for starting the other of conduction of the discharge path and supply of the holding current at a delay timing after the delay time has elapsed from the energization start timing;
With
The electromagnetic valve drive device, wherein the abnormality determination timing is the delay timing or a timing before the delay timing. The electromagnetic valve driving device according to claim 2,
The normal drive means (32) makes the discharge path conductive by the discharge control switching means at the energization start timing,
The delay drive means (42) starts supply of the holding current by the holding current supply means at the delay timing. It is an electromagnetic valve drive device given in any 1 paragraph of Claims 1-3,
Provided on the downstream side of the coil in the energization path, including energization control switching means (T10) for conducting and blocking the energization path on the downstream side,
The drive control means is configured to cause the energization control switching means to conduct at the energization start timing, and then to shut off the downstream energization path by the energization control switching means after the energization time has elapsed. And
And a first protection means (72) forcibly blocking the downstream energization path by the energization control switching means when the abnormality determination means determines that the energization path is abnormal. A solenoid valve drive device. It is an electromagnetic valve drive device given in any 1 paragraph of Claims 1-4,
When the abnormality determination unit determines that the energization path is abnormal, if the discharge path is conducted by the discharge control switching unit, the discharge path is forcibly cut off, and the holding current supply unit A solenoid valve drive device comprising: second protection means (35, 45) forcibly stopping the supply of the holding current if the holding current is supplied. It is an electromagnetic valve drive device given in any 1 paragraph of Claims 1-5,
A determination result invalidating means (62) for invalidating the determination result by the abnormality determination means at least before the next energization start timing arrives each time the energization time elapses from the energization start timing. An electromagnetic valve driving device.

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