JP2014057501A - Solid light-emitting drive device, luminaire, and lighting fixture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To restrain the occurrence of a fault due to connection abnormality in a solid light-emitting element and also simplify circuit configuration and cut down costs.SOLUTION: When an OFF period Toff of a switching element Q1 exceeds an upper-limit value Toff(max), a control circuit 2 restrains output of a switching power supply circuit 1. Therefore, For this reason, unlike in a conventional case, a circuit for detecting abnormality in a state of connection between an output terminal 3 and a light source 6 (including a fault (abnormality) in the light source 6) is unnecessary, except the control circuit 2, making it possible to simplify circuit configuration and cut down costs while also restraining the occurrence of a fault due to connection abnormality in a solid light-emitting element.

Description

  The present invention relates to a solid-state light-emitting element driving device that drives a solid-state light-emitting element such as a light-emitting diode or an organic electroluminescence (EL) element to emit light, and an illumination device and a lighting fixture using the driving device.

  As this type of solid-state light emitting element driving device, for example, there is a power supply device described in Patent Document 1. This conventional example has a switching power supply circuit (switching regulator) having a smoothing capacitor at the output stage, and a connector for detachably connecting an LED module as a load to both ends of the smoothing capacitor. When the LED module is removed by the connector, the smoothing capacitor is also disconnected from the switching power supply circuit, so that an excessive voltage (no load voltage) can be avoided from being applied to both ends of the smoothing capacitor.

  However, in the conventional example described in Patent Document 1, if the connection by the connector is incomplete (so-called loose contact state), an excessive voltage is applied because the smoothing capacitor is not completely disconnected from the switching power supply circuit. There is a risk of being. And when it shifts from a loose contact state to a complete connection state, the voltage across the smoothing capacitor, which has risen from the steady state, is clamped to the lighting voltage of the LED module all at once, so an overcurrent flows through the LED module. End up.

  Therefore, in order to solve such a problem, a device having an abnormality detection circuit for detecting a connection abnormality such as no load or loose contact by monitoring the voltage or current output from the solid state light emitting element driving device has been proposed. ing. Then, when the abnormality detection circuit detects a connection abnormality, it is possible to avoid the occurrence of problems such as damage to the solid state light emitting device by suppressing the output voltage and the output current.

JP 2010-263716 A

  However, in the latter conventional example, an abnormality detection circuit is required in addition to a circuit (control circuit) for switching control of the switching element, so that there is a problem that the circuit configuration becomes complicated and the cost increases.

  The present invention has been made in view of the above problems, and an object of the present invention is to simplify the circuit configuration and reduce the cost while suppressing the occurrence of problems due to abnormal connection of solid-state light emitting elements.

  The solid-state light-emitting element driving device of the present invention includes a switching power supply circuit in which a solid-state light-emitting element is connected between output terminals, and a control circuit that controls switching of the switching elements that constitute the switching power supply circuit. A series circuit of the switching element and the inductor, and a regenerative element that flows a regenerative current from the inductor when the switching element is turned off, and the control circuit has a predetermined current flowing through the switching element or the inductor. The switching element is turned off when a peak value is reached, and the switching element is turned on when the regenerative current falls below a predetermined threshold. The control circuit is configured to turn on or off the switching element. A period or a combination of the ON period and the OFF period Cycle which comprises suppressing the output of the switching power supply circuit when it exceeds a predetermined upper limit.

  In this solid state light emitting device driving apparatus, the control circuit outputs the output of the switching power supply circuit when the current flowing through the switching element or the inductor does not reach the peak value before the ON period exceeds the upper limit value. It is preferable to suppress.

  In the solid-state light emitting element driving apparatus, the control circuit includes the switching element until the on-period exceeds the upper limit value when at least one of the off-period and the cycle is out of a predetermined range. Alternatively, it is preferable that the output of the switching power supply circuit is not suppressed even if the current flowing through the inductor does not reach the peak value.

  In the solid-state light emitting element driving device, the control circuit suppresses the output of the switching power supply circuit when the regenerative current does not reach the threshold before the off period or the cycle exceeds the upper limit value. It is preferable.

  The solid-state light emitting element driving device preferably includes a timer that generates a PWM (pulse width modulation) signal, and the PWM signal generated by the timer is synchronized with the driving signal of the switching element.

  In this solid state light emitting device driving apparatus, it is preferable that the control circuit is composed of a microcomputer having a built-in timer, and the PWM signal is generated by the timer.

  In the solid-state light emitting device driving apparatus, the control circuit monitors a change over time of the ON period, the OFF period, or the cycle by counting the output of the timer, and the change exceeds a predetermined value. It is preferable to suppress the output of the switching power supply circuit.

  The illumination device of the present invention includes any one of the solid light emitting element driving devices and a solid light emitting element driven by the solid light emitting element driving device.

  The lighting fixture of the present invention includes any one of the solid light emitting element driving devices, a solid light emitting element driven by the solid light emitting element driving device, the solid light emitting element driving device, and a fixture main body that holds the solid light emitting elements. It is characterized by providing.

  The solid-state light-emitting element driving device, the illuminating device, and the luminaire of the present invention have an effect that the circuit configuration can be simplified and the cost can be reduced while suppressing the occurrence of problems due to abnormal connection of solid-state light-emitting elements.

It is a circuit block diagram which shows Embodiment 1 of the solid light emitting element drive device (LED drive device) and illumination device which concern on this invention. It is a circuit diagram same as the above. It is a time chart for operation | movement description same as the above. It is a time chart for operation | movement description of Embodiment 2 of the solid light emitting element drive device (LED drive device) and illumination device which concerns on this invention. It is explanatory drawing for operation | movement description same as the above. It is a time chart for operation | movement description same as the above. It is a circuit block diagram which shows Embodiment 3 of the solid light emitting element drive device (LED drive device) and illuminating device which concern on this invention. It is a time chart for operation | movement description same as the above. It is a circuit block diagram which shows Embodiment 4 of the solid light emitting element drive device (LED drive device) and illuminating device which concern on this invention. It is a time chart for operation | movement description same as the above.

  Hereinafter, an embodiment in which the technical idea of the present invention is applied to a solid-state light-emitting element driving device, a lighting device, and a lighting fixture using LEDs (light-emitting diodes) as solid-state light-emitting elements will be described. However, the solid light-emitting element is not limited to the LED, and may be a solid light-emitting element other than the LED, such as an organic electroluminescence (EL) element.

(Embodiment 1)
As shown in FIG. 1, the illuminating device of this embodiment converts a direct current voltage / current supplied from a light source 6 comprising a series circuit of a plurality of LEDs 60 and a direct current power source E into a direct current voltage / current corresponding to the light source 6. And a solid state light emitting element driving device (LED driving device) for driving (lighting) the light source 6.

  The LED drive device of this embodiment includes a switching power supply circuit 1 and a control circuit 2, and a light source 6 is connected to an output terminal 3 of the switching power supply circuit 1.

  A DC voltage Vdc is applied between the DC power supply E and the input terminal of the switching power supply circuit 1. The switching power supply circuit 1 is a step-down chopper circuit including a switching element Q1, a diode D1, an inductor L1, a smoothing capacitor C1, a drive circuit 10, and the like. The drain of the switching element Q1 made of a field effect transistor is connected to the anode of the diode D1, and the source of the switching element Q1 is connected to the negative electrode of the DC power supply E via the detection resistor R1. Further, one end of the inductor L1 is connected to a connection point between the anode of the diode D1 and the drain of the switching element Q1, and a smoothing capacitor C1 is connected between the other end of the inductor L1 and the cathode of the diode D1. Then, both ends of the smoothing capacitor C1 are connected to the output terminal 3. The inductor L1 is provided with a secondary winding L2, one end of the secondary winding L2 is connected to the circuit ground, and the other end of the secondary winding L2 is connected to the input port of the control circuit 2. Yes.

  The drive circuit 10 is turned on by applying a bias voltage to the gate of the switching element Q1 when the drive signal supplied from the control circuit 2 is at a high level, and is not applied when the drive signal is at a low level. Turn off element Q1.

  The control circuit 2 includes a timer (PWM timer 20) that generates a PWM (pulse width modulation) signal, and provides the output signal (PWM signal) of the PWM timer 20 to the drive circuit 10 as a drive signal. Further, the control circuit 2 includes a PWM timer control unit 21 that starts the PWM timer 20 when the voltage (inductive voltage) of the secondary winding L2 input through the input port is inverted. Further, the control circuit 2 compares the comparator 23 that compares the voltage across the detection resistor R1 (detection voltage VR1) with the reference voltage Vref, and the period during which the output signal of the PWM timer 20 is at the high level (on period) or the low level. And a determination unit 22 that measures the period (off period) to determine whether there is a connection abnormality. The control circuit 2 includes an OR gate 24 that performs an OR operation on the output of the comparator 23 and the output of the determination unit 22 (determination result of whether or not there is a connection abnormality), and resets the PWM timer 20 with the output of the OR gate 24. Yes. That is, the control circuit 2 turns off the switching element Q1 when the current flowing through the switching element Q1 (current flowing through the inductor L1) reaches a predetermined peak value ILp, and the energy stored in the inductor L1 during the ON period of the switching element Q1 Control is performed so as to turn on the switching element Q1 again when it is completely discharged, so-called critical current control (see FIG. 3).

  The determination unit 22 measures the ON period (the high level period of the drive signal) of the switching element Q1, and when the ON period Ton exceeds a predetermined upper limit value Ton (max), the output signal output to the OR gate 24 is at a low level. To high level. In other words, if the ON period Ton of the switching element Q1 exceeds the upper limit value Ton (max), the output of the OR gate 24 is fixed to a high level regardless of the output of the comparator 23, and therefore the output signal of the PWM timer 20 is also low. Fixed to level. As a result, the drive signal input to the drive circuit 10 is fixed at a low level and the switching element Q1 is maintained in the off state, so that the switching power supply circuit 1 is stopped.

  FIG. 2 is a circuit diagram showing a specific example of the determination unit 22. The determination unit 22 includes an upper limit timer 220, an AND gate 221, and a latch circuit 222 formed of an RS flip-flop. The upper limit timer 220 is constituted by, for example, a delay circuit whose delay time is equal to the upper limit value Ton (max) of the on period Ton. The AND gate 221 performs a logical product operation of the output signal of the PWM timer 20 and the output signal of the upper limit timer 220 and outputs the calculation result to the set terminal of the latch circuit 222. In FIG. 2, the PWM timer 20 is constituted by an RS flip-flop.

  Next, the control operation of the switching power supply circuit 1 by the control circuit 2 will be described with reference to the time chart of FIG. The upper limit timer 220 keeps the output low until the delay time equal to the upper limit value Ton (max) elapses from the rising edge of the drive signal, and the output is changed from the low level to the high level after the upper limit value Ton (max) elapses. To launch. However, if the drive signal falls before the upper limit value Ton (max) has elapsed, the upper limit timer 220 is reset. Therefore, when the light source 6 is normally connected to the output terminal 3, the current flowing through the switching element Q1 reaches the predetermined peak value ILp before the on-period Ton reaches the upper limit value Ton (max). The output of the timer 220 does not rise to a high level.

  Therefore, since the output of the AND gate 221 is maintained at the low level, one input of the OR gate 24 is latched at the low level by the latch circuit 222. As a result, the drive signal is switched between the high level and the low level in accordance with the other input of the OR gate 24, that is, the output of the comparator 23, so that the switching element Q1 is switched by the drive circuit 10 and the light source from the switching power supply circuit 1 6 is supplied with a predetermined voltage and current.

  Here, assuming that the inductance of the inductor L1 is L and the output voltage of the switching power supply circuit 1 is Vo, the peak value ILp of the inductor current can be expressed by the following equation (1).

ILp = Ton × (Vdc-Vo) / L ... (1)
When the above equation (1) is modified, the on period Ton is expressed by the following equation (2).

Ton = L × ILp / (Vdc-Vo) (2)
The output voltage Vo of the switching power supply circuit 1 is normally equal to the rated voltage of the light source 6 (= forward voltage of the LED 60 × the number of LEDs 60 connected in series), and is almost constant when the light source 6 is driven at a constant current. It becomes the value of. Therefore, by matching the high level period of the output signal (drive signal) of the PWM timer 20 with the on period Ton calculated from the equation (2), the output voltage Vo and output current Io of the switching power supply circuit 1 are set to desired values. Can be. In other words, if the light source 6 is normally connected between the output terminals 3 of the switching power supply circuit 1 and there is no abnormality such as a short circuit in the light source 6, the ON period Ton is substantially constant.

  Here, when the light source 6 is disconnected from the output terminal 3 (no load state) or the light source 6 and the output terminal 3 are incompletely connected (loose contact state), the output voltage Vo of the switching power supply circuit 1 is obtained. Rises. Since the control circuit 2 maintains the ON state of the switching element Q1 until the detection voltage VR1 input to the comparator 23 exceeds the reference voltage Vref, the ON period Ton is higher than when the ON period Ton is normal in the above-described abnormal connection state. become longer.

  Therefore, the control circuit 2 delays the output signal of the PWM timer 20 to the upper limit value Ton (max) by the upper limit timer 220, and when the ON period Ton of the output signal exceeds the upper limit value Ton (max), the connection abnormality occurs. It is determined that the switching element Q1 is present, and switching of the switching element Q1 is stopped. That is, when the ON period Ton becomes longer and the output of the upper limit timer 220 rises to a high level, the output of the AND gate 221 becomes a high level and the output of the latch circuit 222 also rises to a high level. As a result, since the output of the OR gate 24 is maintained at a high level regardless of the output of the comparator 23, the output signal of the PWM timer 20 is fixed at a low level, the switching power supply circuit 1 is stopped, and the output voltage Vo increases. Can be suppressed.

  As described above, in the present embodiment, the control circuit 2 suppresses the output of the switching power supply circuit 1 when the ON period Ton of the switching element Q1 exceeds the predetermined upper limit value Ton (max). Therefore, unlike the conventional example, a circuit for detecting an abnormality in the connection state between the output terminal 3 and the light source 6 in addition to the control circuit 2 is not required. The circuit configuration can be simplified and the cost can be reduced. However, the control circuit 2 may be composed of a microcomputer equipped with a timer.

  In addition, as a method of suppressing the output of the switching power supply circuit 1 when there is a connection abnormality, instead of stopping the switching of the switching element Q1, the peak current can be reduced by reducing the reference voltage Vref of the comparator 23. I do not care.

  By the way, although the case where the control circuit 2 performs the critical current control of the switching element Q1 is illustrated in the present embodiment, the control mode of the switching element Q1 may be continuous current control or discontinuous current control.

  For example, in the continuous current control mode, before the inductor current becomes zero when the PWM timer control unit 21 raises the output to a high level when the induced voltage of the secondary winding L2 falls below a predetermined threshold value. The switching element Q1 is turned on. In this case, if the lower limit value of the inductor current is ILb (> 0), the ON period Ton of the switching element Q1 is expressed by the following formula (3).

Ton = L × (ILp-ILb) / (Vdc-Vo) (3)
As apparent from the above equation (3), if the light source 6 is normally connected between the output terminals 3 of the switching power supply circuit 1 and no abnormality such as a short circuit occurs in the light source 6, the on period Ton is almost equal. It becomes constant. Therefore, by setting the upper limit value Ton (max) of the ON period to an appropriate value, it is possible to determine whether there is a connection abnormality as in the case of the critical current control mode.

  Further, when the output is started up after a certain period of time after the PWM timer 20 is reset, the off period Toff of the switching element Q1 needs to satisfy the relationship of the following formula (4).

Toff <Vo / (L × ILp) ... (4)
The lower limit value ILb of the inductor current at this time is expressed by the following formula (5).

ILb = ILp-Vo / L × Toff… (5)
Substituting equation (5) into equation (3) and rearranging results in the following equation (6).

Ton = Vo / (Vdc-Vo) × Toff… (6)
As apparent from the above equation (6), if the off-period Toff is constant, the on-period Ton becomes longer as the output voltage Vo increases. Therefore, by comparing the on-period Ton with the upper limit value Ton (max) Whether there is a connection error can be determined.

  In the discontinuous current control mode, the off period Toff of the switching element Q1 needs to satisfy the relationship of the following formula (7), but the on period Ton is represented by formula (2).

Toff> Vo / (L × ILp) (7)
(Embodiment 2)
Since the circuit configuration of the LED driving device and the lighting device of this embodiment is the same as that of the first embodiment, common components are denoted by the same reference numerals, and illustration and description thereof are omitted.

  When the control circuit 2 is performing critical current control, the relationship of the following formula (8) is established between the OFF period Toff of the switching element Q1 and the peak value ILp of the inductor current.

0 = ILp-Vo / L × Toff ... (8)
Therefore, the off period Toff is expressed by the following formula (9) from the formula (8).

Toff = L × ILp / Vo… (9)
As is clear from the above equation (9), if there is no connection abnormality, the peak value ILp of the inductor current and the output voltage Vo are both constant, so the off period Toff is also constant.

  On the other hand, when the output terminal 3 is short-circuited or the impedance between the output terminals 3 is reduced as compared with the normal state due to the failure of the light source 6, the output voltage Vo of the switching power supply circuit 1 that is critical current controlled by the control circuit 2 is It decreases (see FIG. 4). As is clear from equation (9), when the output voltage Vo decreases, the off period Toff becomes longer.

  Therefore, the control circuit 2 delays the fall of the output signal of the PWM timer 20 to the upper limit value Toff (max) by the upper limit value timer 220, and the output signal OFF period Toff exceeds the upper limit value Toff (max). It is determined that there is a connection abnormality, and switching of the switching element Q1 is stopped. That is, when the off period Toff becomes longer and the output of the upper limit timer 220 rises to a high level, the output of the AND gate 221 becomes a high level and the output of the latch circuit 222 also rises to a high level. As a result, the output of the OR gate 24 is maintained at a high level regardless of the output of the comparator 23, so that the output signal of the PWM timer 20 is fixed at a low level and the switching power supply circuit 1 is stopped (see FIG. 4).

  As described above, in the present embodiment, the control circuit 2 suppresses the output of the switching power supply circuit 1 when the off period Toff of the switching element Q1 exceeds the predetermined upper limit value Toff (max). Therefore, unlike the conventional example, in addition to the control circuit 2, a circuit for detecting an abnormality in the connection state between the output terminal 3 and the light source 6 (including a failure (abnormality) of the light source 6) is not required. Simplification of the circuit configuration and cost reduction can be achieved while suppressing the occurrence of problems due to abnormal connection of elements.

  By the way, when the control circuit 2 performs critical current control, the switching cycle T (= on period Ton + off period Toff) of the switching element Q1 is expressed by the following equation (10) from the above equations (2) and (9). expressed.

T = Ton + Toff = L × LIp × {1 / (Vdc-Vo) + 1 / Vo} = L × ILp / (Vdc-Vo) × Vdc / Vo… (10)
Here, when Vo = k × Vdc and the switching period Tx when the coefficient k = 1/2 is normalized to 1,
Tx = T / 4 × L × ILp = 1 / {4 × k × (1-k)}… (11)
It is represented by When the above equation (11) is represented by a graph, a curve as shown by a solid line in FIG. 5 is drawn. As is apparent from FIG. 5, when the coefficient k approaches zero as the impedance of the light source 6 decreases, the switching period Tx increases rapidly. Therefore, the presence or absence of connection abnormality can be determined by monitoring the switching period T by the determination unit 22 (see FIG. 6).

  Also in the present embodiment, the control mode of the switching element Q1 may be continuous current control or discontinuous current control.

  For example, in the continuous current control mode, the lower limit value ILb of the inductor current is expressed by the following formula (12).

ILb = ILp-Vo / L × Toff… (12)
Therefore, the off period Toff is expressed by the following formula (13) by modifying the formula (12).

Toff = L × (ILp-ILb) / Vo… (13)
As apparent from the above equation (13), when the light source 6 is normally connected between the output terminals 3 of the switching power supply circuit 1 and no abnormality such as a short circuit occurs in the light source 6, the off period Toff is almost equal. It becomes constant. Therefore, by setting the upper limit value Toff (max) of the off period Toff to an appropriate value, it is possible to determine whether there is a connection abnormality as in the case of the critical current control mode.

  In the discontinuous current control mode, the time required for the inductor current to decrease from the peak value ILp to zero is measured, and by comparing the time with the upper limit value, it is possible to determine whether there is a connection abnormality.

(Embodiment 3)
In the LED driving device and the lighting device of the present embodiment, the AC voltage Vin supplied from the commercial AC power supply 100 is converted into the DC voltage Vdc by the DC power supply unit and supplied to the switching power supply circuit 1. The DC power supply unit is configured by a conventionally known AC-DC converter 4 such as a step-up chopper circuit and a smoothing capacitor C0 connected between the output terminals of the AC-DC converter 4.

  In the first and second embodiments, it is a precondition that the DC voltage Vdc supplied from the DC power supply E to the switching power supply circuit 1 is stable. However, when the AC voltage Vin supplied from the commercial AC power supply 100 is converted into the DC voltage Vdc by the AC-DC converter 4 and the smoothing capacitor C0, the DC voltage Vdc is not always stable. For example, the DC voltage Vdc smoothed by the smoothing capacitor C0 is often superimposed with a ripple voltage having a frequency twice that of the power supply frequency of the AC power supply 100, and may slightly fluctuate. When the AC voltage fluctuates within a very short period, depending on the responsiveness of the AC-DC converter 4, the DC voltage Vdc may also fluctuate within a very short period. When the DC voltage Vdc fluctuates, the ON period Ton of the switching element Q1 also fluctuates, as is apparent from the equation (3), so that the control circuit 2 may erroneously determine that there is a connection abnormality. Is expensive.

  On the other hand, when there is no connection abnormality, if the output voltage Vo of the switching power supply circuit 1 is constant, the off period Toff is also constant as is apparent from the equation (9). Therefore, even if the on-period Ton reaches the upper limit value Ton (max), if there is almost no change in the off-period Toff when the inductor current is at the peak value ILp, the fluctuation (decrease) in the output voltage Vdc of the DC power supply unit Can be determined.

  Therefore, in the present embodiment, as shown in FIG. 7, the control circuit 2 includes an off period measuring unit 25 that measures the off period Toff from the output signal of the PWM timer 20. When the on-period Ton reaches the upper limit value Ton (max), the determination unit 22 determines whether or not the change in the off-period Toff measured by the off-period measurement unit 25 before several cycles is within a predetermined range. to decide. When the change in the off period Toff is not within the predetermined range, the determination unit 22 determines that there is a connection abnormality and outputs a high level signal to the OR gate 24 to stop the switching power supply circuit 1.

  On the other hand, when the change in the off period Toff is not within the predetermined range, the determination unit 22 determines that the output voltage Vdc of the DC power supply unit has decreased and the output signal to the OR gate 24 is set to the high level for a predetermined time. When Trst has elapsed, the output signal to the OR gate 24 falls to the low level (see FIG. 8). Further, the determination unit 22 gives a high level signal to the restarting unit 26 when the predetermined time Trst has elapsed. The restart unit 26 outputs a one-shot pulse signal (restart signal) when the signal supplied from the determination unit 22 rises to a high level (see FIG. 8). The restart signal is ORed with the output signal of the PWM timer control unit 21 in the OR gate 27. That is, when a restart signal is input to the OR gate 27, a high level signal is input to the set terminal of the PWM timer 20 regardless of the output signal of the PWM timer control unit 21, and the output signal of the PWM timer 20 is high level. Stand up to. As a result, the drive circuit 10 turns on the switching element Q1, and the switching power supply circuit 1 is restarted (see FIG. 8).

  As described above, in the present embodiment, when the off-period Toff is out of the predetermined range, even if the inductor current does not reach the peak value ILp before the on-period Ton exceeds the upper limit value Ton (max), the control circuit 2 does not suppress the output of the switching power supply circuit 1. Therefore, it is possible to prevent the switching power supply circuit 1 from stopping for a long period of time due to the erroneous determination that the control circuit 2 has a connection abnormality due to the fluctuation of the input voltage Vdc of the switching power supply circuit 1. Note that the off period Toff may be calculated by measuring the on period Ton or the switching period T instead of the off period Toff.

(Embodiment 4)
Since the circuit configuration of the LED driving device and the illumination device of the present embodiment is substantially the same as that of the third embodiment, the same components are denoted by the same reference numerals, and illustration and description thereof are omitted.

  As shown in FIG. 9, the control circuit 2 in the present embodiment replaces the off period measuring unit 25 with an upper limit timer (not shown) composed of a delay circuit whose delay time is equal to the upper limit value Ton (max) of the on period Ton. ) And an AND gate (not shown) that calculates the logical product of the output of the upper limit timer and the output of the PWM timer 20 is provided in the determination unit 22. Further, the determination unit 22 performs a logical product of a cycle timer (not shown) composed of a delay circuit whose delay period is equal to the upper limit value T (max) of the switching cycle T, and the output of the cycle timer and the output of the PWM timer control unit 21. And an AND gate (not shown).

  Next, the operation of this embodiment will be described with reference to FIG. When the connection abnormality has not occurred, the switching element Q1 is turned off by the output of the comparator 23 rising to the high level before the upper limit timer of the determination unit 22 raises the output to the high level. On the other hand, if a connection error has occurred, the output of the upper limit timer goes high before the output of the comparator 23 rises to high level, so the output from the decision unit 22 to the OR gate 24 is switched to high level. Thus, switching element Q1 is maintained in the off state.

  Here, if the cause of the output of the upper limit timer becoming high before the output of the comparator 23 rises to high is due to a drop in the DC voltage Vdc, the PWM after the output of the periodic timer becomes high The output of the timer control unit 21 rises to a high level. As a result, the output of the AND gate that calculates the logical product of the output of the periodic timer and the output of the PWM timer control unit 21 becomes high level. When the output of the AND gate rises to a high level, the determination unit 22 falls the output signal to the OR gate 24 to a low level when a predetermined time Trst has elapsed (see FIG. 10). Further, the determination unit 22 gives a high-level signal to the restart unit 26 when the predetermined time Trst has elapsed, and causes the restart unit 26 to output a restart signal. Therefore, when the restart signal is input to the OR gate 27, the drive circuit 10 turns on the switching element Q1, and the switching power supply circuit 1 is restarted (see FIG. 10).

  On the other hand, if the cause of the output of the upper limit timer becoming high before the output of the comparator 23 rises to a high level is due to a connection error, the PWM timer control unit 21 before the output of the periodic timer rises to a high level Output rises to a high level. Therefore, since the output of the AND gate is maintained at the low level, the determination unit 22 maintains the output signal to the restarting unit 26 at the low level even after the elapse of the predetermined time Trst. As a result, the switching element Q1 is maintained in the off state, and the switching power supply circuit 1 remains stopped.

  As described above, also in this embodiment, due to the fluctuation of the input voltage Vdc of the switching power supply circuit 1, the control circuit 2 may erroneously determine that there is a connection abnormality and the switching power supply circuit 1 will be stopped for a long time. Can be prevented.

  By the way, in the above example, the switching period is determined after determining the on period Ton at the last pulse at which the drive signal stops. However, the ON period Ton is determined after determining the switching period as follows. May be.

  That is, a threshold value Ton (*) shorter than the upper limit value Ton (max) is provided, and the switching period is determined when the on period Ton reaches the threshold value Ton (*). Then, in the last pulse when the drive signal stops, the drive signal is stopped when the ON period Ton reaches the upper limit value Ton (max), and the drive signal is stopped or the drive signal is stopped according to the determination result of the switching cycle. What is necessary is just to determine whether a signal is restarted. However, the determination value of the switching period T is set to a value shorter than the upper limit value T (max).

  In the third and fourth embodiments described above, for example, the control circuit 2 may be restarted several times, and the oscillation may be stopped when it is determined that there is a connection abnormality any number of times.

  Here, although illustration is abbreviate | omitted, a lighting fixture is realizable by hold | maintaining the LED drive device of any one of Embodiment 1-4 and the light source 6 in a fixture main body. As such a lighting fixture, for example, a downlight, a ceiling light, or a vehicle headlamp can be realized.

1 Switching power supply circuit 2 Control circuit 6 Light source (solid state light emitting device)
Q1 Switching element
L1 inductor
D1 diode (regenerative element)

In this solid-state light-emitting element drive device, the control circuit, when between the off period is out of the predetermined range, the current which the ON period flows in the switching element or the inductor to more than the upper limit value It is preferable not to suppress the output of the switching power supply circuit even if the peak value is not reached.

On the other hand, when the change in the off-period Toff is that not fall within the predetermined range, the determination unit 22 determines that reduction of the output voltage Vdc of the DC power supply unit, a predetermined time from when the output signal is a high level to the OR gate 24 When Trst has elapsed, the output signal to the OR gate 24 falls to the low level (see FIG. 8). Further, the determination unit 22 gives a high level signal to the restarting unit 26 when the predetermined time Trst has elapsed. The restart unit 26 outputs a one-shot pulse signal (restart signal) when the signal supplied from the determination unit 22 rises to a high level (see FIG. 8). The restart signal is ORed with the output signal of the PWM timer control unit 21 in the OR gate 27. That is, when a restart signal is input to the OR gate 27, a high level signal is input to the set terminal of the PWM timer 20 regardless of the output signal of the PWM timer control unit 21, and the output signal of the PWM timer 20 is high level. Stand up to. As a result, the drive circuit 10 turns on the switching element Q1, and the switching power supply circuit 1 is restarted (see FIG. 8).

As described above, in the present embodiment, when the off period Toff is within the predetermined range , the control is performed even if the inductor current does not reach the peak value ILp before the on period Ton exceeds the upper limit value Ton (max). The circuit 2 does not suppress the output of the switching power supply circuit 1. Therefore, it is possible to prevent the switching power supply circuit 1 from stopping for a long period of time due to the erroneous determination that the control circuit 2 has a connection abnormality due to the fluctuation of the input voltage Vdc of the switching power supply circuit 1. Note that the off period Toff may be calculated by measuring the on period Ton or the switching period T instead of the off period Toff.

Claims (9)

  A switching power supply circuit in which a solid-state light emitting element is connected between output terminals; and a control circuit that controls switching of the switching element constituting the switching power supply circuit, the switching power supply circuit comprising: a series circuit of the switching element and an inductor; A regenerative element for supplying a regenerative current from the inductor when the switching element is turned off, and the control circuit turns off the switching element when a current flowing through the switching element or the inductor reaches a predetermined peak value. And the switching element is turned on when the regenerative current becomes a predetermined threshold value or less, and the control circuit sets an on period or an off period of the switching element or the on period and the off period. When the combined switching cycle exceeds the specified upper limit Solid-state light-emitting element driving apparatus characterized by suppressing an output of the switching power supply circuit.   The control circuit suppresses an output of the switching power supply circuit when a current flowing through the switching element or the inductor does not reach the peak value before the ON period exceeds the upper limit value. Item 2. The solid-state light-emitting element driving device according to Item 1.   In the case where at least one of the off period or the cycle is out of a predetermined range, the control circuit causes the current flowing through the switching element or the inductor until the on period exceeds the upper limit value. 3. The solid state light emitting element driving device according to claim 2, wherein the output of the switching power supply circuit is not suppressed even if the peak value is not reached.   The control circuit suppresses the output of the switching power supply circuit when the regenerative current does not reach the threshold before the off period or the cycle exceeds the upper limit value. The solid-state light emitting element driving device according to the description.   5. A timer for generating a PWM (Pulse Width Modulation) signal, wherein the PWM signal generated by the timer is synchronized with a drive signal for the switching element. The solid-state light emitting element driving device according to Item.   6. The solid-state light emitting element driving device according to claim 5, wherein the control circuit comprises a microcomputer having a timer built therein, and the PWM signal is generated by the timer.   The control circuit monitors the time-dependent fluctuation of the on period, the off period, or the cycle by counting the output of the timer, and outputs the output of the switching power supply circuit when the fluctuation exceeds a predetermined value. The solid state light emitting element driving device according to claim 6, wherein the solid state light emitting element driving device is suppressed.   An illumination device comprising: the solid-state light-emitting element driving device according to claim 1; and a solid-state light-emitting element driven by the solid-state light-emitting element driving device.   A solid light emitting element driving apparatus according to claim 1, a solid light emitting element driven by the solid light emitting element driving apparatus, and an apparatus main body for holding the solid light emitting element driving apparatus and the solid light emitting element. A lighting apparatus characterized by that.

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