JP2014049581A - Composite substrate and manufacturing method of composite substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a composite substrate having a high performance semiconductor substrate, and to provide a manufacturing method therefor.SOLUTION: A composite substrate includes a support substrate 10 composed of an insulation material, a first intermediate layer 30x arranged on the support substrate 10 and containing an insulation material, i.e., a compound of any of Al, Ti, W and Zr, as a main component, a second intermediate layer 30y arranged on the first intermediate layer 30x, and a single crystal semiconductor layer 22 arranged on the second intermediate layer 30y. In the first intermediate layer 30x, metal atoms, excepting the main components composing the support substrate 10, main components composing the semiconductor layer 22, and Al, Ti, W and Zr, are distributed so that the concentration is lower as receding from the side in contact with the support substrate 10 in the thickness direction.

Description

  The present invention relates to a composite substrate having a semiconductor substrate and a method for manufacturing the same.

In recent years, in order to improve the performance of semiconductor devices, development of techniques for reducing parasitic capacitance has been promoted. As a technique for reducing this parasitic capacitance, there is an SOS (Silicon On Sapphire) structure. In this SOS structure, it is necessary to bond substrates made of different materials. As a method for bonding substrates made of such different materials, there is a technique described in Patent Document 1, for example.

JP 2004-343369 A

  However, in the technique described in Patent Document 1, when an ion beam or a neutron beam is irradiated to activate the bonding surface, there is a possibility that a metal floating in the chamber of the bonding apparatus is mixed into the bonding interface. For this reason, even when the technique described in Patent Document 1 is applied when forming the SOS structure, the metal may diffuse to the silicon side, which is the functional layer of the semiconductor element, and may adversely affect the operation of the semiconductor element. It was.

  The present invention has been conceived under the above circumstances, and an object of the present invention is to provide a method of manufacturing a composite substrate and a composite substrate in which metal is prevented from being mixed into a semiconductor layer.

  In the embodiment according to the composite substrate of the present invention, the first component is mainly composed of a support substrate made of an insulating material and an insulating material that is a compound of any one of Al, Ti, W, and Zr disposed on the support substrate. A first intermediate layer, a second intermediate layer that is disposed on the first intermediate layer, and includes an insulating material that is a compound of a metal element different from the support substrate and the first intermediate layer; 2 having a single-crystal semiconductor layer disposed on the intermediate layer, and the first intermediate layer includes a main component element constituting the support substrate, a main component element constituting the semiconductor layer, and Metal atoms other than Al, Ti, W, and Zr are distributed so that the concentration decreases as they move away from the side in contact with the support substrate in the thickness direction.

In the embodiment according to the method for manufacturing a composite substrate of the present invention, a step of preparing a support substrate made of an insulating material, and on a low-resistance single crystal semiconductor substrate, as the distance from the side in contact with the single crystal semiconductor substrate increases in the thickness direction. The main component is an insulating material that is a compound of a step of forming an epitaxial film having a dopant concentration change region that lowers the dopant concentration and a main component constituting the single crystal semiconductor substrate on the surface of the epitaxial film. And a step of forming a first intermediate layer mainly composed of an insulating material made of any one of Al, Ti, W and Zr on the surface of the second intermediate layer. And a step of activating the surface of the first intermediate layer and one main surface of the support substrate at room temperature, and the surface of the activated first intermediate layer and the one main surface of the support substrate The step of joining the main substrate element constituting the support substrate and the main component element constituting the epitaxial film by sandwiching and contacting a metal material different from Al, Ti, W and Zr. And at least a part of the dopant concentration changing region of the single crystal semiconductor substrate and the epitaxial film so as to leave a part of the epitaxial film continuing from the surface on the second intermediate layer side as a semiconductor layer. Higher than the temperature at which selective etching is performed using an etchant whose etching rate changes depending on the concentration, and the temperature at which the metal element constituting the metal material and the main component element constituting the first intermediate layer start to aggregate By heating at a temperature, metal atoms constituting the metal material are brought into contact with the support substrate in the first intermediate layer. And the step of forming the first intermediate layer and the step of forming the second intermediate layer are respectively performed by the epitaxial layer. The first intermediate layer or the second intermediate layer is formed at a temperature at which the dopant is not saturated.

  ADVANTAGE OF THE INVENTION According to this invention, the composite substrate which has a semiconductor layer which suppressed metal diffusion, and its manufacturing method can be provided.

(A)-(d) is sectional drawing which shows an example of the manufacturing process of the manufacturing method of the composite substrate which concerns on one Embodiment of this invention. (A)-(d) is sectional drawing which shows the manufacturing process after FIG. (A) is a top view which shows schematic structure of the composite substrate manufactured by the manufacturing method of the composite substrate which concerns on one Embodiment of this invention, (b) is the fragmentary sectional view which looked at the composite substrate.

  An example of an embodiment of a composite substrate according to the present invention will be described together with a manufacturing method thereof with reference to the drawings.

<Support substrate preparation process>
First, as shown in FIG. 1A, a support substrate 10 is prepared. The support substrate 10 is made of an insulating material. The support substrate 10 supports a structure including the semiconductor layer 22 that will be positioned on the upper part in a process described later. The supporting substrate 10 can be freely selected as long as it has strength and flatness that can support the semiconductor layer 22. As a material constituting the support substrate 10, an insulating single crystal substrate such as an aluminum oxide single crystal (sapphire) or a silicon carbide substrate can be used. In the present embodiment, sapphire is employed as the support substrate 10. The crystal plane of sapphire is not particularly limited, but the R plane is preferably used. By using the R plane, the lattice constant with Si constituting the epitaxial film 21 described later can be brought closer.

  Examples of the thickness of the support substrate 10 include a range of 400 to 800 [μm].

  The upper surface of the support substrate 10 in the D1 direction, that is, the one main surface 10a preferably has a small arithmetic average roughness, specifically, 5 nm or less.

<Epitaxial film formation process>
Next, as shown in FIG. 1B, a single crystal semiconductor substrate 20 (sometimes simply referred to as a semiconductor substrate 20) is prepared. Here, as a material constituting the semiconductor substrate 20, for example, silicon (Si) or germanium (Ge) can be used. In this example, a semiconductor substrate 20 made of Si is prepared. The semiconductor substrate 20 may be either p-type or n-type, and its resistance value can be selected as appropriate. However, as a dopant concentration, p ⁺⁺ and n ^{++ with} relatively high concentrations are used so as to have low-resistance electrical characteristics. And medium concentrations of p ⁺ and n ⁺ are employed. The dopant concentration of p ⁺⁺ is 1 × 10 ¹⁸ or more and 1 × 10 ²¹ [atoms / c
m ³ ] The following ranges may be mentioned. Examples of the p ⁺ dopant concentration include a range of 1 × 10 ¹⁶ or more and less than 1 × 10 ¹⁸ [atoms / cm ³ ]. ^Examples of the n ⁺⁺ dopant concentration include a range of 5 × 10 ^{17 to} 1 × 10 ²¹ [atoms / cm ³ ]. Examples of the n ⁺ dopant concentration include a range of 5 × 10 ¹⁵ or more and less than 5 × 10 ¹⁷ [atoms / cm ³ ]. In this embodiment, a p-type dopant having a p ⁺⁺ concentration is employed. Note that “++” and “+” written in the upper right of “p” and “n” are based on the resistance value of silicon.

An epitaxial film 21 is grown on the upper surface of the semiconductor substrate 20 (D2 direction in the figure). The epitaxial film 21 is also formed of single crystal Si. As a method of epitaxial growth, a thermal chemical vapor deposition method (thermal CVD method) in which a gaseous silicon compound is passed through the surface of the single crystal semiconductor substrate 20 while being thermally decomposed and grown while heating the single crystal semiconductor substrate 20. ) And the like can be employed. Since this epitaxial film 21 is epitaxially grown on the silicon substrate, lattice defects can be reduced as compared with the case where it is epitaxially grown on the sapphire substrate (so-called hetero epi growth). In addition, since the epitaxial growth is performed in a vacuum, the oxygen content in the film can be kept extremely low compared to a silicon substrate formed by the CZ method. Specifically, in the silicon substrate formed by the CZ method, oxygen is present at 10 ¹⁸ [atoms / cm ³ ] or more, whereas in the epitaxial film 21, it is set to 2 × 10 ¹⁷ [atoms / cm ³ ] or less. it can.

  Here, the dopant concentration of the epitaxial film 21 may be less than that of the single crystal semiconductor substrate 20. In this example, the epitaxial film 21 is a dopant concentration changing region formed so that the dopant concentration gradually decreases from the surface in contact with the single crystal semiconductor substrate 20 toward the upper surface side, that is, from the D1 direction to the D2 direction. 21x. In the region other than the dopant concentration changing region 21x in the epitaxial film 21, it is sufficient that the concentration is lower than the lowest dopant concentration in the dopant concentration changing region 21x, and there is no dopant concentration gradient, or the dopant concentration changing region 21x. It may have a dopant concentration gradient that continuously decreases from 1 to the upper surface portion.

The upper surface portion in the D2 direction of the epitaxial film 21 is formed to have any one of a relatively low concentration of p ⁻ and n ⁻ dopants and non-dope. Examples of the p ⁻ dopant concentration include a range of 1 × 10 ¹⁶ [atoms / cm ³ ] or less. Examples of the n ⁻ dopant concentration include a range of 5 × 10 ¹⁵ [atoms / cm ³ ] or less. What is referred to as “non-doped silicon” herein is silicon that is simply not doped with the intention of impurities, and is not limited to intrinsic silicon that does not contain impurities. In this example, boron (B) is used as a dopant.

  Such a dopant concentration distribution may be formed by adjusting the dopant supply amount during film formation, or may be formed while diffusing the dopant of the semiconductor substrate 20.

  The thickness of the epitaxial film 21 is not particularly limited, but may be about 2 μm, for example.

<Second intermediate layer forming step>
Next, as shown in FIG. 1C, a second intermediate layer 30y is formed on the upper surface of the epitaxial film 21 in the D2 direction. The second intermediate layer 30 y is an insulator, does not include the main component metal element that forms the support substrate 10, and includes the main component element that forms the epitaxial film 21 that includes the subsequent semiconductor layer 22. It is preferable to include. By adopting such a configuration, it is possible to suppress mixing of unnecessary impurities into the semiconductor layer 22.

  For example, silicon oxide (SiOx) can be used as the second intermediate layer 30y. As a film formation method, an atomic layer deposition (ALD) method, a sputtering method, or the like that does not require heating the substrate at a high temperature during film formation is used. As a specific upper limit of the film formation temperature, a temperature that does not change the dopant concentration distribution in the epitaxial film 21 is preferable, and is set to 500 ° C. or less. When the film is formed by the ALD method or the sputtering method, since the substrate temperature is about 200 ° C. to 400 ° C., the dopant concentration distribution in the epitaxial film 21 is not changed. In particular, when B is used as the dopant, it is difficult to diffuse as compared with the case where other elements are used as the dopant. Therefore, the change in the dopant concentration distribution due to film formation can be suppressed more reliably.

  In this example, the film is formed by the ALD method. Specifically, tetraethyl oscillosilicate containing silicon as a raw material, silicon tetrachloride, silicon hexachloride, TEOS, alkylsilane, alkoxysilane, aminosilane, fluorinated alkoxysilane, halogen silane and other metal raw material gases, and oxygen as a raw material A second intermediate layer 30y is formed by alternately flowing an oxygen supply gas such as water vapor or ozone gas to the substrate surface and purging with an inert gas such as Ar between the gases.

  Note that the crystallinity of the second intermediate layer 30y is not particularly limited, and may be a polycrystal or amorphous having lower crystallinity than the epitaxial layer 21 including the semiconductor layer 22 later.

  The thickness of the second intermediate layer 30y is not particularly limited, and a range of 100 nm or less can be exemplified, but may be set to 30 nm, for example.

<First intermediate layer forming step>
Next, as shown in FIG. 1D, the first intermediate layer 30x is formed on the upper surface in the D2 direction of the second intermediate layer 30y (the surface on the opposite side of the second intermediate layer 30y that is in contact with the epitaxial film 21). Form. The first intermediate layer 30x is made of an insulator whose main component is any one of Al, Ti, W, and Zr. For example, oxides, nitrides, and the like of Al, Ti, W, and Zr can be given. In particular, it is preferable that the metal element which comprises the main component which comprises the support substrate 10 is included. For this reason, it is preferable to use aluminum oxide (AlOx).

  The first intermediate layer 30x is formed by a method that does not require heating the substrate at a high temperature during film formation, such as ALD or sputtering. As a specific upper limit of the film formation temperature, a temperature that does not change the dopant concentration distribution in the epitaxial film 21 is preferable, and is set to 500 ° C. or less. When the film is formed by the ALD method or the sputtering method, since the substrate temperature is about 200 ° C. to 400 ° C., the dopant concentration distribution in the epitaxial film 21 is not changed. Although the reason will be described later, it is particularly preferable to form a film by the ALD method.

More specifically, trimethylaluminum (TMA) using aluminum as a raw material and radical oxygen generated from H ₂ O gas or oxygen gas are alternately flowed on the substrate surface, and between each gas, Ar or the like The first intermediate layer 30x is formed by purging with an inert gas. This film is formed at a cycle of about 0.1 nm / one atomic layer, and the time required for one cycle is about several seconds. The thickness of the first intermediate layer 30x may be about 50 nm, but it is preferable to form the first intermediate layer 30x with a thickness of 100 nm or less because of the takt time.

Here, in the ALD method, the film formation temperature of the first intermediate layer 30x is determined within a temperature range called a normal ALD window. Here, the ALD window (ALD window) indicates a temperature range peculiar to a precursor (TMA and H ₂ O in this example) used in the ALD method capable of obtaining a uniform film thickness. In the case of using TMA and H ₂ O, examples of this temperature range include 200 ° C. to 300 ° C. Thus, since the first intermediate layer 30x can be formed at a lower temperature than in a normal film formation method, the first intermediate layer 30x can be formed without changing the dopant distribution state in the epitaxial film 20.

  The crystallinity of the first intermediate layer 30 formed in this way is not particularly limited, and may be lower than that of the epitaxial layer 21 including the later semiconductor layer 22 as a polycrystal or amorphous.

  The thickness of the first intermediate layer 30x is not particularly limited, and a range of 100 nm or less can be exemplified, but may be 50 nm, for example.

  Further, the intermediate layer including the first intermediate layer 30x and the second intermediate layer 30y is thin in order to efficiently dissipate heat generated from the subsequent semiconductor layer 22 and not to form unnecessary parasitic capacitance. It is preferable. This thickness is determined according to the absolute amount of the metal material 40 distributed in the second intermediate layer 30y in a later step. For example, the thickness of the entire intermediate layer is 40 nm or less, and particularly preferably 5 nm or less. Further, the film thickness of the first intermediate layer 30x and the second intermediate layer 30y may be different.

<Joint process>
Next, as shown in FIG. 2 (a), the one main surface 10a of the support substrate 10 and the upper surface of the first intermediate layer 30x are activated, and both the activated surfaces are made to face each other. 10 and a stacked body in which an epitaxial film 21, a second intermediate layer 30y, and a first intermediate layer 30x are sequentially stacked on the single crystal semiconductor substrate 20 are disposed. Examples of the method of activating the surface include a method of activating by irradiating an ion beam or a neutron beam in vacuum and etching the surface, a method of activating by etching the surface with a chemical solution, and the like.

  A metal material 40 is supplied to both activated surfaces. Specifically, the metal material 40 is composed of the main constituent elements constituting the support substrate 10, the main constituent elements constituting the epitaxial film 21 including the semiconductor layer 22 later, and the first intermediate layer 30 x. Consists of metal elements excluding component elements. Such a metal element material is activated simultaneously with the activation of the one main surface 10a of the support substrate 10 and the upper surface of the first intermediate layer 30x to release atoms, and the holding substrate 10 disposed oppositely is activated. On the other hand, it is supplied between the main surface 10a and the upper surface of the first intermediate layer 30x.

  Examples of the metal element constituting such a metal material 40 include Fe, Cr, Ni, Cu, and Zn. The metal material 40 may be present in layers or may be interspersed.

In the drawing, the presence of the metal material 40 is exaggerated, but it is actually very small, for example, less than 1 × 10 ¹⁶ [atoms / cm ³ ].

  Next, as shown in FIG. 2B, the metal material 40 is sandwiched between the activated main substrate 10a by bringing the activated main substrate 10a into contact with the upper surface of the first intermediate layer 30x. Then, both are joined. You may perform this joining under normal temperature. By bonding at room temperature, bonding can be performed without changing the dopant distribution in the epitaxial film 20. Here, “normal temperature” is preferably about room temperature, but also includes a temperature range lower than a bonding temperature used in a general substrate bonding technique of different materials. For example, it can be exemplified below 300 ° C.

In this connection, a method that does not use an adhesive such as a resin is adopted for this bonding, and the first intermediate layer 30x and the support substrate 10 are directly connected by solid state bonding using atomic force or the like. Are joined together. When joining by this solid phase joining, it is preferable that the surface roughness of the surface where the 1st intermediate | middle layer 30x and the support substrate 10 are joined is small. This surface roughness is expressed by, for example, arithmetic average roughness Ra. Examples of the range of the arithmetic average roughness Ra include less than 10 nm. By reducing the arithmetic average roughness, the pressure applied when joining each other can be reduced.

  Here, the metal material 40 may be scattered in an island shape, or may constitute a layer. Even in the case of forming a layer, the thickness is 5 nm or less. The metal material 40 has a function of increasing the bonding strength when the one main surface 10a of the support substrate 10 and the upper surface of the first intermediate layer 30x are bonded.

  Through the steps so far, an intermediate structure having the first intermediate layer 30x, the second intermediate layer 30y, and the epitaxial film 21 is formed between the support substrate 10 and the single crystal semiconductor substrate 20.

  Although the reason is not clear, when the first intermediate layer 30x is produced by a thin film forming method other than the ALD method (sputtering method or the like), even if the surface is activated and contacted at room temperature, the first intermediate layer 30x 30x and the support substrate 10 cannot be joined.

<Etching process>
Next, as shown in FIG. 2C, a part of the semiconductor portion composed of the single crystal semiconductor substrate 20 and the epitaxial film 21 is removed and adjusted to a desired thickness.

  Specifically, processing is performed from the arrow D1 direction side (the surface of the single crystal semiconductor substrate 20 that is not in contact with the epitaxial film 21), and at least the dopant concentration change region 21x of the single crystal semiconductor substrate 20 and the epitaxial film 21 is at least Part of the thickness direction is removed. Here, as a method for removing part of the single crystal semiconductor substrate 20 and the epitaxial film 21 in the thickness direction, various methods such as abrasive polishing, chemical etching, and ion beam etching can be adopted, and a plurality of methods are combined. Also good. In this example, selective etching is performed using an etchant whose etching rate varies depending on the dopant concentration.

This selective etching can be performed by employing a selective etching solution in which the etching rate varies greatly depending on the difference in dopant concentration. Examples of the selective etching solution include a mixed solution of hydrofluoric acid, nitric acid, and acetic acid, and a mixed solution of hydrofluoric acid, nitric acid, and water. In the present embodiment, a mixed solution of hydrofluoric acid, nitric acid, and acetic acid is employed as an etching solution. In this modified example in which p-type silicon is used for this etching solution, the etching rate decreases as the dopant concentration decreases, and the dopant concentration is 7 × 10 ¹⁷ to 2 × 10 ^{18 [} atoms / cm ³ ] as a boundary. Thus, the etching rate is adjusted so as to be remarkably reduced. The dopant concentration at which the etching rate changes abruptly is set as a threshold value. Other methods for selective etching include an electric field etching method in about 5% hydrogen fluoride solution, a pulse electrode anodizing method in KOH solution, and the like.

Here, the semiconductor substrate 20 has a high dopant concentration, and the epitaxial film 21 has a configuration in which the dopant concentration changing region 21x decreases as the distance from the surface in contact with the single crystal semiconductor substrate 20 decreases. Further, the dopant concentration is set to be a threshold value in the middle of the dopant concentration changing region 21x in the thickness direction. In other words, the dopant concentration on the surface in contact with the semiconductor substrate 20 in the dopant concentration changing region 21x of the semiconductor substrate 20 and the epitaxial film 21 is larger than the threshold value, and the semiconductor substrate 20 in the dopant concentration changing region 21x of the epitaxial film 21 is larger. The dopant concentration on the opposite surface is smaller than the threshold value.

  Therefore, the etching is performed in one process using the selective etching solution from the single crystal semiconductor substrate 20 side to the middle in the thickness direction of the dopant concentration changing region 21x of the epitaxial film 21, and etching is performed while leaving a desired thickness. Can be stopped.

The upper surface of the remaining portion of the epitaxial film 21 may be precisely polished to improve the thickness uniformity. Examples of the etching means used for this precise etching include dry etching. This dry etching includes a chemical reaction and a physical collision. Examples of utilizing chemical reactions include reactive gases (gas), ions and ion beams, and those utilizing radicals. Examples of the etching gas used for the reactive ions include sulfur hexafluoride (SF ₆ ) and carbon tetrafluoride (CF ₄ ). Moreover, what uses an ion beam is mentioned as a thing by physical collision. One using this ion beam includes a method using a gas cluster ion beam (GCIB). By scanning the substrate with a movable stage while etching a narrow region using these etching means, precise etching can be performed satisfactorily even for a large-area material substrate.

  Through these steps, the remaining portion of the epitaxial film 21 is a semiconductor layer 22 that functions as a functional layer.

<Transfer / Immobilization process>
Next, as illustrated in FIG. 2D, the stack of the first intermediate layer 30 x, the second intermediate layer 30 y, and the semiconductor layer 22 on the support substrate 10 is heated. The heating temperature is set to a temperature equal to or higher than the temperature at which the metal element constituting the metal material 40 and the element constituting the first intermediate layer 30x start to aggregate. Since the first intermediate layer 30x is a thin film, it differs from the physical properties of the bulk body. For example, in the case of a combination of Al and Fe, it is considered to be about 550 ° C. By performing such heat treatment, the metal atoms constituting the metal material 40 start to move to the semiconductor layer 22 side. Here, the first intermediate layer 30x contains any of Al, Ti, W, and Zr, and has a high gettering ability for metal atoms. Therefore, in the first intermediate layer 30x, the metal atoms constituting the metal material 40 react with any of Al, Ti, W and Zr atoms constituting the first intermediate layer 30x, and the metal atoms are immobilized. Is done. In this way, the metal material 40 can be distributed in the first intermediate layer 30x so that the concentration decreases as the distance from the surface in contact with the support substrate 10 increases.

  Through such steps, the first intermediate layer 30x and the second intermediate layer 30y are provided between the support substrate 10 and the semiconductor layer 22 as shown in FIG. 3, and only in the first intermediate layer 30x. Thus, it is possible to obtain the composite substrate 100 in which the metal element 40 is present and the concentration thereof is distributed so as to decrease with increasing distance from the support substrate 10 in the thickness direction.

In the above-described process, the process of cleaning the substrate or the like is not specified, but the substrate may be cleaned as necessary. Examples of the substrate cleaning method include various methods such as cleaning using ultrasonic waves, cleaning using an organic solvent, cleaning using chemicals, and cleaning using O ₂ ashing. These cleaning methods may be employed in combination.

The composite substrate 100 includes two types of intermediate layers 30 x and 30 y between the support substrate 10 and the semiconductor layer 22. When the structure including the semiconductor layer 22 and the support substrate 10 are bonded, the metal material 40 that exists at the bonding interface and ensures bonding strength can be moved and diffused by heat treatment. Such a metal material 40 can be fixed and retained in the first intermediate layer 30x by the first intermediate layer 30x having a high metal gettering effect. The second intermediate layer 30y in which the metal material 40 is less likely to agglomerate / move / diffuse than the semiconductor layer 22 can reliably prevent the metal element from diffusing into the semiconductor layer 22, and the semiconductor layer 22 has a different constituent element. The influence of one intermediate layer 30x can be reduced.

  That is, if all the intermediate layers are only the second intermediate layer 30y as the intermediate layer, the diffusion of the metal material 40 could not be sufficiently suppressed. In particular, the thickness of the intermediate layer interposed between the support substrate 10 and the semiconductor layer 22 is preferably 50 nm or less in consideration of thermal conductivity, parasitic capacitance, and the like. On the other hand, if all of the intermediate layer is constituted by the second intermediate layer 30y and the thickness thereof is reduced, it becomes difficult to suppress diffusion / aggregation of the metal material 40 into the semiconductor layer 22. . For this reason, by adding the first intermediate layer 30x containing an element having a higher gettering effect on the metal atoms than the second intermediate layer 30y, the diffusion of the metal material 40 into the semiconductor layer 22 even if the film thickness is small. -Aggregation can be suppressed. In particular, when Al is one of the main components of the first intermediate layer 30x, the same metal is bonded to the Al atoms of sapphire constituting the support substrate 10, so that the bonding strength can be ensured.

  On the other hand, when all of the intermediate layers are configured by only the first intermediate layer 30x, it is important to divide the intermediate layer into two layers because the influence of Al element or the like may reach the semiconductor layer 22.

  From the above, the film thickness of the second intermediate layer 30y may be thinner than the first intermediate layer 30x, and can be, for example, 1/5 or less. This is because the second intermediate layer 30y is a cap layer that suppresses the influence of the metal atoms constituting the metal material 40 from the first intermediate layer 30x side to the semiconductor layer 22 side and the metal atoms constituting the first intermediate layer 30x. This is because the first intermediate layer 30x needs to have a film thickness corresponding to the amount of the metal raw material 40 in order to fix the metal material 40. Thus, the thickness of the first intermediate layer 30x is defined by the amount of the metal raw material 40, and the thickness of the second intermediate layer 30y is defined according to the thickness of the first intermediate layer 30x. It has been confirmed that if the manufacturing process as in the present embodiment is performed, the first intermediate layer 30x has a function of more than necessary if the thickness is 20 nm.

  By such a mechanism, when the structure including the semiconductor layer 22 and the support substrate 10 are bonded, diffusion of the metal material 40 existing at the bonding interface and ensuring the bonding strength to the semiconductor layer 22 side can be suppressed. Become. For this reason, when a semiconductor element is formed in the semiconductor layer 22 of the composite substrate 100, the operation is stable and the reliability is high.

  Further, according to the composite substrate 100, since the semiconductor layer 22 is homoepitaxially grown, lattice defects can be reduced.

  Further, through the above-described steps, a region where the metal material 40 may be mixed at the time of bonding can be limited to the interface between the first intermediate layer 30x and the support substrate 10. For this reason, the diffusion of the metal element can be surely suppressed by the two-stage rotation of the first intermediate layer 30x and the second intermediate layer 30y.

In this example, the semiconductor layer 22 in contact with the first intermediate layer 30x is formed of a film formed by epitaxial growth. Since such a semiconductor layer 22 is formed in a vacuum, its oxygen concentration and impurity concentration are lower than that of a silicon single crystal substrate formed by the CZ method. Specifically, the oxygen concentration of the semiconductor layer 22 is less than 2 × 10 ¹⁷ [atoms / cm ³ ]. With such a configuration, since there are few oxygen atoms that are easily bonded to the metal, it is possible to suppress the diffusion, solid solution, and precipitation of the metal in the semiconductor layer substrate 20. In particular, when the metal is Fe, generation of OSF defects can be suppressed.

Further, in this example, the same material as the element constituting the support substrate 10 or the element constituting the semiconductor layer 22 is selected as the material constituting the intermediate layer. By selecting such a material, it is possible to prevent mixing of elements other than those constituting the support substrate 10 and the semiconductor layer 22 that can be impurities.

  Further, it is preferable to lower the crystallinity of the intermediate layers 30x and 30y because the metal material 40 can be trapped at the grain boundaries and defective portions. From this viewpoint, it is particularly preferable to lower the crystallinity of the first intermediate layer 30x.

(Modification: Crystallinity of the first intermediate layer 30x and the second intermediate layer 30y)
In the example described above, the crystallinity of the first intermediate layer 30x and the second intermediate layer 30y are both lower than those of the support substrate 10 and the semiconductor layer 22. However, the first intermediate layer 30x and the first intermediate layer 30x may be similarly single crystals. And the second intermediate layer 30y may change the crystallinity.

  In the case where the crystallinity of the second intermediate layer 30y is improved as compared with the first intermediate layer 30x, the trapping effect on the metal material 40 of the first intermediate layer 30x is enhanced, and metal migration and diffusion is difficult. The two intermediate layers 30y can function as a lid against metal diffusion.

  The composite substrate 100 was formed through the manufacturing method as described above. Specifically, a sapphire single crystal substrate is used as the support substrate 10, an AlOx film formed by the ALD method is used as the first intermediate layer 30x, an SiOx film formed by the ALD method is used as the second intermediate layer, and the semiconductor layer 22 A Si single crystal film formed by epitaxial growth was used, and Fe, Ni, and Cu were used as the metal material 40. The film thicknesses of the first intermediate layer 30x and the second intermediate layer 30y were both 20 nm. The heat treatment in the movement / fixation step after the bonding was also performed in the thermal oxidation step when the semiconductor element was formed in the semiconductor layer 22. Specifically, heat treatment was performed until a thermal oxide film having a desired thickness was formed on the surface in an oxygen atmosphere at 1000 ° C., and the metal atoms constituting the metal material 40 were moved and immobilized.

Concentration distribution in the depth direction of the composite substrate 100 thus formed was measured by SIMS (secondary ion mass spectrometer; IMS-7f manufactured by CAMECA). Specifically, from the surface side of the semiconductor layer 22, O ₂ ⁺ was used as the primary ion species, the temporary acceleration voltage was set to 10 kV, and the depth profile was measured for a region having a diameter of 30 μm.

  As a result, the detected amount of Fe, Ni, Cu constituting the metal material 40 and the first intermediate layer x constituting the metal material 40 and the Al constituting the semiconductor substrate 10 to the semiconductor layer 22 is equal to or lower than the detection lower limit. It was confirmed that the diffusion of 30x and the metal material 40 could be suppressed.

DESCRIPTION OF SYMBOLS 10 ... Support substrate 22 ... Semiconductor layer 30x ... 1st intermediate layer 30y ... 2nd intermediate layer 40 ... Metal material

Claims (7)

A support substrate made of an insulating material;
A first intermediate layer mainly composed of an insulating material, which is a compound of any one of Al, Ti, W and Zr, disposed on the support substrate;
A second intermediate layer mainly composed of an insulating material, which is a compound of a metal element different from the support substrate and the first intermediate layer, disposed on the first intermediate layer;
A single crystal semiconductor layer disposed on the second intermediate layer,
In the first intermediate layer, metal elements other than the main component elements constituting the support substrate, the main component elements constituting the semiconductor layer, and Al, Ti, W, and Zr are formed in the thickness direction in the thickness direction. A composite substrate distributed such that the concentration decreases as the distance from the side in contact with the support substrate increases.   The composite substrate according to claim 1, wherein the second intermediate layer includes an element constituting the semiconductor layer as a main component.   The composite substrate according to claim 1, wherein the first intermediate layer and the second intermediate layer are amorphous or polycrystalline.   The support substrate is a sapphire substrate, the first intermediate layer is made of aluminum oxide, the second intermediate layer is made of silicon oxide, and the semiconductor layer is made of single crystal silicon. A composite substrate according to any one of the above. Preparing a support substrate made of an insulating material;
On the low-resistance single crystal semiconductor substrate, a step of forming an epitaxial film having a dopant concentration change region in which the dopant concentration decreases as the distance from the side in contact with the single crystal semiconductor substrate in the thickness direction decreases.
Forming a second intermediate layer mainly composed of an insulating material which is a compound with a main component constituting the single crystal semiconductor substrate on the surface of the epitaxial film;
Forming a first intermediate layer mainly composed of an insulating material made of a compound of any one of Al, Ti, W and Zr on the surface of the second intermediate layer;
Activating the surface of the first intermediate layer and one main surface of the support substrate at room temperature;
The activated first surface of the first intermediate layer and the one principal surface of the support substrate are formed of a main component element constituting the support substrate, a main component element constituting the epitaxial film, Al, Ti, Joining both of them by sandwiching and contacting a metal material different from W and Zr;
Of the epitaxial film, at least a part of the dopant concentration changing region of the single crystal semiconductor substrate and the epitaxial film is changed depending on a dopant concentration so that a part continuing from the surface on the second intermediate layer side remains as a semiconductor layer. Selective etching using an etchant that changes the etching rate and removing,
By heating at a temperature higher than the temperature at which the metal element constituting the metal material and the main component element constituting the first intermediate layer start to aggregate, the metal atoms constituting the metal material are A step of moving and immobilizing the intermediate layer so that its concentration decreases as the distance from the surface in contact with the support substrate in the intermediate layer is increased.
The step of forming the first intermediate layer and the step of forming the second intermediate layer form the first intermediate layer or the second intermediate layer at a temperature at which the dopant of the epitaxial layer is not saturated, respectively. Manufacturing method. In the step of forming the first intermediate layer, the first intermediate layer is formed by an ALD method,
The method of manufacturing a composite substrate according to claim 5, wherein in the step of forming the second intermediate layer, the second intermediate layer is formed by a sputtering method or an ALD method.   The method for manufacturing a composite substrate according to claim 5, wherein, in the step of forming the epitaxial film, the epitaxial film is formed of Si using B as the dopant.

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