JP2014010212A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device of high display quality.SOLUTION: The liquid crystal display device comprises: an OCB liquid crystal display panel having a screen composed of a plurality of lines; control means for driving and controlling, in one frame period, a black writing period in which a black video signal is written to the liquid crystal display panel, a video writing period in which a video signal is written to the liquid crystal display panel following the black writing period, and a video holding period in which a written video signal is held following the video writing period, in this order; and lighting means which, in one frame period, turns on at least in the video holding period to illuminate the liquid crystal display panel. In the video writing period, the control means sequentially writes the video signal from a centre line of the screen toward upper and lower lines of the screen of the liquid crystal display panel.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  Liquid crystal display devices are utilized in various fields as display devices for OA equipment such as personal computers and televisions, taking advantage of features such as light weight, thinness, and low power consumption. In recent years, liquid crystal display devices are also used as mobile terminal devices such as mobile phones, display devices such as car navigation devices and game machines.

  For example, according to Patent Document 1, as a driving method for an OCB (Optically Compensated Bend) type liquid crystal display panel, a black writing period for writing a black video signal, a video writing period for writing a video signal in one frame period, and A driving method (ABC driving method) is disclosed in which drive control is performed in the order of a video holding period for holding a written video signal. In such a driving method, a black image is written at the beginning of one frame period, so that reverse transition of liquid crystal molecules can be prevented and a clear image can be obtained, and the backlight is turned on during the image holding period. There is an advantage that flickering and the like hardly occur in the video.

JP 2009-42423 A

  An object of the present embodiment is to provide a liquid crystal display device with good display quality.

According to this embodiment,
An OCB type liquid crystal display panel having a screen composed of a plurality of lines, a black writing period for writing a black video signal to the liquid crystal display panel in one frame period, and the liquid crystal display following the black writing period Control means for driving and controlling in order of a video writing period for writing a video signal to the panel and a video holding period for holding the video signal written following the video writing period, and at least the video holding in one frame period Lighting means for illuminating the liquid crystal display panel during the period, and the control means from the center line of the screen in the liquid crystal display panel to the upper and lower screen lines in the video writing period. A liquid crystal display device is provided in which video signals are sequentially written.

Moreover, according to this embodiment,
An OCB type liquid crystal display panel having a screen composed of a plurality of lines, a black writing period for writing a black video signal to the liquid crystal display panel in one frame period, and the liquid crystal display following the black writing period Control means for driving and controlling in order of a video writing period for writing a video signal to the panel and a video holding period for holding the video signal written following the video writing period, and at least the video holding in one frame period Illuminating means that illuminates the liquid crystal display panel during the period, and the control means changes the lines from the upper and lower screen lines of the liquid crystal display panel to the center line of the screen during the video writing period. A liquid crystal display device is provided in which video signals are sequentially written.

FIG. 1 is a diagram schematically showing a configuration of a liquid crystal display device according to the present embodiment. FIG. 2 is a cross-sectional view schematically showing a configuration of an OCB type liquid crystal display panel applicable to the liquid crystal display device shown in FIG. FIG. 3 is a diagram for explaining a driving method applicable to the OCB type liquid crystal display panel shown in FIG. FIG. 4 is a diagram for explaining the relationship between the transmittance of the liquid crystal display panel at the top and bottom of the screen and the lighting timing of the backlight. FIG. 5 is a diagram for explaining a first driving method applicable to the OCB type liquid crystal display panel of the first embodiment. FIG. 6 is a diagram for explaining the scanning timing of the gate line corresponding to each line constituting the screen. FIG. 7 is a diagram for explaining the relationship between the transmittance of the liquid crystal display panel at the top, bottom, and center of the screen and the lighting timing of the backlight. FIG. 8 is a diagram for explaining a second driving method applicable to the OCB type liquid crystal display panel of the second embodiment. FIG. 9 is a diagram for explaining the scanning timing of the gate line corresponding to each line constituting the screen. FIG. 10 is a diagram for explaining the relationship between the transmittance of the liquid crystal display panel and the lighting timing of the backlight at the top, bottom, and center of the screen.

  Hereinafter, the liquid crystal display device according to the present embodiment will be described with reference to the drawings.

  FIG. 1 is a diagram schematically showing a configuration of a liquid crystal display device according to the present embodiment. That is, this liquid crystal display device is an active matrix type liquid crystal display device, which is an OCB type liquid crystal display panel LPN, a control circuit CNT that functions as a control means for controlling driving of the liquid crystal display panel LPN, and a liquid crystal display panel And a backlight BL that functions as illumination means for illuminating the LPN.

  The liquid crystal display panel LPN is a transmissive type that selectively transmits backlight light from the backlight BL and displays an image. The liquid crystal display panel LPN includes a pair of substrates, that is, an array substrate AR, and a counter substrate CT arranged to face the array substrate AR. The array substrate AR and the counter substrate CT are bonded together by a sealing material (not shown). Such a liquid crystal display panel LPN has a screen DSP composed of a plurality of lines. This screen DSP corresponds to an active area for displaying an image, and is composed of a plurality of pixels PX arranged in a matrix of m × n (where m and n are positive integers). In FIG. 1, only one pixel is shown for the sake of simplicity.

  The array substrate AR includes n gate lines Y (Y1 to Yn) extending along the first direction D1, and m gate lines Y extending along the second direction D2 so as to intersect the gate lines Y, respectively. Source line X (X1 to Xm), m × n switching elements W arranged in each pixel PX, m × n pixel electrodes EP arranged in each pixel PX and connected to the switching element W, and the like. ing.

  The switching element W is configured by, for example, a thin film transistor (TFT). The gate electrode WG of the switching element W is electrically connected to the gate line Y (or the gate electrode WG is formed integrally with the gate line Y). The source electrode WS of the switching element W is electrically connected to the source line X (or the source electrode WS is formed integrally with the source line X). The drain electrode WD of the switching element W is electrically connected to the pixel electrode EP.

  Each of the n gate lines Y is connected to a gate driver YD. The gate driver YD supplies a scanning signal to the n gate lines Y based on control by the control circuit CNT. The m source lines X are connected to the source driver XD, respectively. The source driver XD supplies video signals (including black video signals) to the m source lines X based on control by the control circuit CNT. Note that these gate driver YD and source driver XD also constitute part of the control means of the present embodiment.

  On the other hand, the counter substrate CT includes a counter electrode ET and the like. The counter electrode ET is common to the plurality of pixels PX. That is, the counter electrode ET faces the pixel electrode EP of each pixel PX.

  In FIG. 1, only one pixel PX of the screen DSP is shown, but all m × n pixels PX have the same structure. That is, m pixels PX having the same structure are arranged along the first direction D1, and n pixels PX having the same structure are arranged along the second direction D2. One line constituting the screen DSP is constituted by m pixels PX arranged in the first direction D1. The gate electrodes WG of the switching elements W arranged in each line of pixels PX are connected to the same gate line Y. Therefore, when the scanning signal for turning on the switching element W is supplied to the gate line Y, the video signal can be written to the m pixels PX in one line.

  The backlight BL is disposed on the side facing the array substrate AR, which is the back side of the liquid crystal display panel LPN. That is, the backlight BL illuminates the liquid crystal display panel LPN from the array substrate AR side. As such a backlight BL, various forms can be applied, and any one using a light-emitting diode or a cold cathode tube as a light source can be applied. Description is omitted.

  The control circuit CNT includes a timing controller TC, a frame memory FM, a backlight control circuit BC, a liquid crystal driving circuit LC, and the like.

  The timing controller TC generates a control signal necessary for controlling the timing of storing and reading the video signal in the frame memory FM based on the synchronization signal. Further, the timing controller TC generates a control signal necessary for controlling the timing of turning on and off the backlight BL for the backlight control circuit BC. Further, the timing controller TC generates a control signal necessary for controlling the timing of writing the video signal to each pixel PX of the liquid crystal display panel LPN with respect to the liquid crystal driving circuit LC.

  The frame memory FM temporarily stores the supplied video signal based on the control signal from the timing controller TC. The frame memory FM is preferably configured as a random access memory capable of random access. In addition, since the frame memory FM stores, for example, a video signal for one frame and then the video signal of the next frame may be supplied before the stored video signal is read out, the frame memory FM stores about two frames. It is desirable to have a capacity.

  The backlight control circuit BC controls lighting and extinguishing of the backlight BL based on a control signal from the timing controller TC.

  The liquid crystal driving circuit LC supplies the gate driver YD with a scanning control signal necessary for supplying a scanning signal from the gate driver YD to each gate line Y. In addition, the liquid crystal driving circuit LC reads out the video signals stored in the frame memory FM in a predetermined order, performs predetermined processing as necessary, and supplies the video signals to the source driver XD for each pixel PX. The liquid crystal driving circuit LC generates a black video signal and supplies it to the source driver XD for each line of pixels PX.

  Next, the structure of the OCB type liquid crystal display panel LPN will be described in more detail below.

  FIG. 2 is a schematic cross-sectional view of the liquid crystal display panel LPN shown in FIG.

  The array substrate AR of the liquid crystal display panel LPN is formed using a light-transmitting insulating substrate 11 such as a glass plate. The array substrate AR includes a switching element W, an insulating film 12, a pixel electrode EP, a first alignment film 13 covering the pixel electrode EP, and the like on the first surface 11A of the insulating substrate 11, that is, the side facing the counter substrate CT. . The pixel electrode EP is formed of a light-transmitting conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

  The counter substrate CT of the liquid crystal display panel LPN is formed using an insulating substrate 21 having optical transparency such as a glass plate. The counter substrate CT includes a counter electrode ET, a second alignment film 22 that covers the counter electrode ET, and the like on the first surface 21A of the insulating substrate 21, that is, the side facing the array substrate AR. The counter electrode ET is made of a conductive material having optical transparency such as ITO. Note that the counter substrate CT may include a black matrix, a color filter layer, an overcoat layer, and the like as necessary.

  The array substrate AR and the counter substrate CT configured as described above are arranged in a state where the pixel electrode EP and the counter electrode ET are opposed to each other, and a spacer (not shown) (for example, integrally with one substrate) is interposed therebetween. A predetermined cell gap is formed through the formed columnar spacers. A liquid crystal layer LQ is held in the cell gap formed between the array substrate AR and the counter substrate CT.

  The liquid crystal layer LQ is composed of a liquid crystal composition including liquid crystal molecules 31 having positive dielectric anisotropy and optically positive uniaxiality. In the liquid crystal layer LQ, the liquid crystal molecules 31 are bend-aligned between the array substrate AR and the counter substrate CT in a predetermined display state in which a predetermined voltage (transition voltage) is applied to the liquid crystal layer LQ.

  A first optical compensation layer OD1 and a second optical compensation layer OD2 are disposed on the outer surface of the liquid crystal display panel LPN. The first optical compensation element OD1 and the second optical compensation element OD2 optically compensate for retardation of the liquid crystal layer LQ in a predetermined display state in which a voltage is applied to the liquid crystal layer LQ in the liquid crystal display panel LPN as described above. And has a polarizing plate and a retardation plate.

  The first optical compensation element OD1 is disposed on the second surface 11B of the insulating substrate 11 constituting the array substrate AR, that is, the surface facing the backlight BL. The second optical compensation element OD2 is disposed on the second surface 21B of the insulating substrate 21 constituting the counter substrate CT, that is, the surface on the observation side.

  In such an OCB type liquid crystal display panel LPN, the first alignment film 13 and the second alignment film 22 that hold the liquid crystal layer LQ are rubbed in directions parallel to each other. Due to the action of the first alignment film 13 and the second alignment film 22, the liquid crystal molecules 31 are splay aligned before the power is turned on.

  Then, after the power is turned on, an initialization process is performed before the display operation. In this initialization process, a transition voltage is applied to the liquid crystal layer LQ, and the alignment state of the liquid crystal molecules 31 is shifted from the splay alignment to the bend alignment by a relatively strong electric field corresponding to the transition voltage. The alignment state of the liquid crystal molecules 31 is maintained in the bend alignment during the display operation.

  In the display operation, when a white display voltage for displaying a white image (or an image having a gradation level corresponding to the maximum luminance) is applied to the liquid crystal layer LQ, the liquid crystal molecules 31 near the midplane of the liquid crystal layer LQ. Rises substantially perpendicular to the substrate, but as the array substrate AR and the counter substrate CT approach each other, the liquid crystal molecules 31 are inclined from the normal line of the substrate, and the liquid crystal molecules 31 in the vicinity of the substrate are in a direction substantially parallel to the substrate surface. It will be in a state inclined to. When displaying a black image (or an image having a gradation level corresponding to the lowest luminance) on the liquid crystal layer LQ, when a black display voltage (or black video signal) higher than the white display voltage is applied, the liquid crystal layer The liquid crystal molecules 31 of LQ are brought up in a substantially vertical state.

  In such an OCB type liquid crystal display panel LPN, the alignment state of the liquid crystal molecules 31 is such that a voltage application state or a voltage non-application state below a level at which the splay alignment energy and the bend alignment energy antagonize continues for a long time. Furthermore, the reverse transition from the bend alignment to the splay alignment occurs again.

  Therefore, in the OCB type liquid crystal display panel LPN, in order to prevent this reverse transition, a black display voltage is applied to the liquid crystal layer LQ within one frame period (black insertion drive method). Thereby, the bend alignment of the liquid crystal layer LQ is maintained.

  Next, a driving method applicable to the OCB type liquid crystal display panel LPN will be described with reference to FIG.

  Here, for example, a period from when the vertical synchronization signal VSYNC is turned on to once being turned off and then turned on again is defined as one frame period. This one frame period includes a black writing period, a video writing period, and a video holding period (holding period). The black writing period corresponds to a period during which the black video signal supplied from the liquid crystal driving circuit LC to the liquid crystal display panel LPN is written to each pixel PX of the liquid crystal display panel LPN. The video writing period corresponds to a period during which a video signal supplied from the liquid crystal driving circuit LC to the liquid crystal display panel LPN is written to each pixel PX of the liquid crystal display panel LPN. The hold period corresponds to a period for holding the video signal written in each pixel PX.

  For example, when the screen DSP is composed of 1200 lines, first, writing of a black video signal to the line 0001 located at the top of the screen DSP is started at the timing when the synchronization signal VSYNC is turned off. Thereafter, the black video signal is sequentially written from the line 0002 to the line 1200 to the lower line of the screen DSP (black writing period).

  After the writing of the black video signal to all the lines of the screen DSP is completed, the writing of the video signal to the uppermost line 0001 of the screen DSP is started. The video signal written to each pixel PX on the line 0001 is held. After completing the writing of the video signal to the line 0001, the video signal is sequentially written from the line 0002 to the line 1200 to the lower line of the screen DSP (video writing period). The video signals written to the pixels PX on each line are respectively held.

  The backlight BL is turned on at the timing when the writing of the video signal to all the lines of the screen DSP is completed. The backlight BL is turned off during the black writing period and the video writing period.

  On the other hand, in the case of such a driving method, since the backlight BL is turned on after the video writing to all the lines constituting the screen DSP is completed, the backlight BL is turned on after the video signal writing is completed. The time until lighting is different between the upper part and the lower part of the screen DSP. That is, for the upper line of the screen DSP, the backlight BL is turned on after a sufficient time has elapsed since the completion of the writing of the video signal, whereas for the lower line of the screen DSP, the video signal Immediately after the writing is completed, the backlight BL is turned on.

  As shown in FIG. 4, for example, in the upper part UP of the screen DSP from the line 0001 to the vicinity of the line 0300, the liquid crystal molecules 31 of the liquid crystal molecules 31 are displayed after the writing of the video signal is completed until the backlight BL is turned on. A time sufficiently longer than the response speed has elapsed. For this reason, the backlight BL is turned on in a state where the transition of the liquid crystal molecules 31 is completed. Therefore, in the liquid crystal display panel LPN, a transmittance corresponding to the video signal can be obtained.

  On the other hand, for example, in the lower LW from the line 0901 to the vicinity of the line 1200 of the screen DSP, the response speed of the liquid crystal molecules 31 is higher than the response speed of the liquid crystal molecules 31 after the writing of the video signal is completed and the backlight BL is turned on. A sufficiently long time has not passed. For this reason, the backlight BL may be lit in a state before the transition of the liquid crystal molecules 31 is completed. Therefore, in the liquid crystal display panel LPN, there is a case where the transmittance corresponding to the video signal cannot be obtained.

  When white is displayed on the entire screen DSP, the upper UP is brighter than the lower LW. As described above, in the screen DSP, it is required to improve the phenomenon in which the luminance distribution is asymmetric in the vertical direction.

  In view of this, the present embodiment provides an optimum driving method in which the luminance distribution in the in-plane DSP is vertically symmetric.

  FIG. 5 is a diagram for explaining a first driving method applicable to the OCB type liquid crystal display panel LPN of the first embodiment. Here, the video writing period is mainly described in detail, and detailed description of the black writing period and the video signal holding period is omitted.

  This first driving method is characterized by sequentially writing video signals from the center line of the screen DSP in the liquid crystal display panel LPN toward the upper and lower lines of the screen DSP in the video writing period of one frame period. To do. For example, when the screen DSP is composed of 1200 lines, the line 0001 to line 0600 corresponds to the first area DSP1 in the upper half of the screen DSP, and the line 0601 to line 1200 corresponds to the lower half of the screen DSP. Corresponds to the second area DSP2.

  In such a configuration of the screen DSP, in the first area DSP1 of the screen DSP, after the video signal is written to the line 0600, the video signal is sequentially written to the line 0599, the line 0598. Make a mistake. Similarly, in the second area DSP2 of the screen DSP, after the video signal is written to the line 0601, the video signal is sequentially written to the line 0602, the line 0603... The line 1199, and the line 1200.

  The backlight BL is turned on at the timing when the writing of the video signal to all the lines of the screen DSP is completed. The backlight BL is turned off during the black writing period and the video writing period.

  In the black writing period, black video signals may be written in the same order as in the video writing period. However, in the same way as described with reference to FIG. Thus, the black video signal may be sequentially written up to the line 1200, or the black video signal may be written by another method, and is not limited to a specific writing order.

  In the liquid crystal display panel LPN having the screen DSP composed of the first area DSP1 and the second area DSP2, the source driver for writing the video signal in the first area DSP1 and the second area DSP2 has a single configuration. A more specific video signal writing operation will be described.

  FIG. 6 is a diagram for explaining the scanning timing of the gate line corresponding to each line constituting the screen DSP.

  For example, when the screen DSP is composed of 1200 lines, first, in the video writing period, the video signal is written to the line 0600 located at the center of the screen DSP. Thereafter, the video signal is written to the line 0599 above the line 600 after the video signal is written to the line 0601 below the line 0600. Thereafter, writing of the video signal to the upper line and writing of the video signal to the lower line are alternately performed (line 0602 → line 0598 → line 0603 → line 0597... Line 1200 → line 0001). .

  For the liquid crystal display panel LPN having the screen DSP composed of the first area DSP1 and the second area DSP2, the first source driver for writing the video signal in the first area DSP1 and the second area DSP2 are used. In the configuration including the second source driver for writing the video signal, the writing of the video signal to the first area DSP1 and the writing of the video signal to the second area DSP2 may be performed simultaneously. For example, writing of video signals to the lines 0600 and 0601 and writing of video signals to the lines 0599 and 0602 may be performed simultaneously. In such a configuration, the video signal writing time can be shortened.

  FIG. 7 is a diagram for explaining the relationship between the transmittance of the liquid crystal display panel and the lighting timing of the backlight BL in the upper part UP, the lower part LW, and the central part CN of the screen DSP.

  For example, in the vicinity of the line 0600 in the center portion CN of the screen DSP, a time sufficiently longer than the response speed of the liquid crystal molecules 31 has elapsed between the completion of the writing of the video signal and the lighting of the backlight BL. doing. For this reason, the backlight BL is turned on in a state where the transition of the liquid crystal molecules 31 is completed. Therefore, in the liquid crystal display panel LPN, a transmittance corresponding to the video signal can be obtained.

  On the other hand, for example, in the upper UP from the line 0001 to the vicinity of the line 0300 and the lower LW from the line 0901 to the vicinity of the line 1200 of the screen DSP, the writing of the video signal is completed and the backlight BL is turned on. In the meantime, a time sufficiently longer than the response speed of the liquid crystal molecules 31 has not elapsed. For this reason, the backlight BL may be lit in a state before the transition of the liquid crystal molecules 31 is completed. Therefore, in the liquid crystal display panel LPN, there is a case where the transmittance corresponding to the video signal cannot be obtained.

  That is, the time from the completion of the writing of the video signal to the line of the center part CN of the screen DSP until the backlight BL is turned on is the line on the upper UP side of the screen DSP and the lower LW side of the screen DSP. This is longer than the time from the completion of the writing of the video signal to the line until the backlight BL is turned on. Note that the time from the completion of the writing of the video signal to the line on the upper side UP of the screen DSP to the lighting of the backlight BL is the writing of the video signal to the line on the lower LW side of the screen DSP. Is substantially the same as the time from when the backlight is completed until the backlight BL is turned on.

  For this reason, when the same video signal, for example, a white display voltage for displaying white in the entire screen DSP, is written to each line of the screen DSP, the luminance at the center CN is higher than that of the upper UP and the lower LW. Become. At this time, the luminance at the upper part UP and the lower part LW of the screen DSP is substantially the same. That is, by applying the first driving method, the central portion CN of the screen DSP is bright, and a symmetrical luminance distribution can be formed on the upper side and the lower side across the central portion CN. Therefore, it is possible to obtain a good display quality.

  Next, a second embodiment will be described. In addition, about the same structure as 1st Embodiment, the same referential mark is attached | subjected and detailed description is abbreviate | omitted.

  FIG. 8 is a diagram for explaining a second driving method applicable to the OCB type liquid crystal display panel LPN of the second embodiment. Here, the video writing period is mainly described in detail, and detailed description of the black writing period and the video signal holding period is omitted.

  This second driving method is characterized by sequentially writing video signals from the upper and lower lines of the screen DSP in the liquid crystal display panel LPN toward the center line of the screen DSP in the video writing period of one frame period. To do.

  That is, in the first area DSP1 of the screen DSP, after the video signal is written to the line 0001, the video signal is sequentially written to the line 0002, line 0003... Line 0599, and line 0600. Similarly, in the second area DSP2 of the screen DSP, after the video signal is written to the line 1200, the video signal is sequentially written to the line 1199, line 1198... Line 0602, line 0601.

  The backlight BL is turned on after a predetermined time has elapsed since the completion of the writing of the video signal to all the lines of the screen DSP. The time from when the writing of the video signal to all the lines is completed until the backlight BL is turned on is set to a time sufficiently longer than the response speed of the liquid crystal molecules 31. The backlight BL is preferably lit until black writing to the line in the screen DSP is started.

  In the black writing period, as in the first embodiment, the writing order of the black video signal is not limited to a specific writing order.

  A single source driver XD for writing a video signal in the first area DSP1 and the second area DSP2 with respect to the liquid crystal display panel LPN having the screen DSP composed of the first area DSP1 and the second area DSP2 described above. Now, a more specific video signal writing operation will be described.

  FIG. 9 is a diagram for explaining the scanning timing of the gate line corresponding to each line constituting the screen DSP.

  For example, when the screen DSP is composed of 1200 lines, first, in the video writing period, the video signal is written to the line 0001 located at the top of the screen DSP. Thereafter, the video signal is written to the line 1200 located at the bottom of the screen DSP. Subsequently, a video signal is written to the line 0002, a video signal is written to the line 1199, a video signal is written to the line 0003, and a video signal is written to the line 1198. Thereafter, similarly, the writing of the video signal to the upper line and the writing of the video signal to the lower line are alternately performed (line 0004 → line 1197 → line 0005 → line 1196... Line 0601). → line 0599 → line 0600).

  For the liquid crystal display panel LPN having the screen DSP composed of the first area DSP1 and the second area DSP2, the first source driver for writing the video signal in the first area DSP1 and the second area DSP2 are used. In the configuration including the second source driver for writing the video signal, the writing of the video signal to the first area DSP1 and the writing of the video signal to the second area DSP2 may be performed simultaneously. For example, the writing of video signals to the lines 0001 and 1200 and the writing of video signals to the lines 0002 and 1199 may be performed simultaneously. In such a configuration, the video signal writing time can be shortened.

  FIG. 10 is a diagram for explaining the relationship between the transmittance of the liquid crystal display panel and the lighting timing of the backlight BL in the upper part UP, the lower part LW, and the central part CN of the screen DSP.

  For example, in the vicinity of the line 0600 in the center portion CN of the screen DSP, a time sufficiently longer than the response speed of the liquid crystal molecules 31 has elapsed between the completion of the writing of the video signal and the lighting of the backlight BL. doing. For this reason, the backlight BL is turned on in a state where the transition of the liquid crystal molecules 31 is completed. Therefore, in the liquid crystal display panel LPN, a transmittance corresponding to the video signal can be obtained.

  On the other hand, for example, in the upper UP from the line 0001 to the vicinity of the line 0300 and the lower LW from the line 0901 to the vicinity of the line 1200 of the screen DSP, the writing of the video signal is completed and the backlight BL is turned on. In the meantime, a time sufficiently longer than the response speed of the liquid crystal molecules 31 has elapsed, but black writing is started while the backlight BL is lit. For this reason, in the liquid crystal display panel LPN, there is a case where the transmittance corresponding to the video signal cannot be obtained.

  That is, the time from the completion of the writing of the video signal to the line of the center part CN of the screen DSP until the backlight BL is turned on is the line on the upper UP side of the screen DSP and the lower LW side of the screen DSP. This is shorter than the time from the completion of the writing of the video signal to the line until the backlight BL is turned on. In addition, during the period in which the backlight BL is lit, the writing of the black video signal to the upper UP line of the screen DSP and the lower LW side line of the screen DSP is started. Note that the time during which the backlight BL is lit during the video signal holding period in the line on the upper side of the screen DSP is the backlight BL during the video signal holding period in the line on the lower LW side of the screen DSP. Is approximately equivalent to the time when is lit.

  For this reason, when the same video signal, for example, a white display voltage for displaying white in the entire screen DSP, is written to each line of the screen DSP, the luminance at the center CN is higher than that of the upper UP and the lower LW. Become. At this time, the luminance at the upper part UP and the lower part LW of the screen DSP is substantially the same. That is, by applying the second driving method, the central portion CN of the screen DSP is bright, and a symmetrical luminance distribution can be formed on the upper side and the lower side across the central portion CN. Therefore, it is possible to obtain a good display quality.

  The selection between the first driving method and the second driving method is determined by whether or not the time required for scanning the gate line is sufficient for one frame. If the time is sufficient, the first driving method is effective. If there is not enough, the second driving method is effective.

  As described above, according to this embodiment, it is possible to provide a liquid crystal display device with good display quality.

  In addition, although some embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  For example, a scan backlight may be combined with the liquid crystal display panel LPN described above. That is, for a liquid crystal display panel LPN having a screen DSP constituted by a plurality of areas, a backlight BL having a lighting area corresponding to each area is prepared, and each area of the liquid crystal display panel LPN is supplied to each area. A configuration may be adopted in which the lighting regions of the backlight BL are sequentially switched in accordance with the period of writing and holding the video signal.

LPN ... Liquid crystal display panel AR ... Array substrate CT ... Counter substrate LQ ... Liquid crystal layer DSP ... Screen UP ... Upper CN ... Center portion LW ... Lower PX ... Pixel EP ... Pixel electrode W ... Switching element ET ... Counter electrode BL ... Backlight

Claims (5)

An OCB type liquid crystal display panel having a screen composed of a plurality of lines;
In one frame period, a black writing period for writing a black video signal to the liquid crystal display panel, a video writing period for writing a video signal to the liquid crystal display panel following the black writing period, and a video writing period Control means for driving and controlling in order of the video holding period for holding the written video signal;
Illuminating means that illuminates at least the video holding period and illuminates the liquid crystal display panel in one frame period,
The liquid crystal display device, wherein the control means sequentially writes video signals from the center line of the liquid crystal display panel toward the upper and lower screen lines during the video writing period.   The time from when the writing of the video signal to the line at the center of the screen is completed until the lighting unit is turned on is after the writing of the video signal to the upper and lower lines of the screen is completed. 2. The liquid crystal display device according to claim 1, wherein the time until the illumination unit is turned on is longer. An OCB type liquid crystal display panel having a screen composed of a plurality of lines;
In one frame period, a black writing period for writing a black video signal to the liquid crystal display panel, a video writing period for writing a video signal to the liquid crystal display panel following the black writing period, and a video writing period Control means for driving and controlling in order of the video holding period for holding the written video signal;
Illuminating means that illuminates at least the video holding period and illuminates the liquid crystal display panel in one frame period,
The liquid crystal display device, wherein the control means sequentially writes video signals from the upper and lower lines of the liquid crystal display panel toward the center line of the screen in the video writing period. The time from when the writing of the video signal to the line at the center of the screen is completed until the lighting unit is turned on is after the writing of the video signal to the upper and lower lines of the screen is completed. Shorter than the time until the illumination means is turned on,
4. The liquid crystal display device according to claim 3, wherein writing of a black video signal to the upper line and the lower line of the screen is started during a period in which the illumination unit is lit.   In the liquid crystal display panel, when the same video signal is written to each line of the screen, the brightness at the center of the screen is higher than the brightness at the upper side and the lower side of the screen, and the upper side of the screen and the screen across the screen center. 4. The liquid crystal display device according to claim 1, wherein a symmetrical luminance distribution is formed on the lower side.

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