JP2013257202A - Operation analyzing method for integrated circuit and operation analyzing device for integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an operation analyzing method for an integrated circuit and an operation analyzing device for an integrated circuit that can accurately specify by which circuit element light is emitted.SOLUTION: A circuit element is placed at a predetermined clock period, and a predetermined signal waveform is input to the circuit element. Light emission positions and light emission quantities of an integrated circuit in a first and a second period including respective timing points of rising and falling of a clock waveform defining the predetermined clock period are detected repeatedly over a plurality of clock periods. Then first to fourth integration data are generated by integrating, among a plurality of pieces of detection data thus obtained, respective detection data in a period in which the predetermined signal waveform stays in a first period, a period in which the predetermined signal waveform changes from the first period to a second period, a period in which the predetermined signal waveform stays in the second state, and a period in which the predetermined signal waveform changes from the second period to the first period, for each period over the plurality of clock periods.

Description

  The present invention relates to an integrated circuit operation analysis method and an integrated circuit operation analysis apparatus.

  Patent Document 1 describes an apparatus for detecting a defective portion inside an IC using an emission microscope. This apparatus includes a control circuit that transfers light emission data to the image processing apparatus in synchronization with the clock signal of the IC. The control circuit transfers the light emission data in the time zone excluding the transition timing of the clock signal to the image processing apparatus.

JP 2002-031669 A

  When an integrated circuit such as an LSI is operated, the semiconductor emits light slightly according to the movement of current in the internal circuit. Such light emission is called switching light emission. There is a method of confirming the operation of the integrated circuit or specifying the failure position by detecting the position and amount of light emission of this slight switching light emission. However, with the recent miniaturization of integrated circuits, it has become difficult to specify the light emission position accurately. The individual transistors constituting the integrated circuit are formed in a very small region with a side of 0.6 μm, for example. On the other hand, the wavelength of light that can be transmitted through silicon, which is the main constituent material of an integrated circuit, is 1.1 μm or more, and the accuracy in specifying the position of the light emitting point of such a wavelength is at most about 1 μm. Therefore, even if light emission is detected, it is difficult to accurately specify which circuit element emits light.

  The present invention has been made in view of such problems, and provides an integrated circuit operation analysis method and an integrated circuit operation analysis apparatus capable of accurately specifying which circuit element emits light. The purpose is to do.

  In order to solve the above-described problems, an operation analysis method for an integrated circuit according to the present invention is a method for analyzing an operation or abnormality of a circuit element by measuring light emission during operation of the circuit element included in the integrated circuit. And (1) a signal input step for operating the circuit element at a predetermined clock period and inputting a predetermined signal waveform to the circuit element; and (2) a rising timing of the clock waveform defining the predetermined clock period. A detection step of repeatedly detecting the light emission position and light emission amount of the integrated circuit in the second period including the timing of the falling edge of the clock waveform and the light emission position and light emission amount of the integrated circuit in one period, over a plurality of clock cycles; (3) A predetermined signal waveform among a plurality of detection data obtained in the first and second periods of a plurality of clock cycles. First integrated data obtained by integrating detection data for a period for maintaining the first state over a plurality of clock cycles, detection data for a period during which a predetermined signal waveform transitions from the first state to the second state Second integrated data obtained by integrating over a plurality of clock cycles, third integrated data obtained by integrating over a plurality of clock cycles detection data during a period in which the predetermined signal waveform maintains the second state, and An integration that generates at least one integration data among the fourth integration data obtained by integrating the detection data during a period in which the predetermined signal waveform transitions from the second state to the first state over a plurality of clock cycles. And a circuit element is specified from the position of a peak included in at least one integrated data.

  Further, the operation analysis method of the integrated circuit generates at least two pieces of integrated data among the first to fourth pieces of integrated data in the integrating step, and (4) one of at least two pieces of integrated data after the integrating step. A difference calculation step of generating difference data by calculating a difference between the integration data or the sum of two or more integration data and the sum of other integration data or other two or more integration data, and the at least one integration Instead of the peak included in the data, the circuit element may be specified from the position of the peak included in the difference data.

  The integrated circuit operation analysis method generates at least two pieces of integrated data among the first to fourth pieces of integrated data in the integration step, and (5) the number of detection data used for the integration after the integration step. Normalize by dividing at least two pieces of integrated data, and out of at least two standardized pieces of integrated data, the sum of one piece of integrated data or two or more pieces of integrated data and other pieces of integrated data or two or more pieces of integrated data A difference calculation step of calculating a difference with the sum of data to generate difference data is further provided, and a circuit element is specified from a position of a peak included in the difference data instead of a peak included in at least one integrated data. May be a feature.

  In addition, the operation analysis method of the integrated circuit may further include (6) a centroid calculating step of calculating the centroid of the light emitting point included in the difference data after the difference calculating step.

  The operation analysis method of the integrated circuit may further include (7) a data combination step of generating combined data including the barycentric position information of a plurality of peaks after the barycentric calculation step.

  An integrated circuit operation analysis apparatus according to the present invention is an apparatus for analyzing an operation or abnormality of a circuit element by measuring light emission during operation of the circuit element included in the integrated circuit. Integration in a first period including a signal input unit for operating the element at a predetermined clock period and inputting a predetermined signal waveform to the circuit element, and (2) a rising timing of the clock waveform defining the predetermined clock period A detection unit that repeatedly detects the light emission position and light emission amount of the integrated circuit in the second period including the light emission position and light emission amount of the circuit and the falling timing of the clock waveform; Of a plurality of detection data obtained in the first and second periods of the clock cycle, detection of a period during which a predetermined signal waveform maintains the first state. First integration data obtained by integrating data over a plurality of clock cycles, and detection data for a period during which a predetermined signal waveform transitions from the first state to the second state can be obtained over a plurality of clock cycles. Second integration data, third integration data obtained by integrating detection data during a period in which the predetermined signal waveform maintains the second state over a plurality of clock cycles, and the predetermined signal waveform in the second state And an integration unit for generating at least one integration data among the 4th integration data obtained by integrating the detection data during the period of transition from the first state to the first state over a plurality of clock cycles.

  In the integrated circuit operation analysis apparatus, the integration unit generates at least two pieces of integrated data among the first to fourth pieces of integrated data, and (4) one piece of integrated data or at least two pieces of at least two pieces of integrated data. A difference calculation unit that generates a difference data by calculating a difference between the sum of the accumulated data and the sum of the other accumulated data or the other two or more accumulated data.

  In the integrated circuit operation analysis apparatus, the integrating unit generates at least two pieces of integrated data among the first to fourth pieces of integrated data, and (5) at least two pieces of integrated data in the number of detection data used for the integration. Normalize by dividing the data, out of at least two normalized integration data, the sum of one integration data or two or more integration data, and the other integration data or the sum of two or more other integration data A difference calculating unit that calculates the difference and generates difference data may be further provided.

  In addition, the integrated circuit operation analysis apparatus may further include (6) a centroid calculating unit that calculates the centroid of the light emitting points included in the difference data.

  The integrated circuit operation analysis apparatus may further include (7) a data combining unit that generates combined data including barycentric position information of a plurality of peaks.

  According to the integrated circuit operation analysis method and the integrated circuit operation analysis apparatus of the present invention, when analyzing the operation or abnormality of a circuit element by measuring light emission during operation of the circuit element included in the integrated circuit, Which circuit element emits light can be specified accurately.

It is a flowchart which shows the operation | movement analysis method which concerns on 1st Embodiment. (A) It is a figure which shows an example of the clock waveform which prescribes | regulates a predetermined clock period. (B) It is a figure which shows an example of the predetermined | prescribed signal waveform input into the circuit element of analysis object. (C) It is a figure which illustrates the light emission timing and light emission amount in the circuit element of analysis object. (A) It is a figure which shows an example of the clock waveform which prescribes | regulates a predetermined clock period. (B) It is a figure which shows an example of the predetermined | prescribed signal waveform input into the circuit element of analysis object. It is a figure which shows each integration data in the circuit element of analysis object. It is a figure which shows each integration data in circuit elements other than an analysis object. It is a figure which shows the example of the 2nd and 4th integration data notionally. It is a figure which shows the example of the 1st and 3rd integration data notionally. It is a figure which shows the example of difference data notionally. It is a figure which shows the example of 2nd integration data notionally. It is a figure which shows the example of 4th integration data notionally. It is a figure which shows the example of 1st integration data notionally. It is a figure which shows the example of 3rd integration data notionally. It is a figure which shows the concept of a gravity center calculation. It is a figure which shows notionally the example of the joint data produced | generated by the data joint step. It is a figure which shows the structure of the operation analysis apparatus of the integrated circuit which concerns on 2nd Embodiment. It is a sectional side view which shows the specific structural example of a position detection type photomultiplier tube.

  Embodiments of an integrated circuit operation analysis method and an integrated circuit operation analysis apparatus according to the present invention will be described below in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

(First embodiment)
In the operation analysis method for an integrated circuit according to the first embodiment of the present invention, light emission (switching light emission) at the time of operation of a plurality of circuit elements such as transistors included in the integrated circuit is measured. Analyze movements or abnormalities individually. FIG. 1 is a flowchart showing an operation analysis method according to the present embodiment. As shown in FIG. 1, the motion analysis method of the present embodiment includes a signal input step S11, a detection step S12, an integration step S13, a difference calculation step S14, a centroid calculation step S15, a data combination step S16, and an analysis step S17. I have.

  In the signal input step S11, a plurality of circuit elements included in the integrated circuit are operated at a predetermined clock cycle, and a predetermined signal waveform is input to each circuit element. Here, FIG. 2 shows each of the clock waveform CL (FIG. 2 (a)) defining a predetermined clock cycle and the predetermined signal waveform S1 (FIG. 2 (b)) input to the circuit element to be analyzed. It is a figure which shows an example. In FIGS. 2A and 2B, the horizontal axis represents time, and the vertical axis represents the signal level. As shown in FIG. 2A, the clock waveform CL has a constant rise from the low (Lo) state to the high (Hi) state and a constant fall from the high (Hi) state to the low (Lo) state. It mainly contains a waveform that repeats with a period T. Here, the time from the rise to the fall and the time from the fall to the rise are both T / 2.

  The predetermined signal waveform S1 is a logic signal waveform in each circuit element when the test signal is input, and has a unique pattern for each circuit element. As shown in FIG. 2B, the predetermined signal waveform S1 transitions from the first state (typically low state) to the second state (typically high state) at an arbitrary timing. In addition, it mainly includes a signal waveform that irregularly repeats the operation of transitioning from the second state to the first state at another arbitrary timing. These transition timings in the predetermined signal waveform S1 substantially coincide with any one of the rising and falling edges of the clock waveform CL shown in FIG.

  FIG. 2C illustrates the light emission timing and the light emission amount in the circuit element to be analyzed. The vertical axis in FIG. 2C represents the light emission amount. As shown in FIG. 2C, in the circuit element, the transition timing from the first state to the second state in the predetermined signal waveform S1 (FIG. 2B), and the second state to the second state. Slight switching light emission P1 occurs at the transition timing to the state of 1. In addition to these timings, dark light emission P2 due to noise occurs randomly. Since the switching light emission P1 due to the transition of the signal waveform S1 is extremely weak, it is difficult to distinguish it from the dark light emission P2 based on the magnitude of the light emission, as shown in FIG.

  Subsequently, in the detection step S12, the time emission waveform of the integrated circuit is measured using a time-resolved measurement device capable of detecting the position. FIG. 3A shows the same clock waveform CL as that shown in FIG. In this detection step S12, the measurement interval of the time-resolved measuring device is made equal to the half cycle (T / 2) of the clock waveform CL, and the first period (period of FIG. 3A) including the rising timing of the clock waveform CL. The light emission position and light emission amount of the integrated circuit in Ta), and the light emission position and light emission amount of the integrated circuit in the second period (period Tb in FIG. 3A) including the falling timing of the clock waveform CL are represented by a plurality of clocks. Detect repeatedly over a period. Note that the first period Ta and the second period Tb are preferably equal in length to facilitate later calculations.

Subsequently, in the integration step S13, the detection data obtained in the detection step S12 is classified, and the detection data is integrated for each classification. FIG. 3B shows the same predetermined signal waveform S1 as that shown in FIG. In this integration step S13, a plurality of detection data obtained in a first period Ta of a plurality of clock cycles and a plurality of detection data obtained in a second period Tb of a plurality of clock cycles are classified into the following four types. Classified into detection data.
First detection data: detection data in a period (period T1 shown in FIG. 3B) in which the predetermined signal waveform S1 input to the circuit element to be analyzed maintains the first state (for example, the low state). Second detection data: a period during which the predetermined signal waveform S1 input to the circuit element to be analyzed transitions from the first state to the second state (for example, the high state) (period shown in FIG. 3B) Detection data of T2) and third detection data: detection data of a period during which the predetermined signal waveform S1 input to the circuit element to be analyzed maintains the second state (period T3 shown in FIG. 3B) Fourth detection data: detection data in a period (period T4 shown in FIG. 3B) in which the predetermined signal waveform S1 input to the circuit element to be analyzed transitions from the second state to the first state

  In the above classification, the predetermined signal waveform S1 input to the circuit element to be analyzed is preferably obtained by simulation based on the test signal waveform input to the integrated circuit and the circuit configuration of the integrated circuit, for example. Further, the clock waveform CL may be obtained from a clock signal input to the integrated circuit at the time of analysis, or may be obtained from switching light emission resulting from the operation of the clock signal in the integrated circuit.

  In the integration step S13, the first to fourth integrated data are generated by integrating the first to fourth detection data classified as described above over a plurality of clock cycles. FIG. 4 is a diagram conceptually showing the distribution of integrated data values in the circuit element to be analyzed. The horizontal axis represents the position, and the vertical axis represents the integrated value. 4 (a) shows the first integrated data, FIG. 4 (b) shows the second integrated data, FIG. 4 (c) shows the third integrated data, and FIG. 4 (d) shows the fourth integrated data. The integrated data is shown.

As described above, since there is no transition of the predetermined signal waveform S1 in the periods T1 and T3 shown in FIG. 3, even if the detection data of these periods is accumulated, only the random dark emission P2 is accumulated. As shown in FIGS. 4A and 4C, the integrated data is almost flat. On the other hand, since there is a transition of the predetermined signal waveform S1 in the periods T2 and T4 shown in FIG. 3, as shown in FIG. 4B and FIG. Since the data values by the switching light emission P1 are integrated over a plurality of clock cycles, peaks P3 and P4 appear. Note that the magnitude of the peak value of the peak P3 depends on the number N _R of accumulated second detection data. The number N _R of second detection data is equal to the number of times of switching light emission P1 in the period T2 within the measurement time (that is, the number of transitions from the first state to the second state). Similarly, the magnitude of the peak value of the peak P4 is dependent on the number N _F of the fourth detection data accumulated. The number N _F of the fourth detection data is equal to the frequency of switching the light emitting P1 in the period T4 in the measuring time (i.e. the number of transitions from the second state to the first state). Note that the number N _R of the second detection data and the number N _F of the fourth detection data are basically the same.

  FIG. 5 is a diagram conceptually showing the distribution of integrated data values in circuit elements other than the analysis target. The horizontal axis represents time, and the vertical axis represents the integrated value. 5A shows the first integrated data, FIG. 5B shows the second integrated data, FIG. 5C shows the third integrated data, and FIG. 5D shows the fourth integrated data. The integrated data is shown.

  In most cases, the signal waveform input to the circuit element other than the analysis target is different from the signal waveform S1 of the analysis target circuit element, and it is very rare that these waveforms are the same. Therefore, the switching light emission P1 is generated substantially equally in each of the periods T1 to T4 shown in FIG. Therefore, as shown in FIGS. 5 (a) to 5 (d), when the detection data of these periods are integrated, a peak P5 of almost equal size appears in each period, although there is some deviation. To do. The peak values of these peaks P5 are smaller than the peak values of the aforementioned peaks P3 and P4.

  Subsequently, in the difference calculation step S14, among the first to fourth integration data obtained in the integration step S13, one integration data or the sum of two or more integration data and other integration data or other two or more integration data. The difference data is generated by calculating the difference with the sum of the integrated data. Hereinafter, the difference calculation pattern in the difference calculation step S14 will be described in detail.

<Calculation of difference between second or fourth integration data and first or third integration data>
FIG. 6 is a diagram conceptually showing the second and fourth integrated data R and F. FIG. 6A shows the integrated data of the entire integrated circuit, and FIG. 6B shows the distribution of integrated values on the straight line A shown in FIG. 6A. FIG. 7 is a diagram conceptually showing the first and third integrated data L and H. FIG. 7A shows integrated data of the entire integrated circuit, and FIG. 7B shows a distribution of integrated values on the straight line A shown in FIG. 7A.

  As shown in FIG. 6, the second integrated data R and the fourth integrated data F include a peak P3 (or P4) caused by the switching light emission P1 in the circuit element to be analyzed, and a plurality of data other than the analysis object. A plurality of peaks P5 caused by the switching light emission P1 in the circuit element and a noise d caused by the dark light emission P2 are included. On the other hand, as shown in FIG. 7, the first integrated data L and the third integrated data H do not include a peak in the circuit element to be analyzed, and a plurality of circuit elements other than the analysis target in plural. Only the peak P5 and the noise d are included. Therefore, by calculating the difference between the second or fourth integrated data R (F) and the first or third integrated data L (H), the switching light emission P1 and the dark light emission P2 in the circuit elements other than the analysis target. The data including only the peak P3 (or P4) (hereinafter referred to as difference data) can be obtained. FIG. 8 is a diagram conceptually showing such difference data D1, in which FIG. 8 (a) shows integrated data of the entire integrated circuit, and FIG. 8 (b) is shown in FIG. 8 (a). The distribution of integrated values on the straight line A is shown.

Further, the above difference calculation may be modified as follows. That is, normalization is performed by dividing the integrated value of the second or fourth integrated data R (F) by the number N _R (N _F ) of detection data used for integrating the integrated data, and the first Alternatively, normalization is performed by dividing the integrated value L (H) of the third integrated data by the number N _L (N _H ) of detection data used for integrating the integrated data, and after these normalization (after division) ) Second or fourth integrated data R (F) and the first or third integrated data L (H) after normalization (after division) may be calculated.

In the difference calculation as described above, the integrated values of the first to fourth integrated data are represented as L, R, H, and F, respectively, and the number of detection data used for the integration of the first to fourth integrated data is represented. By representing each of them as N _L , N _R , N _H , and N _F , representing the difference between the accumulated data with a symbol (−), and representing the division with a symbol (/), the following can be simply expressed as follows. it can.
Calculation of the difference between the second or fourth integrated data and the first or third integrated data:
RL, FL, RH, FH
Calculation of the difference between the standardized second or fourth integrated data and the standardized first or third integrated data:
R / N _R -L / N _L , F / N _F -L / N _L , R / N _R -H / N _H , F / N _F -H / N _H

Further, in the difference calculation step S14, the following difference calculation may be performed instead of the above difference calculation (following the above notation rule).
R / N _R − (H / N _H + L / N _L ) / 2
R / N _R − (H + L) / (N _H + N _L )
F / N _F- (H / N _H + L / N _L ) / 2
F / N _F- (H + L) / (N _H + N _L )
(R + F) / N _R −2H / N _H
(R + F) / N _R -2L / N _L
(R + F) / N _R − (H / N _H + L / N _L )
(R + F) / N _R -2 (H + L) / (N _H + N _L )

<Difference calculation between second integration data and fourth integration data>
FIG. 9 is a diagram conceptually showing the second integrated data R. FIG. 9A shows integrated data of the entire integrated circuit, and FIG. 9B shows distribution of integrated values on the straight line A shown in FIG. 9A. FIG. 10 is a diagram conceptually showing the fourth integrated data F. FIG. 10A shows integrated data of the entire integrated circuit, and FIG. 10B shows a distribution of integrated values on the straight line A shown in FIG.

As shown in FIGS. 9 and 10, the peak P3 included in the second integrated data R and the peak P4 included in the fourth integrated data F may have greatly different peak values. Therefore, the difference between the second integrated data R and the fourth integrated data F (or the difference between the standardized second integrated data R and the standardized fourth integrated data F) is calculated. Thus, difference data similar to that in FIG. 8 including only the peaks in the circuit element to be analyzed can be obtained. Note that, according to the above-described notation rule, this difference calculation can be expressed as R−F or (R−F) / N _R.

<Calculation of difference between first integrated data and third integrated data>
FIG. 11 is a diagram conceptually showing the first integrated data L. As shown in FIG. FIG. 11A shows the integrated data of the entire integrated circuit, and FIG. 11B shows the distribution of integrated values on the straight line A shown in FIG. FIG. 12 is a diagram conceptually showing the third integrated data H. FIG. 12A shows integrated data of the entire integrated circuit, and FIG. 12B shows a distribution of integrated values on the straight line A shown in FIG. Note that the third integrated data H shown in FIG. 12 includes a peak P6 due to leakage light emission (abnormal light emission due to leakage current).

As shown in FIG. 11 and FIG. 12, when the peak P6 due to the leak light emission is included only in the third integrated data H, the difference between the first integrated data L and the third integrated data H (or By calculating the standardized first integrated data L and the standardized third integrated data H), the same differential data as in FIG. 8 including only the peak P6 due to the leak emission is obtained. Can do. Note that, according to the notation rules described above, this difference calculation can be expressed as _HL or H / N _H -L / N _L.

を差し引いてもよい。これにより、大きさ（Ｎ×σ）の量子ノイズを除去することができる。但し、σは量子ノイズの分散であり、Ｎは、除去したいノイズの大きさによって決定される定数である。或いは、上記の差分演算により得られた結果に対して（若しくは、差分演算前の積算データに対して）フィルタリング処理を行うことにより量子ノイズを除去してもよい。 From the results obtained by any of the above difference calculations,

May be deducted. Thereby, the quantum noise of magnitude (N × σ) can be removed. However, (sigma) is dispersion | distribution of quantum noise, N is a constant determined by the magnitude | size of the noise to remove. Or you may remove quantum noise by performing a filtering process with respect to the result obtained by said difference calculation (or with respect to the integration data before difference calculation).

  Subsequently, in the center of gravity calculation step S15 in FIG. 1, the center of gravity of the peak (for example, the peak P3 or P4 in FIG. 8) included in the difference data obtained in the difference calculation step S14 is obtained. The peak included in the difference data is a data group extending over a certain range, and the range is substantially equal to the expansion of the switching light emission P1 (see FIG. 2) in the circuit element. Therefore, in order to specify the position of the circuit element smaller than the range of the switching light emission P1 in more detail, it is preferable to obtain the center of gravity of the data group included in the range.

  FIG. 13 is a diagram showing the concept of such a centroid calculation. As shown in FIG. 13A, it is assumed that the difference data D2 before the center of gravity calculation includes a peak P7 indicating switching light emission of the circuit element to be analyzed. By calculating the center of gravity of the peak P7, data D3 including a point P8 indicating the position of the center of gravity of the peak P7 is obtained as shown in FIG. Thereby, the position of the circuit element to be analyzed can be specified with higher accuracy.

  Subsequently, in the data combination step S16 in FIG. 1, a plurality of centroid data generated in the previous step S15 are combined to generate combined data including centroid position information of a plurality of peaks whose centroid positions are specified. . FIG. 14 is a diagram conceptually illustrating an example of such combined data. The combined data D4 shown in FIG. 14 includes a plurality of points P8 each indicating the position of the center of gravity of a plurality of peaks. Such combined data D4 is suitably generated by superimposing a plurality of difference data obtained by repeating steps S11 to S15 for each of a plurality of circuit elements.

  Subsequently, in analysis step S17 of FIG. 1, a plurality of circuit elements corresponding to the plurality of peaks are specified from the plurality of peak positions included in the combined data D4 obtained in step S16. Then, based on the magnitude of the peak value corresponding to each circuit element, the state of operation of each circuit element and the presence / absence of an abnormality are analyzed.

  According to the operation analysis method of the integrated circuit according to the present embodiment described above, the switching light emission of a specific circuit element can be accurately, easily and quickly identified from the switching light emission of a large number of circuit elements in the integrated circuit. can do. Based on the state of the switching light emission, the operation and abnormality of the circuit element can be analyzed.

  If abnormal light emission is included, a short time range including the timing of the abnormal light emission is extracted, and the light emission image is reconstructed to perform position measurement with a good S / N.

  Note that in the method described in the above-mentioned prior art document 1, image data is acquired only during a period in which there is no clock waveform transition. However, with such a method, the types of abnormalities that can be detected are extremely limited. For example, although switching is performed by a transistor or the like, there is a possibility that an abnormality that occurs late with respect to the clock waveform cannot be detected. In other words, an open fault or a short fault can be found, but in the case of analyzing whether or not the designed performance is sufficiently obtained such as a slightly high contact resistance, the method described in the prior document 1 is used. Can not cope. On the other hand, according to the operation analysis method of the present embodiment described above, the predetermined signal waveform S1 is classified into four states, so that various analyzes desired by the analyst can be performed.

  Further, as in the present embodiment, by performing the difference calculation step S14 for calculating the difference of the integrated data, the switching light emission P1 and the dark light emission P2 in the circuit elements other than the analysis target are removed, and the circuit elements in the analysis target are analyzed. Only the peak due to the switching light emission P1 can be suitably extracted. Therefore, the position of the peak can be specified more accurately.

  Further, as in the present embodiment, by performing the centroid calculation step S15 for calculating the centroid of the peak included in the difference data, the detailed position of the peak (that is, the detailed position of the circuit element to be analyzed) can be obtained, for example. It can be specified with a finer precision than the resolution of the time-resolved measuring device.

  In this embodiment, the peak position is specified by using four pieces of integrated data such as the first integrated data L, the second integrated data R, the third integrated data H, and the fourth integrated data F. However, at least one of these integrated data L, R, H, and F may be used for the analysis. For example, in the integration step S13, any one of these integration data is generated, and a peak (for example, the peak P3 or P4 shown in FIG. 6) included in the one integration data is discriminated based on its size, The circuit element that is the source of the switching light emission P1 may be specified from the peak position. Thereby, the effect of this embodiment mentioned above can be acquired suitably. In this case, the difference calculation step S14 can be omitted.

  Even when the difference calculation step S14 is performed, at least two pieces of integration data necessary for the difference calculation may be generated in the integration step S13, and all four pieces of integration data L, R, H, and F are not necessarily generated. Even if it does not do, the effect of this embodiment mentioned above can be acquired suitably.

  In the present embodiment, two-dimensional detection data is acquired in the detection step S12, and the calculation is performed using the two-dimensional detection data. However, the detection data is one-dimensional or zero-dimensional. There may be.

  In addition, all or at least one of the difference calculation step S14, the centroid calculation step S15, and the data combination step S16 of the present embodiment may be omitted. Even when these are omitted, the above-described effects of the present embodiment can be suitably obtained.

(Second Embodiment)
FIG. 15 is a diagram showing the configuration of the integrated circuit operation analysis apparatus 10 according to the second embodiment of the present invention. The operation analysis apparatus 10 is an apparatus capable of performing the operation analysis method of the first embodiment described above, and in order to analyze the operation or abnormality of a circuit element included in the integrated circuit 50, The switching emission P1 at is measured. As shown in FIG. 15, the motion analysis apparatus 10 of this embodiment includes a signal input unit 20, a detection unit 30, and a data processing unit 40.

  The signal input unit 20 performs the signal input step S11 of the first embodiment. That is, the signal input unit 20 supplies the clock signal having the clock waveform CL (see FIG. 2) to the integrated circuit 50, thereby causing the circuit elements of the integrated circuit 50 to operate at a predetermined clock cycle. The signal input unit 20 supplies the integrated circuit 50 with a test signal for inputting a predetermined signal waveform S1 (see FIG. 2) to the circuit elements of the integrated circuit 50. The clock signal is also provided to a position time measurement circuit 32 of the detection unit 30 described later.

  The detection unit 30 performs the detection step S12 of the first embodiment. That is, the detection unit 30 includes the light emission position and light emission amount of the integrated circuit 50 in the first period Ta (see FIG. 3) including the rising timing of the clock waveform CL, and the falling timing of the clock waveform CL. The light emission position and light emission amount of the integrated circuit 50 in the second period Tb (see FIG. 3) are repeatedly detected over a plurality of clock cycles. The detailed configuration of the detection unit 30 of this embodiment will be described later.

  The data processing unit 40 specifies switching light emission of the circuit element to be analyzed by performing various operations based on the detection data output from the detection unit 30. The data processing unit 40 includes, for example, a central processing unit (CPU) and a memory, and is preferably configured by a computer that operates according to a predetermined program. The data processing unit 40 of the present embodiment includes an integrating unit 41, a difference calculating unit 42, a centroid calculating unit 43, and a data combining unit 44. These are each realized by the predetermined program.

  The integrating unit 41 performs the integrating step S13 of the first embodiment. That is, the integrating unit 41 generates the first integrated data L, the second integrated data R, the third integrated data H, and the fourth integrated data F described in the first embodiment.

  The difference calculation unit 42 performs the difference calculation step S14 of the first embodiment. That is, for example, as shown in FIGS. 6 to 12, the difference calculation unit 42 is one summation data or a sum of two or more summation data among the first to fourth summation data L, R, H, and F. And the difference between the other integrated data or the sum of the other two or more integrated data is generated to generate difference data. Alternatively, the difference calculating unit 42 is one integrated data or two or more of the first to fourth integrated data L, R, H, and F normalized by dividing by the number of detection data used for integration. The difference data is generated by calculating the difference between the sum of the accumulated data and the other accumulated data or the sum of the other two or more accumulated data.

  The center-of-gravity calculation unit 43 performs the center-of-gravity calculation step S15 of the first embodiment. That is, as shown in FIG. 13, the center-of-gravity calculation unit 43 obtains the center of gravity of the peak P7 included in the difference data D2 generated by the difference calculation unit 42 by calculation, and points P8 indicating the center-of-gravity position of the peak P7. The data D3 including is generated.

  The data combining unit 44 performs the data combining step S16 of the first embodiment. That is, as shown in FIG. 14, the data combining unit 44 combines the plurality of centroid data to generate combined data D4 including a plurality of points P8 respectively indicating the centroid positions of the plurality of peaks.

  According to the motion analysis apparatus 10, the analyst can specify a plurality of circuit elements corresponding to the plurality of peaks based on the plurality of peak positions included in the combined data D4 obtained by the data combining unit 44. Then, based on the magnitude of the peak value corresponding to each circuit element, it is possible to analyze the operation state of each circuit element and the presence / absence of an abnormality.

  Here, the configuration of the detection unit 30 of the present embodiment will be described in detail. The detection unit 30 detects the switching light emission P1 emitted from the integrated circuit 50, and measures the two-dimensional position and timing of the light emission P1. As shown in FIG. 15, the detection unit 30 of the present embodiment is preferably implemented by a time-resolved measurement device having a position-sensitive photomultiplier tube (PS-PMT) 31 and a position time measurement circuit 32. Realized.

  The position detection type photomultiplier tube 31 converts the light P1 from the integrated circuit 50 into electrons, and amplifies the electrons while maintaining the two-dimensional position. FIG. 16 is a side sectional view showing a specific configuration example of the position detection type photomultiplier tube 31. As shown in FIG. 16, the photomultiplier tube 31 includes an envelope 33 and a voltage dividing circuit (not shown) connected to the envelope 33. In the envelope 33, a photocathode (photocathode) 34, microchannel plates (MCP) 35 to 39, and a resistive anode 61 are accommodated. A transparent incident window 62 is installed on the front surface of the envelope 33. The photocathode 34 is formed on the inner surface of the entrance window 62. The photocathode 34 and the resistive anode 61 are arranged so as to face each other apart from each other. The MCPs 35 to 39 are disposed between the photocathode 34 and the resistive anode 61.

  The photocathode 34 receives the light P1 transmitted through the incident window 62 and converts it into photoelectrons by the photoelectric effect. The MCPs 35 to 39 are plate-shaped electron multipliers that receive photoelectrons from the photocathode 34 and generate and multiply secondary electrons. Photoelectrons first enter the forefront MCP 35. The incident position of the photoelectrons corresponds to the incident position of the light P1 on the photocathode 34. The MCP 35 generates secondary electrons at the photoelectron incident position, and multiplies the secondary electrons while maintaining the two-dimensional position. Subsequent MCPs 36 to 39 also multiply secondary electrons while maintaining the two-dimensional position.

  The resistive anode 61 is a kind of position detection type anode, and is a conductor plate provided with a uniform resistance layer on one side. Signal readout electrodes 61 a are provided at the four corners of the resistive anode 61. These electrodes 61a are connected to the position time measurement circuit 32 through a preamplifier (not shown). When secondary electrons enter the resistive anode 61, these readout electrodes 61a output charge pulses. The two-dimensional position of the secondary electrons incident on the resistive anode 61 is determined based on the amount of charge that these charge pulses have. In this way, the resistive anode 61 generates a signal corresponding to the detection position of the light P <b> 1 and sends it to the position time measurement circuit 32.

  Each of the photocathode 34, the MCPs 35 to 39, and the resistive anode 61 is connected to a voltage dividing circuit (not shown), and a voltage having a potential gradient is applied to them. With these voltages, photoelectrons are accelerated from the photocathode 34 toward the MCP 35, and secondary electrons are accelerated from the MCP 35 toward the resistive anode 61.

  The position time measurement circuit 32 shown in FIG. 15 is electrically connected to both the signal input unit 20 and the photomultiplier tube 31. The position time measurement circuit 32 uses the detection signal sent from the photomultiplier tube 31 to calculate the detection position of the light P1. The position time measurement circuit 32 measures the time difference between the reference timing of the clock signal sent from the signal input unit 20 and the input timing of the detection signal sent from the photomultiplier tube 31. The detection position and detection time obtained by the position time measurement circuit 32 are sent as detection data to the integration unit 41 of the data processing unit 40.

  According to the operation analysis apparatus 10 having the above configuration, the switching of a specific circuit element is selected from the switching light emission of a large number of circuit elements in the integrated circuit 50, as in the operation analysis method according to the first embodiment. Light emission can be specified accurately, simply and at high speed. Then, based on the switching light emission state, the operation and abnormality of the circuit element can be analyzed.

  Further, as in the present embodiment, by including the difference calculation unit 42 that calculates the difference of the integrated data, the switching light emission P1 and the dark light emission P2 in the circuit elements other than the analysis target are removed, and the circuit elements in the analysis target Only the peak due to the switching light emission P1 can be suitably extracted. Therefore, the position of the peak can be specified more accurately.

  Further, as in this embodiment, by calculating the centroid of the peak included in the difference data, the detailed position of the peak (that is, the detailed position of the circuit element to be analyzed) can be determined, for example, by the photomultiplier tube 31. It can be specified with a finer precision than the resolution.

  In this embodiment, the peak position is specified by using four pieces of integrated data such as the first integrated data L, the second integrated data R, the third integrated data H, and the fourth integrated data F. However, at least one of these integrated data L, R, H, and F may be used for the analysis. For example, in the integration step S13, any one of these integration data is generated, and from the position of the peak (for example, the peak P3 or P4 shown in FIG. 6) included in the one integration data, the source of the switching light emission P1. May be specified. Thereby, the effect of this embodiment mentioned above can be acquired suitably. In this case, the difference calculation unit 42 can be omitted.

  Even if the difference calculation unit 42 is provided, at least two pieces of integration data required for the difference calculation may be generated in the integration unit 41, and all four pieces of integration data L, R, H, and F are necessarily generated. Even if it does not do, the effect of this embodiment mentioned above can be acquired suitably.

  In the present embodiment, the detection unit 30 acquires two-dimensional detection data and performs calculation using the two-dimensional detection data. However, the detection data may be one-dimensional or zero-dimensional. .

  In addition, all or at least one of the difference calculation unit 42, the centroid calculation unit 43, and the data combination unit 44 of the present embodiment may be omitted. Even when these are omitted, the above-described effects of the present embodiment can be suitably obtained.

  The integrated circuit operation analysis method and integrated circuit operation analysis apparatus according to the present invention are not limited to the above-described embodiments, and various other modifications are possible. For example, in the above embodiment, a configuration including a position detection type photomultiplier tube is illustrated as an example of the detection unit. However, as the detection unit, any other configuration may be used as long as it is a time-resolved measurement device capable of position detection. You may apply.

  DESCRIPTION OF SYMBOLS 10 ... Motion analysis apparatus, 20 ... Signal input part, 30 ... Detection part, 31 ... Position detection type photomultiplier tube, 32 ... Position time measurement circuit, 33 ... Envelop, 34 ... Photocathode, 40 ... Data processing apparatus , 40 ... Data processing unit, 41 ... Accumulation unit, 42 ... Difference calculation unit, 43 ... Center of gravity calculation unit, 44 ... Data combination unit, 50 ... Integrated circuit, 61 ... Resistive anode, 62 ... Incident window, CL ... Clock waveform , D1, D2 ... difference data, D4 ... combined data, L ... first integrated data, R ... second integrated data, H ... third integrated data, F ... fourth integrated data, P1 ... switching light emission, P2 ... Dark light emission, P3 to P7 ... Peak, S1 ... Signal waveform, S11 ... Signal input step, S12 ... Detection step, S13 ... Integration step, S14 ... Difference calculation step, S15 ... Center of gravity calculation step, S16 ... Data Binding step, S17 ... analysis step, T ... period, Ta ... first period, Tb ... second period.

Claims (10)

A method of analyzing an operation or abnormality of the circuit element by measuring light emission during operation of the circuit element included in the integrated circuit,
A signal input step of operating the circuit element at a predetermined clock cycle and inputting a predetermined signal waveform to the circuit element;
The integrated circuit in the second period including the light emission position and light emission amount of the integrated circuit in the first period including the rising timing of the clock waveform defining the predetermined clock period, and the falling timing of the clock waveform A detection step of repeatedly detecting the light emission position and the light emission amount over a plurality of the clock periods;
Among the plurality of detection data obtained in the first and second periods of the plurality of clock periods, the detection data in a period in which the predetermined signal waveform maintains the first state is transmitted over the plurality of clock periods. First integrated data obtained by integration, and second detection data obtained by integrating the detection data during a period in which the predetermined signal waveform transitions from the first state to the second state over the plurality of clock cycles. Integration data, third integration data obtained by integrating the detection data during a period in which the predetermined signal waveform maintains the second state over the plurality of clock cycles, and the predetermined signal waveform At least one product among the fourth integration data obtained by integrating the detection data during the transition from the state 2 to the first state over the plurality of clock cycles. And a cumulative step of generating data,
An operation analysis method for an integrated circuit, wherein the circuit element is specified from a peak position included in the at least one integrated data. In the integration step, at least two pieces of integration data among the first to fourth integration data are generated,
After the integration step, a difference is calculated by calculating a difference between one of the at least two pieces of integrated data or a sum of two or more pieces of integrated data and another sum of pieces of integrated data or two or more pieces of integrated data. The method further comprises a difference calculation step for generating data,
The integrated circuit operation analysis method according to claim 1, wherein the circuit element is specified from a position of a peak included in the difference data instead of a peak included in the at least one integrated data. In the integration step, at least two pieces of integration data among the first to fourth integration data are generated,
After the integration step, normalization is performed by dividing the at least two pieces of integration data by the number of detection data used for integration, and one or two or more of the normalized at least two pieces of integration data A difference calculation step of calculating a difference between the sum of the accumulated data and the other accumulated data or the sum of the other two or more accumulated data to generate difference data,
The integrated circuit operation analysis method according to claim 1, wherein the circuit element is specified from a position of a peak included in the difference data instead of a peak included in the at least one integrated data.   The integrated circuit operation analysis method according to claim 2, further comprising a centroid calculating step of calculating a centroid of a peak included in the difference data after the difference calculating step.   The integrated circuit operation analysis method according to claim 4, further comprising a data combination step of generating combined data including the plurality of peak center position information after the center of gravity calculation step. An apparatus for analyzing an operation or abnormality of the circuit element by measuring light emission during operation of the circuit element included in the integrated circuit,
A signal input unit for operating the circuit element at a predetermined clock cycle and inputting a predetermined signal waveform to the circuit element;
The integrated circuit in the second period including the light emission position and light emission amount of the integrated circuit in the first period including the rising timing of the clock waveform defining the predetermined clock period, and the falling timing of the clock waveform A detection unit that repeatedly detects a light emission position and a light emission amount over a plurality of the clock cycles;
Among the plurality of detection data obtained in the first and second periods of the plurality of clock periods, the detection data in a period in which the predetermined signal waveform maintains the first state is transmitted over the plurality of clock periods. First integrated data obtained by integration, and second detection data obtained by integrating the detection data during a period in which the predetermined signal waveform transitions from the first state to the second state over the plurality of clock cycles. Integration data, third integration data obtained by integrating the detection data during a period in which the predetermined signal waveform maintains the second state over the plurality of clock cycles, and the predetermined signal waveform At least one product among the fourth integration data obtained by integrating the detection data during the transition from the second state to the first state over the plurality of clock cycles. Characterized in that it comprises an integrating unit for generating data, motion analysis device of the integrated circuit. The integrating unit generates at least two pieces of integrated data among the first to fourth integrated data;
A difference calculation that generates difference data by calculating a difference between one of the at least two pieces of accumulated data or a sum of two or more pieces of accumulated data and another piece of accumulated data or a sum of two or more pieces of accumulated data. The integrated circuit operation analysis apparatus according to claim 6, further comprising a unit. The integrating unit generates at least two pieces of integrated data among the first to fourth integrated data;
Normalization is performed by dividing the at least two pieces of integrated data by the number of detection data used for integration, and one of the standardized at least two pieces of integrated data or a sum of two or more pieces of integrated data; The integrated circuit operation analysis according to claim 6, further comprising: a difference calculation unit that calculates a difference from other accumulated data or a sum of other two or more accumulated data to generate difference data. apparatus.   The integrated circuit operation analysis apparatus according to claim 7, further comprising a centroid calculating unit that calculates a centroid of a peak included in the difference data. The integrated circuit operation analysis apparatus according to claim 9, further comprising a data combination unit configured to generate combined data including a plurality of peak centroid position information.

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