JP2013254066A - Image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image forming apparatus provided with a power source suppressing occurrence of switching failure in switching polarities of an output voltage.SOLUTION: A bias power source provided in an image forming apparatus includes: a transfer output part 22a for outputting a transfer bias; a cleaning output part 22b for outputting a cleaning bias; and a signal generation part 22c for generating and outputting control data for setting the transfer bias and the cleaning bias. Further, the transfer output part 22a, employing a self-excitation system, includes: a DA converter 221a for receiving the control data; and a rectifier circuit 225a for rectifying and outputting the transfer bias. Meanwhile, the cleaning output part 22b, employing a self-excitation system, includes: a DA converter 221b for receiving the control data; and a rectifier circuit 225b for rectifying and outputting the cleaning bias.

Description

  The present invention relates to an image forming apparatus.

  As the prior art described in the publication, optical writing means for irradiating a charged image carrier with a laser beam to form an electrostatic latent image, and transfer for transferring a toner image that visualizes the electrostatic latent image to a recording medium And the toner image of the electrostatic latent image formed at the beam irradiation start position after starting the irradiation of the laser beam by the optical writing unit. Detecting means for detecting the output voltage or current of the power supply unit until the control signal is generated, and generating a control signal for controlling the power supply unit according to the output voltage or current detected by the detecting means, and outputting the control signal to the power supply unit There is an image forming apparatus provided with a control signal generation means (see Patent Document 1).

JP 2008-225029 A

  An object of the present invention is to provide an image forming apparatus including a power source that suppresses occurrence of switching failure when switching the polarity of an output voltage.

The invention described in claim 1 includes an image carrier, a charging unit that charges the image carrier, an exposure unit that exposes the image carrier and forms an electrostatic latent image on the image carrier, and A developing unit that develops the electrostatic latent image exposed by the exposure unit and formed on the image carrier, a transfer bias, and a cleaning bias having a polarity different from the transfer bias, provided opposite to the image carrier. The transfer means for transferring the developed image to the transfer medium when the transfer bias is set and the transfer bias is set, and each receives a specified value specifying a voltage as a digital signal and analog A digital-to-analog converter circuit that converts the signal into a signal and a rectifier circuit that outputs a voltage, one of which outputs the transfer bias, and the other outputs the cleaning bias, A plurality of self-excited oscillation type power supply units in which a rectifier circuit that outputs the transfer bias and a rectifier circuit that outputs the cleaning bias are connected in series, and the transfer bias and the cleaning bias are switched and set. A signal generation unit that generates the specified value in time series and transmits the specified value corresponding to each of the digital-analog conversion circuits of the plurality of power supply units, and the signal generation unit has a voltage polarity In at least one of a predetermined period for switching from positive to negative and / or a predetermined period for switching from negative to positive, the absolute value is smaller than the voltage of the polarity to be supplied later and the voltage of the polarity The image forming apparatus is characterized in that the specified value is generated so that the voltage repeats.
According to a second aspect of the present invention, the signal generation unit further generates an identification code for identifying each of the plurality of power supply units that outputs the voltage specified by the specified value, and the specified value and the identification code And the identification code is received and decoded, and the designated value paired with the identification code is converted into the digital analog of the power supply unit corresponding to the identification code in the plurality of power supply units. The image forming apparatus according to claim 1, further comprising a signal decoding unit that transmits the signal to the conversion circuit.
According to a third aspect of the present invention, the power supply unit includes a primary winding, a secondary winding, and an auxiliary winding, and a transformer in which the rectifier circuit is connected to the secondary winding, and the auxiliary winding. A switch element connected to the line and the primary winding for controlling self-excited oscillation, a time constant setting circuit for setting a switching frequency of the switch element, and an analog in which the designated value is converted by the digital-analog conversion circuit The image forming apparatus according to claim 1, further comprising: a control circuit that sets a voltage supplied to the time constant setting circuit based on a signal.
According to a fourth aspect of the present invention, the power supply unit supplies, to the time constant setting circuit, a voltage fluctuation component having a frequency equal to or higher than a predetermined frequency in the analog signal obtained by converting the designated value by the digital-analog conversion circuit. The image forming apparatus according to claim 3, further comprising a bypass circuit.
According to a fifth aspect of the present invention, the power supply unit reduces the voltage fluctuation component of a predetermined frequency or higher in the analog signal obtained by converting the designated value by the digital-analog conversion circuit, and performs the control. The image forming apparatus according to claim 4, further comprising a smoothing circuit that supplies the circuit.

According to the first aspect of the present invention, it is possible to suppress the occurrence of switching failure when switching the polarity of the output voltage as compared with the case where the specified value is not repeated.
According to the second aspect of the present invention, the number of signal lines used for control can be suppressed as compared with the case where this configuration is not adopted.
According to the invention of claim 3, the circuit scale of the power supply unit can be reduced as compared with the case where this configuration is not adopted.
According to invention of Claim 4, compared with the case where this structure is not employ | adopted, generation | occurrence | production of the switching failure at the time of switching the polarity of an output voltage can be suppressed more.
According to the fifth aspect of the present invention, the power supply unit operates more stably than in the case where this configuration is not adopted.

1 is a diagram illustrating an example of an overall configuration of an image forming apparatus to which a first exemplary embodiment is applied. FIG. 3 is a diagram illustrating an example of a block configuration of a transfer unit bias power supply according to the first embodiment. It is a figure which shows an example of the control data which a signal generation part produces | generates in order to control a transfer part bias power supply. It is a figure which shows an example of the waveform of DA output signal of DA converter of a transfer output part, and the waveform of DA output signal of DA converter of a cleaning output part. It is a figure which shows an example of the circuit structure of the transfer output part and cleaning output part in 1st Embodiment. 6 is a time chart showing an example of switching of the polarity of the output voltage of the transfer unit bias power supply in the first embodiment. Control data when a pseudo-clock signal is not transmitted from the DA converter when switching from a state in which a cleaning bias of -voltage is output from the cleaning output unit to a state in which a transfer bias of + voltage is output from the transfer output unit It is a figure which shows an example of a timing chart. It is a figure which shows an example of the block structure of the transfer part bias power supply in 2nd Embodiment. It is a figure which shows an example of the circuit structure of the transfer output part and cleaning output part in 2nd Embodiment. It is a figure which shows an example of the block configuration of the transfer part bias power supply in 3rd Embodiment. It is a figure which shows an example of the circuit structure of the transfer output part in 3rd Embodiment, and the cleaning output part.

Hereinafter, an embodiment (this embodiment) of the present invention will be described in detail with reference to the accompanying drawings.
[First Embodiment]
<Image forming apparatus 1>
FIG. 1 is a diagram illustrating an example of the overall configuration of an image forming apparatus 1 to which the first exemplary embodiment is applied.
An image forming apparatus 1 shown in FIG. 1 includes an image forming process unit 10 that forms an image corresponding to image data, and a control unit 30 that controls the image forming process unit 10, such as a personal computer (PC) 2 or an image reading device 3. And an image processing unit 40 for performing predetermined image processing on the image data received from these.

  An image forming process unit 10 of the image forming apparatus 1 transfers a toner image formed on the photosensitive drum 11 and the photosensitive drum 11 as an example of an image holding member rotatably arranged in the direction of arrow A to an arrow B The image forming apparatus includes a transfer unit 20 that transfers to a sheet P as an example of a transfer target conveyed in the direction, and a fixing unit 50 as an example of a fixing unit that fixes the transferred toner image on the sheet P as an image.

  Around the photosensitive drum 11, there are a charging roll 12 as an example of a charging unit for charging the photosensitive drum 11, and a laser exposure unit 13 (an example of an exposure unit for writing an electrostatic latent image on the photosensitive drum 11). In the drawing, an exposure beam is denoted by Bm), and a developing device 14 as an example of a developing unit that accommodates toner and visualizes an electrostatic latent image on the photosensitive drum 11 with the toner, on the photosensitive drum 11 An electrophotographic device such as a transfer roll 21 as an example of transfer means for transferring the toner image formed on the paper P to the paper P is sequentially disposed.

  Here, the charging roll 12 is formed, for example, by forming an epichlorohydrin rubber layer on the surface of a metal shaft, and further coating the surface of the epichlorohydrin rubber layer with a polyamide containing tin oxide conductive powder to a thickness of about 3 μm.

Further, the photosensitive drum 11 is formed by forming an organic photosensitive layer on the surface of a thin cylindrical drum made of metal, for example, and is configured such that the organic photosensitive layer is negatively charged. Therefore, the toner used in the developing device 14 is of a negative polarity charging type. A charging bias power source 15 for applying a charging bias to the photosensitive drum 11 and a developing bias power source 16 for applying a developing bias to the developing device 14 are connected to the charging roll 12.
The voltage output from the charging bias power supply 15 is, for example, a direct current (DC) voltage of −600 V superimposed on an alternating current (AC) voltage having a frequency of 2 kHz and a peak-to-peak value (pp value) of 2 kV. Is. That is, the charging bias is a DC voltage of −600V. The voltage output from the developing bias power supply 16 is, for example, a DC voltage of −1300 V superimposed on an AC voltage having a frequency of 8 kHz and a pp value of 1 kV. That is, the developing bias is −1300V of DC voltage.
The photosensitive drum 11 is grounded.

The transfer unit 20 includes a photoconductive drum 11 and a transfer roll 21 pressed against the photoconductive drum 11, and the sheet P is placed in a transfer nip region formed between the photoconductive drum 11 and the transfer roll 21. Transfer is performed by passing. The transfer roll 21 is a tube of EPDM and NBR blend rubber with carbon dispersed on the surface, and the inside is made of EPDM rubber, and the surface resistivity is 7 to 10 logΩ / □, and the hardness is, for example, 70 °. (Asuka C) is set. The transfer roller 21 is connected to a transfer unit bias power source 22 for applying a transfer bias and a cleaning bias. The transfer bias and the cleaning bias will be described later.
A paper conveyance guide (not shown) for guiding the conveyed paper P to the transfer unit 20 is attached to the upstream side of the transfer unit 20.

  The fixing unit 50 includes a heating roll 51 having a built-in heating source such as a halogen lamp, and a pressure roll 52 pressed against the heating roll 51, and the heating roll 51 and the pressure roll 52 are interposed between the heating roll 51 and the pressure roll 52. Fixing is performed by passing the paper P onto which the toner image has been transferred to the fixing nip area to be formed.

  The control unit 30 generates and transmits / receives a signal to be controlled such as the mechanism unit.

  Next, an image forming process of the image forming apparatus 1 shown in FIG. 1 will be described. When a start switch (not shown) is turned on, an image forming process is executed. First, the surface of the photosensitive drum 11 is charged to a charging bias by the charging roll 12, and then an electrostatic latent image corresponding to the image is written by the laser exposure unit 13. Next, the electrostatic latent image is developed by the developing device 14 to which a developing bias is applied, and a toner image is formed.

  Here, the reversal development method is used. As described above, the surface of the photosensitive drum 11 is charged to the charging bias (for example, DC voltage of −600 V) by the charging roll 12. When an image is written by the laser exposure unit 13, the electrical conductivity of the surface of the photosensitive drum 11 increases, and the surface potential of the portion irradiated with the laser light is changed from, for example, a DC voltage of −600V to −200V. . On the other hand, the developing device 14 is applied with a developing bias (for example, DC voltage of −400 V). Then, the negatively charged toner adheres to the portion where the surface potential of the photosensitive drum 11 is −200V. In this way, a toner image is formed.

  The toner image formed on the photosensitive drum 11 is transferred from the photosensitive drum 11 by the transfer bias applied to the transfer roll 21 onto the paper P conveyed at a predetermined timing in the transfer unit 20. It is electrostatically transferred to the paper P. The toner remaining on the photosensitive drum 11 after the transfer is mechanically leveled while the toner charged to the reverse polarity (positive polarity in the present embodiment) is removed by a refresher (not shown).

  Thereafter, the sheet P on which the toner image is transferred is conveyed to the fixing unit 50, and the toner image on the sheet P is fixed by heating and pressing.

<Transfer Bias Power Supply 22>
(Block configuration of transfer unit bias power supply 22)
FIG. 2 is a diagram illustrating an example of a block configuration of the transfer unit bias power source 22 according to the first embodiment. The signal flow is indicated by arrows.

As described above, the transfer unit 20 transfers the toner image formed on the photosensitive drum 11 onto the paper P. At this time, since the toner is of a negative charge type, the toner is sandwiched between the photosensitive drum 11 and the transfer roll 21 by setting the transfer roll 21 to a transfer bias having a positive voltage (+ voltage). Is electrostatically transferred onto the sheet P. However, when the transfer is not performed, the transfer roll 21 is set to a cleaning bias that is a negative voltage (−voltage) in order to prevent the toner from adhering to the transfer roll 21.
Accordingly, the transfer unit bias power source 22 is configured to set a transfer output unit 22a as an example of a power source unit that outputs a transfer bias, a cleaning output unit 22b as an example of a power source unit that outputs a cleaning bias, and a transfer bias and a cleaning bias. A signal generation unit 22c that generates and transmits data and a signal decoding unit 22d that receives and decodes control data and transmits the data to the transfer output unit 22a or the cleaning output unit 22b are provided.

In FIG. 2, the signal generation unit 22 c and the signal decoding unit 22 d are provided in the transfer unit bias power source 22. However, at least one of the signal generation unit 22c and the signal decoding unit 22d may be provided in the control unit 30 illustrated in FIG.
Even when at least one of the signal generation unit 22c and the signal decoding unit 22d is provided in the control unit 30, the transfer unit bias power supply 22 is not limited to the transfer output unit 22a and the cleaning output unit 22b. It is assumed that 22c and a signal decoding unit 22d are provided.

  The signal generation unit 22c transmits a specified value for designating a voltage output from each of the transfer output unit 22a and the cleaning output unit 22b as control data S0 which is a digital signal of “1” / “0” in time series. By doing in this way, the number of signal lines (signal lines for signal input / output (I / O)) is compared with a case where signals by analog voltage are individually transmitted to the transfer output unit 22a and the cleaning output unit 22b. Is suppressed. In addition, since it is a digital signal, it is less susceptible to noise.

  The transfer output unit 22a and the cleaning output unit 22b are switching power sources that generate voltages by switching switching elements (npn transistors Tr1 and Tr2 in FIG. 5 described later), and both are self-excited oscillation systems. The self-excited oscillation type switching power supply can have a smaller circuit scale than the separately excited oscillation type switching power supply.

  The transfer output unit 22a is a DA converter 221a as an example of a digital / analog conversion circuit, and a control circuit 222a that controls a transfer bias voltage or current to a predetermined value based on a DA output signal S1a output from the DA converter 221a. A drive circuit 223a that includes a switch element and drives the switch element by a control signal S2a output from the control circuit 222a; a transformer (transformer) 224a that transforms the switching signal S3a switched by the switch element; and rectifies the transformed signal Thus, a rectifier circuit 225a for making a positive transfer bias is provided.

  The cleaning output unit 22b includes a DA converter 221b, a control circuit 222b that controls the voltage or current of the cleaning bias to a predetermined value based on the DA output signal S1b output from the DA converter 221b, and a switch circuit. A drive circuit 223b that drives the switch element by the control signal S2b from 222b, a transformer (transformer) 224b that transforms the switching signal S3b switched by the switch element, and a rectifier that rectifies the transformed signal to a negative cleaning bias. A circuit 225b is provided.

  The rectifier circuit 225a of the transfer output unit 22a and the rectifier circuit 225b of the cleaning output unit 22b are connected in series, and the transfer bias from the transfer output unit 22a and the cleaning bias from the cleaning output unit 22b are alternately output. The output voltage Vout is applied to the transfer roll 21.

In FIG. 2, the photosensitive drum 11 is equivalently represented by a resistor R1 and a capacitor C1 connected in parallel, and the transfer roll 21 is equivalently represented by a resistor R2. That is, the transfer bias from the transfer output unit 22a and the cleaning bias from the cleaning output unit 22b are grounded via the resistor R2 of the transfer roll 21 and the resistor R1 connected in parallel with the photosensitive drum 11 and the capacitor C1. Current flows. That is, the transfer roll 21 and the photosensitive drum 11 serve as a load of the transfer unit bias power source 22.
In FIG. 2, a rectifier circuit 225a in which a transfer bias that is a positive voltage from the rectifier circuit 225a of the transfer output unit 22a and a cleaning bias that is a negative voltage from the rectifier circuit 225b of the cleaning output unit 22b are connected in series. In order to indicate that the toner is supplied to the transfer roll 21 from 225b, the transformers 224a and 224b and the rectifier circuits 225a and 225b are represented by circuit symbols.

  Hereinafter, the transfer output unit 22a, the cleaning output unit 22b, the signal generation unit 22c, and the signal decoding unit 22d will be described.

(Signal generator 22c)
FIG. 3 is a diagram illustrating an example of the control data S0 generated by the signal generation unit 22c in order to control the transfer unit bias power source 22. 3A shows the format (data format) of the control data S0, and FIG. 3B shows the state in which the cleaning output unit 22b outputs a cleaning bias having a negative voltage, and the transfer output unit 22a has a positive voltage. FIG. 3C is a diagram showing the control data S0 when switching to a state in which a certain transfer bias is output, and FIG. 3C is a state in which the cleaning output unit 22b has a negative voltage from the state in which the transfer output unit 22a outputs a positive bias. It is a figure which shows the control data S0 in the case of switching to the state which outputs a cleaning bias. 3B and 3C, it is assumed that the time advances from the top to the bottom in the figure in alphabetical order (a, b, c,...).

As shown in FIG. 3A, the control data S0 for controlling the transfer unit bias power source 22 generated by the signal generation unit 22c is composed of a total of 16 bits. The upper 12 bits are a specified value for designating the transfer bias and the cleaning bias, and the lower 4 bits are an identification code indicating whether the transfer output unit 22a or the cleaning output unit 22b is to be controlled.
Here, the transfer output unit 22a is expressed as “TRN”, and the cleaning output unit 22b is expressed as “CRN”. In the following, they are expressed as a transfer bias Vtrn and a cleaning bias Vcrn.

  First, as the output voltage Vout, the transfer unit bias power source 22 changes from the state where the cleaning output unit 22b outputs a negative voltage cleaning bias Vcrn to the state where the transfer output unit 22a outputs a positive voltage transfer bias Vtrn. A case of switching will be described. Here, D1 is represented as a designated value corresponding to the cleaning bias Vcrn to be set, D3 is designated as a designated value corresponding to the transfer bias Vtrn to be set, and a voltage between D1 and D3 is represented as D2. For example, the cleaning bias Vcrn is −1300V as an example, the transfer bias Vtrn to be set is + 1600V, the specified value corresponding to the cleaning bias Vcrn of −1300V is “D1 (−5)”, and the specification corresponding to the transfer bias Vtrn of + 1600V is specified. The value is “D3 (3)”. Then, D2 is set to 0 V, and the specified value is set to “D2 (0)”. When the upper 12 bits of the control data are “D1 (−5)” and the lower 4 bits are “CRN”, they are expressed as “D1 (−5) CRN”. In FIG. 3B and FIG. 3C, D1 (−5) and CRN are expressed by surrounding each frame.

  As shown in FIG. 3B, the signal generation unit 22c outputs “D1 (−5) CRN” at time a, so that the output voltage Vout is the negative voltage cleaning bias from the cleaning output unit 22b. It is assumed that Vcrn (for example, -1300 V) is set.

  Next, the signal generation unit 22c changes the output voltage Vout from the cleaning bias Vtrn that is the negative voltage from the cleaning output unit 22b to the transfer bias Vtrn that is the positive voltage (for example, +1600 V) at the time b that is the timing when the cleaning ends. Switch to. For this reason, the signal generation unit 22c first outputs “D2 (0) CRN” at time b in order to stop the cleaning bias Vcrn that is the negative voltage from the cleaning output unit 22b.

Then, in order to output a positive voltage transfer bias Vtrn (for example, +1600 V) from the transfer output unit 22a, the signal generation unit 22c outputs “D3 (3) TRN” at time c following time b. Subsequently, “D2 (0) TRN” is output. Thereafter, “D3 (3) TRN” and “D2 (0) TRN” are repeated. That is, between time c and time d, “D3 (3) TRN” and “D2 (0) TRN” are repeatedly output a plurality of times. It should be noted that at time d, it is set to be “D3 (3) TRN”.
This repetition frequency is preferably a frequency that the output of the DA converter 221a can follow. In “D2 (0) TRN”, the output of the DA converter 221a does not necessarily have to be 0V. What is necessary is just to produce a difference in the output voltage of the DA converter 221a between “D2 (0) TRN” and “D3 (3) TRN”.

Then, the signal generator 22c outputs “D2 (0) TRN” to stop the transfer bias Vtrn, which is a positive voltage from the transfer output unit 22a, at time e, which is the timing when the transfer ends.
That is, the period from time a to time b is a cleaning period, and the transfer unit bias power supply 22 outputs a cleaning bias Vcrn (for example, −1300 V) as a negative voltage as the output voltage Vout. Next, a transfer bias Vtrn (for example, +1600 V), which is a positive voltage, is output from the time d to the time e.
A period from time b to time d is a switching period.

Next, the transfer unit bias power supply 22 outputs a transfer bias Vtrn (for example, +1600 V) as a positive voltage from the transfer output unit 22a as an output voltage Vout, and then a cleaning bias Vcrn as a negative voltage from the cleaning output unit 22b. The case where it switches to the state which outputs (for example, -1300V) is demonstrated.
As shown in FIG. 3C, the signal generation unit 22c outputs “D3 (3) TRN” at time l, whereby the output voltage Vout is the positive voltage transfer bias Vtrn from the transfer output unit 22a. It is assumed that (for example, + 1600V) is set.

  Next, the signal generation unit 22c changes the output voltage Vout from the transfer bias Vtrn, which is a positive voltage from the transfer output unit 22a, to the cleaning bias Vcrn, which is a negative voltage (for example, −1300 V) at time m, which is the timing when the transfer ends. ). For this reason, the signal generation unit 22c first outputs “D2 (0) TRN” at time m in order to stop the transfer bias Vtrn that is a positive voltage from the transfer output unit 22a.

Then, in order to output a negative voltage cleaning bias Vcrn (for example, −1300 V) from the cleaning output unit 22b, the signal generation unit 22c outputs “D1 (−5) CRN” at time n following time m. Subsequently, “D2 (0) CRN” is output. Thereafter, “D1 (−5) CRN” and “D2 (0) CRN” are repeated. That is, “D1 (−5) CRN” and “D2 (0) CRN” are repeatedly output a plurality of times from time n to time o. At time o, the setting is made to be “D1 (−5) CRN”.
This repetition frequency is preferably a frequency that the output of the DA converter 221b can follow. In “D2 (0) CRN”, the output of the DA converter 221b does not necessarily have to be 0V. What is necessary is just to produce a difference in the output voltage of the DA converter 221b between “D2 (0) CRN” and “D1 (−5) CRN”.

Then, the signal generation unit 22c outputs “D2 (0) CRN” in order to stop the cleaning bias Vcrn, which is a negative voltage from the cleaning output unit 22b, at time p, which is the timing at which the cleaning ends.
That is, the transfer period bias power source 22 outputs a transfer bias Vtrn (for example, +1600 V) that is a positive voltage as the output voltage Vout, from the time l to the time m. Next, the cleaning bias Vcrn (for example, −1300 V), which is a negative voltage, is output from the time o to the time p.
A period from time m to time o is a switching period.

FIG. 4 is a diagram illustrating an example of the waveform of the DA output signal S1a of the DA converter 221a of the transfer output unit 22a and the waveform of the DA output signal S1b of the DA converter 221b of the cleaning output unit 22b. FIG. 4A shows a state in which a cleaning bias Vcrn (for example, −1300 V) as a negative voltage is output from the cleaning output unit 22 b, and a transfer bias Vtrn (for example, +1600 V) as a positive voltage is output from the transfer output unit 22 a. 4B, in the state shown in FIG. 4B, from the state where the transfer bias Vtrn (+1600 V) as a positive voltage is output from the transfer output unit 22a, the cleaning bias Vcrn (− as a negative voltage) is output from the cleaning output unit 22b. 1300V) is output.
4A and 4B, as in FIGS. 3B and 3C, the DA output signal S1a and the DA converter of the DA converter 221a corresponding to the designated values D1, D2, and D3 are used here. The DA output signal S1a of 221a is expressed as VD1, VD2, and VD3. In addition, like FIG.3 (b) and FIG.3 (c), the designated value made into the example was shown in ().
4A and 4B, the DA output signal S1b of the DA converter 221b is shown to increase downward in the figure, but the DA output signal S1b is a positive voltage.

First, as the output voltage Vout of the transfer unit bias power source 22, from the state where a cleaning bias (for example, -1300V) as a negative voltage is output from the cleaning output unit 22b, a transfer bias (for example, as a positive voltage from the transfer output unit 22a). The case of switching to the state of outputting +1600 V) will be described.
As shown in FIG. 4A, when the control data S0 transmitted by the signal generation unit 22c is “−5 CRN” at the time “a”, the signal decoding unit 22d has the control target “CRN” as described later. "D1 (-5)" is transmitted to the DA converter 221b. When receiving the “D1 (−5)”, the DA converter 221b outputs VD1 (−5) that is a DC voltage corresponding to “D1 (−5)”. The DA converter 221b continues to output VD1 (−5) until the next control data S0 is received.
At time b, if the control data S0, which is a digital signal transmitted by the signal generation unit 22c, is “D2 (0) CRN”, the DA converter 221b receives the DC voltage corresponding to “0” in the same manner as described above. Is output as VD2 (0).

Next, when the control data S0 transmitted by the signal generation unit 22c becomes “D3 (3) TRN” at time c, the signal decoding unit 22d determines that “D3 (3) Is transmitted to the DA converter 221a. Upon receiving “D3 (3)”, the DA converter 221a outputs VD3 (3) that is a DC voltage corresponding to “D3 (3)”.
However, in the period from time c to time d, the control data S0 repeats “D3 (3) TRN” and “D2 (0) TRN” a plurality of times. Therefore, as shown in FIG. 4A, in the switching period from time c to time d, the output of the DA converter 221a repeats VD3 (3) and VD2 (0) a plurality of times.
At time d, since the control data S0 transmitted by the signal generation unit 22c is “D3 (3) TRN”, the DA converter 221a outputs VD3 (3) corresponding to “D3 (3)”.
Thereafter, at time e, when the control data S0 transmitted by the signal generation unit 22c becomes “D2 (0) TRN”, the DA converter 221a outputs VD2 (0) corresponding to “D2 (0)”.

  As described above, the DA output signal S1a of the DA converter 221a is a clock-like signal that alternately shifts between VD3 (3) and VD2 (0) in the switching period from time b to time d, that is, a pseudo signal. It becomes a clock signal. Hereinafter, a signal when the voltage of the DA output signal S1a of the DA converter 221a changes in a clock-like manner by the control data S0 in such a predetermined period is referred to as a pseudo clock signal. The same applies to the DA output signal S1b of the DA converter 221b.

Further, as the output voltage Vout of the transfer unit bias power source 22, the transfer bias Vtrn (for example, +1600 V) that is a positive voltage is output from the transfer output unit 22a, and the cleaning bias Vcrn that is the negative voltage is output from the cleaning output unit 22b. For example, the same applies to the case of switching to the state of outputting −1300 V), and detailed description thereof is omitted.
As shown in FIG. 4B, the DA output signal S1b of the DA converter 221b is output from the VD1 (−5) and “D2 (0) corresponding to“ D1 (−5) ”in the switching period from time m to time o. ) "Corresponding to a clock-like signal that alternately shifts between VD2 (0), that is, a pseudo clock signal.

The peak value (the largest value in absolute value) of the pseudo clock signal does not have to be the transfer bias Vtrn or the cleaning bias Vcrn. When switching from the cleaning bias Vcrn, which is a negative voltage, to the transfer bias Vtrn, which is a positive voltage. When switching from the transfer bias Vtrn, which is a positive voltage, to the cleaning bias Vcrn, which is a negative voltage, the negative voltage may be used.
Further, the minimum value (the smallest value in absolute value) of the pseudo clock signal may not be 0 V, and may be a voltage whose absolute value is smaller than the voltage on the + side or the voltage on the − side.

(Signal decoding unit 22d)
The signal decoding unit 22d decodes the control data S0 generated by the signal generation unit 22c, decodes the lower 4 bits (“CRN” or “TRN”), and the control target is either the transfer output unit 22a or the cleaning output unit 22b. Is identified.
Then, the designated value of the upper 12 bits is transmitted to the determined control target.

(Circuit configuration of the transfer output unit 22a and the cleaning output unit 22b)
FIG. 5 is a diagram illustrating an example of a circuit configuration of the transfer output unit 22a and the cleaning output unit 22b in the first embodiment. The cleaning output unit 22b has the same configuration as the transfer output unit 22a, although the polarity of the output voltage is different. Therefore, the transfer output unit 22a will be described, and the description of the cleaning output unit 22b will be omitted.
FIG. 5 schematically shows each circuit, and the configuration of each circuit is not limited to this configuration.

(DA converter 221a)
The DA converter 221a receives a designated value designating the transfer bias output from the transfer output unit 22a from the signal decoding unit 22d, and converts it into an analog DC voltage.
As described above, the designated value is, for example, 12 bits. Therefore, the DA converter 221a only needs to be able to convert the control data S0, which is a 12-bit digital signal, for example, into an analog signal. For example, if the speed at which a digital signal is converted to an analog signal is 150 μs, the DA output signal S1a is a pseudo clock signal having a repetition frequency of about 3 kHz (the period from time b to time d in FIG. 4A or FIG. b) can be output during the period from time m to time o).

(Control circuit 222a)
The control circuit 222a includes a differential amplifier Amp1, resistors R3 and R4, and a capacitor C2. Here, the differential amplifier Amp1 controls the current flowing from the transfer output unit 22a to the transfer roll 21 to a predetermined value. On the other hand, the current detection circuit 230 detects a current flowing from the transfer unit bias power source 22 to the photosensitive drum 11 via the transfer roll 21.

A non-inverting input terminal of the differential amplifier Amp1 (hereinafter referred to as a “+ input terminal” and referred to as “+” in the figure) is connected to an output terminal of the DA converter 221a. An inverting input terminal (hereinafter referred to as “−input terminal”. In the figure, expressed as “−”) is connected to the current detection circuit 230 via a resistor R4.
The output terminal of the differential amplifier Amp1 is connected to the negative input terminal of the differential amplifier Amp1 via a capacitor C2 and a resistor R3 connected in series.

(Drive circuit 223a)
The drive circuit 223a includes an npn transistor Tr1, resistors R8 and R9, and a capacitor C4 as an example of a switch element.
One terminal of the resistor R8 is connected to the output terminal of the differential amplifier Amp1 of the control circuit 222a. The other terminal is connected to one terminal of the capacitor C4. The other terminal of the capacitor C4 is grounded. One terminal of the capacitor C4 is connected to one terminal of the resistor R9. The other terminal of the resistor R9 is connected to the transformer 224a.
The collector terminal and base terminal of the npn transistor Tr1 are connected to the transformer 224a. The emitter terminal of the npn transistor Tr1 is grounded.

(Transformer 224a)
The transformer 224a includes a primary winding T11a, a primary side auxiliary winding T12a, and a secondary winding T2a.
One terminal of the primary winding T11a of the transformer 224a is connected to the collector terminal of the npn transistor Tr1 of the drive circuit 223a. A power supply potential Vcc (for example, 24 V) is applied to the other terminal. One terminal of the primary side auxiliary winding T12a is connected to the base terminal of the npn transistor Tr1. The other terminal of the primary side auxiliary winding T12a is connected to the other terminal of the resistor R9 of the drive circuit 223a.
The secondary winding T2a of the transformer 224a is connected to the rectifier circuit 225a.

(Rectifier circuit 225a)
The rectifier circuit 225a includes a diode D1, resistors R10 and R11, and a capacitor C5. The anode terminal of the diode D1 is connected to one terminal of the secondary winding T2a of the transformer 224a. The cathode terminal of the diode D1 is connected to one terminal of the capacitor C5 and one terminal of the resistor R10. The other terminal of the resistor R10 is connected to the transfer roll 21. The other terminal of the resistor R10 is connected to one terminal of the resistor R11. The other terminal of the resistor R11 is connected to the other terminal of the capacitor C5 and the other terminal of the secondary winding T2a.

Furthermore, the other terminal of the resistor R11 is connected to the rectifier circuit 225b of the cleaning output unit 22b.
The rectifier circuit 225a is so-called half-wave rectification, but may be full-wave rectification.

  Next, the drive circuit 223b, the transformer 224b, and the rectifier circuit 225b of the cleaning output unit 22b will be described. Since the DA converter 221b and the control circuit 222b of the cleaning output unit 22b are the same as the DA converter 221a and the control circuit 222a of the transfer output unit 22a, respectively, description thereof is omitted.

(Drive circuit 223b)
The drive circuit 223b includes an npn transistor Tr2, resistors R18 and R19, and a capacitor C14 as an example of a switch element.
One terminal of the resistor R18 is connected to an output terminal of the control circuit 222b (an output terminal similar to the output terminal of the differential amplifier Amp1 of the control circuit 222b of the cleaning output unit 22b). The other terminal is connected to one terminal of the capacitor C14. The other terminal of the capacitor C14 is grounded. One terminal of the capacitor C14 is connected to one terminal of the resistor R19. The other terminal of the resistor R19 is connected to the transformer 224b.
The collector terminal and base terminal of the npn transistor Tr2 are connected to the transformer 224b. The emitter terminal of the npn transistor Tr2 is grounded.
Here, the capacitor C14 and the resistor R18 are an example of a time constant setting circuit.

(Transformer 224b)
The transformer 224b includes a primary winding T11b, a primary side auxiliary winding T12b, and a secondary winding T2b.
One terminal of the primary winding T11b of the transformer 224b is connected to the collector terminal of the npn transistor Tr2 of the drive circuit 223b. A power supply potential Vcc (for example, 24 V) is applied to the other terminal. One terminal of the primary side auxiliary winding T12b is connected to the base terminal of the npn transistor Tr2. The other terminal of the primary side auxiliary winding T12b is connected to the other terminal of the resistor R19 of the drive circuit 223b.
The secondary winding T2b of the transformer 224b is connected to the rectifier circuit 225b.

(Rectifier circuit 225b)
The rectifier circuit 225b includes a diode D2, resistors R20 and R21, and a capacitor C10. The cathode terminal of the diode D2 is connected to one terminal of the secondary winding T2b of the transformer 224b. The anode terminal of the diode D2 is connected to one terminal of the capacitor C10 and one terminal of the resistor R20. The other terminal of the resistor R20 is connected to one terminal of the resistor R21. The other terminal of the resistor R21 is connected to the other terminal of the capacitor C10 and the other terminal of the secondary winding T2b of the transformer 224b.

The anode terminal of the diode D2 is connected to the other terminal of the capacitor C5 of the rectifier circuit 225a of the transfer output unit 22a.
On the other hand, the other terminal of the capacitor C10 is grounded (grounded) via the current detection circuit 230.

<Operation of Transfer Section Bias Power Supply 22>
Next, operations of the transfer unit bias power supply 22 (transfer output unit 22a and cleaning output unit 22b) will be described with reference to FIGS.

First, the basic oscillation operation of the transfer output unit 22a will be described.
When a control signal S2a that is a + voltage is input from the control circuit 222a to the drive circuit 223a, the capacitor C4 is charged, and the voltage at one terminal (terminals connected to the resistor R8 and the resistor R9) increases to the + side. This voltage raises the voltage of the base terminal of the npn transistor Tr1 to the + side via the primary side auxiliary winding T12a. When the voltage at the base terminal of the npn transistor Tr1 exceeds the Si built-in potential (0.6 V), the npn transistor Tr1 is turned on, and a current flows between the collector terminal and the emitter terminal.

Then, a current flows through the primary winding T11a of the transformer 224a, thereby generating a voltage that increases the voltage of the base terminal in the primary side auxiliary winding T12a. As a result, the collector current increases with time.
A voltage is also generated in the secondary winding T2a, but no current flows through the secondary winding T2a because the direction of the diode D1 is opposite to the direction of the voltage.

  Since the npn transistor Tr1 has a finite amplification factor, when the collector current reaches a certain value or more, the collector current cannot increase any more, and the change in the magnetic flux of the core of the primary winding T11a stops. As a result, a force is applied to the primary winding T11a so as to cause a current to flow in the same direction as before, and a reverse voltage is generated. As a result, a voltage in the same direction as the direction of the diode D1 is generated in the secondary winding T2a, and a current flows in the secondary winding T2a.

Then, a reverse voltage generated in the primary winding T11a generates a reverse voltage also in the primary side auxiliary winding T12a, and a reverse bias is applied between the base terminal and the emitter terminal of the npn transistor Tr1. As a result, the npn transistor Tr1 is turned off.
When the current flowing through the diode D1 becomes 0, the voltage generated in the primary winding T11a, the primary side auxiliary winding T12a, and the secondary winding T2a becomes 0V. As a result, the space between the base terminal and the emitter terminal of the npn transistor Tr1 rises again to the + side due to the charge accumulated in the capacitor C4. As a result, the npn transistor Tr1 is turned on again.
In this way, by turning on and off the npn transistor Tr1, the current flowing through the secondary winding T2a during the off period is output as the transfer bias Vtrn.

Here, the current detection circuit 230 obtains a voltage proportional to the current flowing through the transfer roll 21. The differential amplifier Amp1 receives a voltage proportional to the current at the negative input terminal, amplifies the difference from the DA output signal S1a from the DA converter 221a, and flows through the photosensitive drum 11 via the transfer roll 21. Is larger than the value set in the DA output signal S1a, the value of the control signal S2a is decreased so that the transfer bias Vtrn is decreased. On the other hand, when the current flowing through the photosensitive drum 11 via the transfer roll 21 is smaller than the value set by the DA output signal S1a, the value of the control signal S2a is increased so that the transfer bias Vtrn is increased.
In this way, control is performed so that the current flowing through the photosensitive drum 11 via the transfer roll 21 is set to a predetermined value. This control method is current control for controlling the current supplied by the transfer bias to a predetermined value.

The transfer bias (voltage) may be controlled (voltage control) so as to have a predetermined value.
Further, in the transfer output unit 22a and the cleaning output unit 22b, either one may be current controlled and the other may be voltage controlled.
Further, in addition to the current detection circuit 230, an overvoltage detection circuit for detecting the transfer bias Vtrn is provided so that when the transfer bias Vtrn becomes larger than a predetermined value, the transfer bias Vtrn becomes smaller. You may control so that the value of control signal S2a may be made small. A similar overvoltage detection circuit may be provided for the cleaning bias Vcrn.

In the first embodiment, as shown in FIGS. 3B and 4A, a cleaning bias Vcrn (for example, −1300 V) as a negative voltage is output from the cleaning output unit 22b. The DA converter 221a generates a pseudo clock signal during the switching period when the transfer output unit 22a switches to a state in which a transfer bias Vtrn (for example, +1600 V) as a positive voltage is output from the transfer output unit 22a (FIG. 3B, FIG. 4). (A) Switching period from time b to time d).
Hereinafter, the pseudo clock signal will be described.

Immediately before switching from a state where a cleaning bias Vcrn (for example, -1300 V) as a negative voltage is output from the cleaning output unit 22 b to a state where a transfer bias Vtrn (for example as +1600 V) as a positive voltage is output from the transfer output unit 22 a. The transfer unit bias power source 22 outputs a negative voltage cleaning bias Vcrn (for example, −1300 V) as the output voltage Vout.
As a result, the surface of the photosensitive drum 11 is charged to a negative voltage. For this reason, as can be seen from FIG. 5, from the ground (earth), the resistor R21 of the rectifier circuit 225b in the cleaning output unit 22b, the secondary winding T2a of the transformer 224a of the transfer output unit 22a, and the diode D1 in this order. An electric current flows through the transfer roll 21 (photosensitive drum 11). That is, a current flows through the secondary winding T2a of the transformer 224a.
When the diode D1 becomes conductive and there is a bias voltage in the secondary winding T2a of the transformer 224a, the above-described drive circuit 223a becomes difficult to operate.

  Therefore, in the first embodiment, a pseudo clock signal is provided for the DA output signal S1a from the DA converter 221a in the switching period from time b to time d shown in FIGS. 3B and 4A. Yes. This pseudo clock signal is amplified by the control circuit 222a and becomes a control signal S2a, which is applied from the drive circuit 223a to one terminal of the capacitor C4 (terminals connected to the resistor R8 and the resistor R9). As a result, the electric charge accumulated in the capacitor C4 is discharged, the secondary winding T2a of the transformer 224a is easily excited, and a normal operation state is entered.

  In the first embodiment, as shown in FIG. 3C and FIG. 4B, the cleaning output unit from the state in which the transfer bias Vtrn that is a positive voltage is output from the transfer output unit 22a. Even when switching from 22b to a state in which the cleaning bias Vcrn that is a negative voltage is output, the DA converter 221b generates a pseudo clock signal (from time m to time o in FIGS. 3C and 4B). Switching period).

  FIG. 6 is a time chart showing an example of switching the polarity of the output voltage Vout of the transfer unit bias power supply 22 in the first embodiment. FIG. 6A illustrates a case where the state in which the cleaning bias Vcrn that is a negative voltage is output from the cleaning output unit 22b is changed to the state in which the transfer bias Vtrn that is a positive voltage is output from the transfer output unit 22a. b) is a case in which the state is switched from the state in which the transfer bias Vtrn, which is a positive voltage, is output from the transfer output unit 22a to the state in which the cleaning bias Vcrn, which is a negative voltage, is output from the cleaning output unit 22b.

As shown in FIG. 6A, when switching from a state in which a cleaning bias Vcrn that is −voltage is output from the cleaning output unit 22b to a state in which a transfer bias Vtrn that is + voltage is output from the transfer output unit 22a, The output voltage Vout rises to the transfer bias Vtrn at time d.
As shown in FIG. 6B, in the case of switching from the state in which the transfer bias Vtrn that is a positive voltage is output from the transfer output unit 22a to the state in which the cleaning bias Vcrn that is a negative voltage is output from the cleaning output unit 22b. However, the output voltage Vout rises to the cleaning bias Vcrn at time o.

FIG. 7 shows a case where the DA converter 221a simulates when the cleaning output unit 22b switches from the state in which the negative voltage cleaning bias Vcrn is output to the state in which the transfer output unit 22a outputs the positive voltage transfer bias Vtrn. It is a figure which shows an example of the control data S0 when not transmitting a clock signal, and a timing chart. FIG. 7A shows the control data S0, and FIG. 7B shows a timing chart.
Note that the horizontal axis (time axis t) in FIG. 7B is the same as in FIGS. 4 and 6, but time α and time β are provided between time d and time e.

As shown in FIG. 7A, when the pseudo clock signal is not generated from the DA converter 221a, the signal generation unit 22c generates and transmits “D3 (3) TRN” at time c, The repetition of “D3 (3) TRN” and “D2 (0) TRN” in b) is not performed a plurality of times.
For this reason, as described above, the npn transistor Tr1 is not turned on even when “D3 (3) TRN” is set at time c due to the current flowing from the ground (earth) toward the negatively charged photosensitive drum 11. The oscillation operation remains unstarted.
Even when the npn transistor Tr1 is turned on at the time α delayed by the delay period Td from the time c, the current detection circuit 230 generates a negative current flowing from the ground (earth) to the negatively charged photosensitive drum 11. Since it is detected, the control signal S2a from the control circuit 222a is set in a direction to increase the transfer bias Vtrn, and an overshoot is likely to occur at time β in FIG. 7B.
Here, when the oscillation operation does not start, when the startup is delayed, when overshoot occurs, etc., when the oscillation operation does not start in a predetermined state, switching failure, startup performance is poor or startup failure (switching failure) ).
When such a start-up failure (switching failure) occurs in the transfer unit 20, an image formed in image formation deteriorates.

On the other hand, when switching from the state in which the transfer bias Vtrn, which is a positive voltage, is output from the transfer output unit 22a to the state in which the cleaning bias Vcrn, which is a negative voltage, is output from the cleaning output unit 22b, as can be seen from FIG. From the positively charged photosensitive drum 11, the resistance R11 of the rectifier circuit 225a in the transfer output unit 22a, the diode D2 of the rectifier circuit 225a in the cleaning output unit 22b, the secondary winding T2b of the transformer 224b, and the current detection circuit 230 are used. Current flows to ground. Therefore, the npn transistor Tr2 is not inhibited from being turned on.
However, the voltage due to the electric charge accumulated in the capacitor C14 and the voltage generated in the primary side auxiliary winding T12b are superimposed and applied to the gate terminal of the npn transistor Tr2. For this reason, the npn transistor Tr2 is turned on rapidly, and overshoot is likely to occur as described above. Therefore, it is preferable to provide a pseudo clock signal in the switching period and consume the voltage generated in the direction of turning on the npn transistor Tr2. If this overshoot does not cause noise or the like in image formation, it is not necessary to provide a pseudo clock signal.

In the switching period from time b to time d shown in FIGS. 3B and 4A and the switching period from time m to time o shown in FIGS. 3B and 4A. The repetition frequency of the pseudo clock signal need not be the self-oscillation frequency. In the first embodiment, the self-oscillation frequency is 25 kHz as an example. On the other hand, the repetition frequency of the pseudo clock signal generated by the DA converter 221a is 3 kHz as an example.
When switching the polarity of the output voltage Vout, the pseudo clock signal reduces (invalidates) the bias voltage generated in the secondary winding T2a or the secondary winding T2b due to charging of the photosensitive drum 11 before switching, It is sufficient if start-up failure can be suppressed, and it may be set separately from the self-oscillation frequency.

  Furthermore, the switching period for generating the pseudo clock signal may be set to a period during which the bias voltage generated in the secondary winding T2a can be reduced. For example, when the repetition frequency of the pseudo clock signal is 3 kHz, the switching period for generating the pseudo clock signal may be set to 4 to 6 ms so that the repetition is about 10 times. In this switching period, the transfer bias Vtrn is not output from the transfer output unit 22a, and a switching period occurs until the output of the transfer bias Vtrn, but the bias voltage generated in the secondary winding T2a can be invalidated. Accordingly, a predetermined transfer bias Vtrn can be obtained from the transfer output unit 22a thereafter. Therefore, the occurrence of startup failure can be suppressed.

[Second Embodiment]
(Block configuration of transfer unit bias power supply 22)
FIG. 8 is a diagram illustrating an example of a block configuration of the transfer unit bias power supply 22 according to the second embodiment. The signal flow is indicated by arrows. In the second embodiment, the transfer unit bias power source 22 includes a bypass circuit 226a in the transfer output unit 22a and a bypass circuit 226b in the cleaning output unit 22b. Since other configurations such as the image forming apparatus 1 are the same, description thereof is omitted.
The bypass circuit 226a receives the DA output signal S1a of the DA converter 221a and supplies the AC component to the drive circuit 223a as will be described later. That is, the output of the DA converter 221a bypasses the control circuit 222a and is received by the drive circuit 223a.
Since the same applies to the cleaning output unit 22b, the description thereof is omitted.

(Circuit configuration of the transfer output unit 22a and the cleaning output unit 22b)
FIG. 9 is a diagram illustrating an example of a circuit configuration of the transfer output unit 22a and the cleaning output unit 22b according to the second embodiment. A bypass circuit 226a is added to FIG. 5 in the first embodiment.
The bypass circuit 226a includes a resistor R12 and a capacitor C6. One terminal of the resistor R12 is connected to the DA converter 221a, and the other terminal of the resistor R12 is connected to one terminal of the capacitor C6. The other terminal of the capacitor C6 is connected to a connection point between the resistor R8 and the resistor R9 of the drive circuit 223a. That is, the resistor R12 and the capacitor C6 are connected in series.
Therefore, the bypass circuit 226a passes a fluctuation (alternating current) component equal to or higher than the frequency set by the resistor R12 and the capacitor C6 in the DA output signal S1a output from the DA converter 221a, and transmits it to the drive circuit 223a. Hereinafter, a fluctuation (alternating current) component having a frequency equal to or higher than the frequency set by the resistor R12 and the capacitor C6 is referred to as an alternating current component.
Other configurations are the same as those in the first embodiment, and thus the description thereof is omitted.

As shown in FIG. 4, the DA converter 221a generates and transmits a pseudo clock signal that alternately repeats VD2 (0) and VD3 (3) between time b and time d in the DA output signal S1a. To do.
Therefore, the AC component of the pseudo clock signal is transmitted to the drive circuit 223a via the capacitor C6 of the bypass circuit 226a. That is, during the period from time b to time d, the electric charge of the capacitor C4 is discharged by the AC component of the pseudo clock signal in the DA output signal S1a. As a result, the secondary winding T2a of the transformer 224a is easily excited and shifts to a normal operation state. As in the first embodiment, the charge accumulated in the capacitor C4 is discharged by the control signal S2a obtained by amplifying the pseudo clock signal in the DA output signal S1a from time b to time d. In addition, in the second embodiment, the capacitor C4 is further discharged by the bypass circuit 226a, so that the secondary winding T2a of the transformer 224a can be more easily excited, and normal operation is performed. The state can be changed.
Since the cleaning output unit 22b can be considered in the same manner, the description thereof is omitted.

  Note that the bypass circuit 226a and the bypass circuit 226b need not be provided in both the transfer output unit 22a and the cleaning output unit 22b, and may be provided on the side that transmits the pseudo clock signal.

[Third Embodiment]
(Block configuration of transfer unit bias power supply 22)
FIG. 10 is a diagram illustrating an example of a block configuration of the transfer unit bias power source 22 according to the third embodiment. The signal flow is indicated by arrows. In the third embodiment, the smoothing circuit 227a is provided in the transfer output unit 22a and the smoothing circuit 227b is provided in the cleaning output unit 22b in the second embodiment.
Since other configurations such as the image forming apparatus 1 are the same, description thereof is omitted.

In the transfer output unit 22a, the smoothing circuit 227a receives the DA output signal S1a of the DA converter 221a, and the output of the smoothing circuit 227a is input to the control circuit 222a. That is, the smoothing circuit 227a causes the control circuit 222a to receive a signal obtained by reducing (smoothing) the fluctuation component of the output of the DA converter 221a. The bypass circuit 226a receives the DA output signal S1a of the DA converter 221a.
Since the same applies to the cleaning output unit 22b, the description thereof is omitted.

(Circuit configuration of the transfer output unit 22a and the cleaning output unit 22b)
FIG. 11 is a diagram illustrating an example of a circuit configuration of the transfer output unit 22a and the cleaning output unit 22b according to the third embodiment. Smoothing circuits 227a and 227b are added to FIG. 9 in the second embodiment.
The smoothing circuit 227a includes a resistor R13 and a capacitor C7. One terminal of the resistor R13 is connected to the DA converter 221a, and the other terminal of the resistor R13 is connected to one terminal of the capacitor C7 and to the + input terminal of the differential amplifier Amp1. The other terminal of the capacitor C7 is grounded. That is, the smoothing circuit 227a smoothes the output of the DA converter 221a.
Other configurations are the same as those in the first embodiment, and thus the description thereof is omitted.

As shown in FIG. 4, the DA converter 221a generates and transmits a pseudo clock signal that alternately repeats VD2 (0) and VD3 (3) between time b and time d in the DA output signal S1a. To do.
Therefore, the smoothing circuit 227a converts the pseudo clock signal into a smoothed DC voltage signal and transmits the signal to the differential amplifier Amp1 of the control circuit 222a.
As a result, the control signal S2a from the differential amplifier Amp1 is not a signal obtained by amplifying the pseudo clock signal.
On the other hand, as in the second embodiment, the AC component of the pseudo clock signal is transmitted to the drive circuit 223a via the capacitor C6 of the bypass circuit 226a. That is, the secondary winding T2a of the transformer 224a is easily excited by discharging the electric charge of the capacitor C4 by the AC component of the pseudo clock signal in the DA output signal S1a from the time c to the time d. It is possible to shift to an operating state.
In the third embodiment, since the fluctuation of the signal input to the positive input terminal of the differential amplifier Amp1 is suppressed in the control circuit 222a, the differential amplifier Amp1 can operate more stably.
Since the same applies to the cleaning output unit 22b, the description thereof is omitted.

  Note that the smoothing circuit 227a and the smoothing circuit 227b are not necessarily provided in both the transfer output unit 22a and the cleaning output unit 22b, and are preferably provided on the side where the bypass circuit 226a or the bypass circuit 226b is provided.

  As described above, in the first to third embodiments, the image forming apparatus 1 has been described as including the single photosensitive drum 11. The image forming apparatus 1 may be a tandem type having a plurality of photosensitive drums corresponding to respective colors such as yellow (Y), magenta (M), cyan (C), and black (K). In this case, the transfer unit bias power source for applying the transfer bias Vtrn and the cleaning bias Vcrn to the transfer roll provided corresponding to each photosensitive drum has been described in the first to third embodiments. A transfer unit bias power source 22 may be applied.

DESCRIPTION OF SYMBOLS 1 ... Image forming apparatus, 3 ... Image reading apparatus, 10 ... Image formation process part, 11 ... Photosensitive drum, 12 ... Charging roll, 13 ... Laser exposure device, 13 ... Charging bias power supply, 14 ... Developing device, 15 ... Charging Bias power supply, 16 ... development bias power supply, 20 ... transfer section, 21 ... transfer roll, 22 ... transfer section bias power supply, 22a ... transfer output section, 22b ... cleaning output section, 22c ... signal generation section, 22d ... signal decoding section, 30: control unit, 221a, 221b ... DA converter, 222a, 222b ... control circuit, 223a, 223b ... drive circuit, 224a, 224b ... transformer, 225a, 225b ... rectifier circuit, 226a, 226b ... bypass circuit, 227a, 227b ... Smoothing circuit, 230 ... current detection circuit, Amp1 ... differential amplifier

Claims (5)

An image carrier,
Charging means for charging the image carrier;
Exposure means for exposing the image carrier and forming an electrostatic latent image on the image carrier;
Developing means for developing the electrostatic latent image exposed by the exposure means and formed on the image carrier;
A transfer bias and a cleaning bias having a polarity different from the transfer bias are set to be opposed to the image carrier, and the developed image is transferred when the transfer bias is set. Transfer means for transferring to the body;
Each includes a digital-to-analog converter circuit that receives a designated value that designates a voltage as a digital signal and converts it into an analog signal, and a rectifier circuit that outputs a voltage, one of which outputs the transfer bias, and the other A plurality of self-excited transmission type power supply units in which one outputs the cleaning bias, and a rectifier circuit that outputs the transfer bias and a rectifier circuit that outputs the cleaning bias are connected in series;
Generating the specified value in a time series so that the transfer bias and the cleaning bias are switched and generating, and generating a signal for transmitting the specified value corresponding to each of the digital-analog conversion circuits of the plurality of power supply units And comprising
The signal generation unit includes a voltage of the polarity to be supplied later in at least one of a predetermined period for switching the polarity of the voltage from positive to negative or a predetermined period for switching from negative to positive, and An image forming apparatus, characterized in that the specified value is generated so that a voltage having a smaller absolute value than a polarity voltage is repeated. The signal generation unit further generates an identification code for identifying each of the plurality of power supply units that outputs the voltage specified by the specified value, and transmits the specified value and the identification code as a set,
A signal decoding unit that receives and decodes the identification code, and transmits the specified value paired with the identification code to the digital-to-analog conversion circuit of the power supply unit corresponding to the identification code in the plurality of power supply units; The image forming apparatus according to claim 1, further comprising: The power supply unit is
A transformer having a primary winding, a secondary winding and an auxiliary winding, the rectifier circuit being connected to the secondary winding;
A switching element connected to the auxiliary winding and the primary winding to control self-excited transmission;
A time constant setting circuit for setting a switching frequency of the switch element;
A control circuit for setting a voltage to be supplied to the time constant setting circuit based on an analog signal in which the designated value is converted by the digital-analog conversion circuit;
The image forming apparatus according to claim 1, further comprising:   The power supply unit further includes a bypass circuit that supplies, to the time constant setting circuit, a voltage fluctuation component having a frequency equal to or higher than a predetermined frequency in the analog signal obtained by converting the designated value by the digital-analog conversion circuit. The image forming apparatus according to claim 3.   The power supply unit further includes a smoothing circuit that reduces a voltage fluctuation component having a frequency equal to or higher than a predetermined frequency in the analog signal obtained by converting the designated value by the digital-analog conversion circuit, and supplies the voltage fluctuation component to the control circuit. The image forming apparatus according to claim 4.

Images