JP2013237100A - Method for producing ceramic circuit board, and ceramic circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a ceramic circuit board, capable of forming a circuit board having an Ni plating layer in which the wettability of molten solder is improved, and to provide a ceramic circuit board with a circuit board formed to have an Ni plating layer in which the wetting spreadability of molten solder is improved.SOLUTION: There is provided a method for producing a ceramic circuit board that has: a ceramic board; a circuit board essentially consisting of copper and joined to one side of the ceramic board via a brazing filler metal layer; and an Ni plating layer deposited on the surface of the circuit board. The method includes: a joining step of heating a circuit original board and joined to one side of the ceramic board; a chemical polishing step of chemically polishing the circuit board formed in the joining step; and a plating step of depositing an Ni plating layer to the surface of the circuit board; wherein the circuit original board is a copper board made of copper or a copper alloy equivalent to 1/2H to H in a temper designation, and the joining step has a first temperature range of 400 to 750°C in its temperature profile.

Description

The present invention relates to a method for manufacturing a ceramic circuit board in which a circuit board mainly composed of copper is bonded to one surface of a ceramic substrate via a brazing material, and an invention related to the ceramic circuit board.

Prior arts related to this technical field are disclosed in Patent Documents 1 to 3 below. The ceramic circuit board disclosed in Patent Document 1 is “a ceramic circuit formed by attaching a metal circuit board to the surface of a ceramic substrate via a brazing material and depositing a nickel plating layer on the surface of the metal circuit board. A ceramic circuit board characterized in that the nickel plating layer has a surface roughness of 10 μm or less in terms of 10-point average roughness (Rz) ”. Further, in Patent Document 1, as a method for manufacturing such a ceramic circuit board, a metal circuit board joined to a ceramic substrate via a brazing material is added to 3 to 7% sulfuric acid to which 5 to 15% of hydrogen peroxide is added. Pickle in a bath for 5 to 10 minutes (room temperature), make the surface of the metal circuit board 10 point average roughness (Rz) to 10 μm or less, and then apply a nickel plating layer by electroless plating or electroplating. A manufacturing method for forming on the surface of a circuit board is described.

Further, the ceramic circuit board disclosed in Patent Document 2 is described as follows: “A ceramic circuit board is formed by plating a metal circuit on one side and a metal heat sink on the other side, and has a rough surface. Rmax ≦ 5 μm and glossiness is 40 or more. ”A ceramic circuit board. Further, in Patent Document 2, as a method for manufacturing such a ceramic circuit board, a metal circuit board and a metal heat sink are joined to the ceramic board via a brazing material, and the metal circuit board and the metal heat sink are mixed with sulfuric acid and peroxide. A manufacturing method is described in which chemical polishing is performed using a solution containing hydrogen and plating is performed by electroless plating.

Further, Patent Document 3 relating to the application of the present applicant states that “a circuit board manufacturing method in which a circuit board is provided on one surface of a ceramic substrate and a metal heat sink is provided on the other surface, The method for producing a ceramic circuit board, wherein the metal circuit is formed, the metal heat sink is formed on the other surface, then chemical polishing is performed, and a rust inhibitor is applied after the chemical polishing is performed. And a circuit board manufactured by the manufacturing method, wherein “the surface roughness of the metal circuit or the metal heat sink is 0.1 to 10 μm in Ra, or 1.0 to 5.0 μm in Rmax. A ceramic circuit board is disclosed.

JP 2001-24296 A JP-A-7-147465 JP 2007-81217 A

The above Patent Documents 1 to 3 are all made in order to ensure the wettability of the molten solder and the soundness of the formed solder layer when the semiconductor elements are mounted on the metal circuit board, Although each of them can provide a certain effect, there is room for improvement in terms of wet solder spreading on the surface of the circuit board in the process of bonding a semiconductor element or the like to the circuit board.

In other words, the bonding step is a heating process in which a circuit original plate made of copper, which is a starting material for a circuit board, and a ceramic substrate are bonded via a brazing material. In the joining process, as is well known, crystallites constituting the circuit original plate are recrystallized and coarsened by heat applied to the circuit original plate. Then, in order to join the circuit original plate to the ceramic substrate, as shown as a temperature profile PO in FIG. 3 (d), the circuit formed simply through the joining process when the temperature is raised to the temperature range P5 where the brazing material melts. 5A, when the circuit board 9a is cut along the vertical direction (thickness direction) and the cut surface is viewed, the board 9a is ±± First recrystallized phase N1 mainly composed of crystallite C1 having a growth orientation within 30 ° and first crystallite C2 mainly composed of crystallite C2 having a growth orientation within ± 30 ° with respect to the parallel direction of the surface of circuit board 9a. There are cases where the second recrystallization phase N2 and the third recrystallization phase N3 mainly composed of the crystallite C3 having a growth orientation between the growth orientation of the crystallite C1 and the growth orientation of the crystallite C2 may occur. In FIG. 5A, reference numeral 1e denotes a ceramic substrate, and reference numeral 1d denotes a brazing material layer that joins the ceramic substrate 1e and the circuit board 9a. Here, FIG. 5 (a) is a schematic enlarged cross-sectional view of the structure of the circuit board 9a after the joining process, and the crystallites C1 to C3 are drawn in a rectangular shape for the sake of understanding. The hatching of elements is omitted (the same applies to FIGS. 5B and 5C). Further, in FIG. 5A, which is a conceptual diagram, both the first recrystallized phase N1 and the second recrystallized phase N2 are configured in a state where one crystallite C1 to C3 is juxtaposed in a direction perpendicular to the growth direction. The first recrystallized phase N1 to the third recrystallized phase N3 are formed. In the actual first recrystallized phase N1 to third recrystallized phase N3, a plurality of crystallites C1 to C3 are also formed in the growth direction. Have.

Here, when the crystal constituting the circuit original plate is recrystallized, and the circuit board 9a in which the crystallites C1 to C3 constituting the first recrystallization phase N1 to the third recrystallization phase are coarsened is formed. That is, when the individual long axis lengths of the crystallites C1 to C3 in the cut surface along the vertical direction are large, the following problem occurs. That is, in the chemical polishing step performed subsequent to the bonding step, as shown in FIG. 5B, the surface of the second recrystallization phase N2 remains smooth, but the boundary between the crystallite C1 and the crystallite C3. Are selectively removed, and the surfaces of the first recrystallized phase N1 and the third recrystallized phase N3 are uneven, and the surface of the first recrystallized phase N1 having a substantially vertical growth orientation is preferentially removed. The For this reason, in each combination of recrystallized phases, an excessively large recess O1 or step D1 may be generated particularly at the boundary K between the first recrystallized phase N1 and the second recrystallized phase N2.

Then, in the Ni plating step after the chemical polishing step, as shown in FIG. 5C, the Ni plating layer 9i is deposited on the surface of the circuit board 9a. The Ni plating layer 9i formed on the surface of the circuit board 9a having the above surface state has a granular phase M1 having a rough surface to which the surface state of the first recrystallization phase N1 is transferred, and the second recrystallization. A smooth phase M2 to which the surface state of the phase N2 is transferred and a phase M3 to which the surface state of the third recrystallization phase N3 is transferred are formed, and the first recrystallization phase N1 and the second recrystallization phase N3 The step D1 and the recess O1 generated at the boundary K of the crystal phase N2 are also transferred to the boundary between the granular phase M1 and the smooth phase M2. Then, in, for example, a cleaning process after the Ni plating process, moisture remains in the concave portion O2 or the step D2 existing at the boundary between the granular phase M1 and the smooth phase M2, or is selectively oxidized by oxygen in the atmosphere, Since an oxide layer having poor wettability is formed at the boundary portion K, it becomes a barrier to the spread of wetness of the molten solder and inhibits the spread of wetness of the molten solder on the surface of the Ni plating layer 9i.

The present invention has been made in view of the above prior art, and a method for producing a ceramic circuit board capable of forming a circuit board having a Ni plating layer with improved wet solder wettability and improved wet solder wettability. An object of the present invention is to provide a ceramic circuit board on which a circuit board having a Ni plating layer is formed.

In order to solve the above problems, the present inventors have intensively studied, and as described above, two phases having different surface roughness, that is, a smooth phase and a granular phase are formed in the Ni plating layer, and the two phases are formed. The fact that the boundary of the solder hinders the wet solder spreading property of the molten solder, and that the wet solder spreading property of the molten solder can be improved by controlling the boundary state of the two phases, has completed the present invention. It is a thing.

An aspect of the present invention configured based on such knowledge is attached to a surface of a ceramic substrate, a circuit board mainly composed of copper bonded to one surface of the ceramic substrate through a brazing material layer, and the surface of the circuit board. A method of manufacturing a ceramic circuit board having a Ni plating layer, a placement step of placing a circuit original plate on one surface of the ceramic substrate via a brazing material, a joining step of heating and joining the circuit original plate to one surface of the ceramic substrate, A chemical polishing step for chemically polishing the circuit board formed in the joining step, and a plating step for depositing a Ni plating layer on the surface of the circuit board after the chemical polishing step, wherein the circuit original plate is a tempering symbol A copper plate made of copper or a copper alloy corresponding to 1 / 2H to H, and in the temperature profile, the joining step is arranged in a first temperature range and after the first temperature range. And a second temperature zone for heating at a melt temperature of wood is a method of manufacturing a ceramic circuit board, wherein the temperature of the first temperature range is 400 to 750 ° C..

According to the method for manufacturing such a ceramic circuit board (hereinafter, sometimes simply referred to as a circuit board), the circuit original plate placed on one surface of the ceramic substrate via the brazing material in the placing step is heated in the joining step. Bonded to the ceramic substrate through a brazing filler metal. The circuit board heated in the bonding process is chemically polished in the chemical process to clean the surface of the circuit board, and then a Ni plating layer is formed on the surface of the circuit board in the plating process.

Here, the circuit original plate arranged in the arrangement step is recrystallized by heat applied to the circuit original plate in the joining step performed after the arrangement step, and the structure is changed, and the circuit becomes the circuit board constituting the circuit board. The starting material for the board. As the circuit original plate, a copper plate made of copper or a copper alloy corresponding to the defined tempering symbols 1 / 2H to H is selected.

The average crystal grain size of the circuit original plate made of copper or copper alloy is preferably 100 μm or less, and more preferably 50 μm or less. Etching for evaluating the crystal grain size was performed using a 10% sulfuric acid solution at 50 ° C. × 1 min.

Further, in the circuit board manufacturing method of the above aspect, as shown in FIG. 3A, the temperature profile PA of the bonding step is 400 before the second temperature range P5 where the brazing material is heated at a melting temperature. The 1st temperature range P3 heated at the temperature of -750 degreeC is arrange | positioned. As a result, as shown in FIG. 4A, the circuit board 1a of the joined body 3 formed by heating the circuit original plate through the joining process has a growth orientation with respect to the direction perpendicular to the surface of the circuit board 1a. A first recrystallized phase Q1 that is made of a crystallite S1 that is within ± 30 ° and that has an average value of the major axis L1 of the crystallite S1 of 100 to 400 μm, and a growth orientation with respect to the parallel direction of the surface of the circuit board 1a. And a second recrystallized phase Q2 having an average value L2 of the major axis length of the crystallite S2 of 100 to 400 μm. The circuit board 1a also includes a third recrystallized phase Q3 composed of crystallites S3 whose growth orientation is inclined with respect to the surface of the circuit board 1a as shown in the figure, and the average value of the major axis lengths of the crystallites S3 Is about 100 to 400 μm.

In this way, in particular, since the long axis lengths L1 and L2 of the crystallites S1 and S2 constituting the first recrystallization phase Q1 and the second recrystallization phase Q2 are controlled within a predetermined range, the crystallites are miniaturized. In the subsequent chemical polishing step, as shown in FIG. 4B, the step T1 and the recess U1 formed at the boundary K between the first recrystallization phase Q1 and the second recrystallization phase Q2 are the conventional step O1. And it is very small compared with the recessed part D1. Then, by performing a plating step after the chemical polishing step, as shown in FIG. 4C, the Ni plating layer 1i of the circuit board 1 has a granular phase R1 on the surface of the first recrystallized phase Q1. A smooth phase R2 is formed on the surface of the second recrystallized phase Q2. Here, as described above, an excessively large step or recess is not formed at the boundary K between the first recrystallized phase Q1 and the second recrystallized phase Q2 of the circuit board 1a. The step T2 and the recess U2 formed at the boundary between the granular phase R1 and the smooth phase R2 are very small as compared with the conventional step O2 and the recess D2, and therefore, oxidation that inhibits the wetting and spreading of the molten solder at the boundary The formation of the layer is suppressed, so that the desired molten solder wettability can be ensured. When the temperature in the first temperature range is less than 400 ° C. and exceeds 750 ° C., the crystallites constituting the first recrystallized phase and the second recrystallized phase are coarsened and the major axis thereof Since the length exceeds 400 μm, it is not preferable. Furthermore, the temperature range of the first temperature range is more preferably 500 ° C to 600 ° C.

It is desirable that the rate of temperature rise to the first temperature range is 2.0 to 20.0 ° C./min. When the rate of temperature increase is less than 2.0 ° C./min and exceeds 20.0 ° C./min, the crystal growth direction is composed of crystallites within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board. The area of the granular phase of the Ni-plated layer having a rough surface reflects the surface state of the first recrystallized phase whose grain boundaries have been eroded due to chemical polishing, and as a result, the wet solder spreads. Sexually decreases.

Further, in the chemical polishing step, it is desirable to use a mixed solution containing 5.0 to 30.0% by weight of sulfuric acid and 2.0 to 10.0% by weight of hydrogen peroxide. When sulfuric acid is less than 5.0%, the circuit board surface is not sufficiently cleaned, so that the wet solder spreadability decreases. Further, when sulfuric acid exceeds 30.0% or hydrogen peroxide is less than 2.0%, an excessively large step or recess is formed at the boundary between the first recrystallization phase and the second recrystallization phase. It is easy to be done, and the wet-spreading property of the molten solder is physically lowered due to the step and the concave portion. Furthermore, when hydrogen peroxide exceeds 10.0%, the surface of the circuit board becomes too smooth, and the wet solder spreads excessively.

Another aspect of the present invention includes a ceramic substrate, a circuit board made of copper or a copper alloy bonded to one surface of the ceramic substrate via a brazing material layer, and a Ni plating layer deposited on the surface of the circuit board. The circuit board includes a first recrystallized phase and a second recrystallized phase defined below, and the Ni plating layer is formed on a surface of the first recrystallized phase. The ceramic circuit board includes a smooth phase formed on the surface of the granular phase and the second recrystallized phase, and an oxygen concentration at a boundary between the granular phase and the smooth phase is 25.0 atomic% or less. However, if the oxygen concentration is too low, it becomes difficult to form an extremely small amount of a passive film on the Ni plating surface and prevent excessive oxidation. For this reason, it is preferable that the oxygen concentration in the boundary part of the said granular phase and a smooth phase will be 2 atomic% or more. On the other hand, when the oxygen concentration exceeds 25 atomic%, the solder used in the mounting process of the semiconductor element is oxidized, and the desired solder wettability cannot be ensured, and in the solder phase through the bonding between the semiconductor element and the circuit board. In some cases, voids are scattered.

First recrystallized phase: a phase composed of crystallites whose growth orientation is within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board, and whose average major axis length is 100 to 400 μm

Second recrystallized phase: a phase composed of crystallites whose growth orientation is within ± 30 ° with respect to the parallel direction of the surface of the circuit board, and whose average major axis length of the crystallite is 100 to 400 μm

The crystallites are oriented one by one and become an oriented texture in the recrystallized particles. Since the etching rate in chemical polishing differs depending on the orientation direction, crystallites can be confirmed.

According to such a circuit board, as shown in FIG. 4B, the circuit board 1a made of copper or a copper alloy has a crystallite whose growth orientation is within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board 1a. A first recrystallized phase Q1 composed of S1 and having an average value of the long axis length L1 of the crystallite S1 of 100 to 400 μm, and a crystal whose growth orientation is within ± 30 ° with respect to the parallel direction of the surface of the circuit board 1a And a second recrystallized phase Q2 having an average value L2 of the major axis length of the crystallite S2 of 100 to 400 μm. The circuit board 1a also includes a third recrystallized phase Q3 composed of crystallites S3 whose growth orientation is inclined with respect to the surface of the circuit board 1a as shown in the figure, and the average value of the major axis lengths of the crystallites S3 Is about 100 to 400 μm.

Here, the major axis lengths of the crystallites S1 and S2 constituting the first recrystallized phase Q1 and the second crystal Q2 phase are both controlled in the range of 100 to 400 μm, and the crystallites are miniaturized. The circuit board 1a composed of the first recrystallized phase Q1 and the second recrystallized phase Q2 composed of the fine crystallites S1 and S2 has the first recrystallized phase Q1 and the second recrystallized phase in the chemical polishing step. Generation | occurrence | production of the excessive level | step difference T1 and the recessed part U1 in the boundary part K with Q2 is suppressed. And as shown in FIG.4 (c) and FIG.4 (d), Ni plating layer 1i deposited on the surface of the circuit board 1a is granular phase R1 formed on the surface of the 1st recrystallized phase Q1. And a smooth phase R2 formed on the surface of the second recrystallized phase Q2. Excessive steps or recesses due to chemical polishing are formed at the boundary K between the first recrystallized phase Q1 and the second recrystallized phase Q2 of the circuit board 1a composed of the fine crystallites S1 and S2 as described above. As a result, at the boundary between the granular portion R1 and the smooth portion R2 of the Ni plating layer 1i deposited on the surface of the circuit board 1a, that is, the surfaces of the first recrystallization phase Q1 and the second recrystallization phase Q2. There is no excessive step or recess. Therefore, in the circuit board 1, it is difficult to form an oxide layer having a high oxygen concentration that inhibits the wet spread of the molten solder at the boundary between the granular phase R1 and the smooth phase R2 of the Ni plating layer 1i. The oxygen concentration is 25% or less, and the desired wet solder spreading property can be ensured.

Furthermore, it is preferable that the area ratio of the granular phase in an arbitrary region of 10 mm × 10 mm on the surface of the Ni plating layer is 40% or less. When the area ratio of the granular phase exceeds 40%, the granular phase is composed of crystallites whose crystal growth direction is within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board. The surface state of the first recrystallized phase in which the solder is eroded is reflected, and the surface roughness is rough, so that the wet spreadability of the molten solder is lowered.

In addition, when the boundary length of all phases in an arbitrary 10 mm × 10 mm region on the surface of the Ni plating layer is S1, the boundary length between the granular phase and the smooth phase is S2, S2 / S1 ≦ 30% It is desirable. By setting the ratio of the boundary portion between the granular phase and the smooth phase within the above range, the wet solder spreadability can be further improved.

In addition, the step formed at the boundary portion between the granular phase and the smooth phase is 1.0 to 10.0 μm, or the depth of the concave portion formed at the boundary portion between the granular phase and the smooth phase is 5. It is desirable that it is 0-25.0 micrometers. By setting the size of the step or recess formed at the boundary to the upper range, not only the barrier due to the oxide layer formed at the boundary but also the step or recess formed at the boundary becomes a physical barrier. Inhibiting the spread of wet solder by the solder can be effectively suppressed, and the wet spread of the molten solder can be further enhanced.

As described above, according to the present invention, the object can be achieved.

It is a front sectional view of a ceramic circuit board according to the present invention. 1 is a plan view of a ceramic circuit board according to the present invention. It is a figure explaining the arrangement | positioning process among the manufacturing processes of the ceramic circuit board of FIG. It is a figure explaining a joining process among the manufacturing processes of the ceramic circuit board of FIG. It is a figure explaining a plating process among the manufacturing processes of the ceramic circuit board of FIG. It is a figure of the 1st example of the temperature profile in a joining process. It is a figure of the 2nd example of the temperature profile in a joining process. It is a figure of the 3rd example of the temperature profile in a joining process. It is a figure of the temperature profile in the joining process of a prior art. It is an expanded sectional view of the circuit board after the joining process concerning the present invention. It is an expanded sectional view of the circuit board after the chemical polishing process according to the present invention. It is an expanded sectional view of the circuit board and the Ni plating layer after the plating process according to the present invention. It is an enlarged plan view of the surface of the Ni plating layer of FIG.4 (c). It is an expanded sectional view of the circuit board after the joining process in a prior art. It is an expanded sectional view of the circuit board after the chemical polishing process in the prior art. FIG. 6 is an enlarged cross-sectional view of a circuit board and a Ni plating layer after a plating process in the prior art.

Hereinafter, a method for manufacturing a ceramic circuit board and a ceramic circuit board according to embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the embodiment described below, and can be carried out by being appropriately modified within the range of the sameness.

First, a basic configuration of a circuit board according to the present invention will be described with reference to FIG. 1A which is a front sectional view and FIG. 1B which is a plan view. 1A is a cross-sectional view taken along the line AA in FIG. The circuit board 1 includes a ceramic substrate 1e, a circuit board 1a made of copper or a copper alloy joined to the ceramic substrate 1e via a brazing material layer 1d disposed on one surface of the ceramic substrate 1e, and the other surface of the ceramic substrate 1e. The metal heat sink 1h joined to the ceramic substrate 1e through the brazing filler metal layer 1f, and the Ni plating layers 1i and 1k formed on the surfaces of the circuit board 1a and the metal heat sink 1h, It has as a basic configuration.

As shown in FIG. 1B, the circuit board 1a is composed of two copper plates, a first circuit board 1b and a second circuit board 1c, which are arranged with a gap 1g formed in the plane direction. Thus, a circuit pattern is formed. The number of circuit boards 1a may be one, or three or more. Here, the heat radiating plate 1h and the brazing filler metal layer 1f are elements that are arbitrarily arranged, but in the following description, the heat radiation is made of copper or a copper alloy via the brazing filler metal layer 1f having the same configuration as the brazing filler metal layer 1d. A method of manufacturing the circuit board 1 having a configuration in which the plate 1h is bonded to the ceramic substrate 1e will be described. Further, in the circuit board manufacturing process, the contents of each process relating to the circuit board 1a and the heat sink 1h are the same, so only the contents relating to the circuit board 1a will be described in detail, and the description relating to the contents related to the heat sink 1h will be omitted. .

The material of the ceramic substrate 1e used in the present invention having the structure of the Ni plating layer formed on the surface of the circuit board 1a as its gist is not particularly limited, and is an aluminum oxide sintered body, a mullite sintered body, a carbonized body. What is necessary is just to comprise by the sintered compact which consists of an electrically insulating material fundamentally, such as a silicon sintered compact and an aluminum nitride sintered compact. However, since semiconductor elements mounted on circuit boards have recently increased in calorific value and have increased their operating speed, silicon nitride has high mechanical strength such as strength and fracture toughness and high thermal conductivity. The ceramic substrate 1e is preferably made of a sintered body.

When the ceramic substrate 1e is composed of a silicon nitride sintered body, for example, an appropriate amount of raw material powder containing 90 to 97% by mass of silicon nitride and 3 to 10% by mass of a sintering aid containing Mg or Y or other rare earth elements. Of ceramic binder, plasticizer, dispersant and organic solvent, mixed with a ball mill, etc. to form a slurry, and the slurry is formed by a doctor blade method or a calender roll method. A ceramic substrate 1e made of a silicon nitride sintered body is obtained by forming a sheet and then punching or cutting the ceramic green sheet into a desired shape and firing at a temperature of 1700 to 1900 ° C. Can do. In the following Examples and Comparative Examples, as ceramic substrate 1e, Si ₃ N ₄ is 93% by mass, Mg is 4% by mass in terms of oxide, and Y is 3% in terms of oxide in 100 parts by weight of the total raw material powder. A silicon nitride substrate having a vertical and horizontal size of 30 mm and 40 mm and a thickness of 0.32 mm was used.

Hereinafter, a method for manufacturing a circuit board using the silicon nitride substrate will be described.

[Arrangement process]

First, an arrangement process is performed. As shown in FIG. 2A, a brazing material 2d is applied to one surface of the ceramic substrate 1e. Next, the circuit original plate 2a is arranged on one surface of the ceramic substrate 1e through the brazing material 2d, and the joined body 2 is formed. The circuit original plate 2a has its structure changed by heat applied to the circuit original plate 2a in the joining process of the circuit original plate 2a and the ceramic substrate 1e, which is performed after the arranging step, and the circuit substrate 1a ( As described above, a copper plate made of copper or a copper alloy corresponding to the tempering symbols 1 / 2H to H is used. In the following embodiment, two types of circuit original plate 2a, an oxygen-free copper substrate C1020H material (JIS standard H3100) having a thickness of 0.5 mm, a circuit original plate 2a equivalent to a refining symbol 1 / 2H, and a refining symbol H of the same material An equivalent circuit original plate 2a was used. In consideration of thermal expansion in the joining process, the circuit board 2 was 29.5 mm and 39.5 mm, respectively, which was smaller than the ceramic substrate 1e. Further, as a comparative example, circuit original plates corresponding to O and 1 / 4H were used only for the tempering symbols with the same material and the same dimensions.

The material of the brazing filler metal layer 2d that becomes the brazing filler metal layer 1d (see FIG. 1 (a)) after the joining process is not particularly limited, but typically, eutectic that provides high strength, high sealing properties, and the like. From the viewpoint of the bonding strength between the ceramic substrate S and the circuit board, In is preferably added to the Ag—Cu based active brazing material mainly composed of Ag and Cu and added with active metals such as Ti, Zr, and Hf. It is preferable to use a ternary Ag—Cu—In based active brazing material. In the following examples, an acrylic resin is used as an organic binder in an amount of 5.3 parts by weight with respect to 100 parts by mass of a brazing material powder adjusted to have a composition of A to C as three kinds of brazing materials having different melting temperatures shown in Table 1. A brazing filler paste in which 19.1 parts by mass of α-terpineol as an organic solvent and 0.5 parts by mass of a surfactant and a dispersant were mixed was used. In Table 1, in the temperature profile PA shown in FIG. 3A, the temperature of the second temperature range P5, which is the temperature at which the brazing material is melted, is shown in the column of “second temperature range heating temperature”. ing.

[Jointing process: overview]

After the arrangement step, as shown in FIG. 2B, a bonding step between the ceramic substrate 1e and the circuit original plate 2a is performed. In the joining step, the joined body 2 composed of the ceramic substrate 1e and the circuit original plate 2a formed by the placement step is inserted into a heating furnace to form a joined body 3 in which both are joined. In addition, the detailed description regarding a joining process is mentioned later.

[Etching process]

Next, a second resist film is formed in a desired pattern on the surface of the circuit board 1a constituting the joined body 3, and then the etching process is performed to divide the circuit board 1a. As shown in FIG. Two circuit boards 1b and 1c, which are circuit patterns, were formed with a gap 1g in the direction. Specifically, an ultraviolet curable etching resist is applied to the surface of the circuit board 1a by a screen printing method in a pattern corresponding to the dimensions of the following first circuit board 1a and second circuit board 1b, and thereafter Then, the joined body was dipped in a ferric chloride (FeCl ₃ ) solution (46.5Be), which is an etching solution set at a liquid temperature of 50 ° C., to form circuit boards 1b and 1c. The vertical and horizontal sizes of the first circuit board 1b were 28 mm and 12 mm, respectively, and the vertical and horizontal sizes of the second circuit board 1c were 28 mm and 24 mm, respectively. Note that the etching process is not necessarily a necessary process, and is unnecessary when a circuit original plate that has been previously patterned to have the above dimensions is used.

[Chemical polishing process]

After the etching process performed as necessary, in the chemical polishing process, the surface of the circuit board of the joined body formed in the bonding process is chemically polished. In addition, as described above, this circuit board is obtained by recrystallizing the structure of the circuit original board through the joining process which is a heating process. The chemical polishing step is a process performed to clean the surface of the circuit board roughened in the bonding step or the like and restore its smoothness. For example, the chemical polishing liquid in which the bonded body is managed at a temperature of about 50 ° C. For about 3 to 10 minutes. As this chemical polishing liquid, for example, a mixed solution composed of sulfuric acid (H ₂ SO ₄ ) and hydrogen peroxide (H ₂ O ₂ ) can be used. And from the point of not forming an excessively large step or recess at the boundary between the first recrystallized phase and the second recrystallized phase, preferably 5.0 to 30.0% by weight of sulfuric acid, hydrogen peroxide It is desirable to use a mixed solution containing 2.0 to 10.0% by weight. In the chemical polishing steps of the following examples and comparative examples, chemical polishing was performed under conditions in which the joined body was immersed in a chemical polishing liquid controlled at 50 ° C. for 5 minutes while changing the composition range of sulfuric acid and hydrogen peroxide. .

[Plating process]

After the chemical polishing step, a Ni plating layer 1i is deposited on the surface of the circuit board 1d in the plating step shown in FIG. Here, the Ni plating layer 1i may be formed by either an electroplating method or an electroless plating method, but in the following examples and comparative examples, the Ni plating layer 1i was formed by an electroless plating method. Specifically, the joined body 3 that has undergone the chemical polishing step is controlled at 85 ° C. with an electroless plating solution in which nickel (Ni) is the main component and the concentration of phosphorus (P) is adjusted to 8 wt%. It was immersed in an electrolytic plating solution for 25 minutes to obtain a circuit board 1 on which a Ni plating layer 1i having a thickness of 5 μm was formed on the surface of the circuit board 1a.

[Washing process]

After the Ni plating process, the circuit board is washed with water in the cleaning process. The cleaning step is a step of removing excess plating solution adhering to the formed Ni plating layer. In the following examples / comparative examples, the joined body that had undergone the Ni plating step was immersed in pure water controlled at a temperature of about 30 ° C. for 2 minutes.

[Bonding process: details]

In the joining process of the circuit original plate and the ceramic substrate outlined above, heating is performed while controlling the temperature with the temperature profile PA shown in FIG. 3A, and the circuit original plate and the ceramic substrate are joined through the brazing material. In the temperature profile PA, the temperature range P1 of the first appearing temperature removes the organic binder, which is an additive of the brazing material paste printed on one surface of the ceramic substrate, preferably by the screen printing method as described above. It is a temperature pattern for. The temperature is set in a temperature range of about ± 25 ° C. with respect to the temperature at which the organic binder is 0.05% of the initial weight in thermal differential analysis, for example, and the holding time may be about 0.5 to 5 hours. . This temperature range P1 is provided because the brazing material paste contains an organic binder. Of course, when the brazing material is disposed on one surface of the ceramic substrate as a simple substance without the addition of the organic binder. It is unnecessary.

After the temperature range P1 for removing the organic binder, as shown in FIG. 3A, the first temperature is controlled in the range of 400 to 750 ° C. via the first temperature raising unit P2. The region P3 is arranged, and after the first holding band P3, the temperature at which the brazing material melts, specifically, the temperature range 25 to 75 ° C. higher than the melting point of the brazing material, via the second temperature raising part P4. A second temperature range P5 controlled at a desired temperature selected from the above is arranged. Here, it is sufficient that the first temperature range P3 is temperature-controlled within a range of 400 to 750 ° C., for example, 400 to 750 like the first temperature range P3 of the temperature profile PA shown in FIG. You may make it hold | maintain at one temperature selected from the range of ° C, and it heats up gradually in the said temperature range like the 1st temperature range P3 of the temperature profile PB shown in FIG.3 (b). You may do it. Further, as in the first temperature range P3 of the temperature profile PC shown in FIG. 3C, one temperature P31 selected from the temperatures of 400 to 750 ° C. is kept constant in the previous stage, and then the temperature rises Two temperature ranges P31 and P33 may be provided in the first temperature range P3 so as to be kept constant at a temperature P33 higher than the temperature P31 selected in the temperature range via the part P32. . In the following examples and comparative examples, the temperature was controlled by the temperature profile shown in FIG.

As described above, the temperature raising rate of the first temperature raising part P2 is preferably 2.0 to 20.0 ° C./min. By setting the temperature rising rate within this range, the area ratio of the granular phase in an arbitrary 10 mm × 10 mm region on the surface of the Ni plating layer among the granular phase and the smooth phase constituting the Ni plating layer becomes 40% or less. . That is, although the reason is unknown, by setting the rate of temperature rise of the first temperature raising part P2 within the above range, the circuit board of the first recrystallized phase and the second recrystallized phase constituting the circuit board The area ratio of the first recrystallization phase in an arbitrary region of 10 mm × 10 mm on the surface is 40% or less. Here, the first recrystallized phase is composed of crystallites whose crystal growth direction is within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board, and the grain boundaries of the crystallites exposed on the surface are in the chemical polishing step. Easily eroded. As a result, the granular phase formed on the surface of the first recrystallized phase in the Ni plating layer reflects the state in which the grain boundaries of the crystallites corroded on the surface of the first recrystallized phase. While the surface roughness (Ra) is about 0.1 to 0.3 μm, the surface roughness (Ra) of the granular phase is as rough as 1.0 to 2.0 μm. For this reason, when the area ratio of the granular phase in the region of 10 mm × 10 mm selected from the surface of the Ni plating layer exceeds 40%, the wet spreadability of the molten solder decreases. For this reason, it is preferable that the temperature increase rate of the 1st temperature rising part P2 shall be 2.0-20.0 degreeC / min.

Further, by setting the temperature rise temperature of the first temperature rise portion P2 in the above range, the boundary length of all phases in the surface area of 10 mm × 10 mm of the Ni plating layer is S1, and the boundary length between the granular phase and the smooth phase When S2 is S2, S2 / S1 ≦ 30%, which is desirable because the wet spreadability of the molten solder can be improved.

The temperature of the second temperature range P5 that is heated at the temperature at which the brazing material melts is selected from a range that is 25 to 75 ° C. higher than the melting point of the brazing material as described above. In the example, it was set as the temperature pattern hold | maintained at the temperature shown in Table 1 for 1 hour. Furthermore, the cooling rate after the second temperature range P5 was set to 2 ° C./min in both the examples and the comparative examples.

[Example]

Hereinafter, the present invention will be described based on examples.

In each of the Examples and Comparative Examples, a circuit board was prepared by using the circuit original plate shown in Table 2 and processing under the joining conditions and chemical polishing conditions shown in Table 2. The manufacturing conditions other than those shown in Table 2 are as described above. Here, the 1st temperature range was set to 500-750 degreeC in the Example among joining conditions, and was set to 480 degreeC and 780 degreeC in the comparative example. Moreover, the temperature increase rate of the 1st temperature rising part was 1.5-32 degreeC / min in the Example and the comparative example. Among the chemical polishing conditions, the concentration of sulfuric acid was 4 to 32% by mass in both Examples and Comparative Examples, and the concentration of hydrogen peroxide was 1.2 to 12% by mass.

Table 3 shows the characteristics of the circuit boards obtained in each example and comparative example. In addition, the average value of the major axis length of each crystallite of the first recrystallized phase and the second recrystallized phase constituting the circuit board is obtained by cutting the circuit board in the thickness direction and setting the cut surface of the circuit board to No. 500. And rough polishing with No. 1000 emery paper, finish polishing with diamond abrasive grains with a particle size of 0.1 μm, chemical polishing (etching) with a chemical polishing solution of 20 mass% sulfuric acid and 5.5 mass% hydrogen peroxide, scanning type The first recrystallized phase and the second recrystallized phase were confirmed from images of cut surfaces obtained by imaging with an electron microscope (Scanning Electron Microscope: SEM). And the major axis length of the crystallite in the area | region of 1 mm x 1 mm of arbitrary 10 divisions selected from each phase of a 1st recrystallization phase and a 2nd recrystallization phase was confirmed, and the average value was calculated | required.

The oxygen concentration at the boundary between the granular phase and the smooth phase of the Ni plating layer was measured with an Auger electron spectrometer (AES) at any 10 points selected from the boundary confirmed by observing the Ni plating layer from the surface. The average value was obtained. In addition, the confirmation method of the boundary part of a granular phase and a smooth phase is explained in full detail by description of the area ratio of a granular phase below.

About the area ratio of the granular phase shown in Table 3, it calculated | required as follows. First, the surface of the circuit board, that is, the Ni plating layer is chemically polished (etched) with a chemical polishing solution of 20% by mass sulfuric acid and 5.5% by mass hydrogen peroxide. Then, when observed by SEM, as shown in FIG. 4 (d), the granular phase R1 having an uneven surface is a white image, and the smooth phase R2 is a black image. Can be confirmed. The area ratio of the granular phase is obtained by imaging the surface of the Ni plating layer after chemical polishing with an SEM, and obtaining the area of a white image in a 10 mm × 10 mm region set at an arbitrary position of the obtained image. It was calculated from the rate.

The boundary ratio shown in Table 3 is S2 / S1 where S1 is the boundary length of all phases in an arbitrary 10 mm × 10 mm region on the surface of the Ni plating layer, and S2 is the boundary length between the granular phase and the smooth phase. is there. This boundary ratio is obtained by imaging the surface of the Ni plating layer after chemical polishing with an SEM, and in a 10 mm × 10 mm region set at an arbitrary position of the obtained image, a white image (granular phase) and a black image ( The boundary length (S2) and all the boundary lengths (S1) of (smooth phase) were obtained, and S2 was divided by S1.

The depth of the step or the recess formed in the boundary portion between the granular phase and the smooth phase of the Ni plating layer is a laser type three-dimensional evaluation apparatus (OLS3000 manufactured by Olympus Corporation) for any 10 points selected from the boundary portion. The average value was obtained.

The wet spreading rate, which is an index of the wet spreading property of the molten solder, was determined as follows. A solder sheet having a composition of Sn 3.5% by mass, Ag 0.5% by mass and the balance Cu, 10 mm in length and width and 0.15 mm in thickness is prepared, and this solder sheet is set on the surface of a circuit board. The mixture was heated to -50% N 2 in a mixed gas atmosphere at 270 ° C. for 5 minutes, and then cooled. Then, the solder area after melting and solidification on the surface of the circuit board is A1, the solder sheet area is A0, (A1 / A0) × 100 is the wetting spread rate, and the solder sheet after melting is compared with the solder sheet before melting. It was evaluated how much wetting spread. Note that the wet spreading rate is desirably 85% or more, more preferably 90% or more, from the viewpoint of bonding strength with the semiconductor element connected to the circuit board. In addition, the wet spreading rate is desirably 120% or less, more preferably 110% or less, from the viewpoint that the connection terminals of the semiconductor elements are not short-circuited when connected to the circuit board.

According to Examples 1-27 and Comparative Examples 1-4 shown in Table 3, the following was confirmed. According to Examples 1 to 27 in which the first temperature range is 400 to 750 ° C., the circuit board is a copper plate made of copper or a copper alloy having a tempering symbol equivalent to 1 / 2H to H as the circuit original plate. The major axis length of the crystallites of the first recrystallized phase and the second recrystallized phase to constitute is 100 to 400 μm, and the depth of the step formed at the boundary between the granular phase and the smooth phase of the Ni plating layer is 10 μm or less, The depths of the recesses were all small at 20 μm, and the oxygen concentration at the boundary portion was 25% or less. As a result, the wet spreading rate was 85% or more. Examples 7 and 8 differed from the other examples in the brazing material composition, and the set temperatures in the second temperature range for melting the brazing material differed, but the results were similar. On the other hand, in Comparative Example 1 in which the first temperature range is 480 ° C., Comparative Example 2 in which the circuit temperature is 780 ° C., Comparative Example 3 in which the circuit original plate corresponds to the tempering symbol O, and Comparative Example 4 in which the tempering symbol corresponds to ¼. In both cases, the major axis length of the crystallites of the first recrystallized phase and the second recrystallized phase exceeds 400 μm, and therefore the depth of the step formed at the boundary between the granular phase and the smooth phase of the Ni plating layer is 10 μm. And the depth of the concave portion exceeded 25 μm, and the oxygen concentration at the boundary portion exceeded 25%. As a result, the wetting spread rate was also 85% or less.

Next, the following was confirmed in terms of the rate of temperature rise in the first temperature raising portion. According to Examples 9 to 12 and Example 2 in which the material of the circuit original plate, the brazing material type and other conditions were the same as in Example 2 and only the temperature increase rate was changed, the temperature increase rates were 1.5 ° C./min and 22 ° C. In each case, the area ratio of the granular phase is 40% or more, the boundary ratio is 30% or more, and the wetting and spreading rate is 90% or less. Therefore, it is desirable that the temperature raising rate of the first temperature raising part is 2.5 to 20 ° C./min.

Next, in terms of the concentration of sulfuric acid contained in the mixed solution used in the chemical polishing step, the following was confirmed. According to Examples 13 to 17 and Example 2 in which the material of the circuit board, the type of brazing material and other conditions were the same as those of Example 2, and only the sulfuric acid concentration was changed, when the sulfuric acid concentration was 4% by mass, the circuit board As a result, the surface of the Ni plating layer deposited on the surface of the circuit board has many irregularities, and the wet spread rate is slightly low at 90% or less. On the other hand, when the sulfuric acid concentration is 32%, corrosion at the boundary between the first recrystallized phase and the second recrystallized phase of the circuit board proceeds and excessive steps and recesses are formed, so that the granular phase of the Ni plating layer is formed. Also, the oxygen concentration at the boundary portion of the smooth phase is high, and the steps and recesses transferred to the Ni plating layer also inhibit the wet spread of the molten solder, so the wet spread rate is slightly low at 90% or less. Therefore, the concentration of sulfuric acid is desirably 5 to 30% by mass.

Next, in terms of hydrogen peroxide contained in the mixed solution used in the chemical polishing step, the following was confirmed. According to Examples 19 to 23 and Example 2 in which the material of the circuit board, the type of brazing material and other conditions were the same as in Example 2 and only the sulfuric acid concentration was changed, the hydrogen peroxide concentration was 1.2% by mass. The corrosion of the boundary between the first recrystallized phase and the second recrystallized phase of the circuit board proceeds and excessive steps or recesses are formed, so that the oxygen concentration in the boundary between the granular phase and the smooth phase of the Ni plating layer is also high. Furthermore, since the steps and recesses transferred to the Ni plating layer also inhibit the wet spread of the molten solder, the wet spread rate is slightly low at 90% or less. On the other hand, when the concentration of hydrogen peroxide is 12%, the surface of the circuit board is excessively smoothed, so that the surface of the Ni plating layer deposited on the surface of the circuit board is excessively smooth and melted. The solder became more easily wet and spread. As a result, the wet spread rate was 140% or more, which was not preferable. Therefore, the concentration of hydrogen peroxide is desirably 2 to 10% by mass.

1 Ceramic circuit board

1a
Circuit board

1d
Brazing filler metal layer

1e
Ceramic substrate

1f
Brazing filler metal layer

1g
gap

1h
Heat sink

1i
Ni plating layer

1k
Ni plating layer

2 To-be-joined body

2a
Circuit board

2d
Brazing material

3 joints

N1
First recrystallization phase

N2
Second recrystallization phase

M1
Granular phase

M2
Smooth phase

Claims (8)

A method of manufacturing a ceramic circuit board comprising: a ceramic substrate; a circuit board mainly composed of copper bonded to one surface of the ceramic substrate through a brazing material layer; and a Ni plating layer deposited on the surface of the circuit board. The placement process of placing the circuit board on one surface of the ceramic substrate via the brazing material, the joining process of heating and joining the circuit board to one surface of the ceramic substrate, and the chemical polishing for chemically polishing the circuit board formed in the joining process A copper plate made of copper or a copper alloy corresponding to a tempering symbol 1 / 2H to H, and a plating step of depositing a Ni plating layer on the surface of the circuit board after the chemical polishing step In the temperature profile, the joining step has a first temperature range and a second temperature range that is arranged after the first temperature range and is heated at a temperature at which the brazing filler metal melts. , Ceramic circuit substrate manufacturing method of wherein the temperature of the first temperature range is 400 to 750 ° C..
The method for manufacturing a ceramic circuit board according to claim 1, wherein a temperature increase rate to the first temperature range is 2.0 to 20.0 ° C./min.
3. The ceramic circuit board according to claim 1, wherein in the chemical polishing step, a mixed solution containing 5.0 to 30.0 wt% sulfuric acid and 2.0 to 10.0 wt% hydrogen peroxide is used. Manufacturing method.
A ceramic circuit board having a ceramic substrate, a circuit board made of copper or a copper alloy bonded to one surface of the ceramic substrate via a brazing material layer, and a Ni plating layer deposited on the surface of the circuit board, The circuit board includes a first recrystallized phase and a second recrystallized phase defined below, and the Ni plating layer includes a granular phase formed on the surface of the first recrystallized phase and the second recrystallized phase. A ceramic circuit board including a smooth phase formed on a surface of a phase, wherein an oxygen concentration at a boundary portion between the granular phase and the smooth phase is 25.0 atomic% or less.

First recrystallized phase: a phase composed of crystallites whose growth orientation is within ± 30 ° with respect to the direction perpendicular to the surface of the circuit board, and whose average major axis length is 100 to 400 μm

Second recrystallized phase: a phase composed of crystallites whose growth orientation is within ± 30 ° with respect to the parallel direction of the surface of the circuit board, and whose average major axis length of the crystallite is 100 to 400 μm
5. The ceramic circuit board according to claim 4, wherein an area ratio of the granular phase in an arbitrary region of 10 mm × 10 mm on the surface of the Ni plating layer is 40% or less.
5. The boundary length of all phases in an arbitrary 10 mm × 10 mm region on the surface of the Ni plating layer is S1, and the boundary length between the granular phase and the smooth phase is S2, S2 / S1 ≦ 30%. The ceramic circuit board according to 1.
The ceramic circuit board according to any one of claims 4 to 6, wherein a step formed at a boundary portion between the granular phase and the smooth phase is 1.0 to 10.0 µm.
The ceramic circuit board according to any one of claims 4 to 6, wherein a depth of a concave portion formed at a boundary portion between the granular phase and the smooth phase is 5.0 to 25.0 µm.

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