JP2013225014A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of maintaining high display quality for a long period of time.SOLUTION: A liquid crystal display device includes a liquid crystal display panel LPN, a reinforcement panel, and an adhesive material for bonding the liquid crystal display panel and the reinforcement panel. The liquid crystal display panel LPN has a first polarizing plate PL1 and a second polarizing plate PL2. The first polarizing plate PL1 includes a polarizer layer 51 and support layers 52, 53. The second polarizing plate PL2 includes a polarizer layer 61 and support layers 62, 63. At least one of the support layers 52, 53, 62, 63 has thickness (T52, T53, T62, T63) of less than 40 μm.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  2. Description of the Related Art In recent years, flat display devices have been actively developed. In particular, liquid crystal display devices have attracted particular attention because of their advantages such as light weight, thinness, and low power consumption. In particular, an active matrix liquid crystal display device in which a switching element is incorporated in each pixel has a structure using a lateral electric field (including a fringe electric field) such as an IPS (In-Plane Switching) mode or an FFS (Fringe Field Switching) mode. Attention has been paid. Such a horizontal electric field mode liquid crystal display device includes a pixel electrode and a counter electrode formed on an array substrate, and switches liquid crystal molecules with a horizontal electric field substantially parallel to the main surface of the array substrate.

  On the other hand, a technique for switching liquid crystal molecules by forming a lateral electric field or an oblique electric field between a pixel electrode formed on an array substrate and a counter electrode formed on the counter substrate has been proposed.

  The liquid crystal display device uses a polarizing plate. The polarizer layer which is the base material of the polarizing plate is formed by dyeing an iodine compound on a PVA (polyvinyl alcohol) film and then stretching the PVA film in one direction. The stretching direction is the absorption axis direction of the polarizer layer.

JP 2007-279323 A

By the way, when the polarizer layer is affected by heat or moisture, the polarizer layer contracts in the stretching direction. For this reason, there is a concern that problems such as peeling of the polarizing plate and warping of the liquid crystal display panel may occur. When the above problem occurs, a defect such as uneven brightness occurs in the display image, resulting in a decrease in display quality.
The present invention has been made in view of the above points, and an object thereof is to provide a liquid crystal display device capable of maintaining high display quality over a long period of time.

A liquid crystal display device according to an embodiment
A first substrate; a second substrate; a liquid crystal layer sandwiched between the first substrate and the second substrate; a first polarizing plate facing the outer surface of the first substrate; and facing the outer surface of the second substrate A liquid crystal display panel comprising: the second polarizing plate; a first adhesive that bonds the first substrate and the first polarizing plate; and a second adhesive that bonds the second substrate and the second polarizing plate; ,
A reinforcing plate facing the outer surface of the liquid crystal display panel;
A third adhesive for bonding the liquid crystal display panel and the reinforcing plate,
The first polarizing plate and the second polarizing plate each have a polarizer layer, and support layers provided on both sides of the polarizer layer,
At least one of the support layers has a thickness of less than 40 μm.

In addition, a liquid crystal display device according to an embodiment
A first substrate, a second substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate and having liquid crystal molecules initially aligned in a direction substantially parallel to the Y axis, and facing the outer surface of the first substrate; A first polarizing plate having a first absorption axis parallel to the Y axis or the X axis orthogonal to the Y axis, and a crossed Nicols position relative to the first absorption axis facing the outer surface of the second substrate. A second polarizing plate having a second absorption axis; a first retardation plate positioned between the first substrate and the first polarizing plate and having a first slow axis parallel to the Y axis; A second retardation plate positioned between the retardation plate and the first polarizing plate and stacked on the first retardation plate and having a second slow axis parallel to the Y axis; the second retardation plate; and the first retardation plate. A first adhesive for adhering the polarizing plate, a second adhesive for adhering the second substrate and the second polarizing plate, the first substrate and the first retardation plate A liquid crystal display panel and a third adhesive material for bonding the,
A reinforcing plate facing the outer surface of the liquid crystal display panel;
A fourth adhesive for bonding the liquid crystal display panel and the reinforcing plate,
The first polarizing plate includes a polarizer layer, and a support layer provided on a surface of the polarizer layer opposite to the surface facing the second retardation plate,
The second polarizing plate has a polarizer layer and support layers provided on both sides of the polarizer layer,
At least one of the support layers has a thickness of less than 40 μm.

FIG. 1 is an exploded perspective view schematically showing a liquid crystal display device according to an embodiment. FIG. 2 is a cross-sectional view schematically showing the liquid crystal display device. FIG. 3 is a diagram schematically showing a configuration and an equivalent circuit of the liquid crystal display device. FIG. 4 is a plan view schematically showing a structural example of one pixel when the liquid crystal display panel of the liquid crystal display device is viewed from the counter substrate side. FIG. 5 is a cross-sectional view schematically showing a cross-sectional structure when the liquid crystal display panel shown in FIG. 4 is cut along the line VV. FIG. 6 is a diagram for explaining the electric field formed between the pixel electrode and the common electrode in the liquid crystal display panel, and the relationship between the director of the liquid crystal molecules and the transmittance due to the electric field. FIG. 7 is an enlarged plan view showing a part of the sensing substrate of the liquid crystal display device. FIG. 8 is a cross-sectional view showing a part of the sensing substrate taken along line VIII-VIII in FIG. FIG. 9 is a plan view schematically showing an example of the structure of one pixel when the liquid crystal display panel of the modification according to the embodiment is viewed from the counter substrate side. FIG. 10 is a cross-sectional view showing the liquid crystal display device of Example 1 according to the above embodiment. FIG. 11 is an exploded perspective view showing a part of the liquid crystal display panel of Example 1 and schematically showing a liquid crystal layer, a polarizing plate, and a retardation plate. FIG. 12 is a cross-sectional view showing the liquid crystal display device of Example 2 according to the above embodiment. FIG. 13 is an exploded perspective view showing a part of the liquid crystal display panel of Example 2 and schematically showing a liquid crystal layer, a polarizing plate, and a retardation plate. FIG. 14 is a cross-sectional view showing a modification of the liquid crystal display device according to the embodiment. FIG. 15 is an exploded perspective view showing a part of a modification of the liquid crystal display panel of Example 1, and schematically showing a liquid crystal layer, a polarizing plate, and a retardation plate. FIG. 16 is an exploded perspective view showing a part of a modification of the liquid crystal display panel of Example 2 and schematically showing a liquid crystal layer, a polarizing plate, and a retardation plate.

  Hereinafter, a liquid crystal display device according to an embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

FIG. 1 is an exploded view schematically showing a liquid crystal display device according to an embodiment. FIG. 2 is a cross-sectional view schematically showing the liquid crystal display device.
As shown in FIGS. 1 and 2, the liquid crystal display device includes a liquid crystal display panel LPN, a sensing substrate 5, a decorative plate 6 (protective plate), and adhesives 7 and 8.

  The liquid crystal display panel LPN has a display area R1 for displaying an image. The sensing substrate 5 faces the display surface of the liquid crystal display panel LPN. The sensing substrate 5 has an input region R2 that overlaps the display region R1. The sensing substrate 5 has a function as a touch panel, and detects position information of a location input to the input area R2.

  The adhesive 7 overlaps at least the display region R1 and the input region R2, is positioned between the liquid crystal display panel LPN and the sensing substrate 5, and adheres the liquid crystal display panel LPN and the sensing substrate 5. As described above, a screen fit method is adopted in which an adhesive made of a transparent resin is filled between the liquid crystal display panel LPN and the sensing substrate 5 to integrate the substrates.

  The adhesive 7 is formed of a material that transmits at least visible light. The adhesive 7 can be formed of a resin that cures by ultraviolet rays (ultraviolet curable resin) or a resin that cures when heated (thermosetting resin).

  The decorative plate 6 faces the sensing substrate 5. The decorative plate 6 decorates the input surface (display surface of the liquid crystal display panel LPN) side of the sensing substrate 5, that is, decorates the appearance of the liquid crystal display device. The decorative board 6 is a flat type, and is formed of a transparent insulating material such as glass or acrylic resin. Here, the decorative board 6 is further formed in a rectangular shape. The decorative board 6 has a frame area that is out of the display area R1 and the input area R2. A peripheral light shielding layer may be formed in the frame region of the decorative plate 6. The peripheral light shielding layer can be formed using a black resin or the like.

  The adhesive 8 is overlapped on the display area R1 and the input area R2, is located between the sensing board 5 and the decorative board 6, and adheres the sensing board 5 and the decorative board 6. The adhesive 8 is formed of a material that transmits at least visible light. As described above, the screen fit method is adopted for bonding the sensing substrate 5 and the decorative plate 6. The adhesive 8 can be formed of an ultraviolet curable resin or a thermosetting resin.

  As a position detection method of the sensing substrate 5, a capacitance method, a resistance pressure-sensitive method, a light detection method, an electromagnetic induction method, or the like can be used. As the input means 100, an operator's finger, conductor, etc. can be mentioned, and what is appropriate for the position detection method may be selected. The outer surface of the decorative plate 6 is hit by the input means 100, pressed, or slid. As described above, when the external pressure is applied, the sensing substrate 5 can detect the position information of the input location.

  The assembly of the sensing substrate 5 and the decorative plate 6 forms a reinforcing plate that reinforces the liquid crystal display panel LPN. The reinforcing plate has a function of suppressing the occurrence of problems such as the liquid crystal display panel LPN warping.

  Next, a configuration of a liquid crystal display device for adopting a horizontal electric field mode or an oblique electric field mode by a method different from an IPS (In-Plane Switching) mode and an FFS (Fringe Field Switching) mode will be described.

FIG. 3 is a diagram schematically showing a configuration and an equivalent circuit of the liquid crystal display panel LPN.
As shown in FIG. 3, the liquid crystal display panel LPN is an active matrix type liquid crystal display panel. The liquid crystal display panel LPN is sandwiched between the array substrate AR, which is the first substrate, the counter substrate CT, which is the second substrate disposed to face the array substrate AR, and the array substrate AR and the counter substrate CT. And a liquid crystal layer LQ. Such a liquid crystal display panel LPN includes a display region R1 for displaying an image. The display region R1 overlaps the array substrate AR, the counter substrate CT, and the liquid crystal layer LQ. In the display region R1, a plurality of pixels PX arranged in a matrix of m × n are located (where m and n are positive integers).

  The liquid crystal display panel LPN includes n gate lines G (G1 to Gn), n auxiliary capacitance lines C (C1 to Cn), m source lines S (S1 to Sm), and the like in the display region R1. ing. For example, the gate line G and the auxiliary capacitance line C extend substantially linearly along the first direction d1. These gate lines G and storage capacitor lines C are alternately arranged in parallel along a second direction d2 that intersects the first direction d1. Here, the first direction d1 and the second direction d2 are substantially orthogonal to each other. The source line S intersects with the gate line G and the auxiliary capacitance line C. The source line S extends substantially linearly along the second direction d2. Note that the gate wiring G, the auxiliary capacitance line C, and the source wiring S do not necessarily extend linearly, and some of them may be bent.

  Each gate line G is drawn outside the display region R1 and connected to the gate driver GD. Each source line S is drawn outside the display region R1 and connected to the source driver SD. At least a part of the gate driver GD and the source driver SD is formed on, for example, the array substrate AR, and is connected to the driving IC chip 2 with a built-in controller.

  Each pixel PX includes a switching element SW, a pixel electrode PE, a common electrode CE, and the like. The storage capacitor Cs is formed, for example, between the storage capacitor line C and the pixel electrode PE. The auxiliary capacitance line C is electrically connected to a voltage application unit VCS to which an auxiliary capacitance voltage is applied.

  In the present embodiment, the liquid crystal display panel LPN has a configuration in which the pixel electrode PE is formed on the array substrate AR while at least a part of the common electrode CE is formed on the counter substrate CT. The liquid crystal molecules in the liquid crystal layer LQ are switched mainly using an electric field formed between the PE and the common electrode CE. The electric field formed between the pixel electrode PE and the common electrode CE is a plane defined by the first direction d1 and the second direction d2 or an oblique electric field slightly inclined with respect to the main surface of the substrate (or the main substrate). Lateral electric field substantially parallel to the surface).

  The switching element SW is constituted by, for example, an n-channel thin film transistor (TFT). The switching element SW is electrically connected to the gate line G and the source line S. Such a switching element SW may be either a top gate type or a bottom gate type. In addition, the semiconductor layer of the switching element SW is formed of, for example, polysilicon, but may be formed of amorphous silicon.

  The pixel electrode PE is disposed in each pixel PX and is electrically connected to the switching element SW. The common electrode CE is disposed in common to the pixel electrodes PE of the plurality of pixels PX via the liquid crystal layer LQ. The pixel electrode PE and the common electrode CE are formed of a light-transmitting conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). You may form with another metal material.

  The array substrate AR includes a power supply unit VS for applying a voltage (common voltage) to the common electrode CE. For example, the power supply unit VS is formed in a non-display area outside the display area R1. The common electrode CE is drawn out to the outside of the display region R1, and is electrically connected to the power supply unit VS through a conductive member (not shown).

FIG. 4 is a plan view schematically showing a structural example of one pixel PX when the liquid crystal display panel LPN is viewed from the counter substrate CT side.
As shown in FIG. 4, the pixel PX has a rectangular shape whose length along the first direction d1 is shorter than the length along the second direction d2, as indicated by a broken line. The gate line G1 and the gate line G2 extend along the first direction d1. The storage capacitor line C1 is disposed between the adjacent gate line G1 and the gate line G2, and extends along the first direction d1. The source line S1 and the source line S2 extend along the second direction d2. The pixel electrode PE is disposed between the adjacent source line S1 and source line S2. The pixel electrode PE is located between the gate line G1 and the gate line G2.

  In the illustrated example, in the pixel PX, the source line S1 is disposed at the left end, and the source line S2 is disposed at the right end. Strictly speaking, the source line S1 is disposed across the boundary between the pixel PX and the pixel adjacent to the left side, and the source line S2 is disposed over the boundary between the pixel PX and the pixel adjacent to the right side. Yes. In the pixel PX, the gate line G1 is disposed at the upper end, and the gate line G2 is disposed at the lower end. Strictly speaking, the gate line G1 is disposed over the boundary between the pixel PX and the adjacent pixel on the upper side, and the gate line G2 is disposed over the boundary between the pixel PX and the adjacent pixel on the lower side. ing. The auxiliary capacitance line C1 is disposed at a substantially central portion of the pixel.

  In the illustrated example, the switching element SW is electrically connected to the gate line G1 and the source line S1. The switching element SW is provided at the intersection of the gate line G1 and the source line S1, and its drain line extends along the source line S1 and the auxiliary capacitance line C1, and is a contact hole formed in a region overlapping the auxiliary capacitance line C1. It is electrically connected to the pixel electrode PE through CH. Such a switching element SW is provided in a region overlapping with the source line S1 and the auxiliary capacitance line C1, and hardly protrudes from the region overlapping with the source line S1 and the auxiliary capacitance line C1, and has an area of an opening that contributes to display. Reduction is suppressed.

  The plurality of pixel electrodes PE are arranged at intervals in the first direction d1 and the second direction d2. Each of the plurality of pixel electrodes PE includes a main pixel electrode PA formed so as to extend along the second direction d2.

  In this embodiment, the pixel electrode PE includes a main pixel electrode PA and a contact portion PC that are electrically connected to each other. The main pixel electrode PA extends linearly along the second direction d2 from the contact portion PC to the vicinity of the upper end portion and the vicinity of the lower end portion of the pixel PX. Such a main pixel electrode PA is formed in a strip shape having substantially the same width along the first direction d1. The contact portion PC is located in a region overlapping with the auxiliary capacitance line C1, and is electrically connected to the switching element SW via the contact hole CH. The contact portion PC is formed wider than the main pixel electrode PA.

  Such a pixel electrode PE is disposed at a substantially intermediate position between the source line S1 and the source line S2, that is, at the center of the pixel PX. The distance along the first direction d1 between the source line S1 and the pixel electrode PE is substantially the same as the distance along the first direction d1 between the source line S2 and the pixel electrode PE.

  The common electrode CE includes a plurality of main common electrodes CA. The plurality of main common electrodes CA are arranged at intervals in the first direction d1 in the plane of the liquid crystal display panel LPN, sandwich the plurality of main pixel electrodes PA in the first direction d1, and are each substantially the same as the main pixel electrode PA. It extends linearly along the parallel second direction d2. Alternatively, the main common electrode CA faces the source line S and extends substantially parallel to the main pixel electrode PA. The main common electrode CA is formed in a band shape and has substantially the same width along the first direction d1.

  In the illustrated example, two main common electrodes CA are arranged in parallel along the first direction d1, and are disposed at both left and right ends of the pixel PX, respectively. Hereinafter, in order to distinguish these main common electrodes CA, the left main common electrode in the figure is referred to as CAL, and the right main common electrode in the figure is referred to as CAR. The main common electrode CAL faces the source line S1, and the main common electrode CAR faces the source line S2.

  In the pixel PX, the main common electrode CAL is disposed at the left end, and the main common electrode CAR is disposed at the right end. Strictly speaking, the main common electrode CAL is disposed over the boundary between the pixel PX and the pixel adjacent to the left side thereof, and the main common electrode CAR is disposed over the boundary between the pixel PX and the pixel adjacent to the right side thereof. Has been.

  Paying attention to the positional relationship between the pixel electrode PE and the main common electrode CA, the pixel electrode PE and the main common electrode CA are alternately arranged along the first direction d1. The pixel electrode PE and the main common electrode CA are arranged substantially parallel to each other. At this time, none of the main common electrodes CA overlaps the pixel electrode PE in the plane of the liquid crystal display panel LPN.

  That is, one pixel electrode PE is located between the adjacent main common electrode CAL and main common electrode CAR. In other words, the pair of main common electrodes (the main common electrode CAL and the main common electrode CAR) are disposed on both sides of the position immediately above the pixel electrode PE. Alternatively, the pixel electrode PE is disposed between the main common electrode CAL and the main common electrode CAR. For this reason, the main common electrode CAL, the main pixel electrode PA, and the main common electrode CAR are arranged in this order along the first direction d1.

  The spacing between the pixel electrode PE and the common electrode CE along the first direction d1 is substantially constant. That is, the interval along the first direction d1 between the main common electrode CAL and the main pixel electrode PA is substantially the same as the interval along the first direction d1 between the main common electrode CAR and the main pixel electrode PA.

FIG. 5 is a cross-sectional view schematically showing a cross-sectional structure when the liquid crystal display panel LPN shown in FIG. 4 is cut along the line V-V. Here, only parts necessary for the description are shown.
As shown in FIG. 5, a backlight unit 4 is arranged on the back side of the array substrate AR that constitutes the liquid crystal display panel LPN. The backlight unit 4 can be applied in various forms, and can be applied to any one using a light emitting diode (LED) or a cold cathode tube (CCFL) as a light source. The description of the detailed structure is omitted.

  The array substrate AR is formed using a first insulating substrate 10 having light transparency. The source wiring S is formed on the first interlayer insulating film 11 and is covered with the second interlayer insulating film 12. Note that gate wirings and auxiliary capacitance lines (not shown) are disposed between the first insulating substrate 10 and the first interlayer insulating film 11, for example. The pixel electrode PE is formed on the second interlayer insulating film 12. The pixel electrode PE is located inside the adjacent source line S rather than the position immediately above each of the adjacent source lines S.

The first alignment film AL1 is disposed on the surface of the array substrate AR that faces the counter substrate CT, and extends over substantially the entire display region R1. The first alignment film AL1 covers the pixel electrode PE and the like, and is also disposed on the second interlayer insulating film 12. Such a first alignment film AL1 is formed of a material exhibiting horizontal alignment.
The array substrate AR may further include a part of the common electrode CE.

  The counter substrate CT is formed by using a second insulating substrate 20 having optical transparency. The counter substrate CT includes a black matrix BM, a color filter CF, an overcoat layer OC, a common electrode CE, a second alignment film AL2, and the like.

  The black matrix BM partitions each pixel PX and forms an opening AP that faces the pixel electrode PE. That is, the black matrix BM is disposed so as to face the wiring portions such as the source wiring S, the gate wiring, the auxiliary capacitance line, and the switching element. Here, only the portion extending along the second direction d2 is illustrated in the black matrix BM. However, the black matrix BM may include a portion extending along the first direction d1. The black matrix BM is disposed on the inner surface 20A of the second insulating substrate 20 facing the array substrate AR.

  The color filter CF is arranged corresponding to each pixel PX. That is, the color filter CF is disposed in the opening AP in the inner surface 20A of the second insulating substrate 20, and a part of the color filter CF runs on the black matrix BM. The color filters CF arranged in the pixels PX adjacent to each other in the first direction d1 have different colors. For example, the color filter CF is formed of resin materials colored in three primary colors such as red, blue, and green. The red color filter CFR made of a resin material colored in red is arranged corresponding to the red pixel. The blue color filter CFB made of a resin material colored in blue is arranged corresponding to the blue pixel. The green color filter CFG made of a resin material colored in green is arranged corresponding to the green pixel. The boundary between these color filters CF is at a position overlapping the black matrix BM.

  The overcoat layer OC covers the color filter CF. This overcoat layer OC alleviates the influence of irregularities on the surface of the color filter CF.

  The common electrode CE is formed on the side of the overcoat layer OC that faces the array substrate AR. The distance between the common electrode CE and the pixel electrode PE along the third direction d3 is substantially constant. The third direction d3 is a direction orthogonal to the first direction d1 and the second direction d2, or a normal direction of the liquid crystal display panel LPN.

  The second alignment film AL2 is disposed on the surface of the counter substrate CT facing the array substrate AR, and extends over substantially the entire display region R1. The second alignment film AL2 covers the common electrode CE, the overcoat layer OC, and the like. Such a second alignment film AL2 is formed of a material exhibiting horizontal alignment.

  The first alignment film AL1 and the second alignment film AL2 are subjected to alignment treatment (for example, rubbing or photo-alignment treatment) for initial alignment of the liquid crystal molecules of the liquid crystal layer LQ. In this embodiment, the liquid crystal layer LQ has, for example, positive dielectric anisotropy, that is, is formed of p-type liquid crystal.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film AL1 and the second alignment film AL2 face each other. At this time, a predetermined cell is formed between the first alignment film AL1 of the array substrate AR and the second alignment film AL2 of the counter substrate CT by, for example, a columnar spacer integrally formed on one substrate with a resin material. A gap, for example a cell gap of 2-7 μm, is formed. The array substrate AR and the counter substrate CT are bonded to each other with a sealing material SB outside the display region R1 in a state where a predetermined cell gap is formed.

  The interval between the main pixel electrode PA and the main common electrode CA in the first direction d1 is larger than the thickness (cell gap) of the liquid crystal layer LQ, and the interval between the main pixel electrode PA and the main common electrode CA is equal to the liquid crystal layer. It has a size twice or more as large as the LQ thickness (cell gap).

  The liquid crystal layer LQ is held in a cell gap formed between the array substrate AR and the counter substrate CT, and is disposed between the first alignment film AL1 and the second alignment film AL2.

  The first optical element OD1 is attached to the outer surface of the array substrate AR, that is, the outer surface 10B of the first insulating substrate 10 constituting the array substrate AR with an adhesive or the like. The first optical element OD1 is located on the side facing the backlight unit 4 of the liquid crystal display panel LPN, and controls the polarization state of incident light incident on the liquid crystal display panel LPN from the backlight unit 4. The first optical element OD1 includes a first polarizing plate PL1 having a first polarization axis (or first absorption axis) AX1.

  The second optical element OD2 is attached to the outer surface of the counter substrate CT, that is, the outer surface 20B of the second insulating substrate 20 constituting the counter substrate CT with an adhesive or the like. The second optical element OD2 is located on the display surface side of the liquid crystal display panel LPN, and controls the polarization state of the outgoing light emitted from the liquid crystal display panel LPN. The second optical element OD2 includes a second polarizing plate PL2 having a second polarization axis (or second absorption axis) AX2.

  Since the first polarization axis AX1 and the second polarization axis AX2 are, for example, orthogonal to each other, the first polarizing plate PL1 and the second polarizing plate PL2 are arranged in crossed Nicols. At this time, one polarizing plate is disposed, for example, so that the polarization axis thereof is parallel to or orthogonal to the initial alignment direction of the liquid crystal molecules. In this embodiment, since the liquid crystal molecules LM are initially aligned in a direction substantially along the Y axis, the polarization axis of one polarizing plate is parallel to the Y axis or parallel to the X axis perpendicular to the Y axis. .

  In this embodiment, the X axis is parallel to the first direction d1, and the Y axis is parallel to the second direction d2. For this reason, the liquid crystal molecules LM are initially aligned in a direction substantially along the Y axis. In other words, the liquid crystal molecules LM are initially aligned in the second direction d2 in which the main pixel electrode PA and the main common electrode CA extend.

  In the example shown in FIG. 4A, the first polarizing plate PL1 has the first polarizing axis AX1 orthogonal to the initial alignment direction (Y axis) of the liquid crystal molecules LM (that is, parallel to the X axis). The second polarizing plate PL2 is arranged so that the second polarization axis AX2 is parallel to the initial alignment direction of the liquid crystal molecules LM (that is, parallel to the Y axis). Has been.

  Further, in the example shown in FIG. 4B, the second polarizing plate PL2 has the second polarizing axis AX2 orthogonal to the initial alignment direction (Y axis) of the liquid crystal molecules LM (that is, the X axis). The first polarizing plate PL1 is arranged so that the first polarizing axis AX1 is parallel to the initial alignment direction of the liquid crystal molecules LM (that is, parallel to the Y axis). Is arranged.

Next, the operation of the liquid crystal display panel LPN configured as described above will be described.
As shown in FIGS. 4 and 5, in a state where no voltage is applied to the liquid crystal layer LQ, that is, in a state where no electric field is formed between the pixel electrode PE and the common electrode CE (when OFF), the liquid crystal The liquid crystal molecules LM of the layer LQ are aligned such that their long axes are directed to the alignment treatment direction of the first alignment film AL1 and the alignment treatment direction of the second alignment film AL2. Such OFF time corresponds to the initial alignment state, and the alignment direction of the liquid crystal molecules LM at the OFF time corresponds to the initial alignment direction.

  Strictly speaking, the liquid crystal molecules LM are not necessarily aligned parallel to the plane of the liquid crystal display panel LPN, but are pretilted in the vicinity of the alignment film. For this reason, the initial alignment direction of the liquid crystal molecules LM here is a direction obtained by orthogonally projecting the major axis of the liquid crystal molecules LM at the time of OFF to the XY plane. Hereinafter, in order to simplify the description, it is assumed that the liquid crystal molecules LM are aligned in parallel to the XY plane and rotate in a plane parallel to the XY plane.

  At the OFF time, the liquid crystal molecules LM are initially aligned in the direction in which the major axis is substantially parallel to the Y axis, as indicated by the broken line in FIG. That is, the initial alignment direction of the liquid crystal molecules LM is parallel to the Y axis (or 0 ° with respect to the Y axis).

  A part of the backlight from the backlight unit 4 passes through the first polarizing plate PL1 and enters the liquid crystal display panel LPN. The polarization state of light incident on the liquid crystal display panel LPN varies depending on the alignment state of the liquid crystal molecules LM when passing through the liquid crystal layer LQ. At the OFF time, the light that has passed through the liquid crystal layer LQ is absorbed by the second polarizing plate PL2 (black display).

  On the other hand, in a state where a voltage is applied to the liquid crystal layer LQ, that is, a state where an electric field is formed between the pixel electrode PE and the common electrode CE (when ON), the substrate is interposed between the pixel electrode PE and the common electrode CE. A horizontal electric field (or an oblique electric field) substantially parallel to the line is formed. The liquid crystal molecules LM are affected by the electric field and rotate in a plane whose major axis is substantially parallel to the XY plane as indicated by the solid line in the figure.

  In the example of the liquid crystal layer LQ shown in FIG. 2, the liquid crystal molecules LM in the region between the pixel electrode PE and the main common electrode CAL rotate clockwise with respect to the Y axis so as to face the lower left in the figure. Oriented to The liquid crystal molecules LM in the region between the pixel electrode PE and the main common electrode CAR rotate counterclockwise with respect to the Y axis and are aligned so as to face the lower right in the drawing.

  Thus, in each pixel PX, in the state where an electric field is formed between the pixel electrode PE and the common electrode CE, the alignment direction of the liquid crystal molecules LM is divided into a plurality of directions with the pixel electrode PE as a boundary. A domain is formed in the orientation direction. That is, a plurality of domains are formed in one pixel PX.

  In such an ON state, a part of the backlight incident on the liquid crystal display panel LPN from the backlight unit 4 passes through the first polarizing plate PL1 and enters the liquid crystal display panel LPN. The backlight that has entered the liquid crystal layer LQ changes its polarization state. At such ON time, at least part of the light that has passed through the liquid crystal layer LQ is transmitted through the second polarizing plate PL2 (white display).

  FIG. 6 is for explaining the electric field formed between the pixel electrode PE and the common electrode CE in the liquid crystal display panel LPN shown in FIG. 4, and the relationship between the director of the liquid crystal molecules LM and the transmittance due to this electric field. FIG.

  As shown in FIG. 6, in the OFF state, the liquid crystal molecules LM are initially aligned in a direction substantially parallel to the Y axis. In the ON state in which a potential difference is formed between the pixel electrode PE and the common electrode CE, the director of the liquid crystal molecules LM (or the major axis direction of the liquid crystal molecules LM) is within the XY plane of the first polarizing plate PL1. When the first polarization axis AX1 and the second polarization axis AX2 of the second polarizing plate PL2 are shifted from each other by approximately 45 °, the optical modulation rate of the liquid crystal becomes the highest (that is, at the opening). Transmission is maximized).

  In the illustrated example, the directors of the liquid crystal molecules between the main common electrode CAL and the pixel electrode PE and between the main common electrode CAR and the pixel electrode PE are turned on the pixel electrode PE when turned on. The direction is 45 °. Thereby, peak transmittance is obtained. At this time, when paying attention to the transmittance distribution per pixel, the transmittance is substantially zero on the pixel electrode PE and the common electrode CE, while in the electrode gap between the pixel electrode PE and the common electrode CE, High transmittance can be obtained over substantially the entire region.

  Note that the main common electrode CAL located immediately above the source line S1 and the main common electrode CAR located directly above the source line S2 are opposed to the black matrix BM, respectively, but these main common electrode CAL and main common electrode Both the CARs have a width equal to or less than the width along the first direction d1 of the black matrix BM, and do not extend to the pixel electrode PE side from the position overlapping the black matrix BM. For this reason, the opening that contributes to display per pixel is the pixel electrode PE, the main common electrode CAL, and the main common electrode CAR in the region between the black matrix BM or between the source wiring S1 and the source wiring S2. Corresponds to the area between.

FIG. 7 is an enlarged plan view showing a part of the sensing substrate 5. FIG. 8 is a cross-sectional view showing a part of sensing substrate 5 shown along line VIII-VIII in FIG.
As shown in FIGS. 2, 7, and 8, a capacitance method is used as the position detection method of the sensing substrate 5. The sensing substrate 5 detects input position information from the input means 100 from the surface side of the decorative board 6. The sensing substrate 5 includes a glass substrate 30S as a transparent insulating substrate.

  The sensing substrate 5 has a plurality of first detection electrodes 31 and a plurality of second detection electrodes 32 as detection electrodes whose capacitance changes due to input by the input means 100. The electrode pattern of the sensing substrate 5 includes a plurality of connection wires 36 and a plurality of connection wires 37 in addition to the plurality of first detection electrodes 31 and the plurality of second detection electrodes 32.

  The first detection electrode 31, the second detection electrode 32, the connection wiring 36, and the connection wiring 37 are arranged on the glass substrate 30S in the input region R2, face the decorative board 6, and are made of, for example, ITO as a transparent conductive material. Is formed.

  The plurality of first detection electrodes 31 are arranged in the first direction d1 and the second direction d2. The first detection electrodes 31 are squares having diagonal lines along the first direction d1 and the second direction d2, respectively. The first detection electrode 31 has first corners that face each other along the first direction d1. In the first direction d1, adjacent first corners are connected to each other.

  In this embodiment, the square first corner of the first detection electrode 31 is crushed and has a first short side 33. For this reason, the first detection electrode 31 is a hexagon having the first short side 33. The adjacent first short sides 33 are connected to each other through a connection wiring 36. The connection wiring 36 is arranged in an island shape on the glass substrate 30S.

  The plurality of first detection electrodes 31 and the plurality of connection wirings 36 connected to each other form a first wiring W1 extending in the first direction d1. The plurality of first wirings W1 are arranged in the second direction d2. The plurality of first detection electrodes 31 and the plurality of connection wirings 36 are formed in different manufacturing processes. The X coordinate of the input position can be detected by detecting a change in capacitance using the first wiring W1.

  The plurality of second detection electrodes 32 are arranged in the first direction d1 and the second direction d2 with a gap between the plurality of first detection electrodes 31. The second detection electrodes 32 are squares having diagonal lines along the first direction d1 and the second direction d2, respectively. The second detection electrode 32 has second corners facing each other along the second direction d2. In the second direction d2, adjacent second corners are connected to each other.

  In this embodiment, the square second corner of the second detection electrode 32 has a collapsed second short side 34. For this reason, the second detection electrode 32 has a hexagonal shape with the second short side 34. The adjacent second short sides 34 are connected to each other through a connection wiring 37. The connection wiring 37 is arranged in an island shape on the glass substrate 30S.

  The plurality of second detection electrodes 32 and the plurality of connection wirings 37 connected to each other form a second wiring W2 extending in the second direction d2. The plurality of second wirings W2 are arranged in the first direction d1. The plurality of second detection electrodes 32 and the plurality of connection wirings 37 of the second wiring W2 are integrally formed in the same manufacturing process. By detecting a change in capacitance using the second wiring W2, the Y coordinate of the input position can be detected.

A lattice-shaped slit 39 is formed between the first detection electrode 31 and the second detection electrode 32.
A plurality of insulating films 38 are arranged in an island shape on the glass substrate 30S. The plurality of insulating films 38 are disposed at a plurality of intersections of the plurality of first wires W1 and the plurality of second wires W2 on the glass substrate 30S, and are interposed between the plurality of first wires W1 and the plurality of second wires W2. Has been. The insulating film 38 prevents a short circuit between the first wiring W1 and the second wiring W2.

  The connection wiring 36 and the connection wiring 37 are opposed to each other with an insulating film 38 interposed therebetween. Here, the first wiring W1 (connection wiring 36) is located above the intersection of the first wiring W1 and the second wiring W2. From the above, it can be said that the connection wiring 36 is a bridge wiring.

  The first wiring W1 and the second wiring W2 are connected to a control unit (not shown). The control unit acquires input position information (input position coordinates) by acquiring a change in capacitance in the first wiring W1 (first detection electrode 31) and the second wiring W2 (second detection electrode 32). be able to.

  According to the liquid crystal display device according to the embodiment configured as described above, each pixel PX is formed on the first insulating substrate 10 (array substrate AR) and extends along the second direction d2. A pair of main common electrodes CA formed on the pixel electrode PA and the second insulating substrate 20 (counter substrate CT), located in the first direction d1 with the main pixel electrode PA interposed therebetween, and extended along the second direction d2. And have.

  The liquid crystal display device is configured such that an electric field formed between the main pixel electrode PA and the main common electrode CA is mainly applied to the liquid crystal layer LQ. Therefore, a liquid crystal display device that adopts a horizontal electric field mode or an oblique electric field mode different from the IPS mode or the FFS mode can be obtained.

  Since a high transmittance is obtained in the electrode gap between the pixel electrode PE and the common electrode CE, the pixel electrode PE, the main common electrode CAL, and the main common electrode CAR are used in order to sufficiently increase the transmittance per pixel. It is possible to cope by enlarging the distance between the electrodes. For product specifications with different pixel pitches, the inter-electrode distance is changed (that is, the arrangement position of the main common electrode CA is changed with respect to the pixel electrode PE arranged in the approximate center of the pixel PX). The peak condition of the transmittance distribution as shown in FIG. 6 can be used. That is, in the display mode of the present embodiment, fine electrode processing is not always required from a low-resolution product specification with a relatively large pixel pitch to a high-resolution product specification with a relatively small pixel pitch, and the distance between the electrodes is not required. Products with various pixel pitches can be provided by setting. Therefore, it is possible to easily realize the demand for high transmittance and high resolution.

  Further, according to the present embodiment, as shown in FIG. 6, when attention is paid to the transmittance distribution in the region overlapping with the black matrix BM, the transmittance is sufficiently lowered. This is because the electric field does not leak outside the pixel from the position of the common electrode CE, and an undesired lateral electric field does not occur between adjacent pixels across the black matrix BM. This is because the liquid crystal molecules in the overlapping region maintain the initial alignment state as in the OFF state (or during black display). Therefore, even when the colors of the color filters are different between adjacent pixels, it is possible to suppress the occurrence of color mixing, and it is possible to suppress a decrease in color reproducibility and a decrease in contrast ratio.

  Further, when the alignment between the array substrate AR and the counter substrate CT is shifted, there may be a difference in the distance between the horizontal electrodes with the common electrode CE on both sides of the pixel electrode PE. However, since such misalignment occurs in common for all the pixels PX, there is no difference in the electric field distribution among the pixels PX, and the influence on the display of the image is extremely small. In addition, even if a misalignment occurs between the array substrate AR and the counter substrate CT, it is possible to suppress undesired electric field leakage to adjacent pixels. For this reason, even when the colors of the color filters are different between adjacent pixels, it is possible to suppress the occurrence of color mixing, and it is possible to suppress a decrease in color reproducibility and a decrease in contrast ratio.

  Further, according to the present embodiment, the main common electrode CA is opposed to the source line S. In particular, when the main common electrode CAL and the main common electrode CAR are disposed immediately above the source line S1 and the source line S2, respectively, the main common electrode CAL and the main common electrode CAR are more than the source line S1 and the source line S2. Compared with the case where it is arranged on the pixel electrode PE side, the opening AP can be enlarged, and the transmittance of the pixel PX can be improved.

  Further, by disposing the main common electrode CAL and the main common electrode CAR directly above the source line S1 and the source line S2, respectively, the interelectrode distance between the pixel electrode PE and the main common electrode CAL and the main common electrode CAR is increased. It becomes possible to form a lateral electric field that is closer to the horizontal. For this reason, it is possible to maintain the wide viewing angle, which is an advantage of the IPS mode, which is a conventional configuration.

  Further, according to the present embodiment, a plurality of domains can be formed in one pixel. Therefore, the viewing angle can be optically compensated in a plurality of directions, and a wide viewing angle can be achieved.

  In the above example, since the liquid crystal layer LQ has positive dielectric anisotropy, the case where the initial alignment direction of the liquid crystal molecules LM is parallel to the Y axis has been described. The initial alignment direction may be an oblique direction D that obliquely intersects the Y axis, as shown in FIG. Here, the angle θ1 formed by the initial alignment direction D with respect to the Y axis is an angle greater than 0 ° and less than 45 °. Note that it is extremely effective from the viewpoint of controlling the alignment of the liquid crystal molecules LM that the angle θ1 formed is about 5 ° to 30 °, more preferably 20 ° or less. That is, it is desirable that the initial alignment direction of the liquid crystal molecules LM is substantially parallel to a direction within a range of 0 ° to 20 ° with respect to the Y axis.

  In other words, it is desirable that the first alignment film AL1 is formed so as to initially align the liquid crystal molecules LM in the vicinity in a direction inclined within 20 ° from the Y axis or the Y axis. Similarly, it is desirable that the second alignment film AL2 is formed so as to initially align the liquid crystal molecules LM in the vicinity in the Y axis or a direction inclined within 20 ° from the Y axis.

  Even when ON, the horizontal electric field is hardly formed on the pixel electrode PE or the common electrode CE (or an electric field sufficient to drive the liquid crystal molecule LM is not formed), so that the liquid crystal molecule LM is OFF. As with time, it hardly moves from the initial orientation direction. For this reason, even if the pixel electrode PE and the common electrode CE are formed of a light-transmitting conductive material such as ITO, the backlight hardly transmits in these regions, and hardly contributes to the display when ON. Therefore, the pixel electrode PE and the common electrode CE are not necessarily formed of a transparent conductive material, and may be formed using a conductive material such as aluminum, silver, or copper.

  In the present embodiment, the common electrode CE is opposed to the main common electrode CA provided on the array substrate AR (or opposed to the source wiring S) in addition to the main common electrode CA provided on the counter substrate CT. A second main common electrode (shield electrode) may be provided. The second main common electrode extends substantially parallel to the main common electrode CA and has the same potential as the main common electrode CA. By providing such a second main common electrode, an undesired electric field from the source line S can be shielded.

  In addition to the main common electrode CA provided on the counter substrate CT, the common electrode CE includes a second sub-common electrode (shield electrode) provided on the array substrate AR and facing the gate wiring G and the auxiliary capacitance line C. May be. The second sub-common electrode extends in a direction intersecting with the main common electrode CA and has the same potential as the main common electrode CA. By providing such a second sub-common electrode, it is possible to shield an undesired electric field from the gate line G and the auxiliary capacitance line C. According to such a configuration including the second main common electrode and the second sub-common electrode, it is possible to suppress further deterioration in display quality.

  Next, a liquid crystal display panel of a modified example according to this embodiment will be described. FIG. 9 is a plan view schematically showing a structural example of one pixel PX when the liquid crystal display panel LPN of the modification according to the present embodiment is viewed from the counter substrate CT side.

  As shown in FIG. 9, the common electrode CE further includes a plurality of sub-common electrodes CB. In this embodiment, the plurality of sub-common electrodes CB are formed on the counter substrate CT side. The plurality of sub-common electrodes CB are arranged at intervals in the second direction d2, and sandwich the plurality of main pixel electrodes PA in the second direction d2. The plurality of sub-common electrodes CB each extend along the first direction d1.

  The plurality of sub-common electrodes CB are formed integrally or continuously with the plurality of main common electrodes CA. For this reason, the plurality of sub-common electrodes CB (CBU, CBB) are electrically connected to the plurality of main common electrodes CA. The voltage (common voltage) applied from the power supply unit VS is applied to the plurality of main common electrodes CA and the plurality of sub-common electrodes CB.

  In this modification, the example of the liquid crystal display panel LPN shown in FIG. 4 in that the pixel electrode PE is formed in a cross shape and the common electrode CE is formed in a lattice shape so as to surround one pixel PX. Is different. That is, the pixel electrode PE includes a main pixel electrode PA and a sub-pixel electrode PB that are electrically connected to each other. The main pixel electrode PA extends linearly along the second direction d2 from the sub-pixel electrode PB to the vicinity of the upper end and the vicinity of the lower end of the pixel PX. The subpixel electrode PB extends along the first direction d1. The sub-pixel electrode PB is located in a region overlapping with the storage capacitor line C1, and is electrically connected to the switching element through the contact hole CH. In the illustrated example, the sub-pixel electrode PB is provided substantially at the center of the pixel PX, and the pixel electrode PE has a cross shape.

  The sub-common electrode CB is opposed to each of the gate lines G. In the illustrated example, the two sub-common electrodes CB are arranged in parallel along the first direction d1, and in the following, in order to distinguish them, the upper sub-common electrode in the drawing is referred to as CBU. The lower sub-common electrode is referred to as CBB. The sub-common electrode CBU is disposed at the upper end portion of the pixel PX and faces the gate line G1. That is, the sub-common electrode CBU is disposed across the boundary between the pixel PX and the adjacent pixel on the upper side. The sub-common electrode CBB is disposed at the lower end of the pixel PX and faces the gate line G2. That is, the sub-common electrode CBB is disposed across the boundary between the pixel PX and the pixel adjacent below the pixel PX.

  Focusing on the positional relationship between the pixel electrode PE and the common electrode CE, the main pixel electrode PA and the main common electrode CA are alternately arranged along the first direction d1, and the sub-pixel electrode PB and the sub-common electrode CB are They are arranged alternately along the two directions d2. That is, one main pixel electrode PA is located between the adjacent main common electrode CAL and main common electrode CAR, and the main common electrode CAL, main pixel electrode PA, and main common electrode CAR are aligned along the first direction d1. They are arranged in the order. One subpixel electrode PB is located between the adjacent subcommon electrode CBB and the subcommon electrode CBU, and the subcommon electrode CBB, the subpixel electrode PB, and the subcommon electrode CBU are arranged along the second direction d2. They are arranged in the order.

  According to such a structural example, the liquid crystal molecules LM initially aligned on the Y axis at the time of OFF are affected by the electric field formed between the pixel electrode PE and the common electrode CE at the time of ON, and the major axis thereof Rotates in a plane substantially parallel to the XY plane as indicated by a solid line in the figure. The liquid crystal molecules LM in the region surrounded by the pixel electrode PE, the main common electrode CAL, and the sub-common electrode CBB rotate clockwise with respect to the Y axis and are oriented to face the lower left in the figure. The liquid crystal molecules LM in the region surrounded by the pixel electrode PE, the main common electrode CAR, and the sub-common electrode CBB rotate counterclockwise with respect to the Y axis and are aligned so as to face the lower right in the drawing. The liquid crystal molecules LM in the region surrounded by the pixel electrode PE, the main common electrode CAL, and the sub-common electrode CBU rotate counterclockwise with respect to the Y axis and are oriented so as to face the upper left in the drawing. The liquid crystal molecules LM in the region surrounded by the pixel electrode PE, the main common electrode CAR, and the sub-common electrode CBU rotate clockwise with respect to the Y axis and are oriented so as to face the upper right in the drawing.

  As described above, in each pixel PX, in a state where an electric field is formed between the pixel electrode PE and the common electrode CE, different electric fields can be applied to the four domains, so that the viewing angle can be increased. The alignment regulating force of the liquid crystal molecules LM can be made stronger than the pixel structure of FIG.

  As described above, the configuration of the liquid crystal display device for adopting the horizontal electric field mode or the oblique electric field mode by a method different from the IPS mode and the FFS mode has been described. The liquid crystal display devices of Embodiments 1 and 2 that can adopt the electric field mode or the oblique electric field mode and can maintain high display quality over a long period of time will be described.

  The following examples are not intended to be limiting, but are exemplary. That is, the liquid crystal display device according to this embodiment is not limited to Examples 1 and 2, and can be variously modified.

Example 1
FIG. 10 is a cross-sectional view showing the liquid crystal display device of Example 1 according to the above embodiment. FIG. 11 is an exploded perspective view showing a part of the liquid crystal display panel LPN of Example 1, and schematically showing the liquid crystal layer LQ, the polarizing plate, and the retardation plate. In FIGS. 10 and 11, only the portions necessary for the description are shown.

  As shown in FIGS. 5, 10, and 11, the liquid crystal display device further includes a brightness enhancement film 40. The brightness enhancement film 40 is located between the backlight unit 4 and the liquid crystal display panel LPN (first optical element OD1). The brightness enhancement film 40 may be provided as necessary. The liquid crystal display device can improve the luminance level of the display image by using the luminance enhancement film 40.

  The first optical element OD1 includes a first polarizing plate PL1. 1st polarizing plate PL1 has the polarizer layer 51 which is a base material of a polarizing plate, and the support layers 52 and 53 provided in both surfaces of the polarizer layer 51. As shown in FIG.

  The polarizer layer 51 is formed by staining an iodine compound on a PVA (polyvinyl alcohol) film and then stretching the PVA film in one direction. The stretching direction is the absorption axis direction of the polarizer layer 51 (first polarizing plate PL1).

The support layers 52 and 53 are formed using, for example, TAC (triacetyl cellulose). The support layer 52 is attached to the surface of the polarizer layer 51 that faces the liquid crystal layer LQ. The support layer 53 is attached to another surface of the polarizer layer 51. The support layers 52 and 53 protect the polarizer layer 51. For example, the support layers 52 and 53 have a moisture-proof function, and can reduce moisture intrusion into the polarizer layer 51. Further, the support layers 52 and 53 can reinforce the polarizer layer 51. Thereby, the support layers 52 and 53 can suppress contraction of the polarizer layer 51 when the polarizer layer 51 is affected by heat and moisture.
The adhesive 91 is located between the array substrate AR and the first polarizing plate PL1 (support layer 52), and bonds the array substrate AR and the first polarizing plate PL1.

The second optical element OD2 includes a first retardation plate 71, a second retardation plate 72, a second polarizing plate PL2, and a retardation plate 80.
The first retardation plate 71 is disposed between the counter substrate CT and the second polarizing plate PL2. The first retardation plate 71 is arranged such that the first slow axis SA1 is parallel to the Y axis. The second retardation plate 72 is positioned between the first retardation plate 71 and the second polarizing plate PL2, and is stacked on the first retardation plate 71. The second retardation plate 72 is arranged such that the second slow axis SA2 is parallel to the Y axis. The thickness of the first retardation plate 71 and the second retardation plate 72 is about 25 μm.

The second polarizing plate PL2 includes a polarizer layer 61 that is a base material of the polarizing plate, and a support layer 63 provided on one surface of the polarizer layer 51.
The polarizer layer 61 is formed in the same manner as the polarizer layer 51. The stretching direction is the absorption axis direction of the polarizer layer 61 (second polarizing plate PL2).

The support layer 63 is formed using, for example, TAC. The support layer 63 is attached to a surface different from the surface facing the liquid crystal layer LQ of the polarizer layer 61.
The first retardation plate 71 and the second retardation plate 72 also function as a support layer. The support layer 63, the first retardation plate 71 and the second retardation plate 72 protect the polarizer layer 61. For example, the support layer 63, the first retardation plate 71, and the second retardation plate 72 have a moisture-proof function, and can reduce moisture intrusion into the polarizer layer 61. The support layer 63, the first retardation plate 71, and the second retardation plate 72 can reinforce the polarizer layer 61. Accordingly, the support layer 63, the first retardation plate 71, and the second retardation plate 72 can suppress the contraction of the polarizer layer 61 when the polarizer layer 61 is affected by heat or moisture.

The retardation film 80 is affixed to the outer surface of the second polarizing plate PL2 (support layer 63). The phase difference plate 80 may be provided as necessary. The liquid crystal display device can improve the luminance level of the display image by using the phase difference plate 80.
The adhesive 93 is located between the counter substrate CT and the first retardation plate 71 and adheres the counter substrate CT and the first retardation plate 71.

  The adhesive 93 is a conductive adhesive or an adhesive that does not contain an acid. For example, when ITO is not applied on the counter substrate CT, it is necessary to use a conductive adhesive material as the adhesive material 93 in order to prevent display unevenness due to charging. In addition, when ITO is applied on the counter substrate CT, the adhesive 93 needs to be an adhesive that does not contain an acid in order to prevent corrosion of the ITO. A conductive adhesive material or an adhesive material that does not exhibit acidity tends to have a lower adhesion to glass than a general adhesive material.

  At least one of the support layers 52, 53, 63 has a thickness T52, T53, T63 of less than 40 μm. In the first embodiment, the support layers 52, 53, and 63 have thicknesses T52, T53, and T63 that are less than 40 μm, respectively. For example, the thicknesses T52, T53, and T63 are each 25 μm.

(Example 2)
FIG. 12 is a cross-sectional view showing the liquid crystal display device of Example 2 according to the above embodiment. FIG. 13 is an exploded perspective view showing a part of the liquid crystal display panel LPN of Example 2, and schematically showing the liquid crystal layer LQ, the polarizing plate, and the retardation plate. In FIG. 12 and FIG. 13, only the portions necessary for explanation are shown.

As shown in FIGS. 5, 12, and 13, the first retardation plate 71 and the second retardation plate 72 may be provided on the array substrate AR side.
The first optical element OD1 includes a first retardation plate 71, a second retardation plate 72, and a first polarizing plate PL1. The first retardation plate 71 is disposed between the array substrate AR and the first polarizing plate PL1. The second retardation plate 72 is located between the first retardation plate 71 and the first polarizing plate PL1, and is stacked on the first retardation plate 71.

  The first polarizing plate PL1 is formed without the support layer 52. The adhesive 93 is located between the array substrate AR and the first retardation plate 71 and adheres the array substrate AR and the first retardation plate 71.

The second optical element OD2 includes a second polarizing plate PL2 and a phase difference plate 80.
The second polarizing plate PL2 includes a polarizer layer 61 and support layers 62 and 63 provided on both surfaces of the polarizer layer 51. As described above, the second polarizing plate PL2 further includes the support layer 62. The support layer 62 is formed using, for example, TAC. The support layer 62 is affixed to the surface of the polarizer layer 61 that faces the liquid crystal layer LQ. The support layer 62 has the same function as the support layer 63. The adhesive 92 is located between the counter substrate CT and the second polarizing plate PL2 (support layer 62), and bonds the counter substrate CT and the second polarizing plate PL2.

At least one of the support layers 53, 62, 63 has a thickness T53, T62, T63 of less than 40 μm. In the second embodiment, the support layers 53, 62, and 63 have thicknesses T53, T62, and T63 that are less than 40 μm, respectively. For example, the thicknesses T53, T62, and T63 are each 25 μm.
In addition to the above, the liquid crystal display device of the second embodiment is formed in the same manner as the liquid crystal display device of the first embodiment.

  According to the liquid crystal display device according to the embodiment configured as described above, the liquid crystal display device includes the liquid crystal display panel LPN, the reinforcing plate, and the adhesive 7 that bonds the liquid crystal display panel LPN and the reinforcing plate. I have. The first polarizing plate PL1 and the second polarizing plate PL2 have polarizer layers 51 and 61, respectively.

One of the first polarizing plate PL1 and the second polarizing plate PL2 faces the second retardation plate 72, and is the surface opposite to the surface facing the second retardation plate 72 of the polarizer layer (51 or 61). It has the support layer (53 or 63) provided in. The other of the first polarizing plate PL1 and the second polarizing plate PL2 has support layers (52 and 53, or 62 and 63) provided on both surfaces of the polarizer layer (51 or 61).
Since both surfaces of the polarizer layers 51 and 61 are protected by a support layer and a phase difference plate, moisture permeation into the polarizer layers 51 and 61 can be reduced.

  At least one of the support layers 52, 53, 62, 63 has a thickness T52, T53, T62, T63 of less than 40 μm. Since the support layers 52, 53, 62, and 63 can be formed thin, it can contribute to further thinning of the liquid crystal display device.

  When the support layers 52, 53, 62, and 63 are thinned, the first polarizing plate PL1 and the second polarizing plate PL2 are peeled off or the first polarizing plate PL1 and the second polarizing plate PL2 are affected by the shrinkage of the polarizer layers 51 and 61 themselves. There has been concern about problems such as wrinkling on the polarizing plate PL2 and warping of the liquid crystal display panel LPN.

  However, in the present embodiment, the sensing substrate 5 and the decorative plate 6 function as reinforcing plates. Since the decrease in strength of the support layers 52, 53, 62, and 63 due to the thinning can be compensated for by the sensing substrate 5 and the decorative plate 6, the occurrence of problems such as the liquid crystal display panel LPN warping is reduced. Can do. Thereby, the occurrence of defects such as uneven brightness in the display image can be reduced, and high display quality can be maintained.

  From the above, a liquid crystal display device capable of maintaining high display quality over a long period can be obtained.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the components without departing from the scope of the invention in the implementation stage. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiments. For example, some components may be deleted from all the components shown in the embodiment.

For example, the liquid crystal display device may be formed without the first retardation plate 71 and the second retardation plate 72. FIG. 14 is a cross-sectional view showing a modification of the liquid crystal display device according to the embodiment. In FIG. 14, only the portions necessary for explanation are shown.
As shown in FIG. 14, the liquid crystal display device is formed without the first retardation plate 71 and the second retardation plate 72. The first optical element OD1 is formed in the same manner as the first optical element OD1 of the first embodiment. The second optical element OD2 is formed in the same manner as the second optical element OD2 of the second embodiment. Also in this case, the same effect as the above-described embodiment can be obtained.

  Further, the liquid crystal layer LQ may have negative dielectric anisotropy, in other words, the liquid crystal layer LQ may be formed of n-type liquid crystal. FIG. 15 is an exploded perspective view showing a part of a modification of the liquid crystal display panel LPN of the first embodiment, and schematically showing a liquid crystal layer LQ, a polarizing plate, and a retardation plate. FIG. 16 is an exploded perspective view showing a part of a modification of the liquid crystal display panel LPN of the second embodiment, and schematically showing a liquid crystal layer LQ, a polarizing plate, and a retardation plate. In FIGS. 15 and 16, only the portions necessary for the description are shown.

  As shown in FIG. 15, the liquid crystal layer LQ is formed of n-type liquid crystal. The Y axis is parallel to the first direction d1, and the X axis is parallel to the second direction d2. For this reason, the direction in which the liquid crystal molecules LM are initially aligned is substantially parallel to the first direction d1, and the first retardation plate 71 is arranged so that the first slow axis SA1 is parallel to the first direction d1, The two phase difference plate 72 is arranged so that the second slow axis SA2 is parallel to the first direction d1. Even when the liquid crystal layer LQ is formed of n-type liquid crystal as described above, the same effects as those of the first embodiment can be obtained.

  Further, as shown in FIG. 16, the liquid crystal layer LQ is formed of n-type liquid crystal. The Y axis is parallel to the first direction d1, and the X axis is parallel to the second direction d2. For this reason, the direction in which the liquid crystal molecules LM are initially aligned is substantially parallel to the first direction d1, and the first retardation plate 71 is arranged so that the first slow axis SA1 is parallel to the first direction d1, The two phase difference plate 72 is arranged so that the second slow axis SA2 is parallel to the first direction d1. Even when the liquid crystal layer LQ is formed of n-type liquid crystal as described above, the same effects as those of the second embodiment described above can be obtained.

  The thickness T52 of the support layer 52 and the thickness T53 of the support layer 53 can be reduced within a range in which the support layers 52 and 53 can be attached to the polarizer layer 51. The thickness T62 of the support layer 62 and the thickness T63 of the support layer 63 can be reduced within a range in which the support layers 62 and 63 can be attached to the polarizer layer 61.

The reinforcing plate may be a plate and is not limited to an assembly of the sensing substrate 5 and the decorative plate 6. For example, the liquid crystal display device may include any one of the sensing substrate 5 and the decorative plate 6. In this case, the sensing substrate 5 or the decorative plate 6 can function as a reinforcing plate by being attached to the liquid crystal display panel LPN.
The first substrate described above may be the counter substrate CT, and the second substrate may be the array substrate AR.

  LPN ... Liquid crystal display panel, AR ... Array substrate, CT ... Counter substrate, LQ ... Liquid crystal layer, LM ... Liquid crystal molecule, PX ... Pixel, PE ... Pixel electrode, PA ... Main pixel electrode, PB ... Subpixel electrode, CE ... Common Electrode, CA, CAL, CAR ... main common electrode, CB, CBU, CBB ... sub-common electrode, OD1 ... first optical element, PL1 ... first polarizing plate, OD2 ... second optical element, PL2 ... second polarizing plate, 51, 61 ... Polarizer layer, 52, 53, 62, 63 ... Support layer, 71 ... First retardation plate, 72 ... Second retardation plate, 5 ... Sensing substrate, 6 ... Decorative plate, 7, 8, 91 , 92, 93 ... adhesive, d1 ... first direction, d2 ... second direction.

Claims (11)

A first substrate; a second substrate; a liquid crystal layer sandwiched between the first substrate and the second substrate; a first polarizing plate facing the outer surface of the first substrate; and facing the outer surface of the second substrate A liquid crystal display panel comprising: the second polarizing plate; a first adhesive that bonds the first substrate and the first polarizing plate; and a second adhesive that bonds the second substrate and the second polarizing plate; ,
A reinforcing plate facing the outer surface of the liquid crystal display panel;
A third adhesive for bonding the liquid crystal display panel and the reinforcing plate,
The first polarizing plate and the second polarizing plate each have a polarizer layer, and support layers provided on both sides of the polarizer layer,
At least one of the support layers is a liquid crystal display device having a thickness of less than 40 μm. A first substrate, a second substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate and having liquid crystal molecules initially aligned in a direction substantially parallel to the Y axis, and facing the outer surface of the first substrate; A first polarizing plate having a first absorption axis parallel to the Y axis or the X axis orthogonal to the Y axis, and a crossed Nicols position relative to the first absorption axis facing the outer surface of the second substrate. A second polarizing plate having a second absorption axis; a first retardation plate positioned between the first substrate and the first polarizing plate and having a first slow axis parallel to the Y axis; A second retardation plate positioned between the retardation plate and the first polarizing plate and stacked on the first retardation plate and having a second slow axis parallel to the Y axis; the second retardation plate; and the first retardation plate. A first adhesive for adhering the polarizing plate, a second adhesive for adhering the second substrate and the second polarizing plate, the first substrate and the first retardation plate A liquid crystal display panel and a third adhesive material for bonding the,
A reinforcing plate facing the outer surface of the liquid crystal display panel;
A fourth adhesive for bonding the liquid crystal display panel and the reinforcing plate,
The first polarizing plate includes a polarizer layer, and a support layer provided on a surface of the polarizer layer opposite to the surface facing the second retardation plate,
The second polarizing plate has a polarizer layer and support layers provided on both sides of the polarizer layer,
At least one of the support layers is a liquid crystal display device having a thickness of less than 40 μm.   The liquid crystal display device according to claim 1, wherein the reinforcing plate is a decorative plate.   The liquid crystal display device according to claim 1, wherein the reinforcing plate is a sensing substrate that detects positional information of an input location. The reinforcing plate is positioned between the sensing substrate and the decorative plate, and is bonded to the sensing substrate and the decorative plate, the sensing substrate detecting the position information of the input location, the decorative plate facing the sensing substrate, Formed with an assembly of adhesive,
The liquid crystal display device according to claim 1, wherein the fifth adhesive material bonds the liquid crystal display panel and the sensing substrate.   The liquid crystal display device according to claim 1, wherein the third adhesive is formed of an ultraviolet curable resin or a thermosetting resin.   The liquid crystal display device according to claim 2, wherein the fourth adhesive is formed of an ultraviolet curable resin or a thermosetting resin. In a pixel whose length along the first direction is shorter than the length along the second direction orthogonal to the first direction,
The first substrate has a pixel electrode including a main pixel electrode having a longitudinal direction in the second direction,
3. The second substrate according to claim 1, wherein the second substrate includes a common electrode including a main common electrode that is located in the first direction with the main pixel electrode interposed therebetween and has a longitudinal direction in the second direction. Liquid crystal display device. The pixel electrode further includes a sub-pixel electrode formed extending in the first direction,
The liquid crystal display device according to claim 7, wherein the common electrode further includes a sub-common electrode that is located in the second direction with the sub-pixel electrode interposed therebetween and is formed to extend in the first direction. A first substrate; a second substrate; a liquid crystal layer sandwiched between the first substrate and the second substrate; a first polarizing plate facing the outer surface of the first substrate; and facing the outer surface of the second substrate A liquid crystal display panel comprising: the second polarizing plate; a first adhesive that bonds the first substrate and the first polarizing plate; and a second adhesive that bonds the second substrate and the second polarizing plate; ,
A reinforcing plate facing the outer surface of the liquid crystal display panel;
A third adhesive for bonding the liquid crystal display panel and the reinforcing plate,
The first polarizing plate and the second polarizing plate each have a polarizer layer, and support layers provided on both sides of the polarizer layer,
A pixel in which a length along a first direction is shorter than a length along a second direction orthogonal to the first direction, the first substrate including a main pixel electrode having a longitudinal direction in the second direction A liquid crystal display device comprising: an electrode, wherein the second substrate has a common electrode including a main common electrode located in the first direction with the main pixel electrode interposed therebetween and having a longitudinal direction in the second direction.   The liquid crystal display device according to claim 10, wherein at least one of the support layers has a thickness of less than 40 μm.

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